Bus bit width conversion method and device, equipment and storage medium

Abstract

The embodiment of the invention provides a bus bit width conversion method and device, equipment and a storage medium, and relates to the technical field of communication, and the method comprises the steps: obtaining a first data bit width of a host end and a second data bit width of a slave end in response to a received bus transmission signal sent by the host end, the bus transmission signal comprises bus command information and bus data information; if the first data bit width is larger than the second data bit width, configuration information of a register is obtained, and a command conversion mode is determined according to the configuration information; converting the bus command information into target command information according to a command conversion mode; and sending the target command information to the slave end, so that the slave end receives the bus data information according to the target command information. By setting the configuration information of the register, format conversion is performed on the transmission command, bit width conversion of the bus is realized, transmission delay is further reduced, and data processing performance is improved.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a bus bit width conversion method, device, equipment and storage medium. Background Art

[0002] The AXI (Advanced eXtensible Interface) bus is an important part of the Advanced Microcontroller Bus Architecture (AMBA) bus, and has the characteristics of high performance, high bandwidth and low latency. Inside the chip, different modules communicate with each other through the AXI bus. When the data bit widths of the master and slave connected by the AXI bus are different, bit width conversion is required to ensure smooth communication.

[0003] In the prior art, when the bit width of the host side of the AXI bus is larger than the bit width of the slave side, the slave side may not be able to correctly parse the received data because the data may be truncated or misplaced. Usually, a simplified design is adopted to increase the number of burst transmissions according to the data bit width of the master and slave to perform bit width conversion. However, when there are specific data transmission performance requirements, or when the slave cannot accept multiple burst transmission commands, this conversion method may cause the bus to get stuck and fail to meet the design requirements. Summary of the invention

[0004] The purpose of the embodiments of the present invention is to provide a bus width conversion method, device, equipment and storage medium, by providing configuration information of multiple registers, selecting a command conversion mode that meets the data transmission requirements, and realizing bus width conversion, thereby meeting flexible data transmission requirements and improving data processing efficiency. The specific technical solutions are as follows:

[0005] In a first aspect of the present invention, a method for converting a bus width is provided, wherein the bus is used to connect a host end and a slave end, and the method comprises:

[0006] In response to receiving a bus transmission signal sent by the host end, acquiring a first data bit width of the host end and a second data bit width of the slave end, wherein the bus transmission signal includes bus command information and bus data information;

[0007] If the first data bit width is greater than the second data bit width, obtaining configuration information of the register, and determining a command conversion mode according to the configuration information;

[0008] According to the command conversion method, converting the bus command information into target command information;

[0009] The target command information is sent to the slave end, so that the slave end receives the bus data information according to the target command information.

[0010] Optionally, after acquiring the first data bit width of the host end and the second data bit width of the slave end, the method further includes:

[0011] If the first data bit width is less than or equal to the second data bit width, obtaining a burst transmission sent by the host end;

[0012] According to the first length information of the burst transmission, the bus command information is sent to the slave end, so that the slave end receives the bus data information according to the bus command information.

[0013] Optionally, the configuration information of the register includes a multi-burst transmission mode and a long burst transmission mode, and the acquiring the configuration information of the register and determining the command conversion mode according to the configuration information includes:

[0014] If the configuration information is a multi-burst transmission mode, confirming that the command conversion mode is a first command conversion mode;

[0015] If the configuration information is a long burst transmission mode, it is confirmed that the command conversion mode is a second command conversion mode.

[0016] Optionally, converting the bus command information into target command information according to the command conversion method includes:

[0017] Calculating a multiple value of the first data bit width and the second data bit width;

[0018] Acquire first number information and second length information of the bus command information, and calculate a first product of the first number information and the multiple value, and a second product of the second length information and the multiple value;

[0019] If the command conversion mode is the first command conversion mode, the length information of the target command information is set to the second length information, and the second number information of the target command information is set to the first product;

[0020] If the command conversion mode is the second command conversion mode, the length information of the target command information is set to the second product, and the number information of the target command information is set to the first number information.

[0021] Optionally, after acquiring the first data bit width of the host end and the second data bit width of the slave end in response to receiving the bus transmission signal sent by the host end, the method further includes:

[0022] Get the preset cache area;

[0023] The bus transmission signal is cached in the preset cache area in a first-in-first-out order.

[0024] Optionally, sending the target command information to the slave end so that the slave end receives the bus data information according to the target command information includes:

[0025] Sending the target command information to the slave end;

[0026] Extracting a specified data bit width and a burst transmission mode from the target command information by the slave end;

[0027] The slave end is controlled to receive the bus data information according to the specified data bit width and the burst transmission mode.

[0028] Optionally, in response to receiving a bus transmission signal sent by the host end, acquiring a first data bit width of the host end and a second data bit width of the slave end includes:

[0029] In response to receiving a bus transmission signal sent by the host end, extracting bus command information and bus data information from the bus transmission signal;

[0030] Analyzing the sending data bit width of the bus data information, and using the sending data bit width as the first data bit width of the host end;

[0031] The bus data information received by the slave end is read, and a received data bit width of the bus data information is analyzed, and the received data bit width is used as a second data bit width of the slave end.

[0032] In a second aspect of the present invention, a bus width conversion device is provided, wherein the bus is used to connect a host end and a slave end, and the device comprises: a data width detection module, which is used to obtain a first data width of the host end and a second data width of the slave end in response to receiving a bus transmission signal sent by the host end, wherein the bus transmission signal comprises bus command information and bus data information;

[0033] A command conversion confirmation module, configured to obtain configuration information of a register if the first data bit width is smaller than the second data bit width, and determine a command conversion mode according to the configuration information;

[0034] A command information conversion module, used to convert the bus command information into target command information according to the command conversion mode;

[0035] The command information sending module is used to send the target command information to the slave end, so that the slave end receives the bus data information according to the target command information.

[0036] In the third aspect of the implementation of the present invention, an electronic device is also provided, comprising: one or more processors; a memory; and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs are configured to execute any of the bus width conversion methods described above.

[0037] In a fourth aspect of the implementation of the present invention, a non-volatile readable storage medium is also provided. When instructions in the non-volatile readable storage medium are executed by a processor of an electronic device, the electronic device can execute any of the above-mentioned bus width conversion methods.

[0038] The bus bit width conversion method provided in the embodiment of the present invention obtains the first data bit width of the host end and the second data bit width of the slave end in response to receiving a bus transmission signal sent by the host end, and the bus transmission signal includes bus command information and bus data information; if the first data bit width is less than the second data bit width, obtain the configuration information of the register, and determine the command conversion mode according to the configuration information; according to the command conversion mode, convert the bus command information into target command information; send the target command information to the slave end, so that the slave end receives the bus data information according to the target command information. The embodiment of the present invention performs bit width conversion through the bus according to the data bit width of the host end and the slave end, and proposes two command conversion modes corresponding to the configuration mode to adapt to different data transmission requirements. It can be flexibly selected according to different application scenarios and requirements. Whether it is to increase the number of command transmissions or increase the data length of a single command transmission, it can meet the flexible data transmission requirements and effectively improve the overall performance of the chip system. In particular, when processing a large amount of data transmission, it can significantly reduce delays and improve throughput.

[0039] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0041] Figure 1 It is a flowchart of a method for converting bus width provided by an embodiment of the present invention;

[0042] Figure 2 It is a structural block diagram of a bus width conversion device provided by an embodiment of the present invention;

[0043] Figure 3 It is a block diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0044] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0045] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, some technical features involved in the embodiments of the present invention are explained and illustrated below:

[0046] The AXI (Advanced eXtensible Interface) bus is an important part of the Advanced Microcontroller Bus Architecture (AMBA) bus, with the characteristics of high performance, high bandwidth and low latency. Inside the chip, different modules communicate with each other through the AXI bus interconnection. When the data bit widths of the master and slave connected by the AXI bus are different, bit width conversion is required to ensure smooth communication.

[0047] Data bit width refers to the number of binary bits used to represent data in digital circuits or computer systems. It determines the range and accuracy of data that can be represented.

[0048] Host usually refers to a device or node with high control and decision-making capabilities in the system. The host usually has control over the system or network and can initiate and manage data transmission, communication sessions and other operations.

[0049] Slave, usually refers to the device or node in the system that executes host instructions and responds to host requests. Slave usually passively responds to host instructions and requests and performs specific operations.

[0050] Burst transmission is a data transmission mode in which data is transmitted at a continuous high rate in a short period of time, rather than continuously at a constant rate. This transmission mode is usually used in scenarios where large amounts of data need to be transmitted quickly, such as in computer buses, network communications, or storage systems.

[0051] As an example, different modules in the chip communicate with each other through an AXI bus interconnection using a topological structure, wherein the host and the slave are connected and communicated through AXI. If the data bit widths of the master and the slave are different, the slave may not be able to correctly parse the received data because the data may be truncated or misaligned. In this case, bit width conversion is required. A simplified design is usually adopted. When converting the bit width, the number of burst transmissions is increased according to the data bit width of the master and the slave to perform the bit width conversion. However, when there are performance requirements for data transmission or the slave cannot accept multiple burst transmission commands, the different data bit widths between the host and the slave may affect the efficiency and compatibility of data processing.

[0052] In this regard, in an embodiment of the present invention, bit width conversion is performed through the bus according to the data bit width of the host end and the slave end, and two command conversion methods corresponding to the configuration mode are proposed to adapt to different data transmission requirements. Flexible selection can be made according to different application scenarios and requirements. Whether it is to increase the number of command transmissions or to increase the data length of a single command transmission, it can meet flexible data transmission requirements and effectively improve the overall performance of the chip system, especially when processing large amounts of data transmission, it can significantly reduce delays and improve throughput.

[0053] Reference Figure 1 , shows a flowchart of a method for converting bus width provided in an embodiment of the present invention, wherein the bus is used to establish a communication connection between a host end and a slave end, and specifically may include the following steps:

[0054] S101, in response to receiving a bus transmission signal sent by a host end, obtaining a first data bit width of the host end and a second data bit width of the slave end.

[0055] In a data transmission system, especially when a bus (such as SPI, I2C, UART, etc.) is used for master-slave device communication, it is often encountered that the host end and the slave end have different data bit widths. Different modules in the chip can be interconnected and communicated through the AXI bus, and the host end and the slave end can also be interconnected and communicated through the AXI bus. If the data bit widths of the master and slave are different, bit width conversion is required. In order to reduce the cost of bit width adjustment, the embodiment of the present invention realizes the uniform bit width of the host end sending data and the slave end receiving data by converting the bus bit width, ensuring that the device ends with different bit widths can work together without the need to make separate adjustments to each system.

[0056] The host end connected to the AXI bus can generate a bus transmission signal, which can include bus command information and bus data information. Preferably, the bus command information in the embodiment of the present invention takes write command information as an example, and the bus data information takes write data information as an example. Considering that the bit widths at both ends of the AXI bus are not equal, the data bit width transmitted through the advanced extensible interface bus needs to be adapted and adjusted to achieve normal communication between the devices at both ends of the advanced extensible interface bus. Therefore, the embodiment of the present invention first obtains the first data bit width of the host end and the second data bit width of the slave end, and confirms whether the data bit widths of the host end and the slave end are the same, and whether bit width conversion is required.

[0057] The data width detection on the device side can be implemented by using a data width detection module or existing means. For example, bus command information and bus data information can be extracted from the received bus transmission signal. The bus command information usually includes bus command information, bus data information, burst transmission length, burst transmission number and other parameters, wherein the bus data information is the actual data content to be transmitted. By analyzing the structure of the bus data information, the sending data width of the host side can be obtained, and the analyzed sending data width is used as the first data width of the host side, and the bus data information received by the slave side is read. By analyzing the receiving data width of the bus data information, the data width that the slave side can receive can be obtained, and the analyzed receiving data width is used as the second data width of the slave side, which is usually determined according to the design parameters or configuration information of the slave side.

[0058] By analyzing the first data bit width of the host end and the second data bit width of the slave end, it can be determined whether bit width conversion is required.

[0059] When the first data bit width of the host end is less than or equal to the second data bit width of the slave end, directly transmitting data through the bus will not cause data parsing errors or loss of data information, so there is no need to perform bit width conversion, and the bus transmission signal of the host end can be sent directly to the slave end through burst transmission. Specifically, since the data bit width of the slave end is large enough to accommodate the bus data information sent by the host end, there is no need to perform multiple burst transmissions to send data in batches. The length information of the burst transmission can be obtained, and the bus command information of the host end can be sent directly to the slave end according to the length information of the burst transmission, and only one burst transmission is sent. Sending complete data at one time can ensure the integrity and consistency of the data and avoid errors or data inconsistencies that may be caused by batch transmission.

[0060] In one example, after receiving the bus transmission signal sent by the host side, all bus transmission signals from the host side can be cached in a preset cache area, and after confirming the command conversion method, the bus command information is taken out from the cache area for format conversion. Preferably, in order to maintain data consistency and correctness, a cache area with a FIFO (First In, First Out) structure can be used to cache the bus transmission signal of the host side. The FIFO structure can ensure that the bus data information is cached and processed in the order sent by the host side.

[0061] During the data transmission process, there may be short delays or interruptions. The FIFO cache area can temporarily store this data to prevent data loss. At the same time, the AXI bus supports burst transmission, that is, transmitting multiple data items at a time. The FIFO cache area can effectively handle these burst transmissions to ensure that all data items can be received and processed in order.

[0062] S102: If the first data bit width is greater than the second data bit width, obtain configuration information of the register, and determine a command conversion method according to the configuration information.

[0063] When the first data bit width of the host end is greater than the second data bit width of the slave end, the slave end cannot receive the complete data sent by the host end at one time due to the smaller data bit width. Therefore, it is necessary to divide the high bit width data of the host end into data blocks suitable for the low bit width of the slave end, which is achieved by converting the bus bit width in the embodiment of the present invention to ensure that the size of each data information transmitted matches the data bit width of the slave end.

[0064] In the embodiment of the present invention, the command conversion mode corresponding to the configuration information can be selected by reading the configuration information of the register. The configuration information of the register is usually stored in a specific register, and the configuration information can be obtained through a read operation.

[0065] Specifically, according to actual needs, the configuration information can be set in advance through the bus, and a corresponding relationship between the configuration information and the command conversion mode can be established. After the register configuration information is obtained, the corresponding command conversion mode can be determined according to the configuration information. Exemplarily, in order to reduce complexity, the configuration information of the register can be set as a flag bit, and a corresponding relationship between each flag bit and the command conversion mode can be established. For example, when the configuration information of the register is read as 0, it can be confirmed that the current mode is a multi-burst transfer mode, and the command conversion mode corresponding to the multi-burst transfer mode is the first command conversion mode. When the configuration information of the register is read as 1, it can be confirmed that the current mode is a long burst transfer mode, and the command conversion mode corresponding to the long burst transfer mode is the second command conversion mode, and the bus command information is formatted according to the confirmed command conversion mode.

[0066] S103, converting the bus command information into target command information according to the command conversion method.

[0067] According to the read register configuration information and the corresponding relationship, the specific command conversion method can be determined, and the key data and control information can be extracted from the bus command information received from the host, such as data bit width, burst transfer length, burst transfer number, etc. According to the determined command conversion method, the bus command information is subjected to corresponding format conversion operations, and the target command information suitable for reception by the slave is generated according to the converted data block or burst transfer, so as to ensure that the slave can correctly receive and process the bus data information.

[0068] Specifically, in the multi-burst transmission mode, the high-bit width data on the host side can be divided into multiple data blocks suitable for the low-bit width on the slave side, and corresponding command information can be generated respectively. For example, the length of the bus command information can be kept unchanged, and the number of bus command information can be increased to obtain the target command information, such as setting the length information of the target command information to be the same as the length information of the bus command information, and setting the number information of the target command information to be the product of the number information of the bus command information and the multiple value, wherein the multiple value refers to the proportional relationship between the first data bit width on the host side and the second data bit width on the slave side. For example, when the first data bit width on the host side is 64 bits and the second data bit width on the slave side is 32 bits, the calculated multiple value is 2, that is, the first data bit width is twice the second data bit width.

[0069] In the long burst transfer mode, the high-bit width data on the host side can be regarded as a longer burst transfer to generate corresponding command information. For example, the number information of the bus command information can be kept unchanged, and the length information of the bus command information can be increased to obtain the target command information, such as setting the number information of the target command information to be the same as the number information of the bus command information, and setting the length information of the target command information to be the product of the length information of the bus command information and the multiple value.

[0070] For example, the length of a burst transmission is 4, and the number of burst transmissions is 1. Accordingly, the length information of the bus command information is also 4, and the number information is 1. In the multi-burst transmission mode, the number information of the bus command information is added, and the length information of the target command information is set to be the same as the length information of the bus command information, that is, the length is 4, and the number information of the target command information is set to be the product of the number information of the bus command information and the multiple value, that is, the number is increased to 1×2=2; in the long burst transmission mode, the length information of the bus command information is added, and the number information of the target command information is set to be the same as the number information of the bus command information, that is, the number is 1, and the length information of the target command information is set to be the product of the length information of the bus command information and the multiple value, that is, the length information is increased to 4×2=8.

[0071] S104, sending the target command information to the slave end, so that the slave end receives the bus data information according to the target command information.

[0072] The generated target command information is sent to the slave end through the AXI bus. After receiving the target command information, the slave end can parse the target command information and obtain the parameters therein, such as data bit width, burst transfer length and burst transfer number. These parameters will guide the slave end on how to receive and process bus data information.

[0073] Exemplarily, according to the parameters in the target command information, the slave end starts to receive bus data information. If the length of the burst transmission indicated by the target command information is 4, the slave end will receive 4 data items; if the number of indicated burst transmissions is 1, the slave end will only receive one burst transmission. Thus, the slave end can perform corresponding data processing and storage operations based on the received bus data information.

[0074] The embodiment of the present invention confirms the current data transmission mode by setting register configuration information, and further determines the corresponding command conversion mode. When the configuration information is a multi-burst transmission mode, the length information of the bus command information is kept unchanged, and the number information of the bus command information is increased to obtain the target command information. When the configuration information is a long burst mode, the number information of the bus command information is kept unchanged, and the length information of the bus command information is increased to obtain the target command information. The converted target command information is sent to the slave end, so that the slave end receives and processes the bus data information according to the target command information, and completes the conversion of the bus bit width. The embodiment of the present invention performs bit width conversion through the bus according to the data bit width of the host end and the slave end, and proposes two command conversion modes corresponding to the configuration mode to adapt to different data transmission requirements. It can be flexibly selected according to different application scenarios and requirements. Whether it is to increase the number of command transmissions or to increase the data length of a single command transmission, it can meet the flexible data transmission requirements and effectively improve the overall performance of the chip system. In particular, when processing a large amount of data transmission, it can significantly reduce delays and improve throughput.

[0075] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

[0076] Reference Figure 2 , shows a bus width conversion device provided by an embodiment of the present invention, wherein the bus is used to establish a communication connection between a host end and a slave end, and specifically may include the following modules:

[0077] A data bit width detection module 201, configured to obtain a first data bit width of the host end and a second data bit width of the slave end in response to receiving a bus transmission signal sent by the host end, wherein the bus transmission signal includes bus command information and bus data information;

[0078] A command conversion confirmation module 202 is used to obtain configuration information of a register if the first data bit width is greater than the second data bit width, and determine a command conversion mode according to the configuration information;

[0079] A command information conversion module 203, used to convert the bus command information into target command information according to the command conversion method;

[0080] The command information sending module 204 is used to send the target command information to the slave end, so that the slave end receives the bus data information according to the target command information.

[0081] Furthermore, the device also includes:

[0082] A burst transmission module, configured to obtain a burst transmission sent by the host end if the first data bit width is less than or equal to the second data bit width;

[0083] The burst receiving module is used to send the bus command information to the slave end according to the first length information of the burst transmission, so that the slave end receives the bus data information according to the bus command information.

[0084] Furthermore, the configuration information of the register includes a multi-burst transmission mode and a long burst transmission mode, and the command conversion confirmation module 202 further includes:

[0085] A first conversion module, configured to confirm that the command conversion mode is a first command conversion mode if the configuration information is a multi-burst transmission mode;

[0086] The second conversion module is used to confirm that the command conversion mode is a second command conversion mode if the configuration information is a long burst transmission mode.

[0087] Furthermore, the command information conversion module 203 also includes:

[0088] A growth multiple calculation module, used for calculating a multiple value of the first data bit width and the second data bit width;

[0089] A bus command information calculation module, used for obtaining first number information and second length information of the bus command information, and calculating a first product of the first number information and the multiple value, and a second product of the second length information and the multiple value;

[0090] A first conversion submodule, configured to set the length information of the target command information to the second length information, and set the second number information of the target command information to the first product if the command conversion mode is the first command conversion mode;

[0091] The second conversion submodule is used to set the length information of the target command information to the second product and the number information of the target command information to the first number information if the command conversion mode is the second command conversion mode.

[0092] Furthermore, the device also includes:

[0093] A cache area confirmation module is used to obtain a preset cache area;

[0094] The signal buffer module is used to buffer the bus transmission signal into the preset buffer area in a first-in-first-out order.

[0095] Furthermore, the command information sending module 204 also includes:

[0096] A command information sending submodule, used for sending the target command information to the slave end;

[0097] A command bit width extraction module, used for extracting a specified data bit width and a burst transmission mode from the target command information through the slave end;

[0098] The bus data receiving module is used to control the slave end to receive the bus data information according to the specified data bit width and the burst transmission mode.

[0099] Furthermore, the data width detection module 201 further includes:

[0100] a transmission signal receiving module, configured to extract bus command information and bus data information from the bus transmission signal in response to receiving the bus transmission signal sent by the host end;

[0101] a first bit width detection module, used for analyzing the sending data bit width of the bus data information, and using the sending data bit width as the first data bit width of the host end;

[0102] The second bit width detection module is used to read the bus data information received by the slave end, analyze the received data bit width of the bus data information, and use the received data bit width as the second data bit width of the slave end.

[0103] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0104] refer to Figure 3 The embodiment of the present invention further provides an electronic device, including a processor 301, a communication interface 302, a memory 303 and a communication bus 304, wherein the processor 301, the communication interface 302 and the memory 303 communicate with each other through the communication bus 304.

[0105] Memory 303, used for storing computer programs;

[0106] The processor 301 is used to execute the program stored in the memory 303 to implement the following steps:

[0107] In response to receiving a bus transmission signal sent by the host end, acquiring a first data bit width of the host end and a second data bit width of the slave end, the bus transmission signal including bus command information and bus data information;

[0108] If the first data bit width is smaller than the second data bit width, obtaining configuration information of the register, and determining a command conversion mode according to the configuration information;

[0109] According to the command conversion method, the bus command information is converted into the target command information;

[0110] The target command information is sent to the slave end, so that the slave end receives the bus data information according to the target command information.

[0111] The memory may include a random access memory (RAM) or a non-volatile memory, such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned processor.

[0112] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0113] The embodiment of the present invention further provides a non-volatile readable storage medium. When the instructions in the non-volatile readable storage medium are executed by the processor of the electronic device, the electronic device can perform the various processes of the above-mentioned bus width conversion method embodiment and achieve the same technical effect. To avoid repetition, it is not repeated here. The computer-readable storage medium is, for example, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0114] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0115] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0116] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present invention.

[0117] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed in the embodiments of the present invention can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0118] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A bus width conversion method, characterized in that: The bus is used to connect the host end and the slave end, and the method includes: In response to receiving a bus transmission signal sent by the host end, acquiring a first data bit width of the host end and a second data bit width of the slave end, wherein the bus transmission signal includes bus command information and bus data information; If the first data bit width is greater than the second data bit width, obtaining configuration information of the register, and determining a command conversion mode according to the configuration information; According to the command conversion method, converting the bus command information into target command information; The target command information is sent to the slave end, so that the slave end receives the bus data information according to the target command information.

2. The method according to claim 1, characterized in that After acquiring the first data bit width of the host end and the second data bit width of the slave end, the method further includes: If the first data bit width is less than or equal to the second data bit width, obtaining a burst transmission sent by the host end; According to the first length information of the burst transmission, the bus command information is sent to the slave end, so that the slave end receives the bus data information according to the bus command information.

3. The method according to claim 1, characterized in that The configuration information of the register includes a multi-burst transmission mode and a long burst transmission mode, and the acquiring the configuration information of the register and determining the command conversion mode according to the configuration information includes: If the configuration information is a multi-burst transmission mode, confirming that the command conversion mode is a first command conversion mode; If the configuration information is a long burst transmission mode, it is confirmed that the command conversion mode is a second command conversion mode.

4. The method according to claim 3, characterized in that The converting the bus command information into target command information according to the command conversion mode includes: Calculating a multiple value of the first data bit width and the second data bit width; Acquire first number information and second length information of the bus command information, and calculate a first product of the first number information and the multiple value, and a second product of the second length information and the multiple value; If the command conversion mode is the first command conversion mode, the length information of the target command information is set to the second length information, and the second number information of the target command information is set to the first product; If the command conversion mode is the second command conversion mode, the length information of the target command information is set to the second product, and the number information of the target command information is set to the first number information.

5. The method according to claim 1, characterized in that After acquiring the first data bit width of the host end and the second data bit width of the slave end in response to receiving the bus transmission signal sent by the host end, the method further includes: Get the preset cache area; The bus transmission signal is cached in the preset cache area in a first-in-first-out order.

6. The method according to claim 1, characterized in that The sending of the target command information to the slave end so that the slave end receives the bus data information according to the target command information includes: Sending the target command information to the slave end; Extracting a specified data bit width and a burst transmission mode from the target command information by the slave end; The slave end is controlled to receive the bus data information according to the specified data bit width and the burst transmission mode.

7. The method according to claim 1, characterized in that The step of acquiring the first data bit width of the host end and the second data bit width of the slave end in response to receiving the bus transmission signal sent by the host end includes: In response to receiving a bus transmission signal sent by the host end, extracting bus command information and bus data information from the bus transmission signal; Analyzing the sending data bit width of the bus data information, and using the sending data bit width as the first data bit width of the host end; The bus data information received by the slave end is read, and a received data bit width of the bus data information is analyzed, and the received data bit width is used as a second data bit width of the slave end.

8. A bus width conversion device, characterized in that: The bus is used to connect the host end and the slave end, and the device includes: a data bit width detection module, configured to obtain a first data bit width of the host end and a second data bit width of the slave end in response to receiving a bus transmission signal sent by the host end, wherein the bus transmission signal includes bus command information and bus data information; A command conversion confirmation module, configured to obtain configuration information of a register if the first data bit width is smaller than the second data bit width, and determine a command conversion mode according to the configuration information; A command information conversion module, used to convert the bus command information into target command information according to the command conversion mode; The command information sending module is used to send the target command information to the slave end, so that the slave end receives the bus data information according to the target command information.

9. An electronic device, comprising: one or more processors; Memory; One or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors, and the one or more programs are configured to execute the bus width conversion method described in any one of claims 1 to 7.

10. A non-volatile readable storage medium, when instructions in the non-volatile readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the bus bit width conversion method according to any one of claims 1 to 7.

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