Integrated power device and manufacturing method thereof

Abstract

The invention discloses an integrated power device. The integrated power device comprises a main MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), a current sensor, a temperature sensor and a voltage sensor which are integrated together, and the unit structure of the main MOSFET and the unit structure of the current sensor both adopt the same MOSFET unit structure. The MOSFET unit structure comprises a drift region, a body region, a first gate structure, a source region and a drain region; and the first gate structure adopts a groove type separation gate. The temperature sensor comprises a drift region, a body region and a second gate structure; the top of the body region and the second source conductive material layer of the second gate structure are connected to a first electrode composed of a front metal layer, and the first electrode and the drain form two measuring electrodes of the temperature sensor. The voltage sensor comprises a drift region, a first conductive type heavily doped first contact region and a third gate structure; the top of the first contact region and the top of the third source conductive material layer of the third gate structure are connected with a second electrode. The invention also provides a manufacturing method of the integrated power device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an integrated power device. The present invention also relates to a method for manufacturing the integrated power device. Background Art

[0002] The existing traditional MOS layout and process solutions only include the main MOS design solution and cannot detect abnormal working conditions of the MOS. Once overstressed, the device is prone to burn out.

[0003] If various sensors can be integrated into the power device of the main MOSFET at the same time, the performance of the device can be monitored in real time and the device can be protected. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide an integrated power device, which can realize the integration of a main MOSFET with a trench-type separation gate and multiple sensors, so as to accurately detect the state of the power chip and protect the chip in time, and at the same time reduce the on-resistance of the device, improve the breakdown voltage and switching speed of the device. To this end, the present invention also provides a method for manufacturing the integrated power device.

[0005] In order to solve the above technical problems, the integrated power device provided by the present invention includes a main MOSFET, a current sensor, a temperature sensor and a voltage sensor integrated together.

[0006] The cell structure of the main MOSFET and the cell structure of the current sensor both adopt the same MOSFET cell structure.

[0007] The MOSFET unit structure includes: a drift region doped with a first conductive type, a body region of a second conductive type formed in the surface region of the drift region, a first gate structure, a source region heavily doped with the first conductive type formed in the surface region of the body region, and a drain region heavily doped with the first conductive type formed on the back side of the drift region; the first gate structure adopts a trench-type separated gate, including a source conductive material layer and a gate conductive material layer formed in a first gate trench, a first dielectric layer is separated between the source conductive material layer and the first gate trench, a second dielectric layer is separated between the source conductive material layer and the gate conductive material layer, a gate dielectric layer is separated between the gate conductive material layer and the side of the first gate trench, and the gate conductive material layer passes through the body region; the source region and the source conductive material layer are both connected to a source composed of a front metal layer through corresponding contact holes at the top, the gate conductive material layer is connected to a gate composed of the front metal layer through the corresponding contact holes at the top, and a drain composed of a back metal layer is formed on the back side of the drain region.

[0008] The temperature sensor comprises: the drift region, the body region and the second gate structure; the second gate structure comprises the third dielectric layer formed on the inner surface of the second gate trench and the second source conductive material layer filled in the second gate trench; no first conductive type doping region is formed on the surface of the body region, the top of the body region and the top of the second source conductive material layer are connected to the first electrode composed of the front metal layer through the corresponding contact holes, and the first electrode and the drain constitute two measuring electrodes of the temperature sensor.

[0009] The voltage sensor includes: the drift region, a first contact region heavily doped with a first conductivity type formed in the surface area of ​​the drift region, and a third gate structure; the third gate structure includes the fourth dielectric layer formed on the inner surface of the third gate trench and a third source conductive material layer filled in the third gate trench; the body region is not formed on the surface of the drift region, the top of the first contact region and the top of the third source conductive material layer are connected to the second electrode composed of the front metal layer through the corresponding contact holes, and the second electrode and the drain constitute two measuring electrodes of the voltage sensor.

[0010] A further improvement is that the first dielectric layer is composed of a thermal oxidation layer or a thermal oxidation layer and a CVD oxidation layer stacked together.

[0011] The process structures of the third dielectric layer and the fourth dielectric layer are the same as the process structure of the first dielectric layer.

[0012] A further improvement is that the source conductive material layer, the second source conductive material layer and the third source conductive material layer are all composed of a first polysilicon layer.

[0013] The gate conductive material layer is composed of a second polysilicon layer.

[0014] A further improvement is that the temperature sensor includes a plurality of second gate trenches, and the second gate trenches include outermost second gate trenches and inner second gate trenches located between the outermost second gate trenches.

[0015] The width of the outermost second gate trench is greater than the width of the inner second gate trench and the trenches are formed simultaneously. The depth of the outermost second gate trench is greater than the depth of the inner second gate trench.

[0016] The first gate trench and the inner second gate trench have the same process structure and are formed simultaneously.

[0017] A further improvement is that the formation area of ​​the voltage sensor is surrounded by a first isolation structure, and the first isolation structure includes a fourth gate structure.

[0018] The fourth gate structure includes the fifth dielectric layer formed on the inner surface of the fourth gate trench and a fourth source conductive material layer filled in the fourth gate trench.

[0019] The width of the fourth gate trench is greater than that of the third gate trench and the fourth gate trenches are formed simultaneously, and the depth of the fourth gate trench is greater than that of the third gate trench.

[0020] The first gate trench and the third gate trench have the same process structure and are formed simultaneously.

[0021] The fourth source conductive material layer has the same process structure as the third source conductive material layer and is formed simultaneously, and the top of the fourth source conductive material layer is isolated from the second electrode.

[0022] A further improvement is that the first isolation structure further includes a bottom well region, which is formed in the drift region at the bottom of the fourth gate trench and extends to the bottom of the drift region.

[0023] A further improvement is that the trench-type separation gate corresponding to the first gate structure is an up-down structure or a left-right structure.

[0024] A further improvement is that the first conductivity type is N type and the second conductivity type is P type; or the first conductivity type is P type and the second conductivity type is N type.

[0025] In order to solve the above technical problems, in the manufacturing method of the integrated power device provided by the present invention, the integrated power device includes a main MOSFET, a current sensor, a temperature sensor and a voltage sensor integrated together; the unit structure of the main MOSFET and the unit structure of the current sensor both adopt the same MOSFET unit structure; the steps of forming each of the MOSFET unit structure, the temperature sensor and the voltage sensor include: A semiconductor substrate is provided and a drift region doped with a first conductivity type is formed on a top surface of the semiconductor substrate.

[0026] The first gate trench of each of the MOSFET unit structures, the second gate trench of the temperature sensor and the third gate trench of the voltage sensor are formed simultaneously.

[0027] The same dielectric growth process is used to simultaneously form a first dielectric layer on the inner surface of the first gate trench, a third dielectric layer on the inner surface of the second gate trench, and a fourth dielectric layer on the inner surface of the third gate trench.

[0028] A first conductive material layer is grown and back-etched, and a source conductive material layer is filled in the first gate trench, a second source conductive material layer is filled in the second gate trench, and a third source conductive material layer is filled in the third gate trench; the second gate structure comprises the third dielectric layer and the second source conductive material layer, and the third gate structure comprises the fourth dielectric layer and the third source conductive material layer.

[0029] The source conductive material layer is etched back so that the source conductive material layer is located in a bottom area of ​​the first gate trench.

[0030] A second dielectric layer is formed on the surface of the source conductive material layer after etching back, and the first dielectric layer on the side surface of the first gate trench above the top surface of the second dielectric layer is removed.

[0031] A gate dielectric layer is formed on the side of the first gate trench above the top surface of the second dielectric layer.

[0032] A second conductive material layer is grown and back-etched to fill the first gate trench on the top surface of the second dielectric layer to form a gate conductive material layer; the first gate structure adopts a trench-type separated gate, and the composition structure includes the first dielectric layer, the source conductive material layer, the second dielectric layer, the gate dielectric layer and the gate conductive material layer.

[0033] Performing a second conductive type doping body implantation plus annealing advances the formation of a body region in the surface region of the drift region in each of the MOSFET cell structure formation region and the temperature sensor formation region.

[0034] A first conductive type heavily doped source implant plus annealing is performed to simultaneously form a source region in the surface region of the body region of each MOSFET cell structure formation region and a first contact region in the surface region of the drift region of the voltage sensor.

[0035] Contact holes and a front metal layer are formed, and the front metal layer is patterned to form a gate, a source, a first electrode and a second electrode; the source region and the source conductive material layer are connected to the source through corresponding contact holes at the top, the gate conductive material layer is connected to the gate through corresponding contact holes at the top, the top of the body region and the top of the second source conductive material layer are connected to the first electrode through corresponding contact holes, and the top of the first contact region and the top of the third source conductive material layer are connected to the second electrode through corresponding contact holes.

[0036] The semiconductor substrate is thinned and a drain region heavily doped with a first conductivity type is formed on the back side of the drift region.

[0037] A drain electrode composed of a back metal layer is formed on the back side of the drain region; the first electrode and the drain electrode constitute two measuring electrodes of the temperature sensor; and the second electrode and the drain constitute two measuring electrodes of the voltage sensor.

[0038] A further improvement is that the first dielectric layer is formed by a thermal oxidation process; or, the first dielectric layer is formed by a thermal oxidation process plus a CVD process.

[0039] A further improvement is that the film layer formed by the first growth of the conductive material layer is a first polysilicon layer.

[0040] The film layer formed by the second conductive material layer growth is a second polysilicon layer.

[0041] A further improvement is that the temperature sensor includes a plurality of second gate trenches, and the second gate trenches include outermost second gate trenches and inner second gate trenches located between the outermost second gate trenches.

[0042] The width of the outermost second gate trench is greater than the width of the inner second gate trench, and the depth of the outermost second gate trench is greater than the depth of the inner second gate trench.

[0043] The process structure of the first gate trench and the inner second gate trench is the same.

[0044] A further improvement is that, while forming the first gate trench, a fourth gate trench is also formed on the peripheral side of the formation area of ​​the voltage sensor.

[0045] The width of the fourth gate trench is greater than that of the third gate trench, and the depth of the fourth gate trench is greater than that of the third gate trench.

[0046] The process structures of the first gate trench and the third gate trench are the same.

[0047] While forming the first dielectric layer, the method further includes forming a fifth dielectric layer on the inner surface of the fourth gate trench.

[0048] The first conductive material layer growth and etching back process also simultaneously fills a fourth source conductive material layer in the fourth gate trench; the top of the fourth source conductive material layer is isolated from the second electrode; a fourth gate structure is formed by the fifth dielectric layer and the fourth source conductive material layer, and the fourth gate structure serves as a component of the first isolation structure.

[0049] A further improvement is that after the fourth gate trench is formed and before the first dielectric layer is formed, the method further includes: Well implantation is performed to form a bottom well region in the drift region at the bottom of the fourth gate trench, wherein the bottom well region also extends to the bottom of the drift region.

[0050] The fourth gate structure and the bottom well region together serve as components of a first isolation structure.

[0051] A further improvement is that the first conductivity type is N type and the second conductivity type is P type; or the first conductivity type is P type and the second conductivity type is N type.

[0052] The main MOSFET of the present invention adopts a trench-type separation gate, which can reduce the on-resistance of the device and improve the breakdown voltage and switching speed of the device; at the same time, the present invention can also integrate three sensors, namely a current sensor, a temperature sensor and a voltage sensor, so as to accurately detect the state of the power chip and protect the chip in time.

[0053] In addition, in the integrated structure, the unit structure of the current sensor is the same as the unit structure of the main MOSFET, and the temperature sensor and the voltage sensor respectively adopt the second gate structure and the third gate structure. The gate trenches and the dielectric layer on the inner surface of the second gate structure and the third gate structure and the filled conductive material layer can be formed simultaneously with the first gate trench, the first dielectric layer and the source conductive material layer of the trench-type separation gate, i.e., the first gate structure. This can not only improve the detection accuracy of the sensor, but also improve the performance in the formation area of ​​the temperature sensor and the voltage sensor, for example, it can reduce the on-resistance of the formation area of ​​the temperature sensor and the voltage sensor and improve the voltage resistance of the formation area of ​​the temperature sensor and the voltage sensor, and finally improve the overall performance of the integrated power device. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments: Figure 1 is a schematic cross-sectional structure diagram of an integrated power device according to an embodiment of the present invention; Figure 2A-2K It is a schematic diagram of the device cross-sectional structure in each step of the manufacturing method of the integrated power device according to the embodiment of the present invention. DETAILED DESCRIPTION

[0055] like Figure 1 , which is a schematic diagram of the cross-sectional structure of an integrated power device according to an embodiment of the present invention; the integrated power device according to the embodiment of the present invention includes a main MOSFET, a current sensor, a temperature sensor and a voltage sensor integrated together.

[0056] The cell structure of the main MOSFET and the cell structure of the current sensor both adopt the same MOSFET cell structure. Figure 1The cross-sectional structure of three regions, namely, regions 101a, 101b and 101c, is shown in FIG. 1 . Region 101a corresponds to a formation region of a MOSFET unit structure, region 101b corresponds to a formation region of a temperature sensor, and region 101c corresponds to a formation region of a voltage sensor.

[0057] The MOSFET unit structure includes: a drift region 102 doped with a first conductive type, a body region 103 of a second conductive type formed in the surface region of the drift region 102, a first gate structure, a source region 109 heavily doped with a first conductive type formed in the surface region of the body region 103, and a drain region heavily doped with a first conductive type formed on the back side of the drift region 102, wherein the drain region is composed of a thinned semiconductor substrate 101 heavily doped with a first conductive type or is formed by back-side injection of a thinned semiconductor substrate 101 heavily doped with a first conductive type.

[0058] The first gate structure adopts a trench-type separated gate, including a source conductive material layer 1061 and a gate conductive material layer 108 formed in the first gate trench 1041, a first dielectric layer 1051 is separated between the source conductive material layer 1061 and the first gate trench 1041, a second dielectric layer 1052 is separated between the source conductive material layer 1061 and the gate conductive material layer 108, a gate dielectric layer 107 is separated between the gate conductive material layer 108 and the side of the first gate trench 1041, and the gate conductive material layer 108 passes through the body region 103; the source region 109 and the source conductive material layer 1061 are both connected to the source composed of the front metal layer 113 through the corresponding contact hole 112 on the top, the gate conductive material layer 108 is connected to the gate composed of the front metal layer 113 through the corresponding contact hole 112 on the top, and a drain composed of the back metal layer is formed on the back of the drain region (not shown). The contact hole 112 will pass through the interlayer film 111.

[0059] In the embodiment of the present invention, the trench-type separation gate corresponding to the first gate structure is a top-bottom structure. In other embodiments, the trench-type separation gate corresponding to the first gate structure can also be a left-right structure.

[0060] The temperature sensor includes: a drift region 102, a body region 103 and a second gate structure; the second gate structure includes a third dielectric layer 1053 formed on the inner surface of a second gate trench 1042 and a second source conductive material layer 1062 filled in the second gate trench 1042; no first conductive type doping region is formed on the surface of the body region 103, and the top of the body region 103 and the top of the second source conductive material layer 1062 are connected to a first electrode composed of a front metal layer 113 through corresponding contact holes 112, and the first electrode and the drain constitute two measuring electrodes of the temperature sensor.

[0061] In the embodiment of the present invention, the temperature sensor includes a plurality of second gate trenches 1042 , and the second gate trenches 1042 include outermost second gate trenches 1042 a and inner second gate trenches 1042 located between the outermost second gate trenches 1042 a . Figure 1 In the figure, the outermost second gate trench is individually indicated by the mark 1042a, and the inner second gate trench is still indicated by the mark 1042.

[0062] The width of the outermost second gate trench 1042 a is greater than the width of the inner second gate trench 1042 and they are formed simultaneously, and the depth of the outermost second gate trench 1042 a is greater than the depth of the inner second gate trench 1042 .

[0063] The first gate trench 1041 and the inner second gate trench 1042 have the same process structure and are formed simultaneously.

[0064] In the embodiment of the present invention, the first electrode and the drain form two electrodes of a body diode between the body region 103 and the drift region 102. When the temperature of the region where the body diode is located changes, the working performance of the body diode will change, so temperature detection can be performed through the first electrode and the drain.

[0065] In the embodiment of the present invention, the introduction of the second gate structure can further improve the performance in the region of the temperature sensor, for example, it can reduce the on-resistance of the drift region 102 in the region and increase the breakdown voltage of the region.

[0066] The voltage sensor includes: a drift region 102, a first contact region 109a heavily doped with a first conductivity type formed in the surface area of ​​the drift region 102, and a third gate structure; the third gate structure includes a fourth dielectric layer 1054 formed on the inner surface of a third gate trench 1043 and a third source conductive material layer 1063 filled in the third gate trench 1043; no body region 103 is formed on the surface of the drift region 102, the top of the first contact region 109a and the top of the third source conductive material layer 1063 are connected to a second electrode composed of a front metal layer 113 through corresponding contact holes 112, and the second electrode and the drain constitute two measuring electrodes of the voltage sensor.

[0067] In the embodiment of the present invention, the current between the second electrode and the drain will flow through the drift region 102, so the voltage detected between the second electrode and the drain represents the product of the resistance and current of the corresponding drift region 102, which can provide overcurrent protection at the moment of switching or during use.

[0068] In the embodiment of the present invention, the formation region of the voltage sensor is surrounded by a first isolation structure, and the first isolation structure includes a fourth gate structure.

[0069] The fourth gate structure includes a fifth dielectric layer 1055 formed on the inner surface of the fourth gate trench 1044 and a fourth source conductive material layer 1064 filled in the fourth gate trench 1044 .

[0070] The width of the fourth gate trench 1044 is greater than the width of the third gate trench 1043 and the fourth gate trench 1044 is formed simultaneously. The depth of the fourth gate trench 1044 is greater than the depth of the third gate trench 1043 .

[0071] The first gate trench 1041 and the third gate trench 1043 have the same process structure and are formed simultaneously.

[0072] The fourth source conductive material layer 1064 and the third source conductive material layer 1063 have the same process structure and are formed simultaneously, and the top of the fourth source conductive material layer 1064 is isolated from the second electrode.

[0073] The first isolation structure further includes a bottom well region 110, which is formed in the drift region 102 at the bottom of the fourth gate trench 1044 and extends to the bottom of the drift region 102. The bottom well region 110 can enhance the isolation effect. In other embodiments, the bottom well region 110 can also be omitted.

[0074] Since the first isolation structure is also mainly formed by the gate structure, it can be integrated with the first gate structure of the trench-type separation gate, and the process cost is relatively low.

[0075] At the same time, the introduction of the third gate structure can further improve the performance in the region of the voltage sensor, for example, it can reduce the on-resistance of the drift region 102 in the region and increase the breakdown voltage of the region.

[0076] In the embodiment of the present invention, the first dielectric layer 1051 is composed of a thermal oxide layer or a stack of a thermal oxide layer and a CVD oxide layer.

[0077] The process structures of the third dielectric layer 1053 , the fourth dielectric layer 1054 and the fifth dielectric layer 1055 are the same as the process structure of the first dielectric layer 1051 .

[0078] The source conductive material layer 1061 , the second source conductive material layer 1062 , and the third source conductive material layer 1063 are all composed of a first polysilicon layer.

[0079] The gate conductive material layer 108 is composed of a second polysilicon layer.

[0080] In the embodiment of the present invention, the main MOSFET is an N-type device, the first conductivity type is N-type, and the second conductivity type is P-type. In other embodiments, the main MOSFET can also be a P-type device, the first conductivity type is P-type, and the second conductivity type is N-type.

[0081] The main MOSFET of the embodiment of the present invention adopts a trench-type separation gate, which can reduce the on-resistance of the device, improve the breakdown voltage and switching speed of the device; at the same time, the embodiment of the present invention can also integrate three sensors, namely a current sensor, a temperature sensor and a voltage sensor, so as to accurately detect the state of the power chip and protect the chip in time.

[0082] In addition, in the integrated structure, the unit structure of the current sensor is the same as the unit structure of the main MOSFET, and the temperature sensor and the voltage sensor respectively adopt the second gate structure and the third gate structure. The gate trenches and the dielectric layer on the inner surface of the second gate structure and the third gate structure and the filled conductive material layer can be formed simultaneously with the trench-type separation gate, i.e., the first gate trench 1041, the first dielectric layer 1051 and the source conductive material layer 1061 of the first gate structure. This can not only improve the detection accuracy of the sensor, but also improve the performance in the formation area of ​​the temperature sensor and the voltage sensor, for example, it can reduce the on-resistance of the formation area of ​​the temperature sensor and the voltage sensor and improve the voltage resistance of the formation area of ​​the temperature sensor and the voltage sensor, and finally improve the overall performance of the integrated power device.

[0083] like Figures 2A to 2K , which is a schematic diagram of the device cross-sectional structure in each step of the manufacturing method of the integrated power device according to the embodiment of the present invention; in the manufacturing method of the integrated power device according to the embodiment of the present invention, the integrated power device includes a main MOSFET, a current sensor, a temperature sensor and a voltage sensor integrated together; the unit structure of the main MOSFET and the unit structure of the current sensor both adopt the same MOSFET unit structure; the steps of forming each MOSFET unit structure, the temperature sensor and the voltage sensor include: Step S1: Figure 2A As shown, a semiconductor substrate 101 is provided and a drift region 102 doped with a first conductivity type is formed on a top surface of the semiconductor substrate 101 .

[0084] Figure 2A , the cross-sectional structures of three regions, namely, regions 101a, 101b, and 101c are shown. Region 101a corresponds to the formation region of the MOSFET unit structure, region 101b corresponds to the formation region of the temperature sensor, and region 101c corresponds to the formation region of the voltage sensor.

[0085] Step S2: Figure 2B As shown, the first gate trench 1041 of each MOSFET unit structure, the second gate trench 1042 of the temperature sensor and the third gate trench 1043 of the voltage sensor are formed simultaneously.

[0086] In the method of the embodiment of the present invention, the temperature sensor includes a plurality of second gate trenches 1042 , and the second gate trenches 1042 include outermost second gate trenches 1042 a and inner second gate trenches 1042 located between the outermost second gate trenches 1042 a .

[0087] The width of the outermost second gate trench 1042 a is greater than the width of the inner second gate trench 1042 , and the depth of the outermost second gate trench 1042 a is greater than the depth of the inner second gate trench 1042 .

[0088] The process structures of the first gate trench 1041 and the inner second gate trench 1042 are the same, for example, the width and depth of the two are the same.

[0089] In the method of the embodiment of the present invention, while forming the first gate trench 1041 , the method also includes forming a fourth gate trench 1044 on the peripheral side of the formation region of the voltage sensor.

[0090] The width of the fourth gate trench 1044 is greater than the width of the third gate trench 1043 , and the depth of the fourth gate trench 1044 is greater than the depth of the third gate trench 1043 .

[0091] The process structures of the first gate trench 1041 and the third gate trench 1043 are the same.

[0092] In some embodiments, after the fourth gate trench 1044 is formed and before the first dielectric layer 1051 is formed, Figure 2C As shown, it also includes: Well implantation is performed to form a bottom well region 110 in the drift region 102 at the bottom of the fourth gate trench 1044 . The bottom well region 110 also extends to the bottom of the drift region 102 .

[0093] The fourth gate structure and the bottom well region 110 together serve as components of the first isolation structure.

[0094] Step S3: Figure 2D As shown, the same dielectric growth process is used to simultaneously form a first dielectric layer 1051 on the inner surface of the first gate trench 1041 , a third dielectric layer 1053 on the inner surface of the second gate trench 1042 , and a fourth dielectric layer 1054 on the inner surface of the third gate trench 1043 .

[0095] In the method of the embodiment of the present invention, the first dielectric layer 1051 is formed by a thermal oxidation process; or, the first dielectric layer 1051 is formed by a thermal oxidation process plus a CVD process.

[0096] In the method of the embodiment of the present invention, while forming the first dielectric layer 1051 , a step of forming a fifth dielectric layer 1055 on the inner surface of the fourth gate trench 1044 is also included.

[0097] Step S4: Figure 2E As shown, a first conductive material layer is grown and etched back, and at the same time, a source conductive material layer 1061 is filled in the first gate trench 1041, a second source conductive material layer 1062 is filled in the second gate trench 1042, and a third source conductive material layer 1063 is filled in the third gate trench 1043; the second gate structure comprises a third dielectric layer 1053 and a second source conductive material layer 1062, and the third gate structure comprises a fourth dielectric layer 1054 and a third source conductive material layer 1063.

[0098] In the method of the embodiment of the present invention, the first conductive material layer growth and etching back process also simultaneously fills the fourth source conductive material layer 1064 in the fourth gate trench 1044; the top of the fourth source conductive material layer 1064 is isolated from the second electrode; the fourth gate structure is formed by the fifth dielectric layer 1055 and the fourth source conductive material layer 1064, and the fourth gate structure serves as a component of the first isolation structure.

[0099] In the method of the embodiment of the present invention, the film layer formed by the first conductive material layer growth is a first polysilicon layer.

[0100] Step S5: Figure 2F As shown, the source conductive material layer 1061 is etched back so that the source conductive material layer 1061 is located in the bottom area of ​​the first gate trench 1041 .

[0101] Step S6: Figure 2F As shown, a second dielectric layer 1052 is formed on the surface of the source conductive material layer 1061 after etching back, and the first dielectric layer 1051 on the side of the first gate trench 1041 above the top surface of the second dielectric layer 1052 is removed.

[0102] Step S7: Figure 2G As shown, a gate dielectric layer 107 is formed on the side of the first gate trench 1041 above the top surface of the second dielectric layer 1052 .

[0103] Step S8: Figure 2H As shown, a second conductive material layer is grown and back-etched to fill the first gate trench 1041 on the top surface of the second dielectric layer 1052 to form a gate conductive material layer 108; the first gate structure adopts a trench-type separated gate, and the composition structure includes a first dielectric layer 1051, a source conductive material layer 1061, a second dielectric layer 1052, a gate dielectric layer 107 and a gate conductive material layer 108.

[0104] In the method of the embodiment of the present invention, the film layer formed by the second growth of the conductive material layer is a second polysilicon layer.

[0105] Step S9: Fig.2I As shown, the second conductivity type doped body implantation plus annealing is performed to form a body region 103 in the surface region of the drift region 102 in each MOSFET unit structure formation region and the temperature sensor formation region.

[0106] Step S10: Figure 2J As shown, a first conductivity type heavily doped source implant plus annealing is performed to simultaneously form a source region 109 in the surface region of the body region 103 of each MOSFET unit structure formation region and a first contact region 109a in the surface region of the drift region 102 of the voltage sensor.

[0107] Step S11: Figure 2K As shown, an interlayer film 111 is formed, and a contact hole opening 112a is formed.

[0108] In some embodiments, the method further includes performing a second conductivity type heavy doping implantation at the bottom of the contact hole opening 112 a to form a body contact region.

[0109] like Figure 1 As shown, a metal is filled in the contact hole opening 112a to form a contact hole 112.

[0110] A front metal layer 113 is formed, and the front metal layer 113 is patterned to form a gate, a source, a first electrode and a second electrode; the source region 109 and the source conductive material layer 1061 are connected to the source through the corresponding contact hole 112 at the top, the gate conductive material layer 108 is connected to the gate through the corresponding contact hole 112 at the top, the top of the body region 103 and the top of the second source conductive material layer 1062 are connected to the first electrode through the corresponding contact hole 112, and the top of the first contact region 109a and the top of the third source conductive material layer 1063 are connected to the second electrode through the corresponding contact hole 112.

[0111] After that, the subsequent front surface process is completed.

[0112] After completing the front side process, the back side process is carried out, including: The semiconductor substrate 101 is thinned and a drain region heavily doped with the first conductivity type is formed on the back side of the drift region 102 .

[0113] A drain electrode composed of a back metal layer is formed on the back side of the drain region; the first electrode and the drain electrode constitute two measuring electrodes of the temperature sensor; and the second electrode and the drain constitute two measuring electrodes of the voltage sensor.

[0114] In the embodiment of the present invention, the main MOSFET is an N-type device, the first conductivity type is N-type, and the second conductivity type is P-type. In other embodiments, the main MOSFET can be a P-type device, the first conductivity type is P-type, and the second conductivity type is N-type.

[0115] The current sensor integrated in the embodiment of the present invention can monitor the working current of the MOS tube in real time, which is convenient for the system to detect the MOS state and current, and to facilitate the system to respond to and protect the MOS tube in time. The temperature sensor can detect the MOS temperature in real time so that the system can perform over-temperature protection and current limiting in time. The voltage sensor can perform over-current protection at the moment of switching and during use to prevent the MOS from burning due to over-current, simplify the design of the intelligent control chip, and improve the detection accuracy. The embodiment of the present invention manufactures an intelligent split-gate MOSFET device based on the existing split-gate process technology, adjusts the original MOS process solution, and is compatible with the integrated current sensor, temperature sensor, and voltage sensor to achieve the final power control switch.

[0116] Compared with the prior art, the embodiments of the present invention have the following technical effects: 1. Integrating current & temperature sensor & over-current protection in the power control chip can more accurately detect the power chip status and provide timely protection.

[0117] 2. Lower on-resistance Because of the use of split-gate MOSFET technology, the on-resistance is less than 40% of that of ordinary trench MOSFET with the same chip area.

[0118] The existing technology generally adopts the manufacturing technology of ordinary trench MOSFET or planar MOSFET. The on-resistance of planar MOSFET is more disadvantageous than that of trench MOSFET. Since the bottom separation electrode and the source of the device are connected in the separated gate MOSFET technology, when the device DS is biased at an extremely high voltage, a lateral electric field is generated on both sides of the bottom electrode, which plays a role in increasing the breakdown voltage. In this way, when the same breakdown voltage is obtained, the resistivity of the epitaxial layer can be greatly reduced, thereby reducing the on-resistance.

[0119] 3. Faster switching speed Because of the use of split-gate MOSFET technology, the specific Qg is extremely low, with the same on-resistance of only 40% of the area of ​​ordinary on-state MOSFET. The upper electrode of the split-gate technology is the gate, which is placed vertically and can be less than micron in width. The overlapping area between the gate and the drain can be extremely small, and there is a thousand-angstrom-thick oxide layer and micron-thick polysilicon between the gate and the bottom drain, so Qgd can be much smaller than ordinary trench MOSFET and planar MOSFET.

[0120] The present invention has been described in detail above through specific embodiments, but these do not constitute limitations of the present invention. Without departing from the principle of the present invention, those skilled in the art may also make many variations and improvements, which should also be regarded as the protection scope of the present invention.

Claims

1. An integrated power device, characterized in that: Includes main MOSFET, current sensor, temperature sensor and voltage sensor integrated together; The main MOSFET unit structure and the current sensor unit structure both use the same MOSFET unit structure; The MOSFET unit structure comprises: a drift region doped with a first conductivity type, a body region of a second conductivity type formed in the surface region of the drift region, a first gate structure, a source region heavily doped with the first conductivity type formed in the surface region of the body region, and a drain region heavily doped with the first conductivity type formed on the back side of the drift region; the first gate structure adopts a trench-type separated gate, comprising a source conductive material layer and a gate conductive material layer formed in a first gate trench, a first dielectric layer is separated between the source conductive material layer and the first gate trench, a second dielectric layer is separated between the source conductive material layer and the gate conductive material layer, a gate dielectric layer is separated between the gate conductive material layer and the side of the first gate trench, and the gate conductive material layer passes through the body region; the source region and the source conductive material layer are both connected to a source electrode composed of a front metal layer through corresponding contact holes at the top, the gate conductive material layer is connected to a gate electrode composed of the front metal layer through corresponding contact holes at the top, and a drain electrode composed of a back metal layer is formed on the back side of the drain region; The temperature sensor comprises: the drift region, the body region and the second gate structure; the second gate structure comprises the third dielectric layer formed on the inner surface of the second gate trench and the second source conductive material layer filled in the second gate trench; the first conductive type doping region is not formed on the surface of the body region, the top of the body region and the top of the second source conductive material layer are connected to the first electrode composed of the front metal layer through the corresponding contact holes, and the first electrode and the drain constitute two measuring electrodes of the temperature sensor; The voltage sensor includes: the drift region, a first contact region heavily doped with a first conductivity type formed in the surface area of ​​the drift region, and a third gate structure; the third gate structure includes the fourth dielectric layer formed on the inner surface of the third gate trench and a third source conductive material layer filled in the third gate trench; the body region is not formed on the surface of the drift region, the top of the first contact region and the top of the third source conductive material layer are connected to the second electrode composed of the front metal layer through the corresponding contact holes, and the second electrode and the drain constitute two measuring electrodes of the voltage sensor.

2. The integrated power device according to claim 1, characterized in that: The first dielectric layer is composed of a thermal oxide layer or a thermal oxide layer and a CVD oxide layer stacked together; The process structures of the third dielectric layer and the fourth dielectric layer are the same as the process structure of the first dielectric layer.

3. The integrated power device according to claim 2, characterized in that: The source conductive material layer, the second source conductive material layer and the third source conductive material layer are all composed of a first polysilicon layer; The gate conductive material layer is composed of a second polysilicon layer.

4. The integrated power device according to claim 1, wherein: The temperature sensor includes a plurality of second gate trenches, wherein the second gate trenches include an outermost second gate trench and an inner second gate trench located between the outermost second gate trenches; The width of the outermost second gate trench is greater than the width of the inner second gate trench and the trenches are formed at the same time, and the depth of the outermost second gate trench is greater than the depth of the inner second gate trench; The first gate trench and the inner second gate trench have the same process structure and are formed simultaneously.

5. The integrated power device according to claim 1, characterized in that: The formation area of ​​the voltage sensor is surrounded by a first isolation structure, and the first isolation structure includes a fourth gate structure; The fourth gate structure includes the fifth dielectric layer formed on the inner surface of the fourth gate trench and the fourth source conductive material layer filled in the fourth gate trench; The width of the fourth gate trench is greater than the width of the third gate trench and the fourth gate trench is formed at the same time, and the depth of the fourth gate trench is greater than the depth of the third gate trench; The first gate trench and the third gate trench have the same process structure and are formed simultaneously; The fourth source conductive material layer has the same process structure as the third source conductive material layer and is formed simultaneously, and the top of the fourth source conductive material layer is isolated from the second electrode.

6. The integrated power device according to claim 5, characterized in that: The first isolation structure further includes a bottom well region formed in the drift region at the bottom of the fourth gate trench and extending to the bottom of the drift region.

7. The integrated power device according to claim 1, characterized in that: The trench-type separation gate corresponding to the first gate structure is a top-bottom structure or a left-right structure.

8. The integrated power device according to any one of claims 1 to 7, characterized in that: The first conductivity type is N type, and the second conductivity type is P type; or, the first conductivity type is P type, and the second conductivity type is N type.

9. A method for manufacturing an integrated power device, characterized in that: The integrated power device includes a main MOSFET, a current sensor, a temperature sensor and a voltage sensor integrated together; the unit structure of the main MOSFET and the unit structure of the current sensor both adopt the same MOSFET unit structure; The steps of forming each of the MOSFET unit structure, the temperature sensor and the voltage sensor include: Providing a semiconductor substrate and forming a drift region doped with a first conductivity type on a top surface of the semiconductor substrate; Simultaneously forming a first gate trench of each of the MOSFET unit structures, a second gate trench of the temperature sensor, and a third gate trench of the voltage sensor; Using the same dielectric growth process to simultaneously form a first dielectric layer on the inner surface of the first gate trench, a third dielectric layer on the inner surface of the second gate trench, and a fourth dielectric layer on the inner surface of the third gate trench; Performing a first conductive material layer growth and back etching, while filling the first gate trench with a source conductive material layer, filling the second gate trench with a second source conductive material layer, and filling the third gate trench with a third source conductive material layer; the second gate structure comprises the third dielectric layer and the second source conductive material layer, and the third gate structure comprises the fourth dielectric layer and the third source conductive material layer; Carving back the source conductive material layer so that the source conductive material layer is located in the bottom area of ​​the first gate trench; Forming a second dielectric layer on the surface of the source conductive material layer after etching back and removing the first dielectric layer on the side of the first gate trench above the top surface of the second dielectric layer; forming a gate dielectric layer on the side of the first gate trench above the top surface of the second dielectric layer; Performing a second conductive material layer growth and back-etching to fill the first gate trench on the top surface of the second dielectric layer to form a gate conductive material layer; the first gate structure adopts a trench-type separated gate, and the composition structure includes the first dielectric layer, the source conductive material layer, the second dielectric layer, the gate dielectric layer and the gate conductive material layer; Performing a second conductive type doped body implant plus annealing to promote the formation of a body region in the surface region of the drift region in each of the MOSFET unit structure formation region and the temperature sensor formation region; Performing a first conductivity type heavily doped source implantation plus annealing to simultaneously form a source region in a surface region of the body region of each MOSFET unit structure formation region and a first contact region in a surface region of the drift region of the voltage sensor; forming contact holes and a front metal layer, and patterning the front metal layer to form a gate, a source, a first electrode, and a second electrode; the source region and the source conductive material layer are both connected to the source electrode through corresponding contact holes at the top, the gate conductive material layer is connected to the gate through corresponding contact holes at the top, the top of the body region and the top of the second source conductive material layer are both connected to the first electrode through corresponding contact holes, and the top of the first contact region and the top of the third source conductive material layer are both connected to the second electrode through corresponding contact holes; Thinning the semiconductor substrate and forming a heavily doped drain region of the first conductivity type on the back side of the drift region; A drain electrode composed of a back metal layer is formed on the back side of the drain region; the first electrode and the drain electrode constitute two measuring electrodes of the temperature sensor; and the second electrode and the drain constitute two measuring electrodes of the voltage sensor.

10. The manufacturing method of the integrated power device according to claim 9, characterized in that: The first dielectric layer is formed by a thermal oxidation process; or, the first dielectric layer is formed by a thermal oxidation process plus a CVD process.

11. The method for manufacturing an integrated power device according to claim 10, wherein: The film layer formed by the first conductive material layer growth is a first polysilicon layer; The film layer formed by the second conductive material layer growth is a second polysilicon layer.

12. The method for manufacturing an integrated power device according to claim 9, wherein: The temperature sensor includes a plurality of second gate trenches, wherein the second gate trenches include an outermost second gate trench and an inner second gate trench located between the outermost second gate trenches; The width of the outermost second gate trench is greater than the width of the inner second gate trench, and the depth of the outermost second gate trench is greater than the depth of the inner second gate trench; The process structure of the first gate trench and the inner second gate trench is the same.

13. The method for manufacturing an integrated power device according to claim 9, wherein: The step of forming the first gate trench also includes forming a fourth gate trench on the peripheral side of the voltage sensor formation region; The width of the fourth gate trench is greater than the width of the third gate trench, and the depth of the fourth gate trench is greater than the depth of the third gate trench; The process structure of the first gate trench and the third gate trench is the same; While forming the first dielectric layer, the step also includes forming a fifth dielectric layer on the inner surface of the fourth gate trench; The first conductive material layer growth and etching back process also simultaneously fills the fourth source conductive material layer in the fourth gate trench; The top of the fourth source conductive material layer is isolated from the second electrode; A fourth gate structure is formed by the fifth dielectric layer and the fourth source conductive material layer, and the fourth gate structure serves as a component of the first isolation structure.

14. The method for manufacturing an integrated power device according to claim 13, wherein: After the fourth gate trench is formed and before the first dielectric layer is formed, the method further includes: Performing well implantation to form a bottom well region in the drift region at the bottom of the fourth gate trench, wherein the bottom well region also extends to the bottom of the drift region; The fourth gate structure and the bottom well region together serve as components of a first isolation structure.

15. The method for manufacturing an integrated power device according to any one of claims 9 to 14, characterized in that: The first conductivity type is N type, and the second conductivity type is P type; or, the first conductivity type is P type, and the second conductivity type is N type.

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