Gallium nitride power device and preparation method thereof

Abstract

The invention relates to a gallium nitride power device and a preparation method thereof, the device comprises a voltage-withstanding region, and the voltage-withstanding region comprises a first conductive type doped region, a second conductive type doped region, a plurality of resistor structures, a plurality of conductive structures, a drain electrode doped region and a first drain electrode. The first conductive type doped region and the second conductive type doped region are arranged in the substrate, and the resistor structures are arranged on the substrate; two ends of each conductive structure are respectively connected with a resistor structure, so that the resistor structures are connected in series; the bottom of one conductive structure is electrically connected with the second conductive type doped region, and the bottoms of the rest of the conductive structures are electrically connected with the first conductive type doped region. The drain doped region is arranged in the substrate, and the first conductive type doped region is located between the second conductive type doped region and the drain doped region; the first drain electrode is arranged on the drain doped region, and the bottom of the first drain electrode is electrically connected with the drain doped region. According to the invention, the avalanche capability of the device is greatly improved, and the substrate bias effect is eliminated.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing, and in particular to a gallium nitride power device, and also to a method for preparing the gallium nitride power device. Background Art

[0002] Today's semiconductor industry has an increasing demand for power devices. However, the performance of silicon-based power devices, mainly metal oxide semiconductor field effect transistors and insulated gate bipolar transistors, has approached the theoretical limit of their materials and cannot meet the higher requirements of power devices for the next generation of power electronic systems. As one of the wide bandgap semiconductor materials, gallium nitride has outstanding advantages such as wide bandgap width, high electron saturation drift velocity, and high critical breakdown electric field compared to traditional silicon materials. It is an extremely ideal semiconductor material for high-power, high-temperature, high-frequency and radiation-resistant applications.

[0003] Gallium nitride high electron mobility transistor (HEMT) power devices have the advantages of high current density, fast switching speed and low on-resistance. However, gallium nitride devices have poor avalanche capability. When the device is in the blocking state, when the drain voltage exceeds the rated withstand voltage of the device, the drain voltage cannot be fixed and will continue to increase with the increase of the leakage current, causing safety and reliability problems of the device itself and the system. In the scheme of doping the N-type region in the substrate below the drain to improve the avalanche breakdown capability, applying high voltage to the drain will cause a serious substrate bias effect, resulting in an increase in the dynamic on-resistance of the device, which seriously increases the power loss of the device. Summary of the invention

[0004] Based on this, it is necessary to provide a gallium nitride power device with strong avalanche breakdown capability and capable of optimizing substrate bias effect.

[0005] A gallium nitride power device, comprising: a substrate having a second conductivity type; a buffer layer disposed on the substrate; a barrier layer disposed on the buffer layer; a source electrode disposed on the barrier layer; a second drain electrode disposed on the barrier layer; a first conductivity type doped region disposed in the substrate; the first conductivity type and the second conductivity type are opposite conductivity types; a second conductivity type doped region disposed in the substrate; a plurality of resistor structures disposed on the substrate; a plurality of conductive structures, each of which has two ends connected to a resistor structure, so that the resistor structures are connected in series; the bottom of one conductive structure is electrically connected to the second conductivity type doped region, and the bottoms of the remaining resistor structures are electrically connected to the first conductivity type doped region. The gallium nitride power device comprises a device region and a voltage-withstand region, the buffer layer, the barrier layer, the source electrode and the second drain electrode are located in the device region, the first conductivity type doped region, the second conductivity type doped region, the resistor structures, the conductive structures, the drain doped region and the first drain electrode are located in the voltage-withstand region; the second conductivity type doped region is closer to the device region than the first conductivity type doped regions.

[0006] In the above-mentioned gallium nitride power device, when the drain voltage is too large, the PN junction formed by the drain doping region and the substrate undergoes avalanche breakdown, preventing the drain voltage from continuing to increase, thereby greatly increasing the avalanche breakdown capability of the gallium nitride power device. In addition, the voltage input to the first drain electrode is divided by a resistor structure in the withstand voltage region, so that each first conductive type doping region and the second conductive type doping region follow the voltage of the conductive structure above it, so that the voltage gradually decreases from the drain doping region to the second conductive type doping region, thereby achieving the purpose of controlling the substrate potential of the device region and optimizing the substrate bias effect. When the conductive structure above the second conductive type doping region is grounded, the potential of the second conductive type doping region is also 0. Since the second conductive type doping region is arranged close to the device region, the substrate potential of the device region can also be 0. Compared with devices that enhance avalanche capability and reduce the liner bias effect through external integrated structures, the above-mentioned gallium nitride power device can reduce external metal interconnections and suppress the parasitic characteristics of the device.

[0007] In one of the embodiments, when the gallium nitride power device is operating, the first drain electrode is connected to the potential of the second drain electrode.

[0008] In one embodiment, the doping concentration of the second conductive type doping region is greater than the doping concentration of the substrate.

[0009] In one of the embodiments, when the gallium nitride power device is operating, the conductive structure electrically connected to the bottom and the second conductive type doped region is grounded.

[0010] In one embodiment, a portion of the bottom of the resistor structure is in direct contact with the first conductive type doping region.

[0011] In one embodiment, the resistance values ​​of the resistance structures are equal.

[0012] In one embodiment, each of the resistor structures is a two-dimensional electron gas resistor.

[0013] In one embodiment, the resistance value of each of the two-dimensional electron gas resistors is greater than one million ohms and less than one hundred million ohms.

[0014] In one embodiment, the gallium nitride power device includes a high electron mobility transistor located in the device region.

[0015] In one embodiment, the buffer layer comprises gallium nitride, and the barrier layer comprises aluminum gallium nitride.

[0016] In one embodiment, the two-dimensional electron gas resistor includes a gallium nitride layer and an aluminum gallium nitride layer on the gallium nitride layer.

[0017] In one of the embodiments, the gallium nitride power device also includes an isolation structure located in the voltage-resistant region, the isolation structure being formed between adjacent resistance structures and between adjacent conductive structures; the isolation structure includes a gallium nitride layer and an aluminum gallium nitride layer treated by high-energy particle injection, the injection energy of the high-energy particle injection is not less than 20 keV, the aluminum gallium nitride layer treated by high-energy particle injection is located on the gallium nitride layer treated by high-energy particle injection, and the resistivity of the isolation structure is greater than the resistivity of the two-dimensional electron gas resistor.

[0018] In one of the embodiments, the gallium nitride power device further includes a gate disposed on the barrier layer, wherein the gate includes a P-type gallium nitride region disposed on the barrier layer and a gate electrode disposed on the P-type gallium nitride region.

[0019] In one of the embodiments, the gallium nitride power device further includes a passivation layer located on the barrier layer and the isolation structure, and the passivation layer does not cover the gate, the source electrode, the first drain electrode, the second drain electrode and each conductive structure.

[0020] In one embodiment, the first conductivity type is N-type, and the second conductivity type is P-type.

[0021] In one of the embodiments, the voltage-sustaining region is located on one side of the device region.

[0022] In one of the embodiments, the voltage-sustaining region is located on both sides of the device region.

[0023] In one of the embodiments, the voltage-sustaining region is located around the device region.

[0024] It is also necessary to provide a method for preparing a gallium nitride power device.

[0025] A method for preparing a gallium nitride power device, comprising: obtaining a substrate having a first conductive type doping region, a second conductive type doping region and a drain doping region; the substrate has the second conductive type, the drain doping region has the first conductive type, the first conductive type doping region, the second conductive type doping region and the drain doping region are located in a withstand voltage region of the gallium nitride power device, and the first conductive type doping region is formed between the second conductive type doping region and the first drain doping region; the first conductive type and the second conductive type are opposite conductive types; forming a buffer layer on the substrate; forming a barrier layer on the buffer layer; and performing high-energy particle injection into the buffer layer and the barrier layer in a part of the withstand voltage region through photolithography and doping to destroy the two-dimensional electron gas so that the electric field in the high-energy injection region is reduced. The resistivity of the buffer layer and the barrier layer is greater than that of the buffer layer and the barrier layer without high-energy particle injection, thereby forming an isolation structure, and the injection energy of the high-energy particle injection is not less than 20keV; the buffer layer and the barrier layer of the voltage-resistant region that are not doped with the first impurity are removed to form a groove that exposes at least a portion of the first conductive type doping region, at least a portion of the second conductive type doping region, and at least a portion of the drain doping region, and the groove cuts the buffer layer and the barrier layer of the voltage-resistant region that are not doped with the first impurity into a plurality of two-dimensional electron gas resistors; the groove is filled with a conductive material to connect the two-dimensional electron gas resistors in series, the conductive material on the drain doping region is used as a first drain electrode, and a source electrode and a second drain electrode are formed on the barrier layer of the device region of the gallium nitride power device.

[0026] The preparation method of the gallium nitride power device uses the same buffer layer and barrier layer as the device area to form a two-dimensional electron gas resistor in the withstand voltage area, and uses high-energy particle injection to destroy the two-dimensional electron gas formed by the buffer layer and barrier layer in the non-two-dimensional electron gas resistor area to form an isolation structure, and the process required to set the resistor is relatively small. When the drain voltage is too large, the PN junction formed by the drain doping area and the substrate undergoes avalanche breakdown, preventing the drain voltage from continuing to increase, greatly enhancing the avalanche breakdown capability of the gallium nitride power device. In addition, the resistor structure can divide the voltage input to the first drain electrode, so that each first conductive type doping area and the second conductive type doping area follow the voltage of the conductive structure above it, so that the voltage gradually decreases from the drain doping area to the second conductive type doping area, thereby achieving the purpose of controlling the substrate potential of the device area and optimizing the substrate bias effect. When the conductive structure above the second conductive type doping area is grounded, the potential of the second conductive type doping area is also 0. Since the second conductive type doping area is arranged close to the device area, the substrate potential of the device area can also be 0. Compared with devices that enhance avalanche capability and reduce the liner bias effect through external integrated structures, the device manufactured by the above-mentioned method for manufacturing gallium nitride power devices can reduce external metal interconnections and suppress the parasitic characteristics of the device.

[0027] In one of the embodiments, when the gallium nitride power device is operating, the first drain electrode is connected to the potential of the second drain electrode.

[0028] In one of the embodiments, after the step of forming a barrier layer on the buffer layer, the step further includes: forming a P-type gallium nitride region on the barrier layer in the device region; and forming a gate electrode on the P-type gallium nitride region.

[0029] In one of the embodiments, after the photolithography and doping steps and before the step of removing the buffer layer and barrier layer that are partially undoped with the first impurity in the voltage-resistant region, a step of forming a passivation layer on the barrier layer is also included; the passivation layer exposes the positions where the grooves, source electrodes, second drain electrodes and gate electrodes need to be formed.

[0030] In one embodiment, the buffer layer comprises gallium nitride, and the barrier layer comprises aluminum gallium nitride.

[0031] In one embodiment, the high-energy particle implantation is performed by using an ion implantation device to implant at least one of nitrogen ions, boron ions, magnesium ions, and helium ions.

[0032] In one embodiment, the injection dose of the high energy particle injection is not less than 1E14cm -2 .

[0033] In one embodiment, the doping concentration of the second conductive type doping region is greater than the doping concentration of the substrate.

[0034] In one embodiment, the resistance value of each of the two-dimensional electron gas resistors is greater than one million ohms and less than one hundred million ohms.

[0035] In one embodiment, the first conductivity type is N-type, and the second conductivity type is P-type. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, reference may be made to one or more drawings. The additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the embodiments and / or examples currently described, and the best modes of these inventions currently understood.

[0037] Figure 1 is a schematic structural diagram of a gallium nitride power device in an embodiment of the present application;

[0038] Figure 2 is a schematic diagram of the planar structure of a gallium nitride power device in an embodiment of the present application;

[0039] Figure 3a For along Figure 2 Sectional view along line A-A';

[0040] Figure 3b For along Figure 2 Sectional view along line B-B';

[0041] Figure 3c For along Figure 2 Sectional view along line C-C';

[0042] Figure 4 is a schematic diagram of the structure of a two-dimensional electron gas resistor in one embodiment of the present application;

[0043] Figure 5 is a schematic diagram of the planar structure of a gallium nitride power device in yet another embodiment of the present application;

[0044] Figure 6 is a schematic diagram of the planar structure of a gallium nitride power device in another embodiment of the present application;

[0045] Figure 7 is along Figure 6 A cross-sectional view of the line D-D';

[0046] Figure 8 is along Figure 6 A cross-sectional view of the line E-E';

[0047] Fig. 9is along Figure 6 A cross-sectional view of the line F-F';

[0048] Fig.10 is along Figure 6 A cross-sectional view of the line G-G';

[0049] Fig.11 is along Figure 6 A cross-sectional view of the line H-H';

[0050] Fig.12 is along Figure 6 A cross-sectional view of the line I-I';

[0051] Fig.13 It is a flow chart of a method for preparing a gallium nitride power device in one embodiment of the present application. DETAILED DESCRIPTION

[0052] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0053] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0054] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. "Connection" in this specification should be understood as "electrical connection", "communication connection" and the like if the connected circuits, modules, units, etc. have transmission of electrical signals or data to each other. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.

[0055] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0056] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present invention. When used herein, the singular forms of "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It is understood that "at least one" refers to one or more, and "multiple" refers to two or more. "At least part of an element" refers to part or all of an element. It should also be understood that the terms "compose" and / or "comprise" when used in this specification determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0057] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the invention. Thus, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the invention should not be limited to the specific shapes of the zones shown herein, but include shape deviations due to, for example, manufacturing. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the actual shape of the region of the device and are not intended to limit the scope of the invention.

[0058] The semiconductor field vocabulary used in this article is technical vocabulary commonly used by technical personnel in this field. For example, for P-type and N-type impurities, in order to distinguish the doping concentration, P+ type represents P-type with heavy doping concentration, P-type represents P-type with medium doping concentration, P-type represents P-type with light doping concentration, N+ type represents N-type with heavy doping concentration, N-type represents N-type with medium doping concentration, and N-type represents N-type with light doping concentration.

[0059] The present application proposes a novel GaN power device structure to solve the problems of poor avalanche capability and substrate bias effect of GaN power devices. Figure 1 Schematic diagram of the structure of a gallium nitride power device in an embodiment of the present application. The gallium nitride power device can be divided into a device area 10 for setting the main part of the device and a voltage-resistant area 20 as a voltage-resistant structure. Figure 1 The gallium nitride power device includes a substrate 110, a buffer layer 132, a barrier layer 134, a source electrode 144, a first drain electrode 162, a second drain electrode 146, a first conductive type doping region 124, a second conductive type doping region 126, a drain doping region 122, a plurality of resistor structures 150, and a plurality of conductive structures 164. The buffer layer 132, the barrier layer 134, the source electrode 144, and the second drain electrode 146 are located in the device region 10, and the first conductive type doping region 124, the second conductive type doping region 126, each resistor structure 150, each conductive structure 164, the drain doping region 122, and the first drain electrode 162 are located in the withstand voltage region 20. The substrate 110 is spread throughout the device region 10 and the withstand voltage region 20.

[0060] The substrate 110 has a second conductivity type. The buffer layer 132 is disposed on the substrate 110. The barrier layer 134 is disposed on the buffer layer 132. The source electrode 144 and the second drain electrode 146 are disposed on the barrier layer 134. The buffer layer 132 and the barrier layer 134 can adopt the materials of the buffer layer and the barrier layer of the gallium nitride power device known to those skilled in the art. In one embodiment of the present application, the gallium nitride power device includes a high electron mobility transistor (HEMT). The buffer layer 132, the barrier layer 134, the source electrode 144 and the second drain electrode 146 are respectively the buffer layer, the barrier layer, the source electrode and the drain electrode of the HEMT; accordingly, the material of the buffer layer 132 is GaN, the material of the barrier layer is AlGaN, and the material of the source electrode 144 and the second drain electrode 146 is metal and / or alloy. The first conductivity type doping region 124 and the second conductivity type doping region 126 are disposed in the substrate 110. The drain doping region 122 has a first conductivity type and is disposed in the substrate 122. The first conductivity type doping region 124 is located between the second conductivity type doping region 126 and the drain doping region 122. The second conductivity type doping region 126 is disposed close to the device region 10, that is, at the edge of the voltage-withstanding region 20. In one embodiment of the present application, the first conductivity type is N-type and the second conductivity type is P-type; in other embodiments, the first conductivity type may also be P-type and the second conductivity type may be N-type.

[0061] Each resistor structure 150 is disposed on the substrate 110. One end of the conductive structure 164 is connected to a resistor structure 150, and the other end is connected to another resistor structure 150, so that each resistor structure 150 is connected in series. The bottom of a conductive structure 164 (hereinafter referred to as conductive structure A) is electrically connected to the second conductive type doping region 126, and the bottom of the remaining resistor structures 164 is electrically connected to the first conductive type doping region 124. The first drain electrode 162 is disposed on the drain doping region 122, and the bottom of the first drain electrode 162 is electrically connected to the drain doping region 122. When the device is working, the first drain electrode 162 is connected to the potential of the second drain electrode 146, for example, the first drain electrode 162 and the second drain electrode 146 can be short-circuited. In one embodiment of the present application, the material of the conductive structure 164 can be metal and / or alloy. Figure 1 The ellipsis in a literal indicates that repeated structure is omitted.

[0062] Traditional gallium nitride power devices have poor avalanche capability. When the device is in the blocking state, if the drain voltage exceeds the rated withstand voltage of the device, the drain voltage will increase all the way with the increase of the leakage current, causing safety and reliability problems of the device and the system. When the device gallium nitride power device provided by the present application is working, the second drain electrode 146 of the HEMT is connected to a high voltage, so the first drain electrode 162 is also connected to a high voltage; the conductive structure A is connected to a low voltage, for example, the conductive structure A can be connected to the potential of the source electrode 144 and grounded together with the source electrode 144. When the drain voltage is too large, the PN junction formed by the drain doping region 122 and the substrate 110 undergoes avalanche breakdown (the PN junction formed by other first conductive type doping regions 124 and the substrate 110 may also undergo avalanche breakdown), preventing the drain voltage from continuing to increase, and greatly enhancing the avalanche breakdown capability of the gallium nitride power device.

[0063] Each resistance structure 150 divides the voltage input to the first drain electrode 162 so that each first conductive type doping region 124 and second conductive type doping region 126 follows the voltage of the conductive structure 164 above it. Therefore, the voltage gradually decreases from the drain doping region 122 to the second conductive type doping region 126, thereby achieving the purpose of controlling the potential of the substrate 110 of the device region 10 and optimizing the substrate bias effect.

[0064] Specifically, assuming that the first drain electrode 162 is connected to a high voltage of 600 V, the conductive structure A is connected to the source electrode 144 and grounded, and the potential is 0 V, shielding the high voltage. Figure 1 There are 10 resistor structures 150 connected in series. Assuming that the resistance values ​​of each resistor structure 150 are the same, the voltage division of each resistor is 60V. Then, the potential of the conductive structure 164 closest to the first drain electrode 162 is 540V, and the potential of the first conductive type doping region 124 electrically connected thereto is also 540V accordingly. The first conductive type doping region 124 forms a reverse biased PN junction with the nearby substrate 110, and the depletion layer is widened on the substrate 110 to withstand the voltage. By analogy, from the conductive structure 164 closest to the first drain electrode 162 to the conductive structure A, the potentials are 540V, 480V, ..., 0V, respectively. The potential of the first conductive type doping region 124 under each conductive structure 164 is also pulled to 540V, 480V, ..., and forms a reverse biased PN junction with the nearby substrate 110, and the depletion layer is widened on the substrate 110 to withstand the voltage. The potential of the conductive structure A is 0V, and the second conductive type doping region 126 connected to the conductive structure A is also 0V, so that the potential of the substrate 110 of the device region 10 is all 0V. That is, the substrate potential drops uniformly from the first drain electrode 162 side to the inner potential, and becomes 0 in the device region 10, thereby achieving the purpose of controlling the substrate potential. When the second drain electrode 146 and the first drain electrode 162 are connected to a high voltage, the substrate potential of the device region 10 can also be kept at 0V, thereby eliminating the liner bias effect and not causing an increase in the dynamic on-resistance.

[0065] exist Figure 1 In the illustrated embodiment, the gallium nitride power device further includes a gate 140 disposed on the barrier layer 134. The gate 140 is located in the device region 10, and includes a P-type gallium nitride region 141 disposed on the barrier layer 134 and a gate electrode 142 disposed on the P-type gallium nitride region 141. The gate electrode 142 may be made of metal and / or alloy.

[0066] In one embodiment of the present application, the resistor structure 150 is a two-dimensional electron gas resistor. In one embodiment of the present application, the resistor structure 150 adopts the same structure as the buffer layer 132 and the barrier layer 134, that is, the resistor structure 150 includes a buffer layer and a barrier layer on the buffer layer, and a two-dimensional electron gas is formed by a heterojunction at the junction of the buffer layer and the barrier layer. In one embodiment of the present application, the resistor structure 150 includes a gallium nitride layer and an aluminum gallium nitride layer on the gallium nitride layer.

[0067] exist Figure 1 In the illustrated embodiment, the gallium nitride power device further includes an isolation structure 136 located in the voltage-resistant region 20. An isolation structure 136 is formed between adjacent resistance structures 150 and between adjacent conductive structures 164. In one embodiment of the present application, the isolation structure 136 includes a gallium nitride layer treated by high-energy particle injection, and an aluminum gallium nitride layer treated by high-energy particle injection located on the gallium nitride layer treated by high-energy particle injection. In the present application specification, high energy refers to an injection energy of not less than 20 kiloelectron volts (keV). That is, the isolation structure 136 can be a high-energy particle injection on the basis of a two-dimensional electron gas resistance structure to destroy the two-dimensional electron gas, thereby increasing the resistivity and obtaining a resistivity close to that of an insulating material. In one embodiment of the present application, high-energy particle injection is performed by using an ion implantation device to implant nitrogen ions, or one of boron ions, magnesium ions, and helium ions. In one embodiment of the present application, the injection dose of the high-energy particle injection is not less than 1E14cm -2 .

[0068] exist Figure 1 In the illustrated embodiment, the gallium nitride power device further includes a passivation layer 160 located on the barrier layer 134 and the isolation structure 136. The passivation layer 160 does not cover the gate electrode 142, the source electrode 144, the first drain electrode 162, the second drain electrode 146, and the conductive structures 164. In one embodiment of the present application, the passivation layer 160 is made of silicon nitride.

[0069] In one embodiment of the present application, the doping concentration of the second conductive type doping region 126 is greater than the doping concentration of the substrate 110. Figure 1 In the illustrated embodiment, the first conductivity type doping region 124 is an N+ region, and the second conductivity type doping region 126 is a P+ region.

[0070] From the perspective of eliminating the substrate bias effect, the potential line from the drain doping region 122 to the second conductive type doping region 126 changes evenly, and a better effect can be obtained. To this end, the resistance value, shape structure, and arrangement position of each resistor structure 150 can be reasonably designed. In one embodiment of the present application, the resistance value of each resistor structure 150 is equal. The planar structure of the resistor structure is shown below through different embodiments.

[0071] Figure 2 FIG. 2 is a schematic diagram of a planar structure of a gallium nitride power device in an embodiment of the present application. In this embodiment, the voltage-sustaining region 20 is located on one side of the device region 10 . Figure 3a For along Figure 2 The cross-sectional view of the A-A' line, Figure 3b For along Figure 2 The cross-sectional view of the line B-B', Figure 3c For along Figure 2 The gallium nitride power device includes a substrate 210, a buffer layer 232, a barrier layer 234, a source electrode 244, a gate 240, a first drain electrode 262, a second drain electrode 246, a first conductive type doping region 224, a second conductive type doping region 226, a drain doping region 222, a passivation layer 260, an isolation structure 236, a plurality of two-dimensional electron gas resistors 250 and a plurality of conductive structures 264. The two-dimensional electron gas resistor 250 includes a gallium nitride layer 251 and an aluminum gallium nitride layer 252 on the gallium nitride layer 251.

[0072] Figure 4 is a schematic diagram of the structure of the two-dimensional electron gas resistor 250 in one embodiment of the present application, Figure 4 The dots connected in a row in the graph represent the two-dimensional electron gas. In one embodiment of the present application, the bottom of a portion of the two-dimensional electron gas resistor 250 is in direct contact with the first conductive type doping region 224 .

[0073] In one embodiment of the present application, the resistance value of each two-dimensional electron gas resistor 250 is greater than one million ohms and less than one hundred million ohms. Further, the resistance value of each two-dimensional electron gas resistor 250 is at the level of tens of millions ohms, thereby limiting the leakage current to less than 1 microampere.

[0074] Figure 2 The medium voltage-resistant region 20 is located on one side of the device region 10. In other embodiments, the voltage-resistant region 20 may also be provided on both sides of the device region 10. Figure 5 . Figure 5 The structure of the voltage-resistant area 20 in the embodiment shown is similar to Figure 2 The illustrated embodiment is similar, and the two voltage-resistant areas 20 are symmetrically arranged, and their structures are not described in detail here.

[0075] Figure 6is a schematic diagram of a planar structure of a gallium nitride power device in another embodiment of the present application. In this embodiment, the voltage-resistant region 20 ( Figure 6 Not shown) is located in the device area 10 ( Figure 6 Around the areas not marked in the figure). Figure 7 is along Figure 6 The cross-sectional view of the D-D' line in Figure 8 is along Figure 6 The cross-sectional view of the E-E' line in Fig. 9 is along Figure 6 The cross-sectional view of the F-F' line in Fig.10 is along Figure 6 The cross-sectional view of the G-G' line in Fig.11 is along Figure 6 The cross-sectional view of the H-H' line in Fig.12 is along Figure 6 Cross-sectional view along line I-I'.

[0076] The present application accordingly provides a method for preparing a gallium nitride power device, which can be used to prepare the gallium nitride power device described in any of the above embodiments. Fig.13 : is a flow chart of a method for preparing a gallium nitride power device in an embodiment of the present application, comprising the following steps:

[0077] S310, obtaining a substrate.

[0078] A substrate having a first conductivity type doping region, a second conductivity type doping region and a drain doping region formed thereon is obtained. The substrate has the second conductivity type, the drain doping region has the first conductivity type, the first conductivity type doping region, the second conductivity type doping region and the drain doping region are located in a voltage-withstand region, and the first conductivity type doping region is formed between the second conductivity type doping region and the first drain doping region. In one embodiment of the present application, the first conductivity type is N-type and the second conductivity type is P-type; in other embodiments, the first conductivity type may also be P-type and the second conductivity type may be N-type.

[0079] In one embodiment of the present application, the doping concentration of the second conductive type doping region is greater than the doping concentration of the substrate.

[0080] S320, forming a buffer layer on the substrate.

[0081] In one embodiment of the present application, the buffer layer is a gallium nitride layer.

[0082] S330 , forming a barrier layer on the buffer layer.

[0083] In one embodiment of the present application, the barrier layer is an aluminum gallium nitride layer.

[0084] S340, high-energy ion implantation is performed into the buffer layer and the barrier layer in a part of the voltage-resistant region through photolithography and doping.

[0085] High-energy particles are injected into the buffer layer and the barrier layer in part of the voltage-sustaining region to destroy the two-dimensional electron gas so that the resistivity of the high-energy injected region is greater than the resistivity of the buffer layer and the barrier layer without high-energy particle injection, thereby forming an isolation structure.

[0086] In one embodiment of the present application, a photoresist having a corresponding pattern is used, and after exposure and development, a photoresist layer covering the device area and the two-dimensional electron gas resistance area is formed, and the area where the isolation structure needs to be formed is exposed, and high-energy particle injection is performed. The two-dimensional electron gas at the junction of the buffer layer and the barrier layer in the exposed area of ​​the photoresist layer is destroyed by the high-energy particle injection, so that the resistivity of the injection area is greater than the resistivity of the buffer layer and the barrier layer injected with high-energy particles (the buffer layer and the barrier layer in the voltage-resistant area that have not been injected with high-energy particles subsequently serve as the two-dimensional electron gas resistance), thereby forming an isolation structure.

[0087] In one embodiment of the present application, the high-energy particle implantation is performed by using an ion implantation device to implant nitrogen ions, or one of boron ions, magnesium ions, and helium ions. In one embodiment of the present application, the implantation dose of the high-energy particle implantation is not less than 1E14 cm -2 .

[0088] S350, forming a groove that cuts the structure of the voltage-sustaining region that is not doped with the first impurity into a plurality of two-dimensional electron gas resistors.

[0089] In one embodiment of the present application, a portion of the buffer layer and barrier layer of the voltage-sustaining region that are not doped with the first impurity are removed by photolithography and etching to form a trench that exposes at least a portion of the first conductivity type doped region, at least a portion of the second conductivity type doped region, and at least a portion of the drain doped region. The trench cuts the buffer layer and barrier layer of the voltage-sustaining region that are not doped with the first impurity into a plurality of two-dimensional electron gas resistors.

[0090] S360, filling the trench with a conductive material to connect the two-dimensional electron gas resistors in series, and forming a source electrode and a first and a second drain electrode.

[0091] In one embodiment of the present application, a conductive material (such as a metal and / or an alloy) is deposited, the conductive material filled in the trench above the drain doping region serves as a first drain electrode, and the conductive material filled in the trench above the first conductive type doping region and the trench above the second conductive type doping region serves as a conductive structure that connects the two-dimensional electron gas resistors in series. The metal deposited on the barrier layer in the device region forms a source electrode and a second drain electrode.

[0092] The preparation method of the gallium nitride power device uses the same buffer layer and barrier layer as the device area to form a two-dimensional electron gas resistor in the withstand voltage area, and uses high-energy particle injection to destroy the two-dimensional electron gas formed by the buffer layer and barrier layer in the non-two-dimensional electron gas resistor area to form an isolation structure, and the process required to set the resistor is relatively small. When the drain voltage is too large, the PN junction formed by the drain doping area and the substrate undergoes avalanche breakdown, preventing the drain voltage from continuing to increase, greatly enhancing the avalanche breakdown capability of the gallium nitride power device. In addition, the resistor structure can divide the voltage input to the first drain electrode, so that each first conductive type doping area and the second conductive type doping area follow the voltage of the conductive structure above it, so that the voltage gradually decreases from the drain doping area to the second conductive type doping area, thereby achieving the purpose of controlling the substrate potential of the device area and optimizing the substrate bias effect. When the conductive structure above the second conductive type doping area is grounded, the potential of the second conductive type doping area is also 0. Since the second conductive type doping area is arranged close to the device area, the substrate potential of the device area can also be 0. Compared with devices that enhance avalanche capability and reduce the liner bias effect through external integrated structures, the device manufactured by the above-mentioned method for manufacturing gallium nitride power devices can reduce external metal interconnections and suppress the parasitic characteristics of the device.

[0093] In one embodiment of the present application, after step S330, a step of forming a P-type gallium nitride region on the barrier layer of the device region is also included. After the P-type gallium nitride region is formed, thermal annealing can be performed. The P-type gallium nitride region is a component of the P-type gallium nitride gate of the HEMT. The formed P-type gallium nitride can be etched away in the area where the P-type gallium nitride is not needed, that is, the P-type gallium nitride in the withstand voltage area and the P-type gallium nitride outside the gate area of ​​the device area are etched away.

[0094] Accordingly, the metal deposited in step S360 forms a gate electrode on the P-type gallium nitride region.

[0095] In one embodiment of the present application, after step S340 and before step S350, a step of forming a passivation layer on the barrier layer is also included. The passivation layer exposes the positions where the grooves, source electrode, second drain electrode and gate electrode need to be formed. In one embodiment of the present application, the passivation layer may be formed after the P-type gallium nitride region is formed, and the positions where the passivation layer is not needed are removed by photolithography and etching. In one embodiment of the present application, the material of the passivation layer is silicon nitride.

[0096] It should be understood that, although the various steps in the flowchart of the present application are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the present application may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0097] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0098] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0099] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A gallium nitride power device, characterized in that: include: a substrate having a second conductivity type; A buffer layer is disposed on the substrate; A barrier layer, disposed on the buffer layer; A source electrode, disposed on the barrier layer; A second drain electrode is disposed on the barrier layer; A first conductive type doped region is provided in the substrate; the first conductive type and the second conductive type are opposite conductive types; A second conductive type doped region is provided in the substrate; A plurality of resistor structures are disposed on the substrate; A plurality of conductive structures, each of which has two ends connected to a resistor structure, so that the resistor structures are connected in series; a bottom of one conductive structure is electrically connected to the second conductive type doped region, and the bottoms of the remaining resistor structures are electrically connected to the first conductive type doped region; A drain doped region, having a first conductivity type, is disposed in the substrate, wherein the first conductivity type doped region is located between the second conductivity type doped region and the drain doped region; A first drain electrode is disposed on the drain doping region, and a bottom of the first drain electrode is electrically connected to the drain doping region; The gallium nitride power device has a device region and a voltage-withstand region, the buffer layer, the barrier layer, the source electrode and the second drain electrode are located in the device region, the first conductive type doped region, the second conductive type doped region, each resistor structure, each conductive structure, the drain doped region and the first drain electrode are located in the voltage-withstand region; the second conductive type doped region is closer to the device region than each first conductive type doped region.

2. The gallium nitride power device according to claim 1, characterized in that: The resistance values ​​of the resistance structures are equal; and / or When the gallium nitride power device is working, the first drain electrode is connected to the potential of the second drain electrode.

3. The gallium nitride power device according to claim 1, characterized in that: Each of the resistor structures is a two-dimensional electron gas resistor.

4. The gallium nitride power device according to claim 3, characterized in that: The buffer layer includes gallium nitride, the barrier layer includes aluminum gallium nitride; the two-dimensional electron gas resistor includes a gallium nitride layer and an aluminum gallium nitride layer on the gallium nitride layer.

5. The gallium nitride power device according to claim 4, characterized in that: It also includes an isolation structure located in the voltage-resistant area, the isolation structure is formed between adjacent resistance structures and between adjacent conductive structures; the isolation structure includes a gallium nitride layer and an aluminum gallium nitride layer treated by high-energy particle injection, the injection energy of the high-energy particle injection is not less than 20keV, the aluminum gallium nitride layer treated by high-energy particle injection is located on the gallium nitride layer treated by high-energy particle injection, and the resistivity of the isolation structure is greater than the resistivity of the two-dimensional electron gas resistor.

6. The gallium nitride power device according to claim 1, characterized in that: It also includes a gate disposed on the barrier layer, wherein the gate includes a P-type gallium nitride region disposed on the barrier layer and a gate electrode disposed on the P-type gallium nitride region.

7. The gallium nitride power device according to claim 1, characterized in that: The voltage-resistant region is located at one side of the device region, or the voltage-resistant region is located at both sides of the device region, or the voltage-resistant region is located around the device region.

8. A method for preparing a gallium nitride power device, comprising: Obtaining a substrate having a first conductive type doping region, a second conductive type doping region and a drain doping region formed thereon; The substrate has a second conductivity type, the drain doping region has a first conductivity type, the first conductivity type doping region, the second conductivity type doping region and the drain doping region are located in a voltage-withstand region of the gallium nitride power device, and the first conductivity type doping region is formed between the second conductivity type doping region and the first drain doping region; the first conductivity type and the second conductivity type are opposite conductivity types; forming a buffer layer on the substrate; forming a barrier layer on the buffer layer; By photolithography and doping, high-energy particles are injected into the buffer layer and the barrier layer in a part of the voltage-sustaining region to destroy the two-dimensional electron gas so that the resistivity of the high-energy injected region is greater than the resistivity of the buffer layer and the barrier layer without high-energy particle injection, thereby forming an isolation structure, wherein the injection energy of the high-energy particle injection is not less than 20 keV; removing part of the buffer layer and barrier layer in the voltage-sustaining region that are not doped with the first impurity, forming a groove that exposes at least part of the first conductive type doped region, at least part of the second conductive type doped region, and at least part of the drain doped region, wherein the groove cuts the buffer layer and barrier layer in the voltage-sustaining region that are not doped with the first impurity into a plurality of two-dimensional electron gas resistors; A conductive material is filled in the trench to connect the two-dimensional electron gas resistors in series, the conductive material on the drain doping region serves as a first drain electrode, and a source electrode and a second drain electrode are formed on the barrier layer in the device region of the gallium nitride power device.

9. The method for preparing a gallium nitride power device according to claim 8, characterized in that: After the step of forming a barrier layer on the buffer layer, the method further comprises: forming a P-type gallium nitride region on the barrier layer in the device region; A gate electrode is formed on the P-type gallium nitride region.

10. The method for preparing a gallium nitride power device according to claim 9, characterized in that: After the photolithography and doping steps and before the step of removing the buffer layer and barrier layer of the voltage-resistant area that are not doped with the first impurity, the method also includes the step of forming a passivation layer on the barrier layer; the passivation layer exposes the positions where the grooves, source electrodes, second drain electrodes and gate electrodes need to be formed.

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