Silicon carbide substrate and preparation method thereof, semiconductor device and electronic equipment

Abstract

The invention discloses a silicon carbide substrate and a preparation method thereof, a semiconductor device and electronic equipment. The silicon carbide substrate comprises a first surface and a second surface opposite to the first surface. According to the silicon carbide substrate disclosed by the invention, the stress difference between the two test points can be smaller than or equal to 35Mpa, so that the silicon carbide substrate has a relatively small stress difference, and the stress in the silicon carbide substrate is uniformly distributed. In addition, according to the silicon carbide substrate disclosed by the invention, the absolute value of the stress of one test point can be smaller than or equal to 30Mpa, so that the silicon carbide substrate has relatively small stress. On the basis, the silicon carbide substrate which is small in stress and uniform in internal stress distribution is applied to the semiconductor device, and the semiconductor device can have high yield.

Description

Technical Field

[0001] The present application relates to the field of semiconductor device preparation, and in particular to a silicon carbide substrate and a preparation method thereof, a semiconductor device, and an electronic device. Background Art

[0002] Semiconductor devices can be understood as components required in a circuit that are made on a small piece or several small pieces of substrate and then packaged into a microstructure with the required circuit function. Components may include but are not limited to: transistors, diodes, resistors, capacitors, inductors and other components.

[0003] Silicon carbide (SiC) has excellent physical properties such as large bandgap, high resistivity and thermal conductivity, and strong breakdown field. Therefore, SiC is widely used as a substrate material. Usually, SiC exists in the form of a single crystal in the substrate, so the substrate using SiC can be called a silicon carbide single crystal substrate, or simply a silicon carbide substrate.

[0004] The silicon carbide substrate disclosed in the related art has relatively large stress inside, and the silicon carbide substrate is prone to uneven stress distribution. Summary of the invention

[0005] The present application discloses a silicon carbide substrate and a preparation method thereof, a semiconductor device, and an electronic device. The stress difference of the silicon carbide substrate is less than or equal to 35Mpa, the silicon carbide substrate has a small stress difference, and the stress distribution in the silicon carbide substrate is uniform. In addition, the absolute value of the stress of the silicon carbide substrate is less than or equal to 30Mpa, that is, the silicon carbide substrate has a small stress.

[0006] The first aspect of the present application discloses a silicon carbide substrate, comprising: a first surface and a second surface arranged opposite to the first surface. The stress difference of the silicon carbide substrate is less than or equal to 35Mpa, and the absolute value of the stress of the silicon carbide substrate is less than or equal to 30Mpa. The stress difference is the difference between the stresses of two test points distributed between the first surface and the second surface. The absolute value of the stress of the silicon carbide substrate is the absolute value of the stress of the test points distributed between the first surface and the second surface.

[0007] The test points of the silicon carbide substrate disclosed in the present application are evenly distributed in the silicon carbide substrate extending 1μm-250μm from the first surface to the second surface, ensuring that the stress of the test point is the stress inside the silicon carbide substrate. The silicon carbide substrate disclosed in the present application can achieve a stress difference between two test points that is less than or equal to 35Mpa, so that the silicon carbide substrate has a smaller stress difference, so that the stress distribution inside the silicon carbide substrate is uniform. In addition, the silicon carbide substrate disclosed in the present application can also achieve an absolute stress value of a test point that is less than or equal to 30Mpa, so that the silicon carbide substrate has a smaller stress. Based on this, the silicon carbide substrate with smaller stress and uniform internal stress distribution disclosed in the present application is applied to semiconductor devices, which can make the semiconductor devices have a higher yield.

[0008] In combination with a feasible implementation manner of the first aspect, at least 8 points distributed between the first surface and the second surface meet preset conditions, and the preset conditions include: a distance between two test points is greater than or equal to 0.5 mm.

[0009] In combination with a feasible implementation of the first aspect, at least 8 points distributed between the first surface and the second surface meet preset conditions, and the preset conditions include: the test points are arranged at equal intervals in a direction parallel to the central axis of the silicon carbide substrate.

[0010] In combination with a feasible implementation of the first aspect, at least 8 points distributed between the first surface and the second surface meet preset conditions, and the preset conditions include: the test points are arranged at equal intervals in a direction perpendicular to the central axis of the silicon carbide substrate.

[0011] In combination with a feasible implementation manner of the first aspect, at least 40 test points meet preset conditions.

[0012] In combination with a feasible implementation of the first aspect, the test points are distributed in the silicon carbide substrate extending 1 μm-250 μm from the first surface to the second surface, ensuring that the test points are located inside the silicon carbide substrate.

[0013] In combination with the first implementation of the first aspect, the test points include: radial test points. The radial test points are test points distributed on a plane parallel to the first surface. The stress difference between the two radial test points is less than or equal to 27 MPa. The radial stress distribution of the silicon carbide substrate disclosed in this implementation is uniform.

[0014] In combination with an implementation of the first aspect, the test points further include: axial test points, which are test points distributed on a vertical line perpendicular to the first surface; the stress difference between the two axial test points is less than or equal to 35 MPa. The silicon carbide substrate disclosed in this implementation has uniform stress distribution in the axial direction.

[0015] In conjunction with an implementation of the first aspect, the silicon carbide substrate includes: the silicon carbide substrate includes: a first stress interval, the stress difference between two radial test points distributed in the first stress interval is less than or equal to 20 MPa. In this implementation, the radial stress of the first stress interval is uniformly distributed.

[0016] In combination with an implementation of the first aspect, the silicon carbide substrate also includes: a second stress interval; the first stress interval is arranged in a direction extending from the central axis of the silicon carbide substrate to the side wall of the silicon carbide substrate in the second stress interval; the extension distance of the first stress interval is the distance from the inner diameter of the first stress interval to the outer diameter of the first stress interval; the stress difference between two radial test points distributed in the second stress interval is greater than 20Mpa.

[0017] In combination with an implementation of the first aspect, the silicon carbide substrate also includes: a third stress interval, the third stress interval is arranged in a direction extending from the central axis of the silicon carbide substrate to the side wall of the silicon carbide substrate in the first stress interval; the stress difference between two radial test points distributed in the third stress interval is greater than 20Mpa.

[0018] In combination with the first implementation method of the first aspect, the ratio of the extension distance of the third stress interval to the third distance is less than 10%; the extension distance of the third stress interval is the distance from the inner diameter of the third stress interval to the outer diameter of the third stress interval, and the third distance is the distance from the central axis to the side wall of the silicon carbide substrate.

[0019] In this implementation, the ratio of the extension distance of the third stress interval to the third distance is less than 10%, that is, in the silicon carbide substrate, the size of the third stress interval is relatively small, and correspondingly, the silicon carbide substrate has a first stress interval of a larger size, and the uniformity of the stress distribution in the first stress interval is better than the uniformity of the stress distribution in the first stress interval.

[0020] In conjunction with an implementation of the first aspect, the stress difference between two radial test points distributed in the third stress interval is less than or equal to 27 MPa. In this implementation, the stress is evenly distributed in the radial direction of the third stress interval.

[0021] In conjunction with an implementation of the first aspect, the stress difference between two axial test points distributed in the third stress interval is less than or equal to 35 MPa. In this implementation, the stress is evenly distributed in the axial direction of the third stress interval.

[0022] In conjunction with an implementation of the first aspect, the stress difference between two radial test points distributed in the second stress interval is less than or equal to 20 MPa. In this implementation, the stress is evenly distributed in the radial direction of the second stress interval.

[0023] In conjunction with an implementation of the first aspect, the stress difference between two axial test points distributed in the second stress interval is less than or equal to 30 MPa. In this implementation, the stress is evenly distributed in the axial direction of the second stress interval.

[0024] In conjunction with an implementation of the first aspect, the stress difference between two radial test points distributed in the first stress interval is less than or equal to 10 MPa. In this implementation, the stress is uniformly distributed in the radial direction in the first stress interval.

[0025] In conjunction with an implementation of the first aspect, the stress difference between two axial test points distributed in the first stress interval is less than or equal to 26 MPa. In this implementation, the stress is evenly distributed in the axial direction in the first stress interval.

[0026] In combination with an implementation of the first aspect, a crystal type of the silicon carbide substrate includes: one of 4H, 6H, 3C, and 15R.

[0027] In combination with an implementation of the first aspect, the resistivity of the silicon carbide substrate is higher than 10 5 Ω·cm; or the resistivity of the silicon carbide substrate is 0.01Ω·cm-10 5 Ω·cm.

[0028] The resistivity of the silicon carbide substrate is higher than 10 5 Ω·cm, the silicon carbide substrate can be used as an insulating substrate. The resistivity of the silicon carbide substrate is 0.01Ω·cm-10 5 Ω·cm, silicon carbide substrate can be used as a semiconductor substrate.

[0029] The second aspect of the present application discloses a method for preparing a silicon carbide substrate, comprising: introducing raw materials into an opening of a crucible; controlling the raw materials to grow under an environment of target growth parameters to obtain the silicon carbide substrate disclosed in any implementation of the first aspect.

[0030] The preparation method disclosed in the present implementation adopts the Raman stress test method to obtain the stress distribution of silicon carbide, and finally obtains the target growth parameters by improving the growth parameters in the silicon carbide crystal growth process through multiple rounds; finally, the raw material is controlled to grow under the environment of the target growth parameters to obtain a silicon carbide substrate with a stress difference less than or equal to 35Mpa and an absolute value of stress less than or equal to 30Mpa.

[0031] In combination with the second implementation method of the second aspect, the process of generating the target growth parameters includes: testing sample stress, where the sample stress is the stress at a test point of the sample silicon carbide substrate; and adjusting the growth parameters of the sample silicon carbide substrate based on the sample stress to obtain the target growth parameters.

[0032] The crucible used in this implementation includes: a substrate and a coating. The coating includes: a first material layer and a second material layer. The first material layer is located between the second material layer and the substrate, and the first material layer can improve the problem of cracks in the second material layer caused by thermal expansion coefficient mismatch. In addition, the first material layer can alleviate the thermal expansion coefficient mismatch between the substrate and the second material layer, play a role in adjusting the stress of the silicon carbide substrate, and then prepare a silicon carbide substrate with a stress difference less than or equal to 35Mpa and an absolute stress value less than or equal to 30Mpa.

[0033] The third aspect of the present application discloses a semiconductor device, comprising: a component and the silicon carbide substrate provided in the first aspect. The component is integrated on the silicon carbide substrate.

[0034] The effects that can be achieved by the third aspect can refer to the effects that can be achieved by any possible implementation of the first and second aspects, and will not be repeated here.

[0035] The fourth aspect of the present application discloses an electronic device comprising: a housing and the semiconductor device disclosed in the third aspect, wherein the semiconductor device is disposed in a cavity of the housing.

[0036] The effects that can be achieved in the fourth aspect can refer to the effects that can be achieved by any possible implementation method of the first to third aspects, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 The disassembled structure of the mobile phone is shown;

[0038] Figure 2 A schematic diagram of a circuit board assembly is shown;

[0039] Figure 3 A schematic diagram of a silicon carbide substrate provided as a feasible embodiment;

[0040] Figure 4 A schematic diagram of a silicon carbide substrate provided as a feasible embodiment;

[0041] Figure 5A A schematic diagram of a silicon carbide substrate provided as a feasible embodiment;

[0042] Figure 5B A schematic diagram of a silicon carbide substrate provided as a feasible embodiment;

[0043] Fig. 6A A schematic diagram of a silicon carbide substrate provided as a feasible embodiment;

[0044] Figure 6B A schematic diagram of a silicon carbide substrate provided as a feasible embodiment;

[0045] Figure 7Schematic diagram of laser irradiation on silicon carbide substrate;

[0046] Figure 8 This is the principle diagram of the equal focusing distance test method;

[0047] Fig. 9 This is the principle diagram of the equal-focus plane test method;

[0048] Fig.10 A flowchart of a method for preparing a silicon carbide substrate provided as a feasible embodiment;

[0049] Fig.11 A schematic diagram of a crucible material provided for a feasible embodiment;

[0050] Fig.12 A scanning electron microscope image of a crucible provided for a feasible embodiment. DETAILED DESCRIPTION

[0051] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0052] In the following, the terms "first", "second", etc. are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first", "second", etc. may explicitly or implicitly include one or more of the features.

[0053] In this application, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium.

[0054] Before introducing the embodiments involved in this application, the technical terms involved in this application are first introduced, as follows:

[0055] The radial direction may be understood as the direction in which the diameter or radius of the silicon carbide substrate extends.

[0056] The axial direction can be understood as a direction parallel to the central axis of the silicon carbide substrate.

[0057] Band gap refers to the width of a band gap. For the substrate to conduct electricity, there must be free electrons or holes. The energy band where free electrons exist is called the conduction band, and the energy band where free holes exist is called the valence band. For bound electrons to become free electrons or holes, they must obtain enough energy to jump from the valence band to the conduction band. The minimum value of this energy is the band gap.

[0058] Crystal growth is the process by which a substance forms crystals from gas, liquid or solid phases under specific physical and chemical conditions.

[0059] Resistivity is a physical quantity used to express the electrical resistance characteristics of various materials. The higher the resistivity of a substrate, the higher the breakdown voltage of a semiconductor device using the substrate, and the higher the voltage that the semiconductor device using the substrate can operate at.

[0060] Thermal conductivity is a measure of a material's ability to conduct heat. The higher the resistivity of the substrate, the higher the breakdown voltage of the semiconductor device and the higher the ambient temperature in which the semiconductor device can be used.

[0061] Breakdown field strength. The semiconductor substrate breaks down under the action of a sufficiently strong electric field. The electric field strength when the semiconductor substrate breaks down is called the breakdown field strength.

[0062] A single crystal is a crystal in which the particles inside the crystal are arranged regularly and periodically in three-dimensional space.

[0063] Stress (stress), when an object is deformed due to external factors, internal forces that interact with each other are generated between the various parts of the object. The internal force per unit area is called stress.

[0064] The stresses involved in the embodiments of the present application may include: tensile stress and compressive stress. Since the silicon carbide substrate is subjected to tensile and compressive stresses, the crystal plane undergoes corresponding extension and contraction changes. Therefore, when using Raman to test stress, the Raman peak intensity will appear to move to low frequency or high frequency. When the silicon carbide substrate is subjected to tensile stress, the Raman peak shifts to low frequency, and the obtained stress is positive. When the substrate is subjected to compressive stress, the Raman peak shifts to high frequency, and the obtained stress is negative. Therefore, the positive and negative before the stress value in this application represent the force direction inside the silicon carbide substrate, and the absolute value of the stress represents the magnitude of the stress.

[0065] Physical-vapor-transportation (PVT) can be understood as a process in which silicon nitride (SiC) is transported to the opening of a crucible using an inert gas under high temperature, high pressure and an inert gas atmosphere, and SiC is deposited and crystallized in the opening of the crucible.

[0066] Warpage can be understood as the distortion or curling of the surface of the silicon carbide substrate.

[0067] The embodiment of the present application provides an electronic device. The electronic device may include: a mobile phone, a tablet computer (pad), a television, a smart wearable product (for example: a smart watch, a smart bracelet), a virtual reality (VR) terminal device, an augmented reality (AR), a base station (bse sation), a terminal device (terminal device), a router (router), a server (server), a power device, etc.

[0068] Take a mobile phone as an example to illustrate the above electronic devices. Figure 1 The disassembled structure of the mobile phone 100 is shown. The mobile phone 100 may include: a display screen 101 and a back cover 102, and a middle frame 103, a circuit board assembly 104, a battery 105 and a sound device 106 may be arranged between the display screen 101 and the back cover 102. The circuit board assembly 104 and the battery 105 may be arranged on the middle frame 103, for example, the circuit board assembly 104, the battery 105 and the sound device 106 are arranged on the side of the middle frame 103 facing the back cover 102, so that the circuit board assembly 104 is located in the cavity surrounded by the back cover 102 and the middle frame 103; or the circuit board assembly 104 and the battery 105 may be arranged on the side of the middle frame 103 facing the display screen 101, so that the circuit board assembly 104 is located in the cavity surrounded by the display screen 101 and the middle frame 103.

[0069] It is to be understood that the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the mobile phone 100. In other embodiments of the present application, the mobile phone 100 may include more or fewer components than shown in the figure, or combine some components, or separate some components, or arrange the components differently. For example, the mobile phone 100 may also include devices such as a flash.

[0070] See also Figure 2 In the embodiment of the present application, the circuit board assembly 104 may include: a circuit board 1041 and a plurality of semiconductor devices 1042 integrated on the circuit board 1041 .

[0071] The semiconductor device 1042 can be integrated on the upper surface or the lower surface of the circuit board 1041. The semiconductor device 1042 is soldered to the pads on the circuit board 1041 by solder (such as solder), so that the circuits between the pads on the circuit board 1041 connect the semiconductor device 1042 to each other.

[0072] In the embodiment of the present application, the circuit board 1041 can be divided into a rigid printed circuit board (PCB) and a flexible printed circuit board (FPC) according to the material, and can be divided into a main board, a module board, a frame board, etc. according to the function.

[0073] In the embodiment of the present application, the semiconductor device 1042 may include power electronic devices and radio frequency devices, etc. according to its application field.

[0074] Power electronic devices (PED), also known as power semiconductor devices, are mainly used in power conversion and control circuits of power equipment. Power electronic devices may include but are not limited to: power amplifiers, gate turn-off thyristors, power transistors, etc.

[0075] RF devices are devices that use the characteristics of RF signals that can propagate in free space to exchange information. RF devices are mainly used in the field of communications. RF devices may include but are not limited to: RF receiving chips, transmitting chips, power amplifiers, Wi-Fi chips, Bluetooth chips, GPS chips, etc.

[0076] Please continue reading Figure 2 In the embodiment of the present application, the semiconductor device 1042 may be referred to as an integrated circuit, which is a miniature semiconductor device or component. The semiconductor device 1042 manufactures the components 200 required in a circuit on a small piece or several small pieces of substrate 300, and then packages them into a miniature structure with the required circuit function. The components 200 may include, but are not limited to, transistors, diodes, resistors, capacitors, and inductors.

[0077] SiC is a wide bandgap semiconductor composed of Group IV silicon atoms (Si) and carbon atoms (C). SiC can be used as a substrate material in semiconductor devices, allowing semiconductor devices to be used in harsh working environments.

[0078] Specifically, the bandgap width of the substrate 300 affects the performance of the semiconductor device. When the bandgap width of the substrate 300 is large, it is difficult for the valence band electrons to jump to the conduction band even in a high temperature environment. Therefore, semiconductor devices with a large bandgap width of the substrate 300 can be used in a high temperature environment.

[0079] In addition, the carbon-silicon bond (Si-C) between Si and C has a high binding energy (about 5 eV). And SiC has excellent physical properties such as high resistivity, high thermal conductivity, and high breakdown field strength. For the above reasons, SiC is widely used in the substrate of semiconductor devices.

[0080] For example, power electronic devices using silicon carbide substrates have the properties of resistance to high voltage, high temperature, high frequency, high power, etc., and power electronic devices using silicon carbide substrates can adapt to more harsh working environments.

[0081] For example, RF devices using silicon carbide substrates can be used in high-frequency communication fields such as 5G.

[0082] SiC is usually present in the form of a single crystal in the substrate. Therefore, the substrate using SiC can be called a silicon carbide single crystal substrate, or silicon nitride substrate for short. In the subsequent embodiments, the crystal involved refers to a single crystal unless otherwise specified.

[0083] The crystal forms of the silicon carbide crystals involved in the embodiments of the present application may include: cubic crystal structure (3C-SiC) and hexagonal lattice structure (2H-SiC, 4H-SiC, 6H-SiC), etc.

[0084] In the silicon carbide substrate, SiC exists in the form of crystals. Therefore, the conversion of raw materials into the silicon carbide substrate requires a crystal growth process.

[0085] During the growth of silicon carbide crystals: various defects such as polycrystalline, polymorphic, microtubules, dislocations, etc. may be introduced into silicon carbide crystals due to factors such as an imbalance in the ratio of Si to C, the introduction of impurities, and changes in temperature gradients. The above defects will cause lattice distortion of silicon carbide crystals, and more seriously, the crystal form of silicon carbide will change, producing 2H-SiC, 4H-SiC, 6H-SiC, 3C-SiC, and 15R-SiC mixed crystals. Lattice distortion will release stress, that is, introduce stress into the silicon carbide substrate, resulting in greater stress in the silicon carbide substrate. In addition, the difference in temperature gradients in the growth environment of silicon carbide crystals causes uneven stress distribution in the silicon carbide substrate.

[0086] The high stress of the silicon carbide substrate and the uneven stress distribution within the silicon carbide substrate will both lead to a reduction in the yield of downstream products (semiconductor devices).

[0087] For example, during the preparation of semiconductor devices, a packaging process is required, that is, the silicon carbide substrate and the components integrated on its surface are fixedly packaged into a whole. The packaging process is generally as follows: the silicon carbide substrate 300 with the components 200 integrated on the surface and the packaging material in a hot melt state are filled into a mold. After the packaging material is cured, a plastic packaging material layer is formed, which can protect the substrate 300 and the components 200.

[0088] Since the packaging material in the hot melt state has a high temperature, the temperature of the environment where the silicon carbide substrate is located is high. The high temperature environment will cause the silicon carbide substrate 300 to release stress. If the stress inside the silicon carbide substrate is large, the large stress will cause the silicon carbide substrate to warp. In severe cases, the component 200 and the silicon carbide substrate 300 are delaminated, affecting the yield of the semiconductor device.

[0089] Similarly, if the stress distribution in the silicon carbide substrate 300 is uneven, that is, there is a large stress difference in the silicon carbide substrate 300, the silicon carbide substrate 300 may be warped in a high temperature environment, and in severe cases, the element and the silicon carbide substrate 300 may be delaminated, affecting the yield of the semiconductor device.

[0090] In order to solve the above problems, the present application embodiment discloses a silicon carbide substrate 300. Figure 3 The silicon carbide substrate 300 may include: a first surface 310 , a second surface 320 , and a sidewall 330 . The sidewall 330 is disposed between the first surface 310 and the second surface 320 .

[0091] The stress difference of the silicon carbide substrate 300 disclosed in the embodiment of the present application is less than or equal to 35Mpa, the silicon carbide substrate 300 has a small stress difference, and the stress distribution in the silicon carbide substrate 300 is uniform. In addition, the absolute value of the stress at a test point is less than or equal to 30Mpa, that is, the silicon carbide substrate 300 has a small stress. The silicon carbide substrate disclosed in the embodiment of the present application is applied in a semiconductor device, which can ensure that the semiconductor device has a high yield.

[0092] The stress difference of the silicon carbide substrate is the difference between the stresses of two test points located on the first surface and the second surface. The absolute value of the stress of the silicon carbide substrate is the absolute value of the stress of the test points distributed between the first surface and the second surface.

[0093] The embodiment of the present application does not specifically limit the distance between the two test points. For example, the two test points can be 1 mm and 2 mm. In order to ensure that the test points are distributed in a larger area of ​​the silicon carbide substrate, that is, the stress generated by the test points can better reflect the stress distribution of the larger area of ​​the silicon carbide substrate, as a feasible implementation method, the distance between the two test points is greater than or equal to 5 mm.

[0094] As a feasible implementation method, the test points can be distributed in an area extending from the first surface 310 to the second surface 320 by 1 μm to 250 μm. In the embodiment of the present application, the area where the test points are distributed is referred to as a test area. Figure 3 As shown, area A is a test area of ​​the silicon carbide substrate.

[0095] The embodiment of the present application does not make any specific limitation on the number of test points, and the number of test points can be determined according to actual conditions. For example, the number of test points can be 8, 100, 10,000, etc.

[0096] At least 8 points distributed between the first surface and the second surface meet the preset conditions, and the preset conditions include: the distance between any two test points is greater than or equal to 0.5 mm. The distance between any two test points is: 10 mm, 20 mm, etc.

[0097] As a feasible implementation, at least 8 points distributed between the first surface and the second surface meet a preset condition, and the preset condition includes: the test points are arranged at equal intervals in a direction parallel to the central axis of the silicon carbide substrate.

[0098] As a feasible implementation, at least 8 points distributed between the first surface and the second surface meet preset conditions, and the preset conditions include: the test points are arranged at equal intervals in a direction perpendicular to the central axis of the silicon carbide substrate.

[0099] As a feasible implementation, at least 40 of the test points meet the preset condition, for example, 100 of the test points meet the preset condition, 1000 of the test points meet the preset condition, and so on.

[0100] Unless otherwise specified, the stress of the silicon carbide substrate involved in the embodiments of the present application can be understood as the absolute stress of the silicon carbide substrate.

[0101] Absolute stress can be understood as the difference between the stress obtained by testing a test point in a silicon carbide crystal and a reference value. For the sake of convenience, the reference value involved in the calculation of absolute stress can be referred to as a first reference value. The first reference value is not affected by the stress of the silicon carbide substrate. Exemplarily, the first reference value may include, but is not limited to, the stress of powdered silicon carbide or the stress of other standard reference materials. In the embodiment of the present application, the stress of the first reference value is recorded as 0.

[0102] In some feasible implementations, the normal stress difference can be understood as the difference between the absolute stresses of two test points. The normal stress difference can characterize the distribution of stress in the silicon carbide substrate 300. Specifically: the greater the normal stress difference of the silicon carbide substrate 300, the worse the uniformity of the stress distribution of the silicon carbide substrate 300; the smaller the normal stress difference of the silicon carbide substrate 300, the better the uniformity of the stress distribution of the silicon carbide substrate 300.

[0103] In some feasible implementations, the stress difference may also be understood as the difference between the relative stresses of two test points.

[0104] In the embodiment of the present application, the relative stress is understood as the difference between the stress of the test point and the second reference value. The second reference value is related to the stress of the silicon carbide crystal. Exemplarily, one of the stresses of all the test points of the silicon carbide substrate can be selected as the second reference value. Exemplarily, the second reference value can also include: any one of the median, mean, mode and other statistical function calculation results of the stress generated at all the test points of the silicon carbide crystal.

[0105] Relative stress can characterize the distribution of stress in the silicon carbide substrate. Specifically, the greater the stress difference of the silicon carbide substrate, the worse the uniformity of the stress distribution of the silicon carbide substrate, and the smaller the stress difference of the silicon carbide substrate, the better the uniformity of the stress distribution of the silicon carbide substrate.

[0106] The following is an explanation of the calculation method of the relative stress of the silicon carbide substrate with reference to a specific example:

[0107] Please continue reading Figure 3 As a feasible implementation method, the second reference value is test point B 50 The relative stress of the silicon carbide substrate can include: test point B 01 With test point B 50 Stress difference, test point B 10 With test point B 50 Stress difference, etc.

[0108] The following is an explanation of the calculation method of the stress difference of the silicon carbide substrate with reference to a specific example:

[0109] Please continue reading Figure 3 , Exemplarily, the stress difference of the silicon carbide substrate may include: test point B 01 With test point B 50 Stress difference, test point B 50 With test point B 20 Stress difference, etc.

[0110] It is worth noting that the above embodiments are merely exemplary of the second reference values ​​of several silicon carbide substrates, the stress difference of the silicon carbide substrates, and the relative stress of the silicon carbide substrates, and the above examples do not constitute specific limitations.

[0111] As a feasible implementation method, the test point B may include: radial test point B 1 The radial test points are test points distributed on a plane parallel to the first plane.

[0112] The following is a detailed description of the radial test point B. 1 For further explanation:

[0113] The first surface 310 may be used as a reference plane. Radial test point B1 The distance to the first surface 310 is taken as the first distance H 1 The two first distances H 1 The difference between the two is less than or equal to the first threshold, which means that the radial test point B can be considered 1 The plane of distribution is parallel to the first surface 310 .

[0114] The embodiment of the present application does not specifically limit the first threshold value. For example, the first threshold value may be: 0.1 μm, 0.2 μm, 0.5 μm, 30 μm, etc.

[0115] In the embodiment of the present application, the radial test point B 1 The stress measured at is called radial stress. The difference between the radial stress and the second reference value is called radial relative stress.

[0116] The calculation method of radial relative stress can refer to the above relative stress calculation method. The difference is that the second reference value of radial relative stress is related to radial stress. Exemplarily, the second reference value of radial relative stress can include: an average value, a maximum value, and a minimum value of at least two radial stresses.

[0117] The radial relative stress of the silicon carbide substrate is further described below with reference to specific examples.

[0118] Please continue reading Figure 3 As a feasible implementation method, F 10 、F 20 、F 30 、F 40 The average value is taken as the second reference value F 1 . F 10 For B 10 The stress measured at 20 For B 20 The stress measured at 30 For B 30 The stress measured at 40 For B 40 The stress measured at .

[0119] In this implementation, B 10 The radial relative stress is: F 10 -F 1 , B 20 The radial relative stress is: F 10 -F 1 wait.

[0120] The difference between the two radial relative stresses can be called the radial stress difference of the silicon carbide substrate. The radial stress difference can characterize the distribution of stress in the radial direction of the silicon carbide substrate. Specifically: the larger the radial stress difference of the silicon carbide substrate, the worse the uniformity of the stress distribution in the radial direction of the silicon carbide substrate; the smaller the radial stress difference of the silicon carbide substrate, the better the uniformity of the stress distribution in the axial direction of the silicon carbide substrate.

[0121] As a feasible implementation, the radial stress difference of the silicon carbide substrate is less than or equal to 27 MPa. The silicon carbide substrate disclosed in this implementation has a small radial stress difference, and the stress is evenly distributed in the radial direction of the silicon carbide substrate.

[0122] In this implementation, the magnitude of the radial relative stress of the silicon carbide substrate is not specifically limited, and it is only required that the absolute value of the stress at the test point is less than or equal to 30 MPa.

[0123] For example, in some feasible implementations, the radial stress difference of the silicon carbide substrate is less than or equal to 27 MPa. The radial relative stress of the silicon carbide substrate may be between -20 MPa and 5 MPa.

[0124] For another example, in some feasible implementations, the radial stress difference of the silicon carbide substrate is less than or equal to 27 MPa. The radial relative stress of the silicon carbide substrate may be between 5 MPa and 30 MPa.

[0125] In the embodiment of the present application, the test point B may also include: axial test point B 2 . Axial test point B 2 It can be understood as the test points distributed on the vertical line perpendicular to the first surface. It can also be understood as the axial test point B 2 Includes test points distributed on a straight line parallel to the central axis.

[0126] The following is a detailed description of the axial test point B. 2 For illustration:

[0127] Please continue reading Figure 3 , the central axis OO' of the silicon carbide substrate can be used as the reference position. The distance from the axial test point to the central axis is used as the second distance H 2 The two second distances H 2 The difference between the two is less than or equal to the second threshold, that is, it can be approximately considered that the axial test point B 2 Distributed on a straight line parallel to the central axis OO'.

[0128] In the embodiment of the present application, the second threshold is not specifically limited. As a feasible implementation, the second threshold may be the same as the first threshold. As a feasible implementation, the second threshold may be different from the first threshold. Exemplarily, the second threshold may be: 0.1 μm, 0.2 μm, 0.5 μm, 30 μm, etc.

[0129] In the embodiment of the present application, the axial test point B 2 The stress measured at is called axial stress. The difference between the axial stress and the second reference value is called axial relative stress.

[0130] The calculation method of the axial relative stress can refer to the above relative stress calculation method. The difference is that the second reference value involved in the axial relative stress calculation is related to the axial stress. Exemplarily, the second reference value involved in the axial relative stress calculation can include: one of the average value, maximum value, and minimum value of the axial stress.

[0131] The axial relative stress of the silicon carbide substrate is further described below with reference to specific examples.

[0132] Please continue reading Figure 3 , B 00 , B 01 , B 02 All are axial test points. 00 For B 00 The stress measured at 01 For B 01 The stress measured at 02 For B 02 The stress measured at 00 、F 01 、F 02 The average value is taken as the second reference value F 2 . B 01 The relative axial stress is F 01 -F 2 , B 02 The relative axial stress is F 02 -F 2 wait.

[0133] In the embodiment of the present application, the difference between the two axial relative stresses can be referred to as the axial stress difference of the silicon carbide substrate. The axial stress difference can characterize the distribution of stress in the axial direction of the silicon carbide substrate. The smaller the axial stress difference of the silicon carbide substrate, the better the uniformity of the stress distribution in the axial direction of the silicon carbide substrate.

[0134] As a feasible implementation, the axial stress difference of the silicon carbide substrate is less than or equal to 35 MPa. The silicon carbide substrate disclosed in this implementation has a small axial stress difference, and the stress is evenly distributed in the axial direction of the silicon carbide substrate.

[0135] In this implementation, there is no specific limitation on the magnitude of the axial relative stress of the silicon carbide substrate, and it is only required that the absolute value of the stress at the axial test point is less than or equal to 30 MPa.

[0136] For example, in some feasible implementations, the axial stress difference of the silicon carbide substrate is less than or equal to 35 MPa. The axial relative stress of the silicon carbide substrate may be between -15 MPa and 20 MPa.

[0137] For another example, in some feasible implementations, the axial stress difference of the silicon carbide substrate is less than or equal to 35 MPa. The axial relative stress of the silicon carbide substrate may be between -20 MPa and 15 MPa.

[0138] In order to better understand the distribution of stress in the silicon carbide substrate, the silicon carbide substrate can be divided into multiple stress intervals in the radial extension direction. The embodiment of the present application does not specifically limit the number of stress intervals contained in the silicon carbide substrate. For example, the number of stress intervals can be: 1, 2, 3, etc.

[0139] As a feasible implementation method, the interval in which the difference between two test points is less than or equal to 20 MPa can be defined as the first stress interval.

[0140] In some feasible implementations, the silicon carbide substrate may include: a first stress interval. For example, Figure 4 The silicon carbide substrate shown may only include: a first stress interval 301 , that is, the stress difference between two test points in the silicon carbide substrate is less than or equal to 20 MPa.

[0141] The axial stress difference within the first stress interval can reflect the distribution of stress in the axial direction within the first stress interval. In the embodiment of the present application, the axial stress difference within the first stress interval is the stress difference between two axial test points distributed within the first stress interval.

[0142] As a feasible implementation method, the stress difference between two axial test points distributed in the first stress interval is less than or equal to 26 MPa. In this implementation method, the stress is evenly distributed in the axial direction in the first stress interval.

[0143] The radial stress difference within the first stress interval can reflect the distribution of stress in the radial direction of the first stress interval. In the embodiment of the present application, the radial stress difference within the first stress interval is the stress difference between two radial test points distributed within the first stress interval.

[0144] As a feasible implementation, the stress difference between two radial test points distributed in the first stress interval is less than or equal to 10 MPa. In this implementation, the stress is uniformly distributed in the radial direction in the first stress interval.

[0145] In some feasible implementations, the crystal growth process of the silicon carbide substrate is carried out in a crucible. Generally, the radial temperature gradient in the crucible is referred to as a radial temperature gradient. The existence of the radial temperature gradient leads to the introduction of residual stress (a specific stress) in the silicon carbide substrate. Generally, the radial temperature gradient increases from the central axis of the crucible to the side wall direction. Specifically, on the silicon carbide substrate, the radial stress of the silicon carbide substrate tends to decrease from the central axis to the side wall. Therefore, in some feasible implementations, the stress difference of the silicon carbide substrate near the central axis is greater than the stress difference of the silicon carbide substrate near the side wall.

[0146] Specifically, the present application also discloses a silicon carbide substrate. Figure 5A and Figure 5B The silicon carbide substrate 300 may include: a first stress interval 301 and a second stress interval 302. The first stress interval 301 is arranged in a direction extending from the central axis OO' to the outer wall 3 of the second stress interval 302. The stress difference between two test points distributed in the second stress interval 302 is greater than 20Mpa.

[0147] The division method of the first stress interval and the second stress interval is further explained below.

[0148] See also Figure 5A In a feasible implementation, six test points are taken as B 00 , B 10 , B 20 , B 30 , B 40 , B 50 . B 40 With B 50 If the stress difference is less than 20Mpa, the interval 301 can be considered as the first stress interval. 00 With B 30 If the stress difference is greater than 20 MPa, the interval 302 can be considered as the second stress interval.

[0149] See also Figure 5B In a feasible implementation, six radial test points are taken: B 00 , B 10 , B 20 , B 30 , B 40 , B 50 . B 30 With B 40 The stress difference is less than 20Mpa, B 30 With B 50 The stress difference is less than 20Mpa, B 40 With B 50If the stress difference is less than 20Mpa, the interval 301 can be considered as the first stress interval. 00 The stress and B 20 If the stress difference is greater than 20 MPa, the interval 302 can be considered as the second stress interval.

[0150] In this implementation, the silicon carbide substrate includes: a first stress interval and a second stress interval, and the stress difference between two radial test points distributed in the first stress interval is less than or equal to 20 MPa. The stress difference between two radial test points distributed in the second stress interval is greater than 20 MPa and less than 25 MPa.

[0151] In an implementation in which the silicon carbide substrate includes: the second stress interval 302 , the second stress interval 302 is annular, and the distance from the inner diameter to the outer diameter of the second stress interval 302 can be referred to as an extension distance a of the second stress interval 302 .

[0152] The embodiment of the present application does not specifically limit the extension distance of the second stress interval. Generally, the larger the extension distance of the second stress interval, the better the uniformity of stress distribution in the silicon carbide substrate.

[0153] For example, see Figure 5A and Figure 5B , the extension distance a of the first stress interval and the third distance H 3 The ratio is less than 95%. The third distance H 3 is the distance from the central axis OO' to the side wall 330. The extension distance a of the first stress interval can be understood as the distance between the inner diameter and the outer diameter of the first stress interval.

[0154] As a feasible implementation, the stress difference between two radial test points distributed in the second stress interval 302 is less than or equal to 20 MPa. In this implementation, the stress is evenly distributed in the radial direction of the second stress interval.

[0155] As a feasible implementation, the stress difference between two axial test points distributed in the second stress interval may be less than or equal to 30 MPa. In this implementation, the stress is evenly distributed in the axial direction of the second stress interval.

[0156] In some feasible implementations, the crystal growth process of the silicon carbide substrate is carried out in a crucible. In some cases, the outer wall of the silicon carbide crystal will contact the crucible, introducing stress near the outer wall of the silicon carbide crystal. In addition, the crystal growth occurs in a high temperature environment, and the crucible expands due to heat, which will introduce stress near the side wall of the silicon carbide substrate. In addition, the inner wall of the silicon carbide substrate is usually polished, and during the polishing process, stress is introduced around the side wall.

[0157] Therefore, in some feasible implementations, the stress difference in a region of the silicon carbide substrate adjacent to the sidewall is greater than the stress difference in a region of the silicon carbide substrate adjacent to the central axis.

[0158] See also Fig. 6A The present application also discloses that the silicon carbide substrate includes: a first stress interval 301, a second stress interval 302, and a third stress interval 303. The third stress interval 303 is arranged in a direction extending from the central axis to the outer wall of the first stress interval 302. The stress difference between two radial test points distributed in the third stress interval is greater than 20Mpa.

[0159] In some feasible implementations, the stress difference of the third stress interval 303 may be greater than the stress difference of the second stress interval 302. In some feasible implementations, the stress difference of the third stress interval 303 may be less than the stress difference of the second stress interval 302.

[0160] See also Figure 6B In some feasible implementations, the silicon carbide substrate includes: a first stress interval 301 and a third stress interval 303. The third stress interval 303 is arranged in a direction extending from the central axis to the outer wall of the first stress interval 301.

[0161] In an implementation in which the silicon carbide substrate includes the third stress interval 303 , the third stress interval 303 is annular, and the distance from the inner diameter to the outer diameter of the third stress interval 303 can be referred to as an extension distance of the third stress interval 303 .

[0162] The embodiment of the present application does not specifically limit the extension distance of the third stress interval 303. Generally, the smaller the extension distance of the third stress interval 303, the smaller the stress difference of the silicon carbide substrate.

[0163] In some feasible implementations, the extension distance b of the third stress interval is 3 The ratio of may be less than 10%. In this implementation, the extension distance of the third stress interval 303 is small, and the stress distribution of the silicon carbide substrate is uniform.

[0164] As a feasible implementation, the stress difference between two radial test points distributed in the third stress interval 303 is less than or equal to 27 MPa. In this implementation, the stress in the third stress interval is evenly distributed in the radial direction.

[0165] As a feasible implementation, the stress difference between two axial test points distributed in the third stress interval may be less than or equal to 35 MPa. In this implementation, the stress in the third stress interval is evenly distributed in the axial direction.

[0166] As a feasible implementation method, the crystal type of the silicon carbide substrate includes: 4H, 6H, 3C, and 15R.

[0167] As a feasible implementation method, the resistivity of silicon carbide substrate is higher than 10 5 Ω·cm, in this implementation, the silicon carbide substrate can be used as an insulating substrate.

[0168] As a feasible implementation method, the resistivity of the silicon carbide substrate is 0.01Ω·cm-10 5 Ω·cm, in this implementation, the silicon carbide substrate can be used as a semiconductor substrate. As a feasible implementation, the resistivity of the silicon carbide substrate is 0.01Ω·cm-30Ω·cm.

[0169] The stress involved in the embodiment of the present application is obtained by using the Raman test method. First, the principle of the Raman test is explained.

[0170] The principle of Raman testing of stress on silicon carbide substrates is to focus laser light of a certain wavelength onto the silicon carbide substrate. The photons of the laser interact with the lattice of the silicon carbide substrate, causing the photons to scatter. The scattering of photons can also be called Raman scattering. The occurrence of Raman scattering is related to the lattice vibration of the silicon carbide substrate. When stress exists in the silicon carbide substrate, the stress will cause the bond length of the carbon-silicon bond (Si-C) in the lattice to lengthen or shorten, thereby causing the vibration frequency of the atoms (Si and C) to change. This is reflected in the Raman spectrum as the characteristic peak of the substrate moves toward the low frequency or high frequency direction, that is, the peak position shift occurs.

[0171] Before the Raman test, the Raman test points need to be set. In the embodiment of the present application, the test points are distributed in the test area of ​​the silicon carbide substrate, and the test area A can be understood as the area extending 1μm-250μm from the first surface 310 to the second surface 320 of the silicon carbide substrate to ensure that the stress measured in the embodiment of the present application is the stress distributed in the silicon carbide substrate.

[0172] In some feasible implementations, single point testing can be performed.

[0173] In some feasible implementations, multiple test points (Mapping) of the substrate may also be scanned. Exemplarily, 10*10-50*50 test points may be tested simultaneously.

[0174] The Raman test process is generally as follows:

[0175] A Raman device is used to focus the laser emitted by the Raman device on the test area of ​​the substrate to obtain a Raman test result, wherein the Raman test result may include: a peak position of the Raman spectrum.

[0176] The peak position of the Raman spectrum is compared with the standard peak position to obtain the peak offset. The standard peak position here can be the position of the peak in the Raman spectrum obtained by testing a standard substrate. After obtaining the peak offset, the stress of the test point can be calculated based on the peak offset and the conversion coefficient. The conversion coefficient here refers to the conversion coefficient μ of the peak offset v and the stress. The stress of the silicon carbide substrate is calculated. The stress calculation formula is:

[0177] σ(MPa)=μ×v(cm- 1 ), where σ is the stress at the test point.

[0178] The production process of silicon carbide substrate needs to go through: crystal growth process and mechanical processing process. PVT is usually used to grow silicon carbide crystals. During the process of PVT growth of silicon carbide crystals, the change in temperature gradient causes stress to exist in the silicon carbide substrate. In addition, mechanical processing will also introduce stress in the silicon carbide substrate, and the existence of stress will cause the silicon carbide substrate to warp.

[0179] In combination with the warping characteristics and light transmittance characteristics of the silicon carbide substrate, the embodiments of the present application also disclose a method for quantitatively measuring internal stress of the silicon carbide substrate - an equal focusing distance test method.

[0180] First, let's look at the depth of focus d. Figure 7 The silicon carbide substrate has a light-transmitting physical property, so that the laser C is focused in the silicon carbide substrate 300 (O is the focus). In this implementation, the distance between the focus O and the first surface 310 is referred to as the focus depth d.

[0181] See also Figure 8 , the equal focus distance means that when performing Raman testing on each test point B, the focus position (focus) O of the laser is at the same distance H from the first surface 310. The equal focus distance test is not affected by the curvature of the substrate surface. When the surface of the silicon carbide substrate is convex due to curvature, the focus position of the laser also moves upward; when the surface of the silicon carbide substrate is concave due to curvature, the focus position of the laser also moves downward, ensuring that the focus position of the laser is at the same distance from the surface of the silicon carbide substrate for each scanning test, so that it is not affected by the curvature of the silicon carbide substrate surface.

[0182] Usually, the Raman device has an automatic focusing function, which can automatically focus the laser spot on the position with the strongest stress, that is, the surface of the silicon carbide substrate. After automatically focusing on the surface of the silicon carbide substrate, the focusing axis positioning position of the laser is controlled to move downward.

[0183] As a feasible implementation method, the penetration depth Dp of the laser can be calculated according to the following formula.

[0184] Among them, α is the absorption coefficient of the silicon carbide substrate to the laser, λ is the laser wavelength, and k is the extinction coefficient. The specific value of the penetration depth Dp is calculated according to the above formula.

[0185] After Dp is determined, a suitable focus depth d can be selected according to the above Dp. The standard for selecting d is: d is less than Dp, and d must be greater than 1 μm to ensure that the stress measured in the embodiment of the present application is the stress inside the silicon carbide substrate, rather than the surface stress.

[0186] It is known that the laser spot diameter D has the following relationship with λ and Na:

[0187] Where Na is the numerical aperture of the Raman device.

[0188] The larger D is, the stronger the Raman peak intensity of each test point is, and the more impurity peaks there are. More impurity peaks will affect the accuracy of Raman testing. You can select appropriate λ and Na to reduce the spot diameter and improve the accuracy of Raman testing.

[0189] According to the focusing depth d determined above, an equidistant focusing test is performed on different positions of the substrate, that is, the distance between the focusing plane and the first surface is always equal, so that the obtained Raman peak intensity is always maintained at the axial maximum value of the test point. Finally, the stress of the silicon carbide substrate is tested using the Raman device.

[0190] The embodiments of the present application also disclose a method for quantitatively measuring internal stress of a silicon carbide substrate - an iso-focal plane test method.

[0191] See also Fig. 9 , iso-focal plane test, as the name implies, the focus position of the laser is located on the same horizontal plane. After the parameters of the Raman equipment (λ, Na, etc.) are adjusted and confirmed, the axial focus position is no longer changed, that is, the focus axis positioning position of the laser is located on the same horizontal plane. The penetration depth Dp of the laser is calculated according to the same formula as the equidistant focus test, and the appropriate focus depth d is selected in the same way.

[0192] Since the surface formed by the focus in the equal focal plane test method is a plane, in this test method, the focus depth d at different test points needs to take into account the curvature of the silicon carbide substrate.

[0193] After d is determined, the stress of the silicon carbide substrate is tested using a Raman device.

[0194] Through the above-mentioned equidistant focusing and equifocal plane test methods, the peak offset inside the substrate is obtained, and the stress distribution of the substrate is calculated. The difference in substrate stress calculated by the equidistant focusing test and the equifocal plane test is ≤0.2MPa; the peak offset obtained by the equidistant focusing test and the equifocal plane test is <0.0005cm- 1 The above two methods can verify each other, proving the accuracy of the stress test results disclosed in this application, and the accuracy of the test method can be further improved according to the settings of the focus depth and the spot diameter.

[0195] The following is an example of stress testing of 4H-SiC substrate:

[0196] For any two points in the 4H-SiC substrate with the same simple wave vector peak position, such as the FTO (2 / 4) peak position of 776cm- 1 The measured value is subtracted, and the relative stress calculation formula is:

[0197] σrelative = μ×(v(x1, y1)-V(x2, y2)), σ is in MPa, v(x1, y1) and V(x2, y2) are in cm- 1 , where v(x1, y1) is the actual FTO(2 / 4) peak position at the test point on the 4H-SiC substrate, and V(x2, y2) is the FTO(2 / 4) peak position on the standard silicon carbide substrate. The stress at the test point (x1, y1) is calculated according to the above calculation formula. If the relative value of σ is positive, it means that the stress at the test point relative to the relative point is tensile stress. If the relative value of σ is negative, it means that the stress at the test point relative to the relative point is compressive stress.

[0198] (x1, y1) are the coordinates of the test point in 4H-SiC, and (x2, y2) are the coordinates of the test point in the standard silicon carbide substrate. During the test, it is necessary to ensure that (x1, y1) and (x2, y2) are consistent.

[0199] The present application also discloses a method for preparing a silicon carbide substrate. Fig.10 , the preparation method comprises:

[0200] S1: introducing raw materials into the opening of the crucible;

[0201] In the embodiment of the present application, the raw material can be introduced into the opening of the crucible under the driving of an inert gas, wherein the inert gas can include but is not limited to: nitrogen (N 2 ), argon (Ar), etc.

[0202] S2: controlling the raw material to grow in an environment with target growth parameters to obtain a silicon carbide substrate; the target growth parameters are iteratively generated based on the stress distribution of the silicon carbide substrate and the growth parameters of the raw material.

[0203] In the preparation of the silicon carbide substrate disclosed in the embodiment of the present application, the raw material is grown under the environment of target growth parameters. The target growth parameters are iteratively generated based on the stress distribution of the silicon carbide substrate and the growth parameters of the crystal growth, specifically:

[0204] The stress distribution of the sample silicon carbide is obtained by using the stress method disclosed in the embodiment of the present application, and the growth parameters in the silicon carbide crystal growth process are optimized through multiple rounds of improvement to obtain the target growth parameters. The raw material is grown under the target growth parameter environment to obtain the silicon carbide substrate disclosed in the embodiment of the present application.

[0205] In some feasible implementations, a stress test may be performed after each optimization of the growth parameters. In some feasible implementations, a stress test may be performed after multiple optimizations of the growth parameters.

[0206] The growth parameters involved in the embodiments of the present application may include but are not limited to: the thermal field during the crystal growth process, the pressure of the environment, etc. The thermal field may include but is not limited to: the heating temperature, the duration of the temperature, etc.

[0207] The present application embodiment does not impose any limitation on the base material used for the crucible. As a feasible implementation method, the base material used for the crucible can be graphite.

[0208] The present application also discloses a base material used in a crucible. Fig.11 The substrate may include: a base 10 provided with a coating. The coating includes: a first material layer 20 and a second material layer 30. The material of the first material layer 20 includes Ta x C y The material of the second material layer 30 includes TaC or Ta, and the first material layer 20 is located between the second material layer 30 and the substrate 10. The first material layer 20 can also alleviate the thermal expansion coefficient mismatch between the substrate 10 and the second material layer 30, and play a role in adjusting the stress of the silicon carbide substrate, so that the stress of the prepared silicon carbide substrate is evenly distributed. The first material layer can also improve the problem of cracks in the second material layer caused by thermal expansion coefficient mismatch, so that the second material layer 30 can better protect the substrate 10.

[0209] In some embodiments, the first material layer 20 includes a plurality of first crystal grain layers 21 , each of the first crystal grain layers 21 includes first crystal grains 211 , and the first crystal grains 211 in two adjacent first crystal grain layers 21 are arranged in a staggered manner.

[0210] In the embodiment of the present application, there is no limitation on the number of the first crystal grain layers 21 in the first material layer 20 and the number can be designed according to the actual situation.

[0211] It can be understood that when the material of the first material layer 20 is Ta xC y In the case of, the first crystal grains 211 in the first material layer 20, i.e., Ta x C y crystal grains. When the material of the first material layer 20 is Ta and Ta x C y In the case of, the first crystal grains 211 in the first material layer 20 are Ta crystal grains and Ta x C y crystal grains. Wherein, 0 < x < 1, 0 < y < 1. In the embodiments of the present application, the first material layer 20 may also be referred to as Ta x C y penetration layer.

[0212] In some examples, when the material of the first material layer 20 is Ta and Ta x C y In the case of, the Ta crystal grains are closer to the second material layer 30 than the Ta x C y crystal grains.

[0213] As Fig.11 shown, the first crystal grains 211 in two adjacent first crystal grain layers 21 are arranged staggeredly, that is, a part of the projections of two adjacent first crystal grains 211 in two adjacent first crystal grain layers 21 on the substrate 10 overlap. At this time, the arrangement modes of the first crystal grains 211 in two adjacent first crystal grain layers 21 in the first material layer 20 are different.

[0214] In the embodiments of the present application, the first material layer 20 includes a plurality of first crystal grain layers 21, and the first crystal grains 211 in two adjacent first crystal grain layers 21 are arranged staggeredly. In this way, when cracks appear in the first material layer 20, the cracks can be contained in a single first crystal grain layer 21, avoiding the cracks from penetrating through the first material layer 20 and extending into the substrate 10, thereby further improving the protection ability of the first material layer 20 to the substrate. Of course, by setting like this, the first material layer 20 can also block the further extension of cracks to the substrate 10 when through cracks appear in the second material layer 30.

[0215] In some embodiments, the second material layer 30 includes a plurality of second crystal grain layers 31, each second crystal grain layer 31 includes second crystal grains 311, and the second crystal grains 311 in two adjacent second crystal grain layers 31 are arranged staggeredly. When the second material layer 30 contains TaC, it can be called a TaC layer.

[0216] It can be understood that when the material of the second material layer 30 is TaC, the second crystal grains 311 in the second material layer 30 are TaC crystal grains. When the material of the second material layer 30 is Ta, the second crystal grains 311 in the second material layer 30 are Ta crystal grains.

[0217] In the embodiment of the present application, there is no limitation on the number of the second crystal grain layers 31 included in the second material layer 30 , and the number can be designed according to actual conditions.

[0218] like Fig.11 As shown, "the second grains 311 in two adjacent second grain layers 31 are arranged in a staggered manner", that is, the projections of two adjacent second grains 311 in two adjacent second grain layers 31 on the substrate 10 partially overlap. At this time, the second grains 311 in two adjacent second grain layers 31 in the second material layer 30 are arranged in different ways.

[0219] In some embodiments, the second grains 311 may be oriented and grown along the

[200] direction and the

[220] direction.

[0220] In this way, the density of the second material layer 30 can be higher, and it is less likely to have through cracks in the second material layer 30. The second material layer 30 can better protect the substrate 10, so that during the preparation process of the semiconductor material, the substrate 10 is not easily damaged by high temperature or chemical atmosphere erosion, thereby improving the temperature resistance and chemical erosion resistance of the crucible, extending the service life of the crucible, and further improving the stability of the growth environment of the silicon nitride substrate, thereby obtaining a silicon carbide substrate with uniform stress distribution.

[0221] The present application embodiment provides a method for preparing a crucible. The method for preparing a crucible may include steps (1) and (2), specifically:

[0222] (1) soaking a graphite substrate in a tantalum pentachloride solution, wherein the concentration of tantalum pentachloride is 5%-95%, and the porosity of the graphite substrate is 5%-55%, and performing a gas pressurization treatment, wherein the gas pressure is 1MPa-2MPa, and the pressurization time is 0.5h-1h, drying the soaked graphite substrate, and calcining the substrate to obtain a graphite substrate with Ta x C y Graphite substrate of the infiltration layer;

[0223] (2) Prepare a slurry containing TaC, which includes: 25-40 parts of TaC powder, 20-35 parts of solvent, 15-25 parts of co-solvent, 1-3 parts of defoamer, 2-5 parts of thickener, 5-15 parts of straight-chain saturated aliphatic hydrocarbon, and 1-3 parts of carbon powder. Spray the slurry onto the surface with TaC x C yThe surface of the graphite substrate of the infiltration layer is dried and sintered under an inert gas: sintering at 700mbar-900mbar and 500℃-700℃ for 3h-5h; then the pressure is increased to 1000mbar-1100mbar, the temperature is increased to 1600℃-1800℃, and sintering is carried out for 8h-10h; finally, the pressure is increased to 145kPa-155kPa, the temperature is increased to 2200℃-2400℃, and sintering is carried out for 14h-16h, and finally the temperature is reduced to room temperature and normal pressure within 15h-25h to obtain a crucible.

[0224] In some feasible implementations, the calcination in step (1) is carried out under an inert gas, and the dried graphite substrate is placed in a vacuum furnace for stepwise heating and stepwise cooling. Specifically:

[0225] Stepwise heating: heating to 250-350°C, calcining for 4-6 hours, then heating to 850-950°C, calcining for 2.5-3.5 hours, and finally heating to 1200-1300°C, calcining for 3-5 hours;

[0226] Step cooling: cool down to 900℃-1100℃, maintain for 0.5h-2h, then cool down to 750℃-850℃, maintain for 0.5-1h, and finally cool down to room temperature at a cooling rate of 15-25℃ / h.

[0227] In some feasible implementations, the pressure in the vacuum furnace during the calcination process is 800 mbar-1000 mbar.

[0228] The preparation process of the crucible is described below with reference to a specific example:

[0229] Embodiment 1:

[0230] (1) placing a tantalum pentachloride n-butanol solution soaked with a graphite substrate in a container, wherein the concentration of tantalum pentachloride in the tantalum pentachloride n-butanol solution is 70%, and the porosity of the graphite substrate is 45%. The container is placed in a pressure chamber for pressurization treatment at a pressurization rate of 0.1 MPa / min. When the pressure in the pressure chamber reaches 1 MPa, the pressure is maintained for 1 hour, and then the pressure is released. The soaked graphite substrate is transferred to a vacuum furnace and dried at 60°C for 7 hours. Then, argon gas is introduced into the vacuum furnace so that the pressure in the furnace is maintained at 900 mbar and then calcined. The temperature is increased in a stepwise manner: from 300°C for 1 hour to calcination for 5 hours; then from 900°C for 2 hours to calcination for 3 hours; finally from 1250°C for 1 hour to calcination for 4 hours; and then a stepwise cooling is started: from 1000°C for 1 hour to calcination for 1 hour, then from 800°C for 1 hour to calcination for 1 hour, and finally from 20°C / h to room temperature to obtain a graphite substrate with Ta x C y Graphite substrate of the infiltration layer.

[0231] (2) TaC is dissolved in an organic solvent to prepare a slurry containing TaC, the slurry comprising: 32.7 parts of TaC powder, 25 parts of ethanol, 20 parts of tetrahydrofuran, 1.5 parts of BYK defoamer, 3.5 parts of cellulose ether, 10 parts of straight-chain saturated aliphatic hydrocarbon, and 1.3 parts of carbon powder. After the above components are mixed and stirred for 2.5 hours, the slurry is sprayed onto the surface of the TaC-containing surface using a sprayer. x C y The surface of the graphite substrate of the infiltration layer is placed in a heating furnace, the temperature is raised to 200°C in an air environment and dried for 10 hours, then argon is introduced into the heating furnace, sintered at 800 mbar and 600°C for 4 hours, then the pressure is raised to 1000 mbar, the temperature is raised to 1700°C, sintered for 9 hours, and finally the pressure is raised to 150 kPa, the temperature is raised to 2300°C, sintered for 15 hours, and finally cooled to room temperature and normal pressure after 20 hours to obtain crucible 1.

[0232] Embodiment 2:

[0233] (1) placing a tantalum pentachloride n-butanol solution soaked with a graphite substrate in a container, wherein the concentration of tantalum pentachloride in the tantalum pentachloride n-butanol solution is 70%, and the porosity of the graphite substrate is 45%. The container is placed in a pressure chamber for pressurization treatment at a pressurization rate of 0.2 MPa / min. When the pressure in the pressure chamber reaches 1 MPa, the pressure is maintained for 1 hour, and then the pressure is released. The soaked graphite substrate is transferred to a vacuum furnace and dried at 80°C for 5 hours. Then, argon gas is introduced into the vacuum furnace so that the pressure in the furnace is maintained at 800 mbar and then calcined. The temperature is increased in a stepwise manner: from 1 hour to 250°C, and calcined for 6 hours; then from 2 hours to 850°C, and calcined for 3.5 hours; finally from 1 hour to 1200°C, and calcined for 5 hours; and a stepwise cooling is started: from 1 hour to 900°C, and maintained for 2 hours, then from 1 hour to 750°C, and maintained for 1 hour, and finally from 15°C / h to room temperature to obtain a graphite substrate with Ta x C y Graphite substrate of the infiltration layer.

[0234] (2) TaC is dissolved in an organic solvent to prepare a slurry containing TaC, wherein the slurry includes: 25 parts of TaC powder, 20 parts of ethanol, 25 parts of tetrahydrofuran, 3 parts of BYK defoamer, 2 parts of cellulose ether, 15 parts of straight-chain saturated aliphatic hydrocarbon, and 3 parts of carbon powder. After the above components are mixed and stirred for 2.5 hours, the slurry is sprayed onto the surface of the TaC-containing surface using a sprayer. x C yThe surface of the graphite substrate of the infiltration layer is placed in a heating furnace, the temperature is raised to 180°C in an air environment and dried for 12 hours, then argon is introduced into the heating furnace, and it is sintered at 700 mbar and 700°C for 3 hours, then the pressure is increased to 1000 mbar, the temperature is increased to 1800°C, and it is sintered for 8 hours, and finally the pressure is increased to 145 kPa, the temperature is increased to 2400°C, and it is sintered for 16 hours, and finally it is cooled to room temperature and normal pressure after 25 hours to obtain crucible 2.

[0235] Embodiment 3:

[0236] (1) A tantalum pentachloride n-butanol solution soaked with a graphite substrate is placed in a container, wherein the concentration of tantalum pentachloride in the tantalum pentachloride n-butanol solution is 70%, and the porosity of the graphite substrate is 45%. The container is placed in a pressure chamber for pressurization treatment at a pressurization rate of 0.05 MPa / min. When the pressure in the pressure chamber reaches 2 MPa, the pressure is maintained for 0.5 h, and then the pressure is released. The soaked graphite substrate is transferred to a vacuum furnace, dried at 60° C. for 7 h, and then placed in a vacuum furnace. Argon gas is introduced into the furnace to maintain the pressure at 1000 mbar, and then calcination is carried out with step-by-step heating: heating to 350°C for 1 hour and calcining for 4 hours; then heating to 950°C for 2 hours and calcining for 2.5 hours; finally heating to 1300°C for 1 hour and calcining for 3 hours; then stage-by-stage cooling is started: cooling to 1100°C for 1 hour and maintaining for 0.5 hours, then cooling to 850°C for 1 hour and maintaining for 0.5 hours, and finally cooling to room temperature at a rate of 25°C / h to obtain a graphite substrate with a permeation layer.

[0237] (2) TaC is dissolved in an organic solvent to prepare a slurry containing TaC, wherein the slurry includes: 40 parts of TaC powder, 35 parts of ethanol, 15 parts of tetrahydrofuran, 1 part of BYK defoamer, 5 parts of cellulose ether, 5 parts of straight-chain saturated aliphatic hydrocarbon, and 1 part of carbon powder. After the above components are mixed and stirred for 2.5 hours, the slurry is sprayed onto the surface of the TaC-containing surface using a sprayer. x C y The surface of the graphite substrate of the infiltration layer is placed in a heating furnace, the temperature is raised to 220°C in an air environment and dried for 8 hours, then argon is introduced into the heating furnace, sintered at 900 mbar and 500°C for 5 hours, then the pressure is raised to 1100 mbar, the temperature is raised to 1600°C, sintered for 10 hours, and finally the pressure is raised to 155 kPa, the temperature is raised to 2200°C, sintered for 14 hours, and finally cooled to room temperature and normal pressure after 15 hours to obtain crucible 3.

[0238] Embodiment 4:

[0239] Example 4 has similar preparation steps to Example 1. The difference is that in Example 4, (1) the graphite substrate is not subjected to gas pressurization treatment during immersion in the tantalum pentachloride n-butanol solution, but is only immersed at room temperature and pressure for 1 hour, and then dried and calcined, and the other conditions are the same as those of crucible 1, so as to obtain crucible 4.

[0240] Embodiment 5:

[0241] Example 5 has similar preparation steps to Example 1. The difference is that in Example 5, the graphite substrate after soaking and drying in (1) is calcined in a vacuum furnace by maintaining the pressure in the furnace at 900 mbar, calcining at 700° C. for 7 h, and then calcining at 1200° C. for 5 h and then cooling in stages to obtain crucible 5.

[0242] Embodiment 6:

[0243] Example 6 has similar preparation steps to Example 1, except that in Example 6 (2), the graphite substrate after spraying the slurry and drying is sintered in a heating furnace as follows: sintering at 1000 mbar and 1200°C for 12 hours, then the pressure is increased to 140 kPa, the temperature is increased to 2300°C, sintering for 20 hours, and finally cooled to room temperature and normal pressure after 20 hours to obtain crucible 6.

[0244] Comparative Example 1:

[0245] Will carry Ta x C y The graphite substrate of the infiltration layer is placed in a chemical vapor deposition furnace, evacuated to below 50Pa, and then heated to 1200℃, and a mixture of ethane, TaCl 5 , H 2 A mixed gas consisting of a carrier gas argon gas is maintained at a stable flow rate into the deposition furnace, and the furnace pressure is maintained at 5000Pa. The molar ratio of TaCl5 and ethane gas is first controlled at 1.2:1 to form a transition layer with a thickness of 50μm; then the molar ratio of TaCl5 and ethane gas is controlled to 3:1 to form a TaC layer with a thickness of 60μm, and crucible D1 is obtained.

[0246] Comparative Example 2:

[0247] Comparative Example 2 has similar preparation steps to Comparative Example 1, except that step (1) is not performed, and step (2) is performed only on the graphite substrate. (2) A transition layer and a TaC layer are formed on the graphite substrate by CVD method, and the specific conditions of the CVD method are the same as those of Comparative Example 1, to obtain crucible D2.

[0248] Comparative Example 3:

[0249] Comparative Example 3 has similar preparation steps to Comparative Example 1, except that step (1) is not performed, and step (2) is performed only on the graphite substrate. The operating conditions of step (2) are the same as those of Example 1, and crucible D3 is obtained.

[0250] The crucibles 1-6 and crucibles 1-3 prepared above were subjected to high temperature corrosion and thermochemical corrosion experiments to simulate the growth environment of silicon carbide crystals using the PVT method. Crucibles 1-6 and crucibles D1-D3 were kept at 2300° C. and etched in a silicon carbide atmosphere for 100 hours. The test results are shown in Table 1:

[0251] Table 1

[0252] sample Weight before experiment (g) Weight after the experiment (g) Erosion weight loss rate (%) Crucible 1 46.7103 46.0390 1.43 Crucible 2 47.8269 47.3314 1.04 Crucible 3 47.1923 46.7274 0.98 Crucible 4 46.3194 45.5326 1.70 Crucible 5 47.5247 46.5326 2.09 Crucible 6 47.3215 46.4137 1.91 Crucible D1 47.9024 46.3529 3.23 Crucible D2 46.7247 45.1371 3.40 Crucible D3 46.7372 45.0261 3.66

[0253] In Table 1, erosion weight loss rate = [(weight before experiment - weight after experiment) / weight before experiment] × 100%. The above high temperature erosion and thermochemical erosion experiments prove that the coating of this embodiment can improve the protection performance of the graphite substrate, extend the tolerance and corrosion resistance of the coating, and thus extend the service life of the crucible.

[0254] The crucible 1 after multiple uses was tested by scanning electron microscope (SEM), and the results are as follows: Fig.12 shown. Fig.12 (a) is a test image of a local coating on the crucible 1; Fig.12 (II) and Fig.12 Among them, (three) is Fig.12 From the enlarged view of the crack in (a), it can be seen that even though the crucible 1 prepared in this embodiment has cracks after repeated use, the width of the cracks can be controlled within 1 μm and no through cracks will be formed, and the crucible can still be used to produce high-quality silicon carbide crystals.

[0255] The Ta involved in the above crucible x C y The permeation layer was characterized by EDS and analyzed for element content, and it was found that Ta x C y The permeation layer is formed inside and on the surface of the graphite substrate and interspersed with the inside of the graphite substrate, so that the bonding force with the graphite substrate is strong, thereby improving the durability of the crucible. x C y XRD test of the penetration layer, TaC layer and TaC x C y Ta of the permeation layer x C y The grains grow anisotropically, and the TaC grains in the TaC layer grow along the

[200] and

[220] directions.

[0256] The embodiment of the present application further specifically discloses a method for preparing a silicon carbide substrate with a diameter of 200 mm, comprising the following steps:

[0257] (1) Add silicon carbide powder into a graphite crucible.

[0258] (2) The furnace body is vacuumed to below 10mbar-6mbar, and then high-purity inert gas is introduced to 300mbar-500mbar. This process is repeated 2-3 times, and finally the furnace body is vacuumed to below 10mba-6mbar.

[0259] (3) High-purity inert gas is introduced into the furnace body, and the pressure is increased to 10mba-100mbar within 1h-3h. High-purity inert gas is continuously introduced and the pressure is maintained constant.

[0260] (4) Crystal growth stage: While maintaining constant pressure, the temperature inside the furnace is raised to the single crystal growth temperature of 2200K-2800K within 3h-5h, and the growth time is 30h-150h.

[0261] (5) After the single crystal growth is completed, open the furnace body and take out the graphite crucible to obtain the silicon carbide single crystal.

[0262] Add equal amounts of silicon carbide powder to crucible 1, crucible 2, crucible 3, crucible D1, crucible D1, and crucible D3 prepared in Example 3, respectively; evacuate the furnace body to below 10 mbar-6 mbar, then introduce high-purity inert gas to 300 mbar, repeat this process 3 times, and finally evacuate the furnace body to below 10 mbar-6 mbar; introduce high-purity inert gas into the furnace body, increase the pressure to 30 mbar within 1 hour, and continue to introduce high-purity inert gas while keeping the pressure constant; crystal growth stage: while keeping the pressure constant, increase the temperature in the furnace body to the single crystal growth temperature of 2500K within 3 hours, and the growth time is 70 hours; after the single crystal growth is completed, open the furnace body, take out the graphite crucible, and obtain silicon carbide single crystal 1, silicon carbide single crystal 2, silicon carbide single crystal 3, silicon carbide single crystal 1D, silicon carbide single crystal 2D, and silicon carbide single crystal 3D, respectively.

[0263] The above silicon carbide single crystal 1, silicon carbide single crystal 2, silicon carbide single crystal 3, silicon carbide single crystal 1D, silicon carbide single crystal 2D, and comparison silicon carbide single crystal 3D are subjected to the same cutting, grinding, mechanical polishing, and chemical polishing to obtain silicon carbide substrate 1, silicon carbide substrate 2, silicon carbide substrate 3, silicon carbide substrate 1D, silicon carbide substrate 2D, and silicon carbide substrate 3D. The stress test can be performed using the method disclosed in the embodiment of the present application, and the results are shown in Tables 2 and 3.

[0264] Table 2

[0265]

[0266] Table 3

[0267]

[0268] Surface tests were performed on the silicon carbide substrate 1, the silicon carbide substrate 2, and the silicon carbide substrate 3. The local thickness deviations of the silicon carbide substrate 1, the silicon carbide substrate 2, and the silicon carbide substrate 3 in the first stress interval were within the range of 0.1 μm-0.3 μm, the local thickness deviations in the second stress interval were within the range of 0.3 μm-0.7 μm, and the local thickness deviations in the third stress interval were within the range of 0.7 μm-2 μm.

[0269] The stresses in Table 2 and Table 3 are all relative stresses. In this application, the positive and negative values ​​in stress represent whether the substrate is subjected to tensile stress or compressive stress. In the prior art, when describing and evaluating the stress state of a substrate, the maximum value minus the minimum value of the above stress is often used to reflect the stress state of the substrate. For example, the relative axial stress of the first stress interval of the silicon carbide substrate 1 is -13.3-15.7, which can also be described as the stress difference of the silicon carbide substrate 1 is 29MPa (15.7-(-13.3)).

[0270] It can be seen from the data in Table 2 and Table 3 that compared with the comparative examples (D1-D3), the silicon carbide substrates (1-3) disclosed in the embodiments of the present application have a smaller stress difference.

[0271] The above are only embodiments of the present application. The protection scope of the present application is not limited by these specific embodiments, but is determined by the claims of the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the technical ideas and principles of the present application should be included in the protection scope of the present application.

Claims

1. A silicon carbide substrate, characterized in that: include: a first surface, and a second surface disposed opposite to the first surface; The stress difference of the silicon carbide substrate is less than or equal to 35 MPa, and the stress difference is the difference between the stresses of two test points distributed between the first surface and the second surface; And the absolute value of the stress of the silicon carbide substrate is less than or equal to 30 MPa, and the absolute value of the stress of the silicon carbide substrate is the absolute value of the stress at the test point.

2. The silicon carbide substrate according to claim 1, characterized in that At least eight points distributed between the first surface and the second surface meet a preset condition, wherein the preset condition includes: a distance between two test points is greater than or equal to 0.5 mm.

3. The silicon carbide substrate according to claim 1 or 2, characterized in that At least eight points distributed between the first surface and the second surface meet a preset condition, wherein the preset condition includes: the test points are arranged at equal intervals in a direction parallel to a central axis of the silicon carbide substrate.

4. The silicon carbide substrate according to any one of claims 1 to 3, characterized in that: At least eight points distributed between the first surface and the second surface meet a preset condition, wherein the preset condition includes: the test points are arranged at equal intervals in a direction perpendicular to a central axis of the silicon carbide substrate.

5. The silicon carbide substrate according to any one of claims 2 to 4, characterized in that: At least 40 of the test points meet the preset condition.

6. The silicon carbide substrate according to any one of claims 1 to 5, characterized in that: The test points are distributed in the silicon carbide substrate extending from the first surface to the second surface by 1 μm to 250 μm.

7. The silicon carbide substrate according to any one of claims 1 to 6, characterized in that: The test points include: Axial test points, the axial test points include the test points distributed on a vertical line perpendicular to the first surface; the stress difference between two axial test points is less than or equal to 35Mpa.

8. The silicon carbide substrate according to claim 1-7, characterized in that: The test points also include: Radial test points, the radial test points include the test points distributed on a plane parallel to the first plane, and the stress difference between two radial test points is less than or equal to 27Mpa.

9. The silicon carbide substrate according to claim 8, characterized in that The silicon carbide substrate comprises: In the first stress interval, the stress difference between the two radial test points distributed in the first stress interval is less than or equal to 20 MPa.

10. The silicon carbide substrate according to claim 9, characterized in that Also includes: The second stress interval; The second stress interval is arranged in a direction in which the first stress interval extends from the side wall of the silicon carbide substrate toward the central axis of the silicon carbide substrate; The stress difference between at least two of the radial test points distributed in the second stress interval is greater than 20 MPa.

11. The silicon carbide substrate according to claim 9 or 10, characterized in that: Also includes: The third stress interval; The third stress interval is arranged in a direction in which the first stress interval extends from the central axis of the silicon carbide substrate to the side wall of the silicon carbide substrate; The stress difference between at least two of the radial test points distributed in the third stress interval is greater than 20 MPa.

12. The silicon carbide substrate according to claim 11, characterized in that The third stress interval is annular, and the ratio of the extension distance of the third stress interval to the third distance is less than 10%; the extension distance of the third stress interval is the distance from the inner diameter of the third stress interval to the outer diameter of the third stress interval, and the third distance is the distance from the central axis of the silicon carbide substrate to the side wall of the silicon carbide substrate.

13. The silicon carbide substrate according to claim 11 or 12, characterized in that: The stress difference between the two radial test points distributed in the third stress interval is less than or equal to 27 MPa.

14. The silicon carbide substrate according to claims 10 to 13, characterized in that: The stress difference between the two radial test points distributed in the second stress interval is less than or equal to 20 MPa.

15. The silicon carbide substrate according to any one of claims 9 to 14, characterized in that: The stress difference between the two radial test points distributed in the first stress interval is less than or equal to 10 MPa.

16. The silicon carbide substrate according to any one of claims 11 to 15, characterized in that: The stress difference between the two axial test points distributed in the third stress interval is less than or equal to 35 MPa.

17. The silicon carbide substrate according to claims 10 to 16, characterized in that: The stress difference between the two axial test points distributed in the second stress interval is less than or equal to 30 MPa.

18. The silicon carbide substrate according to any one of claims 9 to 17, characterized in that: The stress difference between two axial test points distributed in the first stress interval is less than or equal to 26 MPa.

19. The silicon carbide substrate according to any one of claims 1 to 18, characterized in that: The crystal type of the silicon carbide substrate includes: one of 4H, 6H, 3C, and 15R.

20. The silicon carbide substrate according to any one of claims 1 to 19, characterized in that: The resistivity of the silicon carbide substrate is higher than 10 5 Ω·cm; Or the resistivity of the silicon carbide substrate is 0.01Ω·cm-10 5 Ω·cm.

21. A method for preparing a silicon carbide substrate, characterized in that: include: Passing raw materials into the opening of the crucible; The raw material is controlled to grow in an environment with target growth parameters to obtain the silicon carbide substrate according to any one of claims 1 to 20.

22. The preparation method according to claim 21, characterized in that: The process of generating the target growth parameters includes: Testing sample stress, wherein the sample stress is the stress of a test point of a sample silicon carbide substrate; The growth parameters of the sample silicon carbide substrate are adjusted based on the sample stress to obtain the target growth parameters.

23. A semiconductor device, characterized in that: include: An element and a silicon carbide substrate according to any one of claims 1 to 20; The components are integrated on the silicon carbide substrate.

24. An electronic device, characterized in that: include: A housing and a semiconductor device as claimed in claim 23, wherein the semiconductor device is arranged in a cavity of the housing.

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