Power supply fault chain protection system for neutral beam injection accelerator
By using the main controller and optical signals to transmit fault information in the accelerator, the problem of delay in power supply fault information transmission is solved, and the rapid response and safety protection of the accelerator power supply is achieved, reducing the risk of accidents.
Patent Information
- Application Number
- CN202411357139.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-27
- Publication Date
- 2024-12-17
AI Technical Summary
When multiple single-unit power supply failures in existing accelerators fail at the same time, the delay in information transmission will lead to the inability to generate a chain protection effect in time, affecting the safety of the equipment.
The signal transmitter connected to the main controller transmits fault information through optical signals, forms a fault information transmission channel, and directly controls multiple single power failure signals to realize fault signal latch and reset functions, improve response speed and system reliability.
It greatly improves the reliability of the power supply in the neutral beam injection accelerator, shortens the fault response time, reduces the incidence of accidents, and isolates electromagnetic interference in a strong magnetic field environment, ensuring the safety of equipment and personnel.
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Figure CN119154231A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of accelerators, and specifically relates to a power failure interlocking protection system for a neutral beam injection accelerator, which is used for interlocking protection of a high-power neutral beam injector running with a long pulse, and can be widely used in interlocking protection of related test systems. Background Art
[0002] As a protection method in the field of accelerator technology, the core responsibility of the power supply interlocking protection in the accelerator is to quickly implement effective intervention when the accelerator power supply encounters a sudden failure to avoid major safety accidents in the accelerator equipment. The application of the interlocking system on the accelerator power supply helps to protect scientific research equipment and prevent further deterioration of accidents. In addition, the faster the reaction speed of the interlocking protection system, the more significant the safety protection effect provided in emergencies.
[0003] At present, most accelerator power supplies, both domestically and internationally, use interlocking protection systems, but due to differences in objectives and equipment, there are still significant differences between these systems. In my country, with the development of large-scale advanced reactor technology, more and more nuclear power units will be installed and put into commercial operation. How to select a suitable interlocking protection system according to the actual needs of the project has become an urgent problem to be solved. Therefore, how to perform interlocking protection on the power supply in the neutral beam injection accelerator is a problem to be solved. Summary of the invention
[0004] The purpose of the present invention is to solve the problem of interlocking protection of power failure in a neutral beam injection accelerator in the prior art, and to provide an interlocking protection system for power failure in a neutral beam injection accelerator.
[0005] In order to achieve the above objectives, this application adopts the following technical solutions: A power failure interlocking protection system for a neutral beam injection accelerator comprises: a main controller and a signal transmitter connected to the main controller, wherein a fault signal receiving point of the signal transmitter is connected to a interlocking signal input circuit, an optical fiber sensor interface of the interlocking signal input circuit is connected to an external fault transmission optical fiber, a voltage conversion circuit is provided at a power interface of the interlocking signal input circuit, the voltage conversion circuit is connected to a power indicator light, and the voltage conversion circuit is connected to a 220V AC power supply; a reset signal output point of the signal transmitter is connected to a interlocking fault reset circuit; a fault signal sending point of the signal transmitter is connected to a interlocking signal output circuit, the interlocking signal output circuit is connected to an external fault alarm signal optical fiber, a fault signal latch circuit is connected between the interlocking signal input circuit and the interlocking signal output circuit, and a latch signal output point of the fault signal latch circuit is connected to the interlocking fault alarm circuit.
[0006] Compared with the prior art, the present invention has the following beneficial effects: In the power failure interlocking protection system in the accelerator, the interlocking protection system will interlock the protection of each sub-circuit to work together in series and parallel. When the power supply of a device in the neutral beam injection accelerator fails, the power supply will transmit the fault signal through an electrical signal and transmit the fault information to the controller corresponding to the power supply. The controller processes the fault information and sends it to the corresponding hardware circuit. Each single power supply corresponds to a controller and a hardware circuit. This means that when multiple single power supplies fail at the same time, the fault information is transmitted through communication and processed by several controllers, resulting in information transmission delay. Therefore, the interlocking protection effect cannot be generated in time between the power supplies, so that the equipment in the accelerator power supply system cannot be protected in time.
[0007] The power supply fault interlocking protection system of the present invention directly connects the fault information of the single power supply in series through the signal transmitter connected to the main controller to form a fault information transmission channel, and controls multiple single power supply fault signals through one main controller. This greatly improves the reliability of the power supply in the neutral beam injection accelerator, speeds up the power supply's response speed to faults, enables the power supply to obtain effective interlocking protection in a timely manner, and reduces the occurrence rate of accidents.
[0008] The power failure interlocking protection system of the present invention adopts optical signals to transmit fault signals for the special environment of strong magnetic field on site, isolates electromagnetic interference, and further improves the reliability of the accelerator power supply.
[0009] The power failure interlocking protection system of the present invention has the function of latching and resetting the fault signal. When a single power supply in the neutral beam injection accelerator power supply has a fault signal, due to the action of the interlocking protection system, other single power supplies cannot operate. After the fault signal is released, the main controller must issue a reset instruction so that all power supplies can operate normally after being reset, thereby ensuring the safety of the staff and the power supply to a certain extent.
[0010] The power supply fault interlocking protection system of the present invention adopts a modular design scheme, and can be arbitrarily configured and installed according to the number of single power supplies for fault interlocking, making installation, debugging and maintenance more convenient and quick. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Figure 1 1 is a schematic diagram of the power conversion circuit principle of an embodiment of the present invention.
[0012] Figure 2 It is a schematic diagram of the principle of the fault interlocking protection system of the implementation mode of the present invention.
[0013] Figure 3It is a schematic block diagram of a power failure interlocking protection system for a neutral beam injection accelerator according to an embodiment of the present invention.
[0014] The meanings of the accompanying drawings are as follows: 1. Main controller; 2. Interlocking fault alarm circuit; 3. Interlocking signal input circuit; 4. Interlocking signal output circuit; 5. Fault signal latch circuit; 6. Signal transmitter; 7. Interlocking fault reset circuit. DETAILED DESCRIPTION
[0015] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.
[0016] Figure 3 FIG. 1 is a schematic block diagram of a power failure interlocking protection system for a neutral beam injection accelerator according to the present invention. Figure 3 As shown, the power supply failure interlocking protection system for a neutral beam injection accelerator comprises a main controller 1 and a signal transmitter 6 connected to the main controller 1, wherein a fault signal receiving point of the signal transmitter 6 is connected to a interlocking signal input circuit 3, an optical fiber sensor interface of the interlocking signal input circuit 3 is connected to an external fault transmission optical fiber, a voltage conversion circuit is provided at a power supply interface of the interlocking signal input circuit 3, the voltage conversion circuit is connected to a power indicator light, and the voltage conversion circuit is connected to a 220V AC power supply; a reset signal output point of the signal transmitter 6 is connected to a interlocking fault reset circuit 7, and the interlocking fault reset circuit 7 is connected to a fault signal latch circuit 5; a fault signal sending point of the signal transmitter 6 is connected to a interlocking signal output circuit 4, and the interlocking signal output circuit 4 is connected to an external fault alarm signal optical fiber, a fault signal latch circuit 5 is connected between the interlocking signal input circuit 3 and the interlocking signal output circuit 4, and a latch signal output point of the fault signal latch circuit 5 is connected to an interlocking fault alarm circuit 2.
[0017] Among them, the interlocking signal input circuit 3 is used to receive fault signals from the outside, the interlocking signal output circuit 4 is used to prompt and send external fault alarm signals to other devices, and the fault signal latch circuit 5 is used to latch the faults that have occurred.
[0018] A voltage conversion circuit according to an embodiment is described below. Figure 1 Schematic diagram of the power conversion circuit of the embodiment of the present invention. Figure 1As shown, the voltage conversion circuit includes a series-connected fuse Fuse1 and a 220V AC power supply; an RS207 rectifier bridge, which is used to convert the 220V AC power into DC power; a first inductor L1, which is connected in series with the RS207 rectifier bridge, and is used to pass DC and block AC; a 5V DC voltage module, including a first electrolyte capacitor C1, a second electrolyte capacitor C2 and a first diode TVS1 connected in parallel, and a 7805 chip, wherein the first electrolyte capacitor C1, the second electrolyte capacitor C2 and the first diode TVS1 are connected in parallel and connected to the 7805 chip to output a stable 5V DC voltage; a second diode TVS2, a third electrolyte capacitor C3, a first filter capacitor C4, and a fourth electrolyte capacitor C5 are connected in parallel to the 5V power supply converted from the 220V AC power supply, wherein the cathode of the second diode TVS2, the anode of the third electrolyte capacitor C3 and the anode of the fourth electrolyte capacitor C5 are connected to the anode of the 5V DC power supply, and the anode of the second diode TVS2, the cathode of the third electrolyte capacitor C3 and the anode of the fourth electrolyte capacitor C5 are connected to the cathode of the 5V power supply.
[0019] Figure 2 FIG. 1 is a schematic diagram of the principle of the fault chain protection method according to the embodiment of the present invention. Figure 2 As shown, the interlocking signal input circuit 3 includes a receiving optical fiber head U1, a VCC terminal of the receiving optical fiber head U1 is connected to a first resistor R1, a second resistor R2 is connected to the positive electrode of a 5V power supply, and the other end of the second resistor R2 is connected to the DATA terminal of the receiving optical fiber head U1; a second filter capacitor C6 is also connected in series between the VCC terminal and the GND terminal of the receiving optical fiber head U1, and a third resistor R3 is also connected in series to the DATA terminal of the receiving optical fiber head U1, the third resistor R3 is connected to the base of the No. 1 NPN transistor Q1, the collector of the No. 1 NPN transistor Q1 is grounded, the emitter of the No. 1 NPN transistor Q1 is connected in series with a fourth resistor R4 and then connected to the positive electrode of the 5V power supply, a third filter capacitor C7 is connected in series between one end of the fourth resistor R4 connected to the 5V power supply and GND, the emitter of the No. 1 NPN transistor Q1 is also connected to the logic signal input 1B terminal of the logic chip U2, the 1Y terminal of the logic chip U2 is the interlocking signal fault logic judgment output point, and is connected to the fault signal receiving point of the signal transmitter 6.
[0020] The interlocking signal output circuit 4 includes a transmitting optical fiber head U3, an ANODE terminal of the transmitting optical fiber head U3, the ANODE terminal is connected to the fault signal sending point of the signal transmitter 6 and the anode of the first light-emitting diode D1 located inside the transmitting optical fiber head U3, the ANODE terminal of the transmitting optical fiber head U3 is connected to a ninth resistor R9, one end of the ninth resistor R9 is connected to a 5V power supply, and the other end is connected to a fourth filter capacitor C8, and the fourth filter capacitor C8 is connected to the cathode of the first light-emitting diode D1 in parallel with the ground.
[0021] The fault signal latch circuit 5 includes a fifth resistor R5 connected to the collector of the No. 1 NPN transistor Q1. The fifth resistor R5 is connected to the neutral line N port of the latch chip U4 and grounded. The VCC port of the latch chip U4 is connected to a 5V power supply. The latch output Q port of the latch chip U4 is connected to the chain fault alarm circuit 2.
[0022] The chain fault alarm circuit 2 includes a fault switch chip toggle switch S connected to the latch output Q port of the latch chip U4, the fault switch chip signal output port D is connected to the sixth resistor R6, the other end of the sixth resistor R6 is connected to the base of the second PNP transistor Q2, the emitter of the second PNP transistor Q2 is connected to a 5V power supply, the collector of the second PNP transistor Q2 is connected to the seventh resistor R7, the seventh resistor R7 is connected to the anode of the fault alarm diode D3, and the cathode of the fault alarm diode D3 is grounded.
[0023] The chain fault reset circuit 7 includes an eighth resistor R8 connected to the reset signal transmission point of the signal transmitter 6, the other end of the eighth resistor R8 is connected to the base of the third NPN transistor Q3, the collector of the third NPN transistor Q3 is connected to a 5V power supply, the emitter of the third NPN transistor Q3 is connected to the ground, and a relay K is connected in parallel at the emitter end, the emitter outputs a reset signal, controls the rotating reed L of the relay K body, rotates from the normally closed contact E of the relay K body to the normally open contact P of the relay K body, and accesses the reset information of the signal transmitter 6.
[0024] Figure 2 Port description: The fault signal receiving point DATA receives a low-level signal for a fault state, and receives a high-level signal for a normal state; the reset signal transmission point RST outputs a high-level reset; the fault signal latch circuit 5 receives a low-level latched fault signal state, and a reset signal is required to release the latched fault signal state, and receives a high level for a normal state.
[0025] When the system enters the working state after initialization, the interlocking protection needs to be initialized, that is, the main controller 1 sends a reset signal to the connected signal transmitter 6, so that the reset signal output point RST outputs a high level (time is 1s) reset signal, and the interlocking fault reset circuit 7 is connected to the reset signal transmission point of the signal transmitter 6. After receiving the reset signal, the reset signal is output through the No. 3 NPN transistor Q3, and the rotating reed L of the relay K body is rotated from the normally closed contact E of the relay K body to the normally open contact P of the relay K body. At this time, the 5V power supply is connected to the fault signal latch circuit 5 through the normally open contact P of the relay K and the rotating reed L, and is connected to the fault signal latch circuit 5. The fault signal latch circuit 5 receives a high level as a normal state. The optical fiber sensor receiving optical fiber head U1 of the interlocking signal input circuit 3 begins to receive the external power supply optical signal, and transmits the light through the optical fiber head U1; at the same time, the base of the No. 1 NPN transistor Q1 receives the optical signal sent by the optical fiber head U1. When the receiving optical fiber head U1 receives the optical signal, the DATA pin outputs a high level, turning on the No. 1 transistor Q1, and 5V (high level) is sent to the logic signal input 1B terminal of the logic chip U2 through the No. 1 transistor Q1. The interlocking signal fault logic of the logic chip U4 judges that there is no fault, so the fault logic judgment output point 1Y terminal of the logic chip U4 outputs a high level, and the signal is transmitted to the interlocking signal output circuit 4, so that the sending optical fiber head U3 continues to emit light. At this time, the reset signal disappears, and the relay K returns to the initial state (the normally open contact P and the rotating reed L are disconnected, and the normally closed contact E and the rotating reed L are connected). In this way, the entire fault-free information system is established, and the system initialization work is completed.
[0026] When a single power supply device fails, the optical fiber sensor in the interlocking signal input circuit 3 processes the received fault information, and the DATA pin outputs a low level of 0V. At this time, the base of the No. 1 NPN transistor Q1 receives the DATA pin signal. Due to the lack of driving current, it is not turned on. The logic signal input 1B end of the logic chip U2 cannot receive the output signal of the No. 1 NPN transistor Q1. The logic chip U2 interlocking signal fault logic judges it as a fault, so the fault logic judgment output point 1Y end of the logic chip U2 outputs a low level, and the signal is transmitted to the interlocking signal output circuit 4, so that the sending optical fiber head U3 does not emit light, and the power supply fault status information is displayed. The fault status information is transmitted to the receiving circuit of the fault interlocking system of other single power supplies through the external fault transmission optical fiber.
[0027] When this single power supply receives fault information from other single power supplies, since the optical fiber sensor receiving optical fiber head does not receive the optical signal, the interlocking signal input circuit 3 of this power supply is in the state of receiving fault information. Therefore, the optical fiber sensor sending optical fiber head of this single power supply does not emit light, and the received fault information is transmitted to the next single power supply through the external fault transmission optical fiber.
[0028] Fault signal latching principle: When the power supply in the neutral beam injection accelerator fails, the receiving fiber head U3 cannot receive the optical signal, and its DATA pin outputs a low level. The No. 1 NPN transistor Q1 cannot be turned on, so that the latch chip U4 in the fault signal latch circuit 5 cannot receive the high-level 5V signal. The fault is therefore held by the latch chip U4. The latch signal output point of the fault signal latch circuit 5 is connected to the interlocking fault alarm circuit 2, and the fault alarm state is sent to the main controller 1 through the signal transmitter 6. When there is a reset message, the normally open contact P and the rotating reed L are connected due to the pull-in of the relay K, and the latch chip U4 receives the high-level 5V signal again, so that the system fault interlocking information can be eliminated.
[0029] Figure 3 The figure shows a schematic diagram of the application of the power supply fault interlocking protection system in the neutral beam injection accelerator of the present invention. When the equipment of the 1# single power supply fails, the interlocking protection of the power supply processes the fault information and sends the fault information to the interlocking signal output circuit 4 through its fault signal sending point. The interlocking signal output circuit 4 converts the fault information into an optical signal and transmits it to the interlocking signal input circuit 3 of the 2# single power supply. The interlocking signal input circuit 3 converts the received optical information into electrical information and transmits it to the latch chip U4 for processing. At the same time, the signal is passed through the fault signal latch circuit 5. If a fault occurs, the fault state is latched and processed, and the fault alarm state is sent to the main controller 1 through the signal transmitter 6. At the same time, the latch chip U4 transmits the processed electrical information to the interlocking signal output circuit 4, and the interlocking signal output circuit 4 transmits the information to the next power supply. In this way, even if the interlocking signal output circuit 4 of the 2# power supply does not send out the fault information, the fault information still continues to be transmitted through the main controller 1, directly skipping the 2# power supply until all power supplies receive the fault information. After the fault is eliminated, the host computer enables the main controller 1 to send a reset signal to each power supply through the signal transmitter 6, so that the entire fault chain protection system is restored to the initialization state.
Claims
1. A power failure interlocking protection system for a neutral beam injection accelerator, characterized in that: include: A main controller (1) and a signal transmitter (6) connected to the main controller (1), wherein a fault signal receiving point of the signal transmitter (6) is connected to an interlocking signal input circuit (3), an optical fiber sensor interface of the interlocking signal input circuit (3) is connected to an external fault transmission optical fiber, a voltage conversion circuit is provided at a power interface of the interlocking signal input circuit (3), the voltage conversion circuit is connected to a power indicator light, and the voltage conversion circuit is connected to a 220V AC power supply; a reset signal output point of the signal transmitter (6) is connected to an interlocking fault reset circuit (7), and the interlocking fault reset circuit (7) is connected to a fault signal latch circuit (5); a fault signal sending point of the signal transmitter (6) is connected to an interlocking signal output circuit (4), and the interlocking signal output circuit (4) is connected to an external fault alarm signal optical fiber, a fault signal latch circuit (5) is connected between the interlocking signal input circuit (3) and the interlocking signal output circuit (4), and a latch signal output point of the fault signal latch circuit (5) is connected to the interlocking fault alarm circuit (2).
2. A power failure interlocking protection system for a neutral beam injection accelerator according to claim 1, characterized in that: The voltage conversion circuit includes a fuse (Fuse1) and a 220V AC power supply connected in series; an RS207 rectifier bridge, used to convert the 220V AC power into DC power; a first inductor (L1), connected in series with the RS207 rectifier bridge, used to pass DC and block AC; a 5V DC voltage module, including a first electrolyte capacitor (C1), a second electrolyte capacitor (C2) and a first diode (TVS1) connected in parallel, and a 7805 chip, wherein the first electrolyte capacitor (C1), the second electrolyte capacitor (C2) and the first diode (TVS1) are connected in parallel with the 7 805 chip is connected to output a stable 5V DC voltage; the second diode (TVS2), the third electrolytic capacitor (C3), the first filter capacitor (C4), and the fourth electrolytic capacitor (C5) are connected in parallel to the 5V power supply converted from the 220V AC power, wherein the cathode of the second diode (TVS2), the anode of the third electrolytic capacitor (C3) and the fourth electrolytic capacitor (C5) are connected to the anode of the 5V DC power supply, and the anode of the second diode (TVS2), the cathode of the third electrolytic capacitor (C3) and the fourth electrolytic capacitor (C5) are connected to the cathode of the 5V power supply.
3. A power failure interlocking protection system for a neutral beam injection accelerator according to claim 2, characterized in that: The interlocking signal input circuit (3) comprises a receiving optical fiber head (U1), a VCC terminal of the receiving optical fiber head (U1) is connected to a first resistor (R1), a second resistor (R2) is connected to the positive electrode of a 5V power supply, and the other end of the second resistor (R2) is connected to a DATA terminal of the receiving optical fiber head (U1); a second filter capacitor (C6) is connected in series between the VCC terminal and the DGND terminal of the receiving optical fiber head (U1), and a third resistor (R3) is connected in series to the DATA terminal of the receiving optical fiber head (U1), and the third resistor (R3) is connected to a No. NP The base of the first NPN transistor (Q1) is connected, the collector of the first NPN transistor (Q1) is grounded, the emitter of the first NPN transistor (Q1) is connected in series with a fourth resistor (R4) and then connected to the positive electrode of a 5V power supply, a third filter capacitor (C7) is connected in series between one end of the fourth resistor (R4) connected to the 5V power supply and DGND, the emitter of the first NPN transistor (Q1) is also connected to the logic signal input end of the logic chip (U2), and the interlocking signal fault logic judgment output point of the logic chip (U2) is connected to the fault signal receiving point of the signal transmitter (6).
4. A power failure interlocking protection system for a neutral beam injection accelerator according to claim 3, characterized in that: The interlocking signal output circuit (4) comprises a transmitting optical fiber head (U3), an ANODE terminal of the transmitting optical fiber head (U3), the ANODE terminal being connected to a fault signal sending point of a signal transmitter (6) and an anode of a first light-emitting diode (D1) located inside the transmitting optical fiber head (U3), the ANODE terminal of the transmitting optical fiber head (U3) being connected to a ninth resistor (R9), one end of the ninth resistor (R9) being connected to a 5V power supply, and the other end being connected to a fourth filter capacitor (C8), the fourth filter capacitor (C8) being connected in parallel to a cathode of the first light-emitting diode (D1) and being grounded.
5. A power failure interlocking protection system for a neutral beam injection accelerator according to claim 4, characterized in that: The fault signal latch circuit (5) comprises a fifth resistor (R5) connected to the collector of a No. 1 NPN transistor (Q1), the fifth resistor (R5) being connected to a neutral line N port of a latch chip (U4) and being grounded, a power input VCC port of the latch chip (U4) being connected to a 5V power supply, and a latch output Q port of the latch chip (U4) being connected to a chain fault alarm circuit (2).
6. A power failure interlocking protection system for a neutral beam injection accelerator according to claim 5, characterized in that: The interlocking fault alarm circuit (2) comprises a fault switch chip toggle switch S connected to the latch output port of the latch chip (U4), the fault switch chip signal output port is connected to a sixth resistor (R6), the other end of the sixth resistor (R6) is connected to the base of the second PNP transistor (Q2), the collector of the second PNP transistor (Q2) is connected to a 5V power supply, the emitter of the second PNP transistor (Q2) is connected to a seventh resistor (R7), the seventh resistor (R7) is connected to the anode of the fault alarm diode (D3), and the cathode of the fault alarm diode (D3) is grounded.
7. A power failure interlocking protection system for a neutral beam injection accelerator according to claim 6, characterized in that: The interlocking fault reset circuit (7) comprises an eighth resistor (R8) connected to the reset signal transmission point of the signal transmitter (6), the other end of the eighth resistor (R8) is connected to the base of the third NPN transistor (Q3), the collector of the third NPN transistor (Q3) is connected to a 5V power supply, the emitter of the third NPN transistor (Q3) is connected to the ground, and a relay (K) is connected in parallel at the emitter end, the emitter outputs a reset signal, controls the rotating reed of the relay (K) body, rotates from the normally closed contact of the relay (K) body to the normally open contact of the relay (K) body, and receives the reset information of the signal transmitter (6).
8. The power failure interlocking protection system for a neutral beam injection accelerator according to claim 1, characterized in that: The signal transmitter (6) is communicatively connected to the main controller (1).
Citation Information
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