Tunable device

Abstract

The invention provides a tunable device. The tunable device includes a plurality of tunable units. Each of the plurality of tunable units includes a driver circuit and a frequency tunable circuit. The frequency tunable circuit includes a tunable component. The control terminal of the tunable component is coupled to the drive circuit, and the drive circuit is signal isolated from the frequency tunable circuit in terms of tuning frequency of the frequency tunable circuit.

Description

Technical Field

[0001] The present disclosure relates to a device; in particular, the present disclosure relates to a tunable device. Background Art

[0002] For conventional tunable devices operating at a resonant frequency, multiple circuits within the tunable device are coupled to the same common voltage, which may cause signal interference, thereby degrading the performance of the tunable device. Summary of the invention

[0003] The tunable device of the present disclosure includes a plurality of tunable units. Each of the plurality of tunable units includes a driving circuit and a frequency tunable circuit. The frequency tunable circuit includes a tunable component. The control end of the tunable component is coupled to the driving circuit, and the driving circuit and the frequency tunable circuit are isolated at the tuning frequency of the frequency tunable circuit.

[0004] Based on the above content, according to the tunable device of the present disclosure, the driving circuit can effectively drive the frequency tunable circuit.

[0005] In order to make the foregoing content easier to understand, several embodiments attached with the drawings will be described in detail below. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the disclosure and together with the description serve to explain the principles of the disclosure.

[0007] Figure 1 is a circuit diagram of a tunable device according to an embodiment of the present disclosure;

[0008] Figure 2 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure;

[0009] Figure 3 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure;

[0010] Figure 4 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure;

[0011] Figure 5 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure;

[0012] Figure 6 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure;

[0013] Figure 7 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure;

[0014] Figure 8 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure;

[0015] Fig. 9 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure.

[0016] Description of Figure Numbers:

[0017] 100: tunable device;

[0018] 110_1~110_N, 210, 310, 410, 510, 610, 710, 810, 910: tunable units;

[0019] 111, 211, 311, 411, 511, 611, 711, 811, 911: driving circuit;

[0020] 112, 212, 312, 412, 512, 612, 712, 812, 912: frequency tunable circuits;

[0021] 113, 213, 313, 413, 513, 613, 713, 813, 913: tunable components;

[0022] 214, 414, 614, 814: Isolators;

[0023] 615, 715: Operational amplifier;

[0024] Cst: capacitor;

[0025] DL: data line;

[0026] DS: data signal;

[0027] P1: circuit node;

[0028] R1: resistor;

[0029] SS: scanning signal;

[0030] Td: driving transistor;

[0031] Ts: scanning transistor;

[0032] Vcom: common voltage;

[0033] Vdata: data voltage;

[0034] Vdc: constant DC voltage;

[0035] VDD: first operating voltage;

[0036] VSS: second operating voltage. DETAILED DESCRIPTION

[0037] Reference will now be made in detail to exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals are used in the drawings and the description to refer to the same or like components.

[0038] Certain terms are used throughout the specification and appended claims of this disclosure to refer to specific components. It should be understood by those skilled in the art that electronic device manufacturers may refer to the same component by different names. It is not intended herein to distinguish between components that have the same function but different names. In the following description and claims, words such as "comprise" and "include" are open-ended terms and should be interpreted as "including but not limited to...".

[0039] The term "coupling (coupling) (or connection (connection))" used throughout the entire specification of this application (including the attached claims) may refer to any direct or indirect connection method. For example, if the text states that a first device is coupled (or connected) to a second device, it should be interpreted that the first device can be directly connected to the second device, or the first device can be indirectly connected to the second device through other devices or certain connection methods to be connected. The terms "first (first)", "second (second)" and similar terms mentioned throughout the entire specification of this application (including the attached claims) are only used to name discrete elements or to distinguish different embodiments or scopes. Therefore, the terms should not be regarded as limiting the upper or lower limits of the number of elements and should not be used to limit the order of arrangement of elements. In addition, as much as possible, the elements / components / steps using the same reference numbers in the drawings and embodiments represent the same or similar parts. In different embodiments, the same reference numbers or the same terms can be used to refer to the relevant descriptions of the elements / components / steps.

[0040] Figure 1 is a circuit diagram of a tunable device according to an embodiment of the present disclosure. Figure 1 , the tunable device 100 includes a plurality of tunable units 110_1 to 110_N, and the tunable units 110_1 to 110_N may be as follows Figure 1 The tunable units 110_1 to 110_N are arranged in an array as shown in , where N is a positive integer. Each of the tunable units 110_1 to 110_N includes a driving circuit 111 and a frequency tunable circuit 112. The frequency tunable circuit 112 includes a tunable element 113, and the driving circuit 111 is coupled to a control terminal of the tunable element 113.

[0041] In an embodiment of the present disclosure, the frequency tunable circuit 112 may be a resonator. The resonant frequency of each frequency tunable circuit may be tuned by a control signal of each corresponding tunable component, and each corresponding tunable component may be driven by a corresponding driving circuit. In one embodiment of the present disclosure, the frequency tunable circuit 112 may be a filter. In an embodiment of the present disclosure, the tunable component 113 may be a voltage-controlled component (e.g., a varactor), but the present disclosure is not limited thereto. In one embodiment of the present disclosure, the tunable component 113 may be a current-controlled component, a tunable capacitor component, a tunable inductor component, or a tunable resistor component. In another embodiment of the present disclosure, the tunable device 100 may be a beam-steerable directional antenna device, and the frequency tunable circuit 112 may be an antenna unit.

[0042] Figure 2 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure. Figure 2 , Figure 1 The circuit architecture of each of the tunable units 110_1 to 110_N shown may be implemented as Figure 2 The tunable unit 210 is shown. In an embodiment of the present disclosure, the tunable unit 210 includes a driving circuit 211 and a frequency tunable circuit 212. The driving circuit 211 is coupled to the data line DL to receive the data signal DS. The driving circuit 211 is further coupled to the frequency tunable circuit 212. The frequency tunable circuit 212 includes a tunable component 213. The driving circuit 211 includes a scanning transistor Ts, a capacitor Cst and an isolator 214.

[0043] In an embodiment of the present disclosure, a first end of a scan transistor Ts is coupled to a data line DL. A second end of the scan transistor Ts is coupled to a first end of a capacitor Cst and a control end of a tunable component 213 through a circuit node P1. The control end of the scan transistor Ts is coupled to a scan line to receive a scan signal SS. The scan transistor Ts may be an n-type transistor (e.g., an n-type metal-oxide-semiconductor (MOS) transistor). The first end of the scan transistor Ts may be a drain end, the second end of the scan transistor Ts may be a source end, and the control end of the scan transistor Ts may be a gate end. In one embodiment of the present disclosure, the scan transistor Ts may be a p-type transistor (e.g., a p-type MOS transistor). In an embodiment of the present disclosure, a second end of the capacitor Cst is coupled to a terminal of a tunable component 213 of a frequency tunable circuit 212 and a common voltage Vcom through an isolator 214. A terminal of the tunable component 213 is coupled to the common voltage Vcom. In an embodiment of the present disclosure, the isolator 214 may be a resistor, but the present disclosure is not limited thereto. In an embodiment of the present disclosure, the isolator 214 may be an inductor.

[0044] In an embodiment of the present disclosure, in response to the scanning transistor Ts being turned on by the scanning signal SS, the scanning transistor Ts transmits the data voltage Vdata to the capacitor Cst according to the data signal DS. The first end of the capacitor Cst is used to maintain the data voltage Vdata so that the circuit node P1 can be maintained at the data voltage Vdata. In an embodiment of the present disclosure, the capacitor Cst is used to store the data voltage Vdata and output a control signal (i.e., a control voltage) corresponding to the data voltage Vdata to the control end of the tunable component 213, so that the tuning frequency (e.g., the tuned resonant frequency) of the frequency tunable circuit 212 can be tuned by the control signal. The frequency tunable circuit 212 can operate at the tuning frequency.

[0045] It should be noted that in the embodiment of sharing the common voltage Vcom, since the capacitor Cst of the driving circuit 211 is coupled to the frequency tunable circuit 212 through the isolator 214, the capacitor Cst does not form an additional signal path at the tuning frequency. Therefore, the driving circuit 211 can be effectively isolated from the frequency tunable circuit 212 at the tuning frequency. In the embodiment of the present disclosure, the resistor or inductor is used as a (signal) isolator at the tuning frequency.

[0046] Figure 3 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure. Figure 3 , Figure 1 The circuit architecture of each of the tunable units 110_1 to 110_N shown may be implemented as Figure 3The tunable unit 310 is shown. In an embodiment of the present disclosure, the tunable unit 310 includes a driving circuit 311 and a frequency tunable circuit 312. The driving circuit 311 is coupled to the data line DL to receive the data signal DS. The driving circuit 311 is further coupled to the frequency tunable circuit 312. The frequency tunable circuit 312 includes a tunable component 313. The driving circuit 311 includes a scanning transistor Ts and a capacitor Cst.

[0047] In an embodiment of the present disclosure, a first end of the scan transistor Ts is coupled to the data line DL. A second end of the scan transistor Ts is coupled to a first end of a capacitor Cst and a control end of a tunable component 313 through a circuit node P1. In an embodiment of the present disclosure, a second end of the capacitor Cst is coupled to an isolated constant direct current (DC) voltage Vdc. A terminal of the tunable component 313 is coupled to a common voltage Vcom.

[0048] In an embodiment of the present disclosure, in response to the scanning transistor Ts being turned on by the scanning signal SS, the scanning transistor Ts transmits the data voltage Vdata to the capacitor Cst according to the data signal DS. The first end of the capacitor Cst is used to maintain the data voltage Vdata so that the circuit node P1 can be maintained at the data voltage Vdata. In an embodiment of the present disclosure, the capacitor Cst is used to store the data voltage Vdata and output a control signal (i.e., a control voltage) corresponding to the data voltage Vdata to the control end of the tunable component 313, so that the tuning frequency (e.g., the tuned resonant frequency) of the frequency tunable circuit 312 can be tuned by the control signal. The frequency tunable circuit 312 can operate at the tuning frequency.

[0049] It should be noted that since the second end of the capacitor Cst of the driving circuit 311 is coupled to the isolated constant DC voltage Vdc instead of being coupled to the common voltage Vcom, and the isolated constant DC voltage Vdc is isolated from the frequency tunable circuit 312 at the tuning frequency, the driving circuit 311 can be effectively isolated from the frequency tunable circuit 312 at the tuning frequency.

[0050] Figure 4 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure. Figure 4 , Figure 1 The circuit architecture of each of the tunable units 110_1 to 110_N shown may be implemented as Figure 4The tunable unit 410 is shown. In an embodiment of the present disclosure, the tunable unit 410 includes a driving circuit 411 and a frequency tunable circuit 412. The driving circuit 411 is coupled to the data line DL to receive the data signal DS. The driving circuit 411 is further coupled to the frequency tunable circuit 412. The frequency tunable circuit 412 includes a tunable component 413. The driving circuit 411 includes a scanning transistor Ts, a capacitor Cst, an isolator 414, a driving transistor Td and a resistor R1.

[0051] In an embodiment of the present disclosure, a first end of a scanning transistor Ts is coupled to a data line DL. A second end of the scanning transistor Ts is coupled to a first end of a capacitor Cst and a control end of a driving transistor Td through a circuit node P1. The control end of the scanning transistor Ts is coupled to a scanning line to receive a scanning signal SS. A first end of the driving transistor Td is coupled to a first operating voltage VDD. A second end of the driving transistor Td is coupled to a control end of a tunable component 413 and a first end of a resistor R1. A second end of the resistor R1 is coupled to a second operating voltage VSS. The scanning transistor Ts and the driving transistor Td may be n-type transistors (e.g., n-type MOS transistors). In one embodiment of the present disclosure, the scanning transistor Ts and the driving transistor Td may be p-type transistors (e.g., p-type MOS transistors).

[0052] In an embodiment of the present disclosure, the second end of the capacitor Cst is coupled to the end of the tunable component 413 of the frequency tunable circuit 412 and the common voltage Vcom through the isolator 414. The end of the tunable component 413 is coupled to the common voltage Vcom. In an embodiment of the present disclosure, the isolator 414 may be a resistor, but the present disclosure is not limited thereto. In one embodiment of the present disclosure, the isolator 414 may be an inductor.

[0053] In an embodiment of the present disclosure, in response to the scanning transistor Ts being turned on by the scanning signal SS, the scanning transistor Ts transmits the data voltage Vdata to the capacitor Cst according to the data signal DS. The first end of the capacitor Cst is used to maintain the data voltage Vdata, so that the circuit node P1 can be maintained at the data voltage Vdata. In an embodiment of the present disclosure, the capacitor Cst is used to store the data voltage Vdata and apply the data voltage Vdata to the control end of the driving transistor Td. The driving transistor Td can be operated as a source follower amplifier, and the second end of the driving transistor Td can output a control signal (i.e., a control voltage) corresponding to the data voltage Vdata to the control end of the tunable component 413, so that the tuning frequency (e.g., the tuned resonant frequency) of the frequency tunable circuit 412 can be tuned by the control signal. The frequency tunable circuit 412 can operate at the tuning frequency. In one embodiment of the present disclosure, the driving circuit 411 may also include other transistors and / or other circuit units to form a source follower amplifier, and is not limited to Figure 4 The driving transistor Td shown in FIG.

[0054] It should be noted that in the embodiment of sharing the common voltage Vcom, since the capacitor Cst of the driving circuit 411 is coupled to the frequency tunable circuit 412 through the isolator 414, the capacitor Cst does not form an additional signal path at the tuning frequency. Therefore, the driving circuit 411 can be effectively isolated from the frequency tunable circuit 412 at the tuning frequency. In the embodiment of the present disclosure, the resistor or inductor is used as an isolator at the tuning frequency.

[0055] Figure 5 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure. Figure 5 , Figure 1 The circuit architecture of each of the tunable units 110_1 to 110_N shown may be implemented as Figure 5 The tunable unit 510 is shown. In an embodiment of the present disclosure, the tunable unit 510 includes a driving circuit 511 and a frequency tunable circuit 512. The driving circuit 511 is coupled to the data line DL to receive the data signal DS. The driving circuit 511 is further coupled to the frequency tunable circuit 512. The frequency tunable circuit 512 includes a tunable component 513. The driving circuit 511 includes a scanning transistor Ts, a capacitor Cst, a driving transistor Td and a resistor R1.

[0056] In an embodiment of the present disclosure, a first end of a scanning transistor Ts is coupled to a data line DL. A second end of the scanning transistor Ts is coupled to a first end of a capacitor Cst and a control end of a driving transistor Td through a circuit node P1. The control end of the scanning transistor Ts is coupled to a scanning line to receive a scanning signal SS. A first end of the driving transistor Td is coupled to a first operating voltage VDD. A second end of the driving transistor Td is coupled to a control end of a tunable component 513 and a first end of a resistor R1. A second end of the resistor R1 is coupled to a second operating voltage VSS. In an embodiment of the present disclosure, a second end of the capacitor Cst is coupled to an isolated constant direct current (DC) voltage Vdc. An end of the tunable component 513 is coupled to a common voltage Vcom. In one embodiment of the present disclosure, the isolated constant DC voltage Vdc may be equal to the first operating voltage VDD or the second operating voltage VSS, but the present disclosure is not limited thereto.

[0057] In an embodiment of the present disclosure, in response to the scanning transistor Ts being turned on by the scanning signal SS, the scanning transistor Ts transmits the data voltage Vdata to the capacitor Cst according to the data signal DS. The first end of the capacitor Cst is used to maintain the data voltage Vdata, so that the circuit node P1 can be maintained at the data voltage Vdata. In an embodiment of the present disclosure, the capacitor Cst is used to store the data voltage Vdata and apply the data voltage Vdata to the control end of the driving transistor Td. The driving transistor Td can be operated as a source follower amplifier, and the second end of the driving transistor Td can output a control signal (i.e., a control voltage) corresponding to the data voltage Vdata to the control end of the tunable component 513, so that the tuning frequency (e.g., the tuned resonant frequency) of the frequency tunable circuit 512 can be tuned by the control signal. The frequency tunable circuit 512 can operate at the tuning frequency. In one embodiment of the present disclosure, the driving circuit 511 may also include other transistors and / or other circuit units to form a source follower amplifier, and is not limited to Figure 5 The driving transistor Td shown in FIG.

[0058] It should be noted that since the second end of the capacitor Cst of the driving circuit 511 is coupled to the isolated constant DC voltage Vdc instead of being coupled to the common voltage Vcom, and the isolated constant DC voltage Vdc is isolated from the frequency tunable circuit 512 at the tuning frequency, the driving circuit 511 can be effectively isolated from the frequency tunable circuit 512 at the tuning frequency.

[0059] Figure 6 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure. Figure 6 , Figure 1 The circuit architecture of each of the tunable units 110_1 to 110_N shown may be implemented as Figure 6 The tunable unit 610 is shown. In an embodiment of the present disclosure, the tunable unit 610 includes a driving circuit 611 and a frequency tunable circuit 612. The driving circuit 611 is coupled to the data line DL to receive the data signal DS. The driving circuit 611 is further coupled to the frequency tunable circuit 612. The frequency tunable circuit 612 includes a tunable component 613. The driving circuit 611 includes a scanning transistor Ts, a capacitor Cst, an isolator 614 and an operational amplifier 615.

[0060] In an embodiment of the present disclosure, a first end of a scan transistor Ts is coupled to a data line DL. A second end of the scan transistor Ts is coupled to a first end of a capacitor Cst and a first input end (i.e., a non-inverting input end) of an operational amplifier 615 through a circuit node P1. A control end of the scan transistor Ts is coupled to a scan line to receive a scan signal SS. A second input end (i.e., an inverting input end) of the operational amplifier 615 is coupled to an output end of the operational amplifier 615. The operational amplifier 615 is also coupled between a first operating voltage VDD and a second operating voltage VSS to operate between the first operating voltage VDD and the second operating voltage VSS. The scan transistor Ts may be an n-type transistor (e.g., an n-type MOS transistor). In one embodiment of the present disclosure, the scan transistor Ts may be a p-type transistor (e.g., a p-type MOS transistor).

[0061] In an embodiment of the present disclosure, the second end of the capacitor Cst is coupled to the end of the tunable component 613 of the frequency tunable circuit 612 and the common voltage Vcom through the isolator 614. The end of the tunable component 613 is coupled to the common voltage Vcom. In an embodiment of the present disclosure, the isolator 614 may be a resistor, but the present disclosure is not limited thereto. In one embodiment of the present disclosure, the isolator 614 may be an inductor.

[0062] In an embodiment of the present disclosure, in response to the scanning transistor Ts being turned on by the scanning signal SS, the scanning transistor Ts transmits the data voltage Vdata to the capacitor Cst according to the data signal DS. The first end of the capacitor Cst is used to maintain the data voltage Vdata so that the circuit node P1 can be maintained at the data voltage Vdata. In an embodiment of the present disclosure, the capacitor Cst is used to store the data voltage Vdata and provide the data voltage Vdata to the first input end of the operational amplifier 615. The output end of the operational amplifier 615 can output a control signal (i.e., a control voltage) corresponding to the data voltage Vdata to the control end of the tunable component 613, so that the tuning frequency (e.g., the tuned resonant frequency) of the frequency tunable circuit 612 can be tuned by the control signal. The frequency tunable circuit 612 can operate at the tuning frequency.

[0063] It should be noted that in the embodiment of sharing the common voltage Vcom, since the capacitor Cst of the driving circuit 611 is coupled to the frequency tunable circuit 612 through the isolator 614, the capacitor Cst does not form an additional signal path at the tuning frequency. Therefore, the driving circuit 611 can be effectively isolated from the frequency tunable circuit 612 at the tuning frequency. In the embodiment of the present disclosure, the resistor or the inductor is used as an isolator at the tuning frequency.

[0064] Figure 7 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure. Figure 7 , Figure 1 The circuit architecture of each of the tunable units 110_1 to 110_N shown may be implemented as Figure 7 The tunable unit 710 is shown. In an embodiment of the present disclosure, the tunable unit 710 includes a driving circuit 711 and a frequency tunable circuit 712. The driving circuit 711 is coupled to the data line DL to receive the data signal DS. The driving circuit 711 is further coupled to the frequency tunable circuit 712. The frequency tunable circuit 712 includes a tunable component 713. The driving circuit 711 includes a scanning transistor Ts, a capacitor Cst and an operational amplifier 715.

[0065] In an embodiment of the present disclosure, a first end of the scan transistor Ts is coupled to a data line DL. A second end of the scan transistor Ts is coupled to a first end of a capacitor Cst and a first input end (i.e., a non-inverting input end) of an operational amplifier 715 through a circuit node P1. A control end of the scan transistor Ts is coupled to a scan line to receive a scan signal SS. A second input end (i.e., an inverting input end) of the operational amplifier 715 is coupled to an output end of the operational amplifier 715. The operational amplifier 715 is also coupled between a first operating voltage VDD and a second operating voltage VSS to operate between the first operating voltage VDD and the second operating voltage VSS. In an embodiment of the present disclosure, a second end of the capacitor Cst is coupled to an isolated constant direct current (DC) voltage Vdc. The end of the tunable component 713 is coupled to a common voltage Vcom. In one embodiment of the present disclosure, the isolated constant DC voltage Vdc may be equal to the first operating voltage VDD or the second operating voltage VSS, but the present disclosure is not limited thereto.

[0066] In an embodiment of the present disclosure, in response to the scanning transistor Ts being turned on by the scanning signal SS, the scanning transistor Ts transmits the data voltage Vdata to the capacitor Cst according to the data signal DS. The first end of the capacitor Cst is used to maintain the data voltage Vdata so that the circuit node P1 can be maintained at the data voltage Vdata. In an embodiment of the present disclosure, the capacitor Cst is used to store the data voltage Vdata and provide the data voltage Vdata to the first input end of the operational amplifier 715. The output end of the operational amplifier 715 can output a control signal (i.e., a control voltage) corresponding to the data voltage Vdata to the control end of the tunable component 713, so that the tuning frequency (e.g., the tuned resonant frequency) of the frequency tunable circuit 712 can be tuned by the control signal. The frequency tunable circuit 712 can operate at the tuning frequency.

[0067] It should be noted that since the second end of the capacitor Cst of the driving circuit 711 is coupled to the isolated constant DC voltage Vdc instead of being coupled to the common voltage Vcom, and the isolated constant DC voltage Vdc is isolated from the frequency tunable circuit 712 at the tuning frequency, the driving circuit 711 can be effectively isolated from the frequency tunable circuit 712 at the tuning frequency.

[0068] Figure 8 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure. Figure 8 , Figure 1 The circuit architecture of each of the tunable units 110_1 to 110_N shown may be implemented as Figure 8 The tunable unit 810 is shown. In an embodiment of the present disclosure, the tunable unit 810 includes a driving circuit 811 and a frequency tunable circuit 812. The driving circuit 811 is coupled to the data line DL to receive the data signal DS. The driving circuit 811 is further coupled to the frequency tunable circuit 812. The frequency tunable circuit 812 includes a tunable component 813. The driving circuit 811 includes a scanning transistor Ts, a capacitor Cst, an isolator 814 and a driving transistor Td.

[0069] In an embodiment of the present disclosure, a first end of a scanning transistor Ts is coupled to a data line DL. A second end of the scanning transistor Ts is coupled to a first end of a capacitor Cst and a control end of a driving transistor Td through a circuit node P1. The control end of the scanning transistor Ts is coupled to a scanning line to receive a scanning signal SS. A first end of the driving transistor Td is coupled to a control end of a tunable component 813. A second end of the driving transistor Td is coupled to a second operating voltage VSS. The scanning transistor Ts and the driving transistor Td may be n-type transistors (e.g., n-type MOS transistors). In one embodiment of the present disclosure, the scanning transistor Ts and the driving transistor Td may be p-type transistors (e.g., p-type MOS transistors).

[0070] In an embodiment of the present disclosure, the second end of the capacitor Cst is coupled to the end of the tunable component 813 of the frequency tunable circuit 812 and the common voltage Vcom through the isolator 814. The end of the tunable component 813 is coupled to the common voltage Vcom. In an embodiment of the present disclosure, the isolator 814 may be a resistor, but the present disclosure is not limited thereto. In one embodiment of the present disclosure, the isolator 814 may be an inductor.

[0071] In an embodiment of the present disclosure, in response to the scanning transistor Ts being turned on by the scanning signal SS, the scanning transistor Ts transmits the data voltage Vdata to the capacitor Cst according to the data signal DS. The first end of the capacitor Cst is used to maintain the data voltage Vdata, so that the circuit node P1 can be maintained at the data voltage Vdata. In an embodiment of the present disclosure, the capacitor Cst is used to store the data voltage Vdata and apply the data voltage Vdata to the control end of the driving transistor Td. The driving transistor Td can be configured as a current driver. The driving transistor Td can generate a control signal (i.e., a control current) corresponding to the data voltage Vdata, so that the control end of the tunable component 813 can receive the control signal from the first end of the driving transistor Td, so that the tuning frequency (e.g., the tuned resonant frequency) of the frequency tunable circuit 812 can be tuned by the control signal. The frequency tunable circuit 812 can operate at the tuning frequency. In one embodiment of the present disclosure, the driving circuit 811 may also include other transistors and / or other circuit units to form a current driver, and is not limited to Figure 8 The driving transistor Td shown in FIG.

[0072] It should be noted that in the embodiment of sharing the common voltage Vcom, since the capacitor Cst of the driving circuit 811 is coupled to the frequency tunable circuit 812 through the isolator 814, the capacitor Cst does not form an additional signal path at the tuning frequency. Therefore, the driving circuit 811 can be effectively isolated from the frequency tunable circuit 812 at the tuning frequency. In the embodiment of the present disclosure, the resistor or inductor is used as an isolator at the tuning frequency.

[0073] Fig. 9 is a circuit diagram of a tunable unit according to an embodiment of the present disclosure. Fig. 9 , Figure 1 The circuit architecture of each of the tunable units 110_1 to 110_N shown may be implemented as Fig. 9The tunable unit 910 is shown. In an embodiment of the present disclosure, the tunable unit 910 includes a driving circuit 911 and a frequency tunable circuit 912. The driving circuit 911 is coupled to the data line DL to receive the data signal DS. The driving circuit 911 is further coupled to the frequency tunable circuit 912. The frequency tunable circuit 912 includes a tunable component 913. The driving circuit 911 includes a scanning transistor Ts, a capacitor Cst and a driving transistor Td.

[0074] In an embodiment of the present disclosure, a first end of a scanning transistor Ts is coupled to a data line DL. A second end of the scanning transistor Ts is coupled to a first end of a capacitor Cst and a control end of a driving transistor Td through a circuit node P1. The control end of the scanning transistor Ts is coupled to a scanning line to receive a scanning signal SS. A first end of the driving transistor Td is coupled to a control end of a tunable component 913. A second end of the driving transistor Td is coupled to a second operating voltage VSS. In an embodiment of the present disclosure, a second end of the capacitor Cst is coupled to an isolated constant direct current (DC) voltage Vdc. An end of the tunable component 913 is coupled to a common voltage Vcom. In one embodiment of the present disclosure, the isolated constant DC voltage Vdc may be equal to the second operating voltage VSS, but the present disclosure is not limited thereto.

[0075] In an embodiment of the present disclosure, in response to the scanning transistor Ts being turned on by the scanning signal SS, the scanning transistor Ts transmits the data voltage Vdata to the capacitor Cst according to the data signal DS. The first end of the capacitor Cst is used to maintain the data voltage Vdata, so that the circuit node P1 can be maintained at the data voltage Vdata. In an embodiment of the present disclosure, the capacitor Cst is used to store the data voltage Vdata and apply the data voltage Vdata to the control end of the driving transistor Td. The driving transistor Td can be configured as a current driver. The driving transistor Td can generate a control signal (i.e., a control current) corresponding to the data voltage Vdata, so that the control end of the tunable component 913 can receive a control signal from the first end of the driving transistor Td, so that the tuning frequency (e.g., the tuned resonant frequency) of the frequency tunable circuit 912 can be tuned by the control signal. The frequency tunable circuit 912 can operate at the tuning frequency. In one embodiment of the present disclosure, the driving circuit 911 may also include other transistors and / or other circuit units to form a current driver, and is not limited to Fig. 9 The driving transistor Td shown in FIG.

[0076] It should be noted that since the second end of the capacitor Cst of the driving circuit 911 is coupled to the isolated constant DC voltage Vdc instead of being coupled to the common voltage Vcom, and the isolated constant DC voltage Vdc is isolated from the frequency tunable circuit 912 at the tuning frequency, the driving circuit 911 can be effectively isolated from the frequency tunable circuit 912 at the tuning frequency.

[0077] In summary, the tunable device of the present disclosure can have good resonance signal isolation between the driving circuit and the frequency tunable circuit at the tuning frequency, so that the driving circuit can effectively drive the frequency tunable circuit.

[0078] It is obvious to those skilled in the art that various modifications and variations can be made to the disclosed embodiments without departing from the scope or spirit of the present disclosure. In summary, the present disclosure is intended to cover modifications and variations within the scope of the above claims and their equivalents.

Claims

1. A tunable device, characterized in that: include: A plurality of tunable cells, wherein each of the plurality of tunable cells comprises: Driving circuit; as well as Frequency tunable circuit, including a tunable component, The control end of the tunable component is coupled to the driving circuit.

2. The tunable device according to claim 1, characterized in that: The driving circuit comprises: The capacitor is used to store the data voltage and output a control signal corresponding to the data voltage to the tunable component.

3. The tunable device according to claim 2, characterized in that: The first terminal of the capacitor is used to maintain the data voltage.

4. The tunable device according to claim 2, characterized in that: The drive circuit is isolated from the frequency tunable circuit at a tuning frequency.

5. The tunable device according to claim 4, characterized in that: The second terminal of the capacitor is coupled to an isolated constant DC voltage.

6. The tunable device according to claim 4, characterized in that: The second end of the capacitor is coupled to the frequency tunable circuit through an isolator.

7. The tunable device according to claim 6, characterized in that: The isolator is a resistor.

8. The tunable device according to claim 6, characterized in that: The isolator is an inductor.

9. The tunable device according to claim 2, characterized in that: The driving circuit further includes: The scan transistor is coupled to the capacitor and is used for transmitting the data voltage to the capacitor.

10. The tunable device according to claim 9, characterized in that: The scan transistor is also coupled to the data line and the scan line.

11. The tunable device according to claim 2, characterized in that: The drive circuit includes a source follower amplifier.

12. The tunable device according to claim 2, characterized in that: The driving circuit includes an operational amplifier.

13. The tunable device according to claim 2, characterized in that: The driving circuit includes a current driver.

14. The tunable device according to claim 1, characterized in that: The frequency tunable circuit is a resonator.

15. The tunable device according to claim 1, characterized in that: The frequency tunable circuit is a filter.

16. The tunable device according to claim 1, characterized in that: The tunable component is a voltage controlled component.

17. The tunable device according to claim 1, characterized in that: The tunable component is a current controlled component.

18. The tunable device according to claim 1, characterized in that: The tunable component is a tunable capacitive component.

19. The tunable device according to claim 1, characterized in that: The tunable component is a tunable inductive component.

20. The tunable device according to claim 1, characterized in that The tunable component is a tunable resistance component.

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