Communication method and related device

Abstract

The embodiment of the invention provides a communication method, which is applied to a communication system comprising a master station, a controller and a plurality of slave stations, in the communication process, the master station sends coding and decoding signals to the controller, multiple groups of master station discrete signals are coded by using the coding and decoding signals to obtain a group of master station integrated signals, and the master station integrated signals are transmitted to the controller. According to the method, signals sent by a plurality of substations are integrated into a group of master station integrated signals in a coding mode, and after the group of master station integrated signals are sent to a controller, the controller decodes the group of master station integrated signals based on received coding and decoding signals so as to restore and obtain a plurality of groups of master station discrete signals. And the plurality of groups of main station discrete signals are distributed to the plurality of slave stations, so that the purpose of simultaneous communication between the main station and the plurality of slave stations is achieved, and the communication efficiency is improved. Besides, in the communication process, the method achieves the purpose of communicating with a plurality of slave stations with fewer IO resources of the master station, and achieves the purpose of expanding the number of the slave stations which can be connected with the master station.

Description

Technical Field

[0001] The present specification relates to the field of communication technology, specifically, to master-slave communication technology under the field of communication technology, and more specifically, to a communication method and related devices. Background Art

[0002] In the field of communication technology, the master-slave communication mode is a common hardware and communication architecture in which one device (master device, or master station) controls the communication process of one or more other devices (slave devices, or slave stations). In this communication mode, the master device is responsible for coordinating all communication processes, which makes the management in the communication network more centralized and simplifies the management and control of communication.

[0003] In commonly used communication protocols that follow the master-slave communication mode, such as SPI (Serial Peripheral Interface), the communication efficiency between the master station and the slave station is low. Summary of the invention

[0004] The embodiments of this specification provide a communication method and related devices to achieve the purpose of expanding the number of slave stations that can be connected to a master station and improving the communication efficiency between the master station and the slave stations.

[0005] To achieve the above technical objectives, the embodiments of this specification provide the following technical solutions:

[0006] In a first aspect, an embodiment of the present specification provides a communication method, which is applied to a master station in a communication system, wherein the communication system further includes: a controller and a plurality of slave stations, and the communication method includes:

[0007] Sending a codec signal and a group of master station integrated signals to the controller; wherein the codec signal includes: a reference clock and multiple selection signals, multiple value state combinations of the multiple selection signals correspond to the multiple slave stations respectively, and the reference clock is used as a clock signal for the encoding and decoding process; the group of master station integrated signals is obtained by encoding multiple groups of master station discrete signals based on the codec signal, and the group of master station integrated signals is used to instruct the controller to decode the group of master station integrated signals based on the codec signal to obtain the multiple groups of master station discrete signals, and distribute the multiple groups of master station discrete signals to the multiple slave stations;

[0008] The multiple groups of master station discrete signals correspond one-to-one to the multiple slave stations, and the master station discrete signals are used to instruct the slave stations corresponding to the master station discrete signals to operate based on the master station discrete signals.

[0009] In a second aspect, an embodiment of the present specification provides a communication method, which is applied to a controller in a communication system, wherein the communication system further includes: a master station and a plurality of slave stations, and the communication method includes:

[0010] Receive a coding and decoding signal and a group of master station integrated signals sent by the master station, wherein the coding and decoding signal includes: a reference clock and multiple selection signals, multiple value state combinations of the multiple selection signals correspond to multiple slave stations respectively, and the reference clock is used as a clock signal for the coding and decoding process;

[0011] Decoding the set of master station integrated signals based on the codec signal to obtain multiple sets of master station discrete signals, and distributing the multiple sets of master station discrete signals to multiple slave stations; the set of master station integrated signals is obtained by encoding the multiple sets of master station discrete signals by the master station based on the codec signal;

[0012] The multiple groups of master station discrete signals correspond one-to-one to the multiple slave stations, and the master station discrete signals are used to instruct the slave stations corresponding to the master station discrete signals to operate based on the master station discrete signals.

[0013] In a third aspect, an embodiment of the present specification provides a communication system, including: a controller, a master station and a plurality of slave stations; wherein,

[0014] The master station is configured to: send a codec signal and a set of master station integrated signals to the controller; wherein the codec signal includes: a reference clock and a plurality of selection signals, a plurality of value state combinations of the plurality of selection signals respectively correspond to a plurality of the slave stations, and the reference clock is used as a clock signal for the encoding and decoding process; the set of master station integrated signals is obtained by encoding a plurality of sets of master station discrete signals based on the codec signal;

[0015] The multiple groups of master station discrete signals correspond one-to-one to the multiple slave stations, and the master station discrete signals are used to instruct the substations corresponding to the master station discrete signals to work based on the master station discrete signals;

[0016] The controller is configured to: receive the codec signal sent by the master station, receive the group of master station integrated signals, decode the group of master station integrated signals based on the codec signal to obtain the multiple groups of master station discrete signals, and distribute the multiple groups of master station discrete signals to the multiple slave stations.

[0017] In a fourth aspect, an embodiment of the present specification further provides a radio frequency power supply, comprising: a control module, a radio frequency module and a plurality of DC modules; wherein,

[0018] The control module is configured to: control the plurality of DC modules to generate a plurality of DC power supplies;

[0019] The radio frequency module is configured to: output radio frequency energy based on the multiple DC power supplies;

[0020] The control module communicates with the plurality of DC modules based on any one of the above communication methods applied to the master station;

[0021] The DC module communicates with the control module based on any of the above communication methods applied to the controller.

[0022] In a fifth aspect, an embodiment of the present specification further provides a semiconductor process equipment, comprising: a process chamber and a radio frequency power supply as described in any one of the above items.

[0023] In a sixth aspect, an embodiment of the present specification further provides a computing device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the communication method as described above when executing the computer program.

[0024] In a seventh aspect, an embodiment of the present specification further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the communication method as described above is implemented.

[0025] In an eighth aspect, an embodiment of the present specification provides a computer program product or a computer program, wherein the computer program product includes a computer program, and the computer program is stored in a computer-readable storage medium; the processor of the computer device reads the computer program from the computer-readable storage medium, and the processor implements the steps of the above-mentioned communication method when executing the computer program.

[0026] It can be seen from the above technical scheme that the communication method provided in the embodiment of this specification is applied to a communication system including a master station, a controller and multiple slave stations. During the communication process, the master station sends a codec signal to the controller, and uses the codec signal to encode multiple groups of master station discrete signals to obtain a group of master station integrated signals, so as to integrate the signals sent to multiple substations into a group of master station integrated signals by encoding. After the group of master station integrated signals is sent to the controller, the controller decodes a group of master station integrated signals based on the received codec signal to restore multiple groups of master station discrete signals, and distributes the multiple groups of master station discrete signals to multiple slave stations, thereby achieving the purpose of simultaneous communication between the master station and multiple slave stations and improving communication efficiency.

[0027] In addition, in an optional implementation, during the communication process, the master station only needs to output a set of master station integrated signals (for the SPI communication protocol, a set of master station signals can include three signals) and codec signals to the controller through encoding, and the number of slave stations that the master station can communicate with can be expanded through multiple selection signals in the codec signal. When the number of multiple selection signals is N, the number of slave stations that the master station can connect to is 2. N This achieves the purpose of communicating with multiple slaves with fewer master IO (Input-Output) resources, and achieves the purpose of expanding the number of slaves that can be connected to the master. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of this specification or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this specification. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0029] Figure 1 It is a structural diagram of a communication system in the related art;

[0030] Figure 2 A flow chart of a communication method provided for one embodiment of this specification;

[0031] Figure 3 A schematic diagram of the structure of a communication system provided for one embodiment of this specification;

[0032] Figure 4 A schematic diagram of an encoding process provided for one embodiment of this specification;

[0033] Figure 5 A schematic diagram of a decoding process provided for one embodiment of this specification;

[0034] Figure 6 A schematic diagram of the structure of another communication system provided for one embodiment of this specification;

[0035] Figure 7 A schematic diagram of a communication process between a master station and a slave station provided for one embodiment of this specification;

[0036] Figure 8 A flowchart of another communication method provided for one embodiment of this specification;

[0037] Fig. 9 A schematic diagram of the structure of a radio frequency power supply provided for one embodiment of this specification;

[0038] Fig.10 A schematic diagram of the structure of a computing device provided for one embodiment of the present specification. DETAILED DESCRIPTION

[0039] Unless otherwise defined, the technical terms or scientific terms used in the embodiments of this specification shall have the common meanings understood by persons with ordinary skills in the field to which this specification belongs. The words "first", "second" and similar words used in the embodiments of this specification do not indicate any order, quantity or importance, but are only used to avoid confusion of constituent elements.

[0040] Unless the context requires otherwise, throughout the specification, "plurality" means "at least two", and "including" is interpreted as an open, inclusive meaning, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "examples", "specific examples" or "some examples" are intended to indicate that a particular feature, structure, material or characteristic associated with the embodiment or example is included in at least one embodiment or example of the specification. The schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0041] The following will be combined with the drawings in the embodiments of this specification to clearly and completely describe the technical solutions in the embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this specification, not all of the embodiments. Based on the embodiments in this specification, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this specification.

[0042] Overview

[0043] In commonly used master-slave communication mode communication protocols such as SPI, the number of slaves that the master can connect to is limited by the IO resources of the master, resulting in a limited number of slaves that the master can connect to. In addition, due to the limitation of full-duplex communication between the master and the slave in communication protocols such as SPI, the master supports sending and receiving data with the slave at the same time, and the data channels between the master and the slave correspond one to one. This means that the master can only communicate with a single slave at the same time, and the communication efficiency is low.

[0044] Specifically, refer to Figure 1 , Figure 1 The structure diagram of the communication system based on the SPI communication protocol in the related art is shown. Figure 1 In the SPI Master, SPI Master represents the master station, SPI SlaveN represents different slave stations, N = 0, 1, 2, Figure 1In the example, the communication between the master station and three slave stations is used for exemplary explanation. The master station includes six ports, SCK (Serial Clock, driving clock signal), MOSI (Master Out Slave In, master station output slave station input), MISO (Master In Slave Out, master station input slave station output), CS (Chip Select, chip select signal) 1, CS2 and CS3, among which SCK is used to output the driving clock signal, the driving clock signal is used to drive each slave station to work, MOSI is used to output the data signal output by the master station to the slave station, and MISO is used to receive the data signal output by the slave station to the master station. Among them, SCK, MOSI, and MISO are connected to multiple slave stations through a shared bus, that is, one SCK port of the master station is connected to the SCK ports of multiple slave stations through a shared bus, one MOSI port of the master station is connected to the MOSI ports of multiple slave stations through a shared bus, and one MISO port of the master station is connected to the MISO ports of multiple slave stations through a shared bus.

[0045] CSN is connected to different slaves for transmitting chip select signals. CSN ports are connected to multiple slaves through independent wires, i.e., CS1 port is connected to slave 0 through an independent wire, CS2 port is connected to slave 1 through another independent wire, and CS3 port is connected to slave 2 through an independent wire. When the chip select signal is low, the corresponding slave is enabled to work (receive and send data). For example, assuming that the master needs to communicate with slave 0, CS1 is pulled low, CS2 and CS3 are kept high, then slave 0 is enabled, and can receive the driving clock signal and the data signal output by the MOSI port, and can also send data signals to the master through MISO. At this time, other slaves cannot communicate with the master.

[0046] In this way, when the master station communicates with multiple slave stations, they communicate one by one based on polling, which has low communication efficiency. In addition, due to the limitation of the IO resources of the master station, the number of slave stations that can be connected to the master station is limited.

[0047] In order to solve this problem, the inventors have discovered through research that a programmable logic device such as a CPLD (Complex Programmable Logic Device) or an FPGA (Field-Programmable Gate Array) can be added to the communication system as a controller. The controller serves as a communication medium between a master station and multiple slave stations. When the master station communicates with multiple slave stations, the master station sends a codec signal to the controller, and uses the codec signal to encode multiple groups of master station discrete signals to obtain a group of master station integrated signals, so as to integrate the signals sent to multiple substations into a group of master station integrated signals by encoding. After the group of master station integrated signals is sent to the controller, the controller decodes a group of master station integrated signals based on the received codec signal to restore multiple groups of master station discrete signals, and distributes the multiple groups of master station discrete signals to multiple slave stations, thereby achieving the purpose of simultaneous communication between the master station and multiple slave stations and improving communication efficiency.

[0048] In addition, during the communication process, the master station only needs to output a set of master station integrated signals (for the SPI communication protocol, a set of master station signals can include three signals) and encoding and decoding signals to the controller through encoding. The number of slave stations that the master station can communicate with can be expanded through multiple selection signals in the encoding and decoding signals. When the number of multiple selection signals is N, the number of slave stations that the master station can connect to is 2. N This achieves the purpose of communicating with multiple slaves with fewer master IO (Input-Output) resources, and achieves the purpose of expanding the number of slaves that can be connected to the master.

[0049] Based on the above concept, an embodiment of the present specification provides a communication method. The communication method provided in the embodiment of the present specification will be exemplarily described below in conjunction with the accompanying drawings.

[0050] Exemplary Methods

[0051] To be applied to Figure 2 Taking the master station in as an example, an implementation of this specification provides a communication method, the communication method comprising:

[0052] S201: Sending a codec signal and a group of master station integrated signals to the controller; wherein the codec signal includes: a reference clock and multiple selection signals, multiple value state combinations of the multiple selection signals correspond to the multiple slave stations respectively, and the reference clock is used as a clock signal for the encoding and decoding process; the group of master station integrated signals is obtained by encoding multiple groups of master station discrete signals based on the codec signal, and the group of master station integrated signals is used to instruct the controller to decode the group of master station integrated signals based on the codec signal to obtain the multiple groups of master station discrete signals, and distribute the multiple groups of master station discrete signals to the multiple slave stations;

[0053] The multiple groups of master station discrete signals correspond one-to-one to the multiple slave stations, and the master station discrete signals are used to instruct the slave stations corresponding to the master station discrete signals to operate based on the master station discrete signals.

[0054] In this embodiment, the communication method is applied to a communication system including a master station, a controller and multiple slave stations. During the communication process, the master station sends a codec signal to the controller, and uses the codec signal to encode multiple groups of master station discrete signals to obtain a group of master station integrated signals, so as to integrate the signals sent to multiple substations into a group of master station integrated signals by encoding. After the group of master station integrated signals is sent to the controller, the controller decodes a group of master station integrated signals based on the received codec signal to restore multiple groups of master station discrete signals, and distributes the multiple groups of master station discrete signals to multiple slave stations, thereby achieving the purpose of simultaneous communication between the master station and multiple slave stations and improving communication efficiency.

[0055] In an optional embodiment, the multiple groups of master station discrete signals include multiple groups of first data signals and multiple groups of function signals, the multiple groups of first data signals correspond one-to-one to the multiple slave stations, the first data signal includes data sent by the master station to the slave station corresponding to the first data signal; the multiple groups of function signals correspond one-to-one to the multiple slave stations, the function signal is used to drive the slave station corresponding to the function signal to work, and / or enable the slave station corresponding to the function signal to receive the first data signal;

[0056] The group of integrated signals includes: a main station data integrated signal and a functional integrated signal. The main station data integrated signal is obtained by encoding the multiple groups of first data signals, and the functional integrated signal is obtained by encoding the multiple groups of functional signals.

[0057] The codec signal may refer to a signal used in the encoding and decoding process. In the codec signal, the reference clock is used as the clock signal of the encoding and decoding process, that is, the encoding and decoding process works with the reference clock as the clock reference. In one embodiment, the first edge and the second edge of the reference clock may be used as valid signals in the encoding and decoding process, respectively. Thus, in the encoding process, the encoding operation may be performed when the first edge of the reference clock arrives, and in the decoding process, the decoding operation may be performed when the second edge of the reference clock arrives. The first edge and the second edge of the reference clock may be the rising edge and the falling edge of the reference clock, respectively.

[0058] Multiple selection signals refer to signals that identify slave stations through value state combinations during the encoding and decoding process. Specifically, the multiple value state combinations of the multiple selection signals correspond to the multiple slave stations. For example, assuming that there are three selection signals S0, S1, and S2, and the value states of each selection signal include 0 and 1, then the three selection signals may include eight value state combinations, and these eight value state combinations may correspond to eight slave stations respectively. For example, when the values ​​of S0, S1, and S2 are all 0, this value state combination may correspond to slave station 0; when the values ​​of S2 and S1 are both 0 and the value of S1 is 1, this value state combination may correspond to slave station 1, and so on. For details, please refer to Table 1:

[0059] Table 1 Correspondence between the value state combination of the three selection signals and the slave station

[0060]

[0061] In the slave ID, CSi_n represents slave i, where i=0-7.

[0062] Thus, in this embodiment, three selection signals can correspond to 8 slave stations. Accordingly, when the number of selection signals is 4, it can correspond to 16 slave stations. Similarly, when the number of multiple selection signals is N, the number of slave stations that the master station can connect to is 2. N where N is an integer greater than or equal to 2.

[0063] A set of master station integrated signals is the same in form as a set of master station discrete signals sent to a single slave station, or in other words, a set of master station integrated signals is the same in signal type and quantity as a set of master station discrete signals sent to a single slave station. Taking the SPI communication protocol as an example, a set of master station discrete signals may include a clock drive signal, a chip select signal and a first data signal, wherein the clock drive signal is used to drive the slave station corresponding to the clock drive signal to work; the chip select signal is used to enable the slave station corresponding to the functional signal to receive the first data signal; the first data signal includes the data sent by the master station to the slave station corresponding to the first data signal. Then, correspondingly, in a set of master station integrated signals, the master station data integrated signal can be obtained by encoding multiple groups of first data signals, representing the data sent by the master station to multiple slave stations; the functional integrated signal can include a clock integrated signal and a chip select integrated signal respectively, wherein the clock integrated signal can be obtained by encoding multiple groups of clock drive signals, representing the clock drive signal sent by the master station to multiple slave stations; the chip select integrated signal can be obtained by encoding multiple groups of chip select signals, representing the chip select signal sent by the master station to multiple slave stations.

[0064] In this way, a group of master station integrated signals can be sent through the three IO ports of the master station. When the number of slave stations is 8, the number of master station IO ports occupied by the codec signal is four (the reference clock occupies one IO port, and the three selection signals occupy three IO ports). Considering that the master station needs to occupy one IO port to receive slave station data, based on the communication method provided in the implementation mode of this specification, a total of 8 IO ports are required, and the master station can communicate with 8 slave stations. Figure 1 In the related art shown in FIG. 1 , if the master station wants to communicate with 8 slave stations, it needs 3 (CSK, MOSI and MISO) + 8 (the chip select signals of the 8 slave stations need to occupy 8 IO ports) = 11 IO ports; similarly, when the master station needs to communicate with 16 slave stations, using the communication method provided in the embodiment of this specification, it only needs to add one selection signal on the basis of the above example, and a total of 9 IO ports are required. Figure 1 In the related technology shown, 3+16=19 IO ports are required. It can be seen that the communication method provided in the implementation mode of this specification is used for communication between the master station and the slave station, which can greatly save the master station IO resources. In addition, the more slave stations the master station needs to communicate with, the more obvious the advantage of the communication method provided in the implementation mode of this specification in saving the master station IO resources is, thus avoiding the problem that the number of slave stations that the master station can communicate with cannot be expanded due to the limitation of the master station IO resources.

[0065] In addition, in the present embodiment, a group of master station integrated signals are encoded by multiple groups of master station discrete signals. The group of master station integrated signals can be restored to multiple groups of master station discrete signals by decoding by the controller and distributed to multiple slave stations, thereby realizing simultaneous communication between the master station and multiple slave stations, solving the limitation in related technologies that the master station can only communicate with a single slave station at the same time, and improving the communication efficiency between the master station and the slave stations.

[0066] Regarding the encoding process, this specification provides a feasible encoding process. Specifically, in one embodiment, the process of encoding multiple groups of master station discrete signals based on the codec signal to obtain the group of master station integrated signals includes:

[0067] At a first edge of the reference clock, determining a target slave station according to a combination of value states of the plurality of selection signals at a time corresponding to the first edge;

[0068] The master station discrete signal corresponding to the target slave station is sampled, and the sampling results are spliced ​​into the master station integrated signal according to the order of the first edges.

[0069] As mentioned above, the first edge of the reference clock can be, for example, the falling edge of the reference clock. In another embodiment, the first edge of the reference clock can also be the rising edge of the reference clock, as long as different edges of the reference clock are used as valid signals during the encoding process and the decoding process.

[0070] Please refer to Figure 3 and Figure 4 , Figure 3Taking the SPI communication protocol as an example, the hardware architecture of the communication system for implementing the communication method provided in the embodiment of this specification is shown. In the communication system, a master station (SPI Master), a controller and multiple slave stations (SPI Slave) are included. The IO ports included in the master station are: SCK, MOSI, MISO, CS_n, BT, S0, S1, etc., wherein SCK, MOSI and CS_n are used to transmit a set of encoded master station integrated signals, MISO is used to receive the data signal transmitted from the slave station to the master station, the BT port is used to transmit the reference clock, and the Si port is used to transmit the selection signal, i=0,1... Correspondingly, in the controller, the SCK, MOSI, MISO, CS_n, BT, S0, S1 and other ports are connected to the corresponding ports of the master station, and the signal types used for transmission can refer to the above description. The SCKi port in the controller is used to transmit the clock drive signal in the decoded master discrete signal to the slave i, the MOSIi port is used to transmit the data signal transmitted from the master to the slave i, the MISOi is used to receive the data sent from the slave i to the master, and the CSi_n is used to transmit the chip select signal in the decoded master discrete signal to the slave i. In the slave i, the CS_n port is used to connect to the CSi_n port of the controller to receive the chip select signal corresponding to the slave i. SPI Slavei represents the slave i, i = 0 ~ n.

[0071] Taking 8 slave stations as an example, the encoding process of the chip select signal of 8 slave stations is illustrated. Figure 4 ,exist Figure 4 In the process, the rising edge of the reference clock BT is used as the effective signal of the encoding process, that is, the encoded chip selection integrated signal CS updates its state at the rising edge of the reference clock BT. Figure 4In the figure, CS_0~CS_7 represent chip select signals sent to slave stations 0~7 respectively, and S0~S2 represent three selection signals. In the encoding process, the reference clock is used as the clock reference for encoding, and multiple chip select signals are encoded using the selection signal to obtain the encoded chip select integrated signal CS. Specifically, assuming that the first edge is a falling edge, the state of the chip select integrated signal is updated at the falling edge of the reference clock according to the value state combination of the selection signal and the hit chip select signal. Taking the first falling edge from the left side of the reference clock as an example, at this time, the values ​​of the selection signals S2~S0 are all 0, and this value state combination corresponds to slave station 0, that is, the target slave station is slave station 0 at this time, then the value state (0) of the chip select signal CS_0 corresponding to slave station 0 at this moment can be sampled as the sampling result, so that the value state of the chip select integrated signal between the first falling edge and the second falling edge of the reference clock is 0 (i.e., low level). Similarly, taking the second falling edge from the left side of the reference clock as an example, at this time, the values ​​of the selection signals S2~S1 are all 0, and the value of S0 is 1. This value state combination corresponds to slave 1, that is, the target slave is slave 1 at this time. Then, the value state (0) of the chip select signal CS_1 corresponding to slave 1 at this moment can be sampled as the sampling result. In this way, the value state of the chip select integrated signal between the second falling edge to the third falling edge of the reference clock is 0 (that is, low level). Similarly, through the above sampling process, the encoded integrated chip select signal CS is obtained.

[0072] The encoding process of the clock driving signal and the first data signal is similar to the encoding process of the chip select signal, and reference may be made to the encoding process of the chip select signal in the above text.

[0073] When the master station sends data to multiple slave stations, assuming that data needs to be sent to eight slave stations from slave station 0 to slave station 7, in addition to generating eight chip select signals CS_0 to CS_7, it also needs to generate clock drive signals SCK0 to SCK7, first data signals MOSI0 to MOSI7 and corresponding encoding and decoding signals. These eight chip select signals, eight clock drive signals and eight first data signals correspond to slave stations 0 to 7 respectively. CS_0~CS_7, SCK0~SCK7 and MOSI0~MOSI7 constitute 8 groups of master station discrete signals. For example, a group of master station discrete signals corresponding to slave station 0 may include: CS_0, SCK0 and MOSI0, and a group of master station discrete signals corresponding to slave station 1 may include: CS_1, SCK1 and MOSI1, and so on. In the encoding process, CS_0~CS_7 are encoded by the codec signal to obtain the chip selection integrated signal CS, SCK0~SCK7 are encoded by the codec signal to obtain the clock integrated signal SCK, and MOSI0~MOSI7 are encoded by the codec signal to obtain the master station data integrated signal MOSI. In this example, a group of master station integrated signals obtained after encoding includes: clock integrated signal SCK, chip selection integrated signal CS and master station data integrated signal MOSI. After the controller decodes the group of master station integrated signals, the 8 groups of master station discrete signals described above can be obtained, and each group of master station discrete signals is distributed to each slave station, so as to realize the simultaneous communication between the master station and multiple slave stations.

[0074] In another embodiment of the present specification, a coding process is further provided. Specifically, the process of encoding multiple groups of master station discrete signals based on the codec signal to obtain the group of master station integrated signals includes:

[0075] At a first edge of the reference clock, the codec signal and the plurality of groups of master station discrete signals are respectively substituted into a first preset formula to calculate the group of master station integrated signals;

[0076] The first preset formula includes:

[0077] MS=(MS_0&([SN]==0))||(MS_1&([SN]==1))||...||(MS_N&([SN]==N));

[0078] Among them, MS represents the master station integrated signal, MS_i represents the master station discrete signal corresponding to the master station i, i=0,1,2…N, Si represents the i-th value state combination of multiple selection signals, [Si]==i represents that the i-th value state combination of the multiple selection signals corresponds to the slave station i, & represents the AND operation, || represents the OR operation.

[0079] Similarly, the first edge may be, for example, a falling edge of the reference clock, still referring to Figure 4 Based on the first preset formula, the value state combination of the codec signal and the master station discrete signal can be sampled at the first edge of the reference clock to obtain the value state combination of the codec signal and the master station discrete signal, and the value of the master station integrated signal at that moment can be obtained by performing a logical operation based on the first preset formula, thereby realizing the encoding process. The encoding method provided in this embodiment has the advantages of small amount of operation, easy implementation, and fast operation speed.

[0080] In order to support multiple slave stations to send data to the master station at the same time, in one embodiment, the communication method further includes:

[0081] In response to a slave station integrated signal sent by the controller, the slave station integrated signal is decoded based on the codec signal to obtain multiple groups of slave station discrete signals. The slave station integrated signal is obtained by the controller encoding the multiple groups of slave station discrete signals based on the codec signal. The multiple groups of slave station discrete signals correspond one-to-one to the multiple slave stations. The slave station discrete signal includes a data signal sent to the master station by the slave station corresponding to the slave station discrete signal.

[0082] The process of the controller encoding multiple groups of slave discrete signals based on the codec signal to obtain the slave integrated signal can be referred to Figure 4 The encoding process of the chip select signal.

[0083] In this embodiment, the controller encodes the slave station discrete signals to obtain the slave station integrated signal and sends it to the master station, so as to achieve the purpose of transmitting the slave station discrete signals of multiple slave stations through the IO port of one master station. After obtaining the slave station integrated signal, the master station decodes it based on the codec signal to obtain multiple groups of slave station discrete signals, thereby realizing the reception of the data required to be sent by multiple slave stations and meeting the needs of multiple slave stations to send data to the master station at the same time.

[0084] For the process of decoding the slave integrated signal based on the codec signal, please refer to Figure 5 , the decoding of the slave station integrated signal based on the codec signal comprises:

[0085] At a second edge of the reference clock, the codec signal and the slave station integrated signal are substituted into a second preset formula to calculate the multiple groups of slave station discrete signals;

[0086] The second preset formula includes: MS_i'=(MS'&([Si]==i)); wherein MS' represents the slave station integrated signal, MS_i' represents the slave station discrete signal corresponding to the master station i, i=0,1,2…N, Si represents the i-th value state combination of multiple selection signals, [Si]==i represents that the i-th value state combination of the multiple selection signals corresponds to the slave station i, & represents an AND operation.

[0087] Figure 5 In the example, MOSI' represents a slave station integrated signal, and the decoding process based on the slave station integrated signal and the codec signal may include:

[0088] Assuming that the second edge of the reference clock includes the rising edge of the reference clock, at the first rising edge from the left of the reference clock, the values ​​of the selection signals S2 to S0 are all 0, and this value state combination corresponds to slave station 0, then the value of MOSI_0 of slave station 0 at this moment is equal to the value of MOSI', that is, 0 (low level), and so on, the slave station discrete signals of each slave station can be obtained. This decoding method only requires sampling and one logical operation, with small amount of calculation and fast operation speed.

[0089] In some communication scenarios, when the distance between the master station and the slave station is far, and / or the communication rate between the master station and the slave station is high, the signal transmitted between the master station and the slave station or the controller is easily interfered and error occurs. The error may cause the slave station to work in an incorrect state, or cause the master station to receive erroneous data information, thereby bringing serious consequences. In one embodiment of the present specification, in order to ensure the correctness of the data transmitted between the master station and the slave station and avoid the occurrence of error due to interference, the sending of the set of master station integrated signals to the controller includes:

[0090] converting the set of master station integrated signals into a differential signal form, and sending the set of master station integrated signals in the differential signal form to the controller;

[0091] The set of master station integrated signals is also used to instruct the controller to convert the set of master station integrated signals in the form of differential signals into single-ended signals.

[0092] In this embodiment, the master station converts a group of master station integrated signals into differential signal form before sending the master station integrated signal to the controller, and transmits the master station integrated signal in the form of differential signal. In this way, during the transmission process, if the master station integrated signal is interfered with and causes part of the signal to jump, the two differential signals will have the same jump. After receiving the master station integrated signal in the form of a differential signal that has jumped, the controller will compare the difference between the two differential signals to obtain the correct signal, effectively offsetting the signal interference during the transmission process, which is particularly beneficial for eliminating common-mode interference during signal transmission, and effectively enhancing the anti-interference ability of the master station integrated signal.

[0093] Similarly, when the controller sends the slave integrated signal to the master station, the slave integrated signal can be first converted into a slave integrated signal in the form of a differential signal and then transmitted to the master station. After the master station receives the slave integrated signal in the form of a differential signal, it converts the slave integrated signal into a single-ended signal and then decodes it. In this way, the anti-interference ability of the signal transmitted from the slave station to the master station can be enhanced.

[0094] refer to Figure 6 , Figure 6 A communication system is shown which realizes conversion between differential signals and single-ended signals through hardware (signal conversion circuit 40). In this system, the signal sent by the master station to the controller is converted into a differential signal form by the signal conversion circuit 40, and the signal in the form of a differential signal sent by the controller to the master station is converted into a single-ended signal form by the signal conversion circuit 40.

[0095] In addition, a bit error checking function may be added to the master station and / or the controller. Specifically, the set of master station integrated signals is also used to instruct the controller to perform bit error checking on the set of master station integrated signals.

[0096] After receiving the slave station integrated signal, the master station performs error checking on the slave station integrated signal. In this embodiment, the accuracy of data during transmission is ensured by software checking, and the adverse effects of interference on the signal during transmission are eliminated.

[0097] In an optional implementation, the error checking method may include any one of a parity check, a CRC (Cycle Redundancy Check) check, a Hamming Code check, an XOR check, and the like.

[0098] refer to Figure 7 , Figure 7 The communication method provided in the implementation mode of this specification is shown as a schematic diagram of the signal flow in a two-way communication process between a master station and a slave station. The master station encodes multiple groups of master station discrete signals that need to be sent to multiple slave stations, obtains a master station integrated signal and sends it to the controller. The controller encodes it, restores it to obtain multiple groups of master station discrete signals and sends them to their respective corresponding slave stations. In this way, the one-way communication from the master station to the slave station is completed. Multiple slave stations send multiple groups of slave station discrete signals to the controller. The controller encodes them to obtain a slave station integrated signal and sends it to the master station. The master station decodes the slave station integrated signal to obtain multiple groups of slave station discrete signals. At this point, the two-way communication between the master station and multiple slave stations is completed. It should be noted that although Figure 7The data transmission from the master station to the slave station and the data transmission from the slave station to the master station shown in the figure are performed sequentially, but in other embodiments, based on the full-duplex communication mode of the communication protocol such as SPI, the two-way data transmission between the master station and the slave station can also be performed simultaneously.

[0099] In addition, it can be understood that although the communication method is exemplified by taking the SPI communication protocol as an example in the foregoing, in other embodiments, the communication method can be applicable to a communication system that communicates based on other one-master-multiple-slave communication protocols.

[0100] To be applied to Figure 8 Taking the controller in as an example, the embodiment of this specification also provides a communication method, the communication method comprising:

[0101] S801: receiving a codec signal and a group of master station integrated signals sent by the master station, wherein the codec signal includes: a reference clock and multiple selection signals, multiple value state combinations of the multiple selection signals correspond to multiple slave stations respectively, and the reference clock is used as a clock signal for encoding and decoding processes;

[0102] S802: Decoding the group of master station integrated signals based on the codec signal to obtain multiple groups of master station discrete signals, and distributing the multiple groups of master station discrete signals to multiple slave stations; the group of master station integrated signals is obtained by the master station encoding the multiple groups of master station discrete signals based on the codec signal;

[0103] The multiple groups of master station discrete signals correspond one-to-one to the multiple slave stations, and the master station discrete signals are used to instruct the slave stations corresponding to the master station discrete signals to operate based on the master station discrete signals.

[0104] Optionally, the multiple groups of master station discrete signals include multiple groups of first data signals and multiple groups of function signals, the multiple groups of first data signals correspond one-to-one to the multiple slave stations, the first data signal includes data sent by the master station to the slave station corresponding to the first data signal; the multiple groups of function signals correspond one-to-one to the multiple slave stations, the function signal is used to drive the slave station corresponding to the function signal to work, and / or enable the slave station corresponding to the function signal to receive the first data signal;

[0105] The group of integrated signals includes: a main station data integrated signal and a functional integrated signal. The main station data integrated signal is obtained by encoding the multiple groups of first data signals, and the functional integrated signal is obtained by encoding the multiple groups of functional signals.

[0106] For the definition of the specific steps executed by the controller in the communication method, please refer to the relevant description above, and this specification will not go into details here.

[0107] Exemplary devices and apparatus

[0108] In an exemplary embodiment of the present specification, a communication device is further provided, which is applied to a master station in a communication system, wherein the communication system further includes: a controller and a plurality of slave stations, and the communication device includes:

[0109] A codec signal sending module, used for sending a codec signal and a group of master station integrated signals to the controller; wherein the codec signal includes: a reference clock and multiple selection signals, multiple value state combinations of the multiple selection signals correspond to the multiple slave stations respectively, and the reference clock is used as a clock signal for the encoding and decoding process; the group of master station integrated signals is obtained by encoding multiple groups of master station discrete signals based on the codec signal, and the group of master station integrated signals is used to instruct the controller to decode the group of master station integrated signals based on the codec signal to obtain the multiple groups of master station discrete signals, and distribute the multiple groups of master station discrete signals to the multiple slave stations;

[0110] The multiple groups of master station discrete signals correspond one-to-one to the multiple slave stations, and the master station discrete signals are used to instruct the slave stations corresponding to the master station discrete signals to operate based on the master station discrete signals.

[0111] Optionally, the multiple groups of master station discrete signals include multiple groups of first data signals and multiple groups of function signals, the multiple groups of first data signals correspond one-to-one to the multiple slave stations, the first data signal includes data sent by the master station to the slave station corresponding to the first data signal; the multiple groups of function signals correspond one-to-one to the multiple slave stations, the function signal is used to drive the slave station corresponding to the function signal to work, and / or enable the slave station corresponding to the function signal to receive the first data signal;

[0112] The group of master station integrated signals includes: a master station data integrated signal and a function integrated signal. The master station data integrated signal is obtained by encoding the multiple groups of first data signals, and the function integrated signal is obtained by encoding the multiple groups of function signals.

[0113] For the specific definition of the communication device, please refer to the definition of the communication method above, which will not be repeated here. Each module in the above communication device can be implemented in whole or in part by software, hardware and a combination thereof. The above modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0114] Accordingly, the present specification also provides a communication system, referring to Figure 3 , including: a controller, a master station and multiple slave stations; among which,

[0115] The master station is configured to: send a codec signal and a set of master station integrated signals to the controller; wherein the codec signal includes: a reference clock and a plurality of selection signals, a plurality of value state combinations of the plurality of selection signals respectively correspond to a plurality of the slave stations, and the reference clock is used as a clock signal for the encoding and decoding process; the set of master station integrated signals is obtained by encoding a plurality of sets of master station discrete signals based on the codec signal;

[0116] The multiple groups of master station discrete signals correspond one-to-one to the multiple slave stations, and the master station discrete signals are used to instruct the substations corresponding to the master station discrete signals to work based on the master station discrete signals;

[0117] The controller is configured to: receive the codec signal sent by the master station, receive the group of master station integrated signals, decode the group of master station integrated signals based on the codec signal to obtain the multiple groups of master station discrete signals, and distribute the multiple groups of master station discrete signals to the multiple slave stations.

[0118] Optionally, the multiple groups of master station discrete signals include multiple groups of first data signals and multiple groups of function signals, the multiple groups of first data signals correspond one-to-one to the multiple slave stations, the first data signal includes data sent by the master station to the slave station corresponding to the first data signal; the multiple groups of function signals correspond one-to-one to the multiple slave stations, the function signal is used to drive the slave station corresponding to the function signal to work, and / or enable the slave station corresponding to the function signal to receive the first data signal;

[0119] The group of integrated signals includes: a main station data integrated signal and a functional integrated signal. The main station data integrated signal is obtained by encoding the multiple groups of first data signals, and the functional integrated signal is obtained by encoding the multiple groups of functional signals.

[0120] Optionally, the controller is further used to encode multiple groups of slave station discrete signals based on the codec signal to obtain slave station integrated signals, the multiple groups of slave station discrete signals correspond one-to-one to multiple slave stations, and the slave station discrete signals include data signals sent to the master station by the slave station corresponding to the slave station discrete signals.

[0121] The master station is further configured to, in response to the slave station integrated signal sent by the controller, decode the slave station integrated signal based on the codec signal to obtain the multiple groups of slave station discrete signals.

[0122] Accordingly, the embodiments of this specification also provide a radio frequency power supply, such as Fig. 9 As shown, it includes: a control module, a radio frequency module and multiple DC modules; wherein,

[0123] The control module is configured to: control the plurality of DC modules to generate a plurality of DC power supplies;

[0124] The radio frequency module is configured to: output radio frequency energy based on the multiple DC power supplies;

[0125] The control module communicates with the multiple DC modules based on the communication method described in any one of the above embodiments;

[0126] The DC module communicates with the control module based on the communication method described in any one of the above embodiments.

[0127] The RF power supply is an important device for generating plasma in semiconductor process equipment and other equipment. The control module serves as the master station in the communication system, and the DC module and its peripherals serve as slave stations in the communication system, and communicate based on the communication method provided in the implementation mode of this specification. The various peripherals integrated in the DC module include but are not limited to ADC (Analog-to-Digital Converter), DAC (Digital-to-Analog Converter) and EEPROM (Electrically Erasable Programmable Read-Only Memory). In addition, the control module can also control and monitor the RF module through the main control loop. Taking the SPI communication protocol as an example, during the communication process between the control module and the DC module, the SPI master (SPI Master) encodes multiple groups of master discrete signals sent to multiple slaves into master integrated signals, converts the master integrated signals, obtains master integrated signals in the form of differential signals (SPI_P and SPI_N represent two differential signals), and transmits them to the controller. After receiving the master integrated signals in the form of differential signals, the controller converts the signals to obtain the master integrated signals in the form of single-ended signals, and aligns and decodes them to obtain multiple groups of master discrete signals and send them to each slave.

[0128] During operation, the DC module receives AC power, converts it into DC power under the control of the control module and outputs it to the RF module, and the RF module outputs RF energy based on the input DC power. The RF module may include multiple analog-to-digital converters (such as ADC1 and ADC2).

[0129] Correspondingly, an embodiment of the present specification also provides a semiconductor process equipment, including a process chamber and a radio frequency power supply as described in any of the above embodiments, the number of the process chambers can be one or more, and the radio frequency power supply can be used to provide radio frequency energy to the process chamber to meet the requirements of the process chamber to perform processes such as etching.

[0130] Exemplary Computing Devices

[0131] Another embodiment of the present application further provides a computing device, see Fig.10 As shown, an exemplary embodiment of the present specification also provides a computing device, including: a memory and a processor, the memory storing a computer program, and the processor executing the computer program when executing the computer program performs the steps of the communication method according to various embodiments of the present specification described in the above embodiments of the present specification.

[0132] The internal structure of the computing device can be as follows Fig.10 As shown, the computing device includes a processor, a memory, a network interface and an input device connected through a system bus. Among them, the processor of the computing device is used to provide computing and control capabilities. The memory of the computing device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computing device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, the steps of the communication method according to various embodiments of the present specification described in the above embodiments of the present specification are performed.

[0133] The processor may include a main processor and may also include a baseband chip, a modem, etc.

[0134] The memory stores a program for executing the technical solution of the present invention, and may also store an operating system and other key services. Specifically, the program may include a program code, and the program code includes computer operation instructions. More specifically, the memory may include a read-only memory (ROM), other types of static storage devices that can store static information and instructions, a random access memory (RAM), other types of dynamic storage devices that can store information and instructions, a disk storage, a flash, and the like.

[0135] The processor may be a general-purpose processor, such as a general-purpose central processing unit (CPU), a microprocessor, etc., or an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the program of the scheme of the present invention. It may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component.

[0136] The input device may include a device for receiving data and information input by a user, such as a keyboard, a mouse, a camera, a scanner, a light pen, a voice input device, a touch screen, a pedometer, or a gravity sensor.

[0137] Output devices may include means that allow information to be output to a user, such as display screens, printers, speakers, etc.

[0138] The communication interface may include using any transceiver or the like to communicate with other devices or communication networks, such as Ethernet, Radio Access Network (RAN), Wireless Local Area Network (WLAN), etc.

[0139] The processor executes the program stored in the memory and calls other devices, which can be used to implement each step of any communication method provided in the above embodiments of the present application.

[0140] The computing device may also include a display component and a voice component. The display component may be a liquid crystal display or an electronic ink display. The input device of the computing device may be a touch layer covered on the display component, or a button, trackball or touchpad provided on the housing of the computing device, or an external keyboard, touchpad or mouse.

[0141] Those skilled in the art will understand that Fig.10 The structure shown in the figure is only a block diagram of a part of the structure related to the scheme of this specification, and does not constitute a limitation on the computing device to which the scheme of this specification is applied. The specific computing device may include more or fewer components than shown in the figure, or combine certain components, or have a different arrangement of components.

[0142] Exemplary computer program products and storage media

[0143] In addition to the above-mentioned methods and devices, the communication method provided in the embodiments of this specification may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to execute the steps of the communication method according to various embodiments of this specification described in the above "Exemplary Method" section of this specification.

[0144] The computer program product may be written in any combination of one or more programming languages ​​to write program code for performing the operations of the embodiments of the present specification, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0145] In addition, an embodiment of the present specification also provides a computer-readable storage medium on which a computer program is stored, and the computer program is executed by a processor to execute the steps of the communication method according to various embodiments of the present specification described in the above "Exemplary Method" section of the present specification.

[0146] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this specification can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0147] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0148] The above-mentioned embodiments only express several implementation methods of this specification, and the descriptions are relatively specific and detailed, but they cannot be understood as limiting the scope of the solutions provided by the embodiments of this specification. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of this specification, which all belong to the protection scope of this specification. Therefore, the protection scope of the patent of this specification shall be based on the attached claims.

Claims

1. A communication method, It is characterized in that A master station applied to a communication system, the communication system further comprising: a controller and a plurality of slave stations, the communication method comprising: Sending a codec signal and a group of master station integrated signals to the controller; wherein the codec signal includes: a reference clock and multiple selection signals, multiple value state combinations of the multiple selection signals correspond to the multiple slave stations respectively, and the reference clock is used as a clock signal for the encoding and decoding process; the group of master station integrated signals is obtained by encoding multiple groups of master station discrete signals based on the codec signal, and the group of master station integrated signals is used to instruct the controller to decode the group of master station integrated signals based on the codec signal to obtain the multiple groups of master station discrete signals, and distribute the multiple groups of master station discrete signals to the multiple slave stations; The multiple groups of master station discrete signals correspond one-to-one to the multiple slave stations, and the master station discrete signals are used to instruct the slave stations corresponding to the master station discrete signals to operate based on the master station discrete signals.

2. The method according to claim 1, It is characterized in that The multiple groups of master station discrete signals include multiple groups of first data signals and multiple groups of function signals, the multiple groups of first data signals correspond one-to-one to the multiple slave stations, the first data signal includes data sent by the master station to the slave station corresponding to the first data signal; the multiple groups of function signals correspond one-to-one to the multiple slave stations, the function signal is used to drive the slave station corresponding to the function signal to work, and / or enable the slave station corresponding to the function signal to receive the first data signal; The group of master station integrated signals includes: a master station data integrated signal and a function integrated signal. The master station data integrated signal is obtained by encoding the multiple groups of first data signals, and the function integrated signal is obtained by encoding the multiple groups of function signals.

3. The method according to claim 1, It is characterized in that The process of encoding a plurality of groups of master station discrete signals based on the codec signal to obtain the group of master station integrated signals includes: At a first edge of the reference clock, determining a target slave station according to a combination of value states of the plurality of selection signals at a time corresponding to the first edge; The master station discrete signal corresponding to the target slave station is sampled, and the sampling results are spliced ​​into the master station integrated signal according to the order of the first edges.

4. The method according to claim 1, It is characterized in that The process of encoding a plurality of groups of master station discrete signals based on the codec signal to obtain the group of master station integrated signals includes: At a first edge of the reference clock, the codec signal and the plurality of groups of master station discrete signals are respectively substituted into a first preset formula to calculate the group of master station integrated signals; The first preset formula includes: MS=(MS_0&([SN]==0))||(MS_1&([SN]==1))||...||(MS_N&([SN]==N)); Among them, MS represents the master station integrated signal, MS_i represents the master station discrete signal corresponding to the master station i, i=0,1,2…N, Si represents the i-th value state combination of multiple selection signals, [Si]==i represents that the i-th value state combination of the multiple selection signals corresponds to the slave station i, & represents the AND operation, || represents the OR operation.

5. The method according to claim 1, It is characterized in that Also includes: In response to a slave station integrated signal sent by the controller, the slave station integrated signal is decoded based on the codec signal to obtain multiple groups of slave station discrete signals. The slave station integrated signal is obtained by the controller encoding the multiple groups of slave station discrete signals based on the codec signal. The multiple groups of slave station discrete signals correspond one-to-one to multiple slave stations. The slave station discrete signal includes a data signal sent to the master station by the slave station corresponding to the slave station discrete signal.

6. The method according to claim 5, It is characterized in that The decoding of the slave station integrated signal based on the codec signal comprises: At a second edge of the reference clock, the codec signal and the slave station integrated signal are substituted into a second preset formula to calculate the multiple groups of slave station discrete signals; The second preset formula includes: MS_i'=(MS'&([Si]==i)); wherein MS' represents the slave station integrated signal, MS_i' represents the slave station discrete signal corresponding to the master station i, i=0,1,2…N, Si represents the i-th value state combination of multiple selection signals, [Si]==i represents that the i-th value state combination of the multiple selection signals corresponds to the slave station i, & represents an AND operation.

7. The method according to claim 2, It is characterized in that The functional signals include: a clock drive signal and a chip select signal; The clock driving signal is used to drive the slave station corresponding to the clock driving signal to operate; The chip select signal is used to enable the slave station corresponding to the function signal to receive the first data signal.

8. The method according to any one of claims 1 to 7, It is characterized in that Sending a set of master station integration signals to the controller includes: converting the set of master station integrated signals into a differential signal form, and sending the set of master station integrated signals in the differential signal form to the controller; The set of master station integrated signals is also used to instruct the controller to convert the set of master station integrated signals in the form of differential signals into single-ended signals.

9. The method according to any one of claims 1 to 7, It is characterized in that The set of master station integrated signals is also used to instruct the controller to perform error checking on the set of master station integrated signals.

10. A communication method, It is characterized in that A controller applied to a communication system, the communication system further comprising: a master station and a plurality of slave stations, the communication method comprising: Receive a coding and decoding signal and a group of master station integrated signals sent by the master station, wherein the coding and decoding signal includes: a reference clock and multiple selection signals, multiple value state combinations of the multiple selection signals correspond to multiple slave stations respectively, and the reference clock is used as a clock signal for the coding and decoding process; Decoding the set of master station integrated signals based on the codec signal to obtain multiple sets of master station discrete signals, and distributing the multiple sets of master station discrete signals to multiple slave stations; the set of master station integrated signals is obtained by encoding the multiple sets of master station discrete signals by the master station based on the codec signal; The multiple groups of master station discrete signals correspond one-to-one to the multiple slave stations, and the master station discrete signals are used to instruct the slave stations corresponding to the master station discrete signals to operate based on the master station discrete signals.

11. A communication system, It is characterized in that include: A controller, a master station and multiple slave stations; among them, The master station is configured to: send a codec signal and a set of master station integrated signals to the controller; wherein the codec signal includes: a reference clock and a plurality of selection signals, a plurality of value state combinations of the plurality of selection signals respectively correspond to a plurality of the slave stations, and the reference clock is used as a clock signal for the encoding and decoding process; the set of master station integrated signals is obtained by encoding a plurality of sets of master station discrete signals based on the codec signal; The multiple groups of master station discrete signals correspond one-to-one to the multiple slave stations, and the master station discrete signals are used to instruct the substations corresponding to the master station discrete signals to work based on the master station discrete signals; The controller is configured to: receive the codec signal sent by the master station, receive the group of master station integrated signals, decode the group of master station integrated signals based on the codec signal to obtain the multiple groups of master station discrete signals, and distribute the multiple groups of master station discrete signals to the multiple slave stations.

12. The system according to claim 11, It is characterized in that The controller is further used to encode multiple groups of slave station discrete signals based on the codec signal to obtain slave station integrated signals, wherein the multiple groups of slave station discrete signals correspond to multiple slave stations one by one, and the slave station discrete signals include data signals sent to the master station by the slave stations corresponding to the slave station discrete signals. The master station is further configured to, in response to the slave station integrated signal sent by the controller, decode the slave station integrated signal based on the codec signal to obtain the multiple groups of slave station discrete signals.

13. A radio frequency power supply, It is characterized in that include: control module, RF module and multiple DC modules; wherein, The control module is configured to: control the plurality of DC modules to generate a plurality of DC power supplies; The radio frequency module is configured to: output radio frequency energy based on the multiple DC power supplies; The control module communicates with the plurality of DC modules based on the communication method according to any one of claims 1 to 9; The DC module communicates with the control module based on the communication method according to claim 10.

14. A semiconductor process equipment, It is characterized in that include: A process chamber and a radio frequency power supply as claimed in claim 13.

15. A computer-readable storage medium, It is characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the communication method according to any one of claims 1 to 10 is implemented.

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