Uninterruptible power supply device

Abstract

When the processor (500) receives the execution data, the processor (500) executes the execution program on the basis of the execution data. When the processor (500) receives the update data, the processor (500) writes the update data to the memory (502) and updates the update program. When the programmable device (50) is reset after the update of the update program is completed, the processor (500) ends the execution program and starts the update program as the execution program.

Description

Technical Field

[0001] The present disclosure relates to an uninterruptible power supply device. Background Art

[0002] Japanese Patent Publication No. 2018-182872 (Patent Document 1) discloses a power supply system, which comprises: a plurality of power supply devices having a slave control device; and a master control device that applies instructions to the slave control circuits of the plurality of power supply devices. In this power supply system, each slave control device is composed of a programmable device, including a high-speed serial communication unit connected to the master control device. Each slave control device receives an instruction value, etc. from the master control device via the high-speed serial communication unit, and sends the operating status of the power supply device to the master control device.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2018-182872 Summary of the invention

[0006] Problems that the invention will solve

[0007] In the above power supply system, by adopting serial communication for data exchange between the master control device and the plurality of slave control devices, the number of wires connected between the master control device and the plurality of slave control devices can be reduced.

[0008] However, when updating the software (program) of the programmable device installed in each slave control device, it is necessary to connect a computer to each slave control device via a programming cable and download update data from the computer to the programmable device.

[0009] Therefore, in a power supply device having a large-scale and complicated structure, it is necessary to design the configuration of the control substrate on which the programmable device is mounted in consideration of the ease of execution of the update process. In addition, as the number of power supply devices mounted on the uninterruptible power supply device increases, there is a risk that the update process will take a lot of time and labor. Moreover, the update process needs to be performed in a state where the normal communication that operates the power supply device is cut off, so the power supply device needs to be continuously stopped during the update process.

[0010] In addition, when a programmable device that requires a reset operation when updating is used, it is necessary to manually reset each programmable device or to separately provide a transmission line for transmitting a reset signal to each programmable device.

[0011] Therefore, a main object of the present disclosure is to provide an uninterruptible power supply device capable of efficiently executing program update with a simplified configuration.

[0012] Means for solving problems

[0013] An uninterruptible power supply device of one embodiment of the present disclosure includes a plurality of modules, a main controller, a plurality of controllers, and a serial communication line. The main controller controls the plurality of modules. The plurality of controllers respectively include a programmable device, and the plurality of modules are driven respectively by communicating with the main controller. The serial communication line connects the main controller and the plurality of controllers in communication. The programmable device includes a memory and a processor. The memory stores an execution program and an update program. The processor drives the corresponding module by executing the execution program. The main controller can send any one of execution data and update data to the programmable device via the serial communication line during the execution of the execution program. The execution data is data used in the execution of the execution program. The update data is data used in the update of the update program. When the processor receives the execution data, it executes the program based on the execution data. When the processor receives the update data, it writes the update data into the memory and updates the update program. When the programmable device is reset after the update of the update program is completed, the processor terminates the execution program and starts the update program as the execution program.

[0014] Effects of the Invention

[0015] According to the present disclosure, an uninterruptible power supply device capable of efficiently executing program update with a simplified configuration can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a circuit block diagram showing the configuration of the uninterruptible power supply device according to the first embodiment.

[0017] Figure 2 This is a block diagram showing the configuration of a main controller and a gate driver.

[0018] Figure 3 This is a diagram for explaining the replacement of the execution program at the time of resetting.

[0019] Figure 4 This is a flowchart illustrating the sequence of processing performed by the gate driver.

[0020] Figure 5 This is a circuit block diagram showing the configuration of an uninterruptible power supply device according to a second embodiment.

[0021] Figure 6 Yes means Figure 5 The circuit block diagram of the bypass module and the power module shown.

[0022] Figure 7 This is a block diagram showing the configuration of a main controller and controllers. DETAILED DESCRIPTION

[0023] Hereinafter, the embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In addition, in the following, the same reference numerals are attached to the same or corresponding parts in the drawings, and the description thereof will not be repeated in principle.

[0024] [Implementation Method 1]

[0025] Figure 1 1 is a circuit block diagram showing the structure of the uninterruptible power supply device 100 according to the first embodiment. The uninterruptible power supply device 100 according to the first embodiment converts the three-phase AC power supplied from the commercial AC power supply 30 into DC power, and then converts the DC power into three-phase AC power and supplies it to the load 31. Figure 1 In the figure, for simplification of the drawings and the description, only the circuit portion corresponding to one phase (for example, U phase) among the three phases (U phase, V phase, W phase) is shown.

[0026] Reference Figure 1 The uninterruptible power supply device 100 includes an AC input terminal T11, a battery terminal T12, an AC output terminal T13, and a bypass input terminal T14. The AC input terminal T11 receives AC power of a commercial frequency from a commercial AC power source 30. The bypass input terminal T14 receives AC power of a commercial frequency from a bypass AC power source 33. The bypass AC power source 33 may be a commercial AC power source or a generator.

[0027] The battery terminal T12 is connected to the battery 32. The battery 32 stores DC power. The battery 32 corresponds to an embodiment of a "power storage device". A capacitor may be connected instead of the battery 32. The AC output terminal T13 is connected to the load 31. The load 31 is driven by AC power.

[0028] The uninterruptible power supply device 100 also includes electromagnetic contactors S1, S2, S3, S4, current detectors 12, 13, capacitors 1, 5, 10, reactors 2, 9, a converter 4, a bidirectional chopper 7, an inverter 8, a semiconductor switch 20, detectors 60, 62, 64, gate drivers 66, 68, 70, a switch interface (I / F) 72, an operating unit 24 and a main controller 22.

[0029] Electromagnetic contactors S1, S2, S3, S4, current detectors 12, 13, capacitors 1, 5, 10, reactors 2, 9, converter 4, bidirectional chopper 7, inverter 8, and semiconductor switch 20 correspond to an embodiment of a "module", respectively. Detectors 60, 62, 64, gate drivers 66, 68, 70, and switch I / F 72 correspond to an embodiment of a "controller", respectively.

[0030] The first terminal of the electromagnetic contactor S1 is connected to the AC input terminal T11, and the second terminal (node ​​N1) of the electromagnetic contactor S1 is connected to the first terminal of the reactor 2. The second terminal of the reactor 2 is connected to the AC terminal 4a of the converter 4. The capacitor 1 is connected between the node N1 and the neutral point NP. The neutral point NP receives the ground voltage, for example. The electromagnetic contactor S1 is turned on when the uninterruptible power supply device 100 is used, and is turned off when the uninterruptible power supply device 100 is maintained, for example.

[0031] The detector 60 detects the instantaneous value of the AC input voltage Vi appearing at the node N1. The current detector 12 detects the AC input current Ii flowing through the node N1, and outputs a signal Iif indicating the detected value to the detector 60. The detector 60 is connected to the main controller 22 via the communication line 15. The communication line 15 is configured to transmit data bidirectionally by serial communication. The communication line 15 corresponds to an embodiment of a “serial communication line”. The detector 60 applies a signal indicating the detected value of the instantaneous value of the AC input voltage Vi and a signal Iif indicating the detected value of the AC input current Ii to the main controller 22 via the communication line 15.

[0032] The capacitor 1 and the reactor 2 constitute an AC filter 3 that allows AC power of a commercial frequency to pass therethrough and prevents a current of a switching frequency generated by the converter 4 from passing through the commercial AC power source 30 .

[0033] The converter 4 is controlled by the main controller 22, and when AC power is normally supplied from the commercial AC power source 30, the converter 4 converts the AC power into DC power and outputs it to the DC line 6. When AC power is no longer normally supplied from the commercial AC power source 30 (when the commercial AC power source 30 fails), the operation of the converter 4 is stopped. The output voltage of the converter 4 can be controlled to a desired value.

[0034] Specifically, the converter 4 has a plurality of switching elements (not shown). A gate driver (GD) 66 is connected to the plurality of switching elements. The gate driver 66 is connected to the main controller 22 via the communication line 15 and drives the plurality of switching elements according to a gate signal applied from the main controller 22.

[0035] The capacitor 5 is connected to the DC line 6 to smooth the voltage of the DC line 6. The instantaneous value of the DC voltage VD appearing in the DC line 6 is detected by the detector 62. The DC line 6 is connected to the high voltage side node of the bidirectional chopper 7, and the low voltage side node of the bidirectional chopper 7 is connected to the battery terminal T12 via the electromagnetic contactor S2.

[0036] The electromagnetic contactor S2 is turned on when the uninterruptible power supply device 100 is used, and is turned off when the uninterruptible power supply device 100 and the battery 32 are maintained, for example. The instantaneous value of the voltage VB between the terminals of the battery 32 appearing at the battery terminal T12 is detected by the detector 62. The detector 62 is connected to the main controller 22 via the communication line 15. The detector 62 applies a signal indicating the detection value of the instantaneous value of the DC voltage VD and the detection value of the instantaneous value of the voltage VB between the terminals of the battery 32 to the main controller 22 via the communication line 15.

[0037] The bidirectional chopper 7 is controlled by the main controller 22 , and normally stores the DC power generated by the converter 4 in the battery 32 , and supplies the DC power of the battery 32 to the inverter 8 via the DC line 6 when the commercial AC power source 30 fails.

[0038] When the bidirectional chopper 7 stores DC power in the battery 32, the DC voltage VD of the DC line 6 is stepped down and applied to the battery 32. When the bidirectional chopper 7 supplies the DC power of the battery 32 to the inverter 8, the inter-terminal voltage VB of the battery 32 is stepped up and output to the DC line 6. The DC line 6 is connected to an input node of the inverter 8.

[0039] Specifically, the bidirectional chopper 7 has a plurality of switching elements (not shown). A gate driver (GD) 68 is connected to the plurality of switching elements. The gate driver 68 is connected to the main controller 22 via the communication line 15 and drives the plurality of switching elements according to a gate signal applied from the main controller 22.

[0040] The inverter 8 is controlled by the main controller 22, and converts the DC power supplied from the converter 4 or the bidirectional chopper 7 via the DC line 6 into AC power of a commercial frequency and outputs the converted power. That is, the inverter 8 converts the DC power supplied from the converter 4 via the DC line 6 into AC power in normal times, and converts the DC power supplied from the battery 32 via the bidirectional chopper 7 into AC power when the commercial AC power source 30 fails. The output voltage of the inverter 8 can be controlled to a desired value.

[0041] Specifically, the inverter 8 has a plurality of switching elements (not shown). A gate driver (GD) 70 is connected to the plurality of switching elements. The gate driver 70 is connected to the main controller 22 via a communication line 15 and drives the plurality of switching elements according to a gate signal applied from the main controller 22.

[0042] The AC terminal 8a of the inverter 8 is connected to the first terminal of the reactor 9, the second terminal (node ​​N2) of the reactor 9 is connected to the first terminal of the electromagnetic contactor S3, and the second terminal (node ​​N3) of the electromagnetic contactor S3 is connected to the AC output terminal T13. The capacitor 10 is connected between the node N2 and the neutral point NP. The neutral point NP receives a ground voltage, for example.

[0043] The current detector 13 detects the instantaneous value of the output current Io of the inverter 8, and applies a signal Iof indicating the detected value to the detector 64. The detector 64 detects the instantaneous value of the AC output voltage Vo appearing at the node N2.

[0044] The detector 64 is connected to the main controller 22 via the communication line 15. The detector 64 applies a signal indicating a detected value of the instantaneous value of the AC output voltage Vo and a signal Iof indicating a detected value of the output current Io to the main controller 22 via the communication line 15.

[0045] The reactor 9 and the capacitor 10 constitute an AC filter 11 that allows the commercial frequency AC power generated by the inverter 8 to pass through the AC output terminal T13 and prevents the switching frequency current generated by the inverter 8 from passing through the AC output terminal T13 .

[0046] The electromagnetic contactor S3 is controlled by the main controller 22 , and is turned on in the inverter power supply mode for supplying AC power generated by the inverter 8 to the load 31 , and is turned off in the bypass power supply mode for supplying AC power from the bypass AC power supply 33 to the load 31 .

[0047] The semiconductor switch 20 includes a pair of thyristors connected in anti-parallel to each other, and is connected between the bypass input terminal T14 and the node N3. The electromagnetic contactor S4 is connected in parallel with the semiconductor switch 20. The semiconductor switch 20 is controlled by the main controller 22, and is normally off. When the inverter 8 fails, it is immediately turned on to supply the AC power from the bypass AC power supply 33 to the load 31. The semiconductor switch 20 is turned off after a predetermined time has passed since it was turned on.

[0048] The electromagnetic contactor S4 is turned off in the inverter power supply mode in which the AC power generated by the inverter 8 is supplied to the load 31 , and is turned on in the bypass power supply mode in which the AC power from the bypass AC power source 33 is supplied to the load 31 .

[0049] In addition, the electromagnetic contactor S4 is turned on when the inverter 8 fails, and the AC power from the bypass AC power supply 33 is supplied to the load 31. That is, when the inverter 8 fails, the semiconductor switch 20 is immediately turned on for a predetermined time, and the electromagnetic contactor S4 is turned on. This is to prevent the semiconductor switch 20 from being overheated and damaged.

[0050] Specifically, the switch I / F 72 is connected to the electromagnetic contactors S3, S4 and the semiconductor switch 20. The switch I / F 72 is connected to the main controller 22 via the communication line 15. The switch I / F 72 turns on or off the electromagnetic contactors S3, S4 and the semiconductor switch 20 according to the on command or off command given from the main controller 22.

[0051] The operation unit 24 includes a plurality of buttons operated by the user of the uninterruptible power supply device 100, a display that displays various information, etc. The user operates the operation unit 24 to turn the power supply of the uninterruptible power supply device 100 on and off, or selects either the bypass power supply mode or the inverter power supply mode.

[0052] Furthermore, the operation unit 24 is connected to the communication network NW, and can exchange data with the external device 35 of the uninterruptible power supply 100 via the communication network NW (see Figure 2 ). The external device 35 includes, for example, a PC (Personal Computer) or a server. The operation unit 24 may also include a USB connector. In this case, the operation unit 24 exchanges data with the external device 35 via the USB connector.

[0053] The user directly operates the operation unit 24, or the user remotely operates the operation unit 24 using the external device 35, thereby executing a start instruction for updating the programs installed in the main controller 22, the detectors 60, 62, 64, the gate drivers 66, 68, 70, and the switch I / F 72, and a reset instruction for each device after the update is completed. The program update process will be described in detail later.

[0054] Main controller 22 controls the entire uninterruptible power supply 100 based on signals from operation unit 24 and signals from detectors 60, 62, 64. That is, main controller 22 detects whether a power outage has occurred based on the detected value of AC input voltage Vi, and controls converter 4 and inverter 8 in synchronization with the phase of AC input voltage Vi.

[0055] Main controller 22 controls converter 4 based on AC input voltage Vi, AC input current Ii, and DC voltage VD. Main controller 22 normally controls converter 4 so that DC voltage VD becomes a desired target voltage VDT, and stops converter 4 when commercial AC power source 30 fails.

[0056] In addition, the main controller 22 controls the bidirectional chopper 7 based on the DC voltage VD and the battery voltage VB. The main controller 22 normally controls the bidirectional chopper 7 so that the battery voltage VB becomes the desired target battery voltage VBT, and controls the bidirectional chopper 7 so that the DC voltage VD becomes the desired target voltage VDT when the commercial AC power source 30 fails.

[0057] Furthermore, the main controller 22 controls the inverter 8 based on the AC output current Io and the AC output voltage Vo so that the AC output voltage Vo becomes a desired target voltage VoT.

[0058] Control of the converter 4 , bidirectional chopper 7 and inverter 8 is achieved by the main controller 22 , detectors 60 , 62 , 64 , gate drivers 66 , 68 , 70 and switch I / F 72 respectively executing pre-installed programs and exchanging data via the communication line 15 .

[0059] That is, the detectors 60, 62, 64, the gate drivers 66, 68, 70, and the switch I / F 72 correspond to an embodiment of a "controller" that controls the operation of each module of the uninterruptible power supply device 100 under the control of the main controller 22 that controls the entire uninterruptible power supply device 100. In this embodiment, data can be exchanged between the main controller and each controller through serial communication. Thus, even if the number of modules increases, the increase in the number of wirings connected to the main controller 22 can be suppressed.

[0060] Next, the configurations of the main controller 22 and the detectors 60, 62, 64, the gate drivers 66, 68, 70, and the switch I / F 72 are described. The detectors 60, 62, 64, the gate drivers 66, 68, 70, and the switch I / F 72 have the same basic configurations, so in the following description, the configuration of the gate driver 66 is representatively shown.

[0061] Figure 2 2 is a block diagram showing the configuration of the main controller 22 and the gate driver 66. Figure 2 The main controller 22 and the gate driver 66 are connected to each other in a bidirectional manner through a communication line 15. The communication line 15 is configured to transmit data bidirectionally through serial communication. The communication line 15 includes a communication line 15A for transmitting data from the main controller 22 to the gate driver 66 and a communication line 15B for transmitting data from the gate driver 66 to the main controller 22.

[0062] The main controller 22 and the gate driver 66 control the converter 4 in cooperation with each other by executing a program stored in advance in a memory.

[0063] The main controller 22 includes a programmable device 40 and a serial communication I / F 46 .

[0064] The programmable device 40 includes a processor 400, a memory 402, an input / output (I / O) circuit 404, and a communication I / F 406. The processor 400, the memory 402, the I / O circuit 404, and the communication I / F 406 can mutually transmit and receive signals via a bus not shown. The programmable device 40 can also be implemented as a control substrate including the processor 400.

[0065] The processor 400 is composed of at least one integrated circuit, which may be composed of, for example, at least one CPU (Central Processing Unit), at least one MPU (Micro Processing Unit), at least one FPGA (Field Programmable Gate Array), or a combination thereof.

[0066] The memory 402 includes a ROM (Read Only Memory) and a RAM (Random Access Memory). The processor 400 controls the operation of the uninterruptible power supply device 100 by executing various programs. The processor 400 reads the program from the ROM to the RAM. The RAM functions as a working memory and temporarily stores various data required for executing the program. The I / O circuit 404 is connected to the operation unit 24 and can send and receive signals to and from the operation unit 24.

[0067] The communication I / F 406 is an interface for exchanging data with the gate driver 66 .

[0068] The programmable device 40 generates a transmission signal (transmission data) T1, and outputs the generated transmission signal T1 to the driver 460 in the serial communication I / F 46. The programmable device 40 has a parallel / serial converter that converts the transmission signal T1, which is parallel data, into serial data.

[0069] The programmable device 40 sends data (execution data described later) for the programmable device 50 to drive the converter 4 or data (update data described later) for updating the programmable device 50 to the programmable device 50. These data are sent from the operation unit 24 to the programmable device 40. In addition, a dedicated programmable device for sending update data may be provided separately from the programmable device 40.

[0070] The serial communication I / F 46 is a communication interface for exchanging various data between the main controller 22 and the gate driver 66 by serial communication using the communication line 15. The serial communication I / F 46 includes a driver 460 and a receiver 462.

[0071] The driver 460 is applied with a transmission signal output from the programmable device 40. The driver 460 transmits data corresponding to the transmission signal to the gate driver 66 via the communication line 15A.

[0072] The receiver 462 receives the data transmitted from the gate driver 66 via the communication line 15B, and outputs the data as a reception signal to the programmable device 40. The receiver 462 outputs the data from the gate driver 66 to the programmable device 40 as a reception signal R1.

[0073] The programmable device 40 receives the reception signal R1 output from the receiver 462, and performs a predetermined process based on the input reception signal R1. The programmable device 40 has a serial / parallel converter that converts the reception signal R1, which is serial data, into parallel data.

[0074] The gate driver 66 includes a programmable device 50 and a serial communication I / F 56. The programmable device 50 includes a processor 500 and a memory 502. The memory 502 includes an execution program storage area 522, an update program storage area 521, and an instruction information storage area 524. The update program storage area 521 corresponds to an embodiment of the "second storage area". The execution program storage area 522 corresponds to an embodiment of the "first storage area".

[0075] The execution program storage area 522 stores an execution program (described later). The update program storage area 521 stores an update program (described later). The instruction information storage area 524 stores instruction information (described later).

[0076] The processor 500 and the memory 502 can transmit and receive signals to and from each other via a bus (not shown). The programmable device 50 can also be implemented as a control substrate including the processor 500 and the memory 502.

[0077] The processor 500 is composed of at least one integrated circuit, which may be composed of, for example, at least one CPU, at least one MPU, at least one FPGA, or a combination thereof.

[0078] The processor 500 drives the switching elements constituting the converter 4 by executing various programs. The processor 500 expands the program (executable program, etc.) stored in the ROM in the RAM and executes it. The program stored in the ROM describes various processes executed by the processor 500. The RAM functions as a working memory and temporarily stores various data required for executing the program.

[0079] The programmable device 50 has a parallel / serial converter that converts the transmission signal T2, which is parallel data, into serial data.

[0080] The transmission signal T2 from the processor 500 is output to the driver 562 in the serial communication I / F 56. The serial communication I / F 56 is a communication interface for exchanging various data between the gate driver 66 and the main controller 22 by serial communication using the communication line 15. The serial communication I / F 56 has a receiver 560 and a driver 562.

[0081] The receiver 560 receives data transmitted from the main controller 22 via the communication line 15A, and outputs the data as a reception signal to the processor 500. The receiver 560 outputs the data transmitted from the main controller 22 to the processor 500 as a reception signal (reception data) R2.

[0082] The processor 500 receives the reception signal R2 output from the receiver 560 and performs a predetermined process based on the input reception signal R2. The processor 500 includes a serial / parallel converter that converts the reception signal R2, which is serial data, into parallel data.

[0083] The driver 562 is applied with a transmission signal (transmission data) T2 outputted from the programmable device 50. The driver 562 transmits data corresponding to the transmission signal to the main controller 22 via the communication line 15B.

[0084] As described above, the memory 502 stores the execution program in the execution program storage area 522 and the update program in the update program storage area 521. The processor 500 drives the converter 4 by executing the execution program.

[0085] The programmable device 40 of the main controller 22 can send either execution data or update data as a reception signal R2 to the programmable device 50 via the communication line 15 during the execution of the execution program. The execution data is data used in the execution of the execution program. When the processor 500 receives the execution data, it executes the execution program based on the execution data and drives the converter 4. The execution data includes commands, values, etc. for causing the execution program to operate.

[0086] The update data is data used to update the update program. When the processor 500 receives the update data, it writes the update data into the memory 502 to update the update program. The transmission of the update data is started by the user operating the operation unit 24 (an update start instruction).

[0087] For example, it is assumed that execution data is sent from programmable device 40 to programmable device 50 at a predetermined period (for example, every 10 msec). Update data can be sent from programmable device 40 to programmable device 50 at a timing when execution data is not sent. For example, the first half 5 msec of 10 msec can be used to send execution data, and the second half 5 msec can be used to send update data. In this way, the program is updated while the converter 4 is driven.

[0088] Both the execution data and the update data are sent using the communication line 15. Therefore, the programmable device 50 of the gate driver 66 can be updated by the main controller 22 without increasing the number of communication lines. Figure 1As shown, the main controller 22 is connected to a plurality of controllers (detectors 60 , 62 , 64 , gate drivers 66 , 68 , 70 , and switch I / F 72 ) via a communication line 15 .

[0089] Therefore, by using the communication line 15 to form a communication path for updating between the main controller 22 and each controller, the main controller 22 can update the controller while operating all modules (electromagnetic contactors S1, S2, S3, S4, current detectors 12, 13, capacitors 1, 5, 10, reactors 2, 9, converter 4, bidirectional chopper 7, inverter 8 and semiconductor switch 20).

[0090] When the updating of the update program is completed (the rewriting of the update program is completed), the processor 500 stores instruction information (flag, etc.) for instructing the switching of the program in the instruction information storage area 524 of the memory 502 .

[0091] When the programmable device 50 is reset after the updating of the update program is completed, the processor 500 terminates the execution program and starts the update program as the execution program. The user can confirm whether the updating is completed on the operation unit 24.

[0092] The programmable device 40 may transmit reset instruction data for resetting the programmable device 50 to the programmable device 50 via the communication line 15 .

[0093] In the present embodiment, the programmable device 50 is reset by operating a reset switch provided in the programmable device 50. Alternatively, the programmable device 50 resets itself when receiving reset instruction data. The reset instruction data is transmitted by operating the operation unit 24 by the user.

[0094] Figure 3 500 is a diagram for explaining the replacement of the execution program at the time of reset. When the programmable device 50 is reset and the instruction information is stored in the memory 502, the processor 500 terminates the execution program and starts the update program as the execution program. Specifically, Figure 3 As shown, the executable program stored in the executable program storage area 522 is stored in the update program storage area 521 as an update program, and on the other hand, the update program stored in the update program storage area 521 is stored in the executable program storage area 522 as an executable program.

[0095] In addition, when the programmable device 50 is reset and the indication information is stored in the memory 502, the processor 500 may use the program stored in the update program storage area 521 as an execution program and the program stored in the execution program storage area 522 as an update program (as an update object) instead of replacing (rewriting) the programs as described above.

[0096] The following description will be given using a flowchart. Figure 4 This is a flowchart for explaining the procedure of the process executed by the gate driver 66. This process starts when the programmable device 50 of the gate driver 66 is started by supplying power or when the programmable device 50 is restarted by resetting.

[0097] The processor 500 of the programmable device 50 determines in step (hereinafter simply referred to as step S) 101 whether the instruction information is stored in the instruction information storage area 524 of the memory 502 .

[0098] When the instruction information is stored in the instruction information storage area 524 of the memory 502 (YES in S101), the processor 500 generates an instruction by Figure 3 According to the method described in , the execution program stored in the execution program storage area 522 and the update program stored in the update program storage area 521 are replaced (S102).

[0099] On the other hand, when the instruction information is not stored in the instruction information storage area 524 of the memory 502 (NO in S101), the processor 500 does not replace the execution program and the update program.

[0100] Then, the execution program is executed through S103 to S111 until the programmable device 50 is reset or the power supply to the programmable device 50 is cut off. If the instruction information is stored (update completed and reset), the updated program is executed. The processor 500 performs a process of initializing the programmable device 50 in S103.

[0101] When processor 500 receives the execution data (YES in S104), it executes the execution program based on the execution data (S105), and advances the process to S110. Thus, the process of driving converter 4 is performed.

[0102] When the processor 500 has not received the execution data (NO in S104) but has received the update data (YES in S106), the processor 500 updates the update program stored in the update program storage area 521 by writing the update data (S107). As described above, the transmission of the update data is started by the user's operation on the operation unit 24 (the update start instruction).

[0103] When the updating of the update program is completed (YES in S108), the processor 500 causes the instruction information storage area 524 of the memory 502 to store the instruction information (S109), and advances the process to S110.

[0104] If the processor 500 has not received the reset command data (NO in S110), the processing returns to S104. Thus, the processing of S104 to S110 is repeated until the reset command data is received. In S104 to S110, the execution program is executed when the execution data is received, and the update is performed when the update data is received.

[0105] After the update is completed, the programmable device 50 receives a reset instruction based on the user's operation of the operating unit 24. For example, the programmable device 40 sends an update completion flag to the programmable device 50 at the update completion timing. The user can confirm the completion of the update (update completion flag) in the operating unit 24. Then, the user sends reset instruction data to the programmable device 40 by operating the operating unit 24.

[0106] When the processor 500 receives the reset instruction (YES in S110), it resets the programmable device 50 (S111), and the present process ends (the execution program ends). Then, by resetting the programmable device 50, the programmable device 50 restarts and the present process is executed again. In the case of a reset due to completion of an update, the updated execution program will start.

[0107] Thus, according to the uninterruptible power supply device 100 of the first embodiment, the plurality of modules (converter 4, etc.) include: the converter 4 that converts the AC power supplied from the commercial AC power supply 30 into the DC power; the inverter 8 that converts the DC power supplied from the converter 4 or the battery 32 into the AC power and supplies it to the load; and the bidirectional chopper 7 that selectively performs a charging operation of storing a part of the DC power generated by the converter 4 in the battery 32 and a discharging operation of supplying the DC power of the battery 32 to the inverter 8. The plurality of controllers (gate driver 66, etc.) include a plurality of gate drivers (gate drivers 66, 68, 70) that drive the converter 4, the inverter 8, and the bidirectional chopper 7, respectively.

[0108] In the above configuration, the uninterruptible power supply device 100 includes a plurality of modules (converter 4, etc.), a main controller 22, a plurality of controllers (gate driver 66, etc.), and a communication line 15. The main controller 22 controls a plurality of modules (converter 4, etc.). The plurality of controllers (gate driver 66, etc.) respectively include a programmable device 50, and drive the plurality of modules (converter 4, etc.) respectively through communication with the main controller 22. The communication line 15 connects the main controller 22 and the plurality of controllers (gate driver 66, etc.) in communication. The programmable device 50 includes a memory 502 and a processor 500. The memory 502 stores an execution program and an update program. The processor 500 drives the corresponding module by executing the execution program. The main controller 22 can send any one of execution data and update data to the programmable device 50 via the communication line 15 during the execution of the execution program. The execution data is data used in the execution of the execution program. The update data is data used in the update of the update program. When the processor 500 receives the execution data, it executes the program based on the execution data. When receiving the update data, the processor 500 writes the update data into the memory 502 to update the update program. When the programmable device 50 is reset after the update of the update program is completed, the processor 500 terminates the execution program and starts the update program as the execution program.

[0109] In this way, the shared communication line 15 is used to continue the control of the converter 4 (module) (execution of the execution program) by the execution data while the update program is updated by the update program in parallel. These programs are replaced and started by resetting the programmable device 50 after the update is completed. During the update, it is not necessary to stop the operation of the uninterruptible power supply device 100 (switch to the bypass power supply mode), so the period of stopping the operation of the uninterruptible power supply device 100 can be shortened.

[0110] In particular, if all programmable devices 50 are reset at the same time by user operation after rewriting the programs of all programmable devices 50 via communication line 15, the period of stopping the operation of uninterruptible power supply device 100 can be further shortened. Even in the case where the operation of uninterruptible power supply device 100 is stopped for a long time (e.g., several tens of minutes) for program update and reset, it is sufficient to stop the operation of uninterruptible power supply device 100 for a short time (e.g., several tens of seconds) for reset. Thus, all controllers can be updated efficiently with a simplified structure.

[0111] In addition, the main controller 22 can transmit reset instruction data for resetting the programmable device 50 to the programmable device 50 via the communication line 15. When receiving the reset instruction data, the programmable device 50 resets the programmable device 50.

[0112] Even if a reset operation is required when updating the programmable device 50, it can be reset by sending reset command data via the communication line 15, thereby eliminating the need for manual reset operation or setting up a separate transmission line for sending a reset signal. As a result, all controllers can be updated efficiently with a simplified structure.

[0113] In addition, when the update of the update program is completed, the processor 500 stores the instruction information indicating the switching of the program in the memory 502. When the programmable device 50 is reset and the instruction information is stored in the memory 502, the processor 500 terminates the execution program and starts the update program as the execution program. Thus, by resetting after the update is completed, it is possible to switch to the updated program.

[0114] In addition, the memory 502 includes an execution program storage area 522 and an update program storage area 521. The execution program storage area 522 stores an execution program. The update program storage area 521 stores an update program. When the programmable device 50 is reset, the processor 500 causes the execution program stored in the execution program storage area 522 to be stored in the update program storage area 521 as an update program, and on the other hand, causes the update program stored in the update program storage area 521 to be stored in the execution program storage area 522 as an execution program. By separately providing a storage area dedicated to a program for operating a module and a storage area dedicated to an update program, all controllers can be efficiently updated with a simplified configuration while facilitating software management.

[0115] [Implementation Method 2]

[0116] Figure 5 2 is a circuit block diagram showing the configuration of uninterruptible power supply device 110 according to Embodiment 2. Figure 5 The uninterruptible power supply device 110 of the second embodiment includes a bypass module B0, a plurality of power modules P1 to Pn (n is an integer greater than or equal to 2), a battery 32, and a communication line 15. The bypass module B0 and the power modules P1 to Pn are connected to each other via the communication line 15. The communication line 15 is configured to transmit data bidirectionally via serial communication.

[0117] The bypass module B0 includes an AC input terminal T21 , an AC output terminal T22 , and a switch (not shown) connected between the AC input terminal T21 and the AC output terminal T22 .

[0118] The power modules P1 to Pn are power conversion modules each having a converter and an inverter. In the following description, the power modules P1 to Pn are sometimes collectively referred to as a “power module P.” The power module P has an AC input terminal T11 , a battery terminal T12 , and an AC output terminal T13 .

[0119] The AC input terminal T21 of the bypass module B0 and the AC input terminal T11 of each power module P are connected to the commercial AC power source 30 . The AC input terminal T21 and each AC input terminal T11 receive the commercial frequency AC voltage Vi supplied from the commercial AC power source 30 .

[0120] The battery terminal T12 of each power module P is connected to the battery 32. The battery 32 stores direct current power. Instead of the battery 32, a capacitor may be connected.

[0121] The AC output terminal T22 of the bypass module B0 and the AC output terminal T13 of each power module P are connected to the load 31. That is, the bypass module B0 and the power modules P1 to Pn are connected in parallel with each other between the commercial AC power source 30 and the load 31. The load 31 is driven by the AC power supplied from the bypass module B0 or ​​the power module P.

[0122] This type of uninterruptible power supply device is called a "module-type uninterruptible power supply device". The module-type uninterruptible power supply device has a parallel circuit of power modules corresponding to the capacity of the uninterruptible power supply device. In the present embodiment, for example, when (N-1) power modules are required for the power supply by the uninterruptible power supply device, N power modules are installed to achieve redundancy. As a result, the power quality can be improved. Such a method of achieving redundancy in module units in a single uninterruptible power supply device is also called a "hot-swap method". The hot-swap method refers to a structure that can stop the power module and pull out and insert the power module during the operation of the uninterruptible power supply device. As a result, when the power module fails or is inspected, the power module P can be replaced while the power supply of the uninterruptible power supply device continues. Moreover, as described later, by resetting the power modules P one by one, the software update can be completed without stopping the power supply of the uninterruptible power supply device.

[0123] The uninterruptible power supply device 110 has an inverter power supply mode and a bypass power supply mode. The inverter power supply mode is a mode in which AC power is supplied from the power module P to the load 31. In the inverter power supply mode, the AC power supplied from the commercial AC power supply 30 is converted into DC power by the converter of the power module P, and the DC power is converted into AC power by the inverter and supplied to the load 31. The bypass power supply mode is a mode in which AC power is supplied from the commercial AC power supply 30 to the load 31 via the bypass module B0. In the bypass power supply mode, the AC power supplied from the commercial AC power supply 30 is supplied to the load 31 without passing through the power module P.

[0124] Figure 6 Yes means Figure 5The circuit block diagram of the bypass module B0 and the power module P shown in FIG. 1 is a circuit block diagram of the bypass module B0 and the power module P. The uninterruptible power supply device 110 converts the three-phase AC power from the commercial AC power supply 30 into DC power, converts the DC power into three-phase AC power, and supplies it to the load 31. Figure 7 In order to simplify the drawings and descriptions, only the circuit portion corresponding to one of the three phases (U phase, V phase, W phase) is shown.

[0125] like Figure 6 As shown, the bypass module B0 includes a semiconductor switch 20, a main controller 80, and an operating unit 24. The semiconductor switch 20 is connected between the AC input terminal T21 and the AC output terminal T22. The semiconductor switch 20 is, for example, a thyristor switch having a pair of thyristors connected in anti-parallel. The semiconductor switch 20 is controlled by the main controller 80. The semiconductor switch 20 is turned off in the inverter power supply mode and turned on in the bypass power supply mode.

[0126] The operation unit 24 includes a plurality of buttons operated by the user of the uninterruptible power supply device 110, a display that displays various information, etc. The user operates the operation unit 24 to turn the power supply of the uninterruptible power supply device 110 on and off, or selects either the bypass power supply mode or the inverter power supply mode.

[0127] The operation unit 24 is connected to the communication network NW, and can exchange data with the external device 35 of the uninterruptible power supply 110 via the communication network NW (see Figure 7 ). The external device 35 includes, for example, a PC or a server. The operation unit 24 may further include a USB connector. In this case, the operation unit 24 exchanges data with the external device 35 via the USB connector.

[0128] The uninterruptible power supply device 100 of the first embodiment (see Figure 1 ), in the uninterruptible power supply device 110, the user directly operates the operating unit 24 or the user uses the external device 35 to remotely operate the operating unit 24, thereby being able to execute the start instruction of updating the program of the controller 82 installed in the power module P and the reset instruction of the controller 82 after the update is completed.

[0129] The power module P includes electromagnetic contactors S1 to S3 , capacitors 1 , 5 , and 10 , reactors 2 and 9 , a converter 4 , a DC link 6 , a bidirectional chopper 7 , an inverter 8 , a current detector 13 , and a controller 82 .

[0130] The electromagnetic contactor S1 and the reactor 2 are connected in series between the AC input terminal T11 and the input node of the converter 4. The capacitor 1 is connected to the node N1 between the electromagnetic contactor S1 and the reactor 2. The electromagnetic contactor S1 is turned on when the corresponding power module P is in the operating state, and is turned off when the corresponding power module P is in the stopped state. The instantaneous value of the AC input voltage Vi appearing at the node N1 is detected by the controller 82. Based on the instantaneous value of the AC input voltage Vi, it is determined whether a power outage has occurred.

[0131] Capacitor 1 and reactor 2 constitute AC filter 3 . AC filter 3 is a low-pass filter that allows commercial frequency AC power from commercial AC power source 30 to pass through converter 4 and prevents a switching frequency signal generated by converter 4 from passing through commercial AC power source 30 .

[0132] The converter 4 is controlled by the controller 82, and when AC power is normally supplied from the commercial AC power source 30, the converter 4 converts AC power into DC power and outputs the DC power to the DC line 6. When the commercial AC power source 30 fails, the operation of the converter 4 stops.

[0133] The capacitor 5 is connected to the DC line 6 to smooth the voltage of the DC line 6. The instantaneous value of the DC voltage VD appearing in the DC line 6 is detected by the controller 82. The DC line 6 is connected to the high voltage side node of the bidirectional chopper 7, and the low voltage side node of the bidirectional chopper 7 is connected to the battery terminal T12 via the electromagnetic contactor S2.

[0134] The electromagnetic contactor S2 is turned on when the corresponding power module P is used, and is turned off when the corresponding power module P and the corresponding battery 32 are maintained. The controller 82 detects the instantaneous value of the inter-terminal voltage VB of the battery 32 appearing at the battery terminal T12.

[0135] The bidirectional chopper 7 is controlled by the controller 82 , and normally stores the DC power generated by the converter 4 in the battery 32 , and supplies the DC power of the battery 32 to the inverter 8 via the DC line 6 when the commercial AC power source 30 fails.

[0136] When the bidirectional chopper 7 stores DC power in the battery 32, the DC voltage VD of the DC line 6 is stepped down and applied to the battery 32. When the bidirectional chopper 7 supplies the DC power of the battery 32 to the inverter 8, the inter-terminal voltage VB of the battery 32 is stepped up and output to the DC line 6. The DC line 6 is connected to an input node of the inverter 8.

[0137] The output node of the inverter 8 is connected to the first terminal of the reactor 9, and the second terminal (node ​​N2) of the reactor 9 is connected to the AC output terminal T13 via the electromagnetic contactor S3. The capacitor 10 is connected to the node N2. The instantaneous value of the AC output voltage Vo appearing at the node N2 is detected by the controller 82. The current detector 13 detects the instantaneous value of the current Io flowing from the node N2 to the AC output terminal T13 (i.e., the load 31) via the electromagnetic contactor S3, and applies the signal Iof indicating the detection value to the controller 82.

[0138] The reactor 9 and the capacitor 10 constitute an AC filter 11. The AC filter 11 is a low-pass filter that allows the commercial frequency AC power generated by the inverter 8 to pass through the AC output terminal T13 and prevents the switching frequency signal generated by the inverter 8 from passing through the AC output terminal T13. The electromagnetic contactor S3 is controlled by the controller 82, and is turned on when the corresponding power module P is in the operating state, and is turned off when the corresponding power module P is in the stopped state.

[0139] The controller 82 controls the entire corresponding power module P based on the AC input voltage Vi, the DC voltage VD, the terminal voltage VB of the battery 32, the AC output current Io, and the AC output voltage Vo. That is, the controller 82 detects whether a power outage has occurred based on the detected value of the AC input voltage Vi, and controls the converter 4 and the inverter 8 in synchronization with the phase of the AC input voltage Vi.

[0140] Furthermore, the controller 82 normally controls the converter 4 so that the DC voltage VD becomes a desired target voltage VDT, and stops the operation of the converter 4 when the commercial AC power source 30 fails.

[0141] Furthermore, the controller 82 normally controls the bidirectional chopper 7 so that the inter-terminal voltage VB of the battery 32 becomes a desired target battery voltage VBT, and controls the bidirectional chopper 7 so that the DC voltage VD becomes a desired target voltage VDT when the commercial AC power source 30 fails.

[0142] In addition, the controller 82 is connected to the main controller 80 and the controllers 82 of the other power modules P through the communication line 15, and transmits and receives information with the main controller 80 and the other controllers 82 through the communication line 15. A serial communication method is applied as a communication method between the main controller 80 and each controller 82. The controller 82 controls the converter 4 and the inverter 8 so that the shared currents of the plurality of power modules P are equal.

[0143] The main controller 80 controls the entire uninterruptible power supply device 110 based on signals and the like from the plurality of power modules P. Each controller 82 controls the corresponding power module P in accordance with a control command given from the main controller 80 .

[0144] Specifically, the main controller 80 obtains the current of the sum of the output currents Io of the plurality of power modules P, i.e., the load current IL, based on the output signals Iof of the plurality of current detectors 13, and obtains the appropriate number of operating power modules P required to supply the load current IL. The main controller 80 compares the obtained appropriate number of operating units with the current number of operating units, and determines whether to put each power module P in an operating state or a stopped state based on the comparison result. The main controller 80 transmits a signal indicating the determination result to each controller 82 via the communication line 15.

[0145] When the corresponding power module P is in the stopped state, the controller 82 turns off the corresponding electromagnetic contactors S1 and S3, and stops the operation of the corresponding converter 4, the bidirectional chopper 7, and the inverter 8. In addition, when the corresponding power module P is in the operating state, the controller 82 maintains the corresponding electromagnetic contactors S1 and S3 in the turned-on state, and keeps the corresponding converter 4, the bidirectional chopper 7, and the inverter 8 in operation.

[0146] Figure 7 80 and the controller 82. Figure 7 The main controller 80 and the plurality of controllers 82 are connected to each other via a communication line 15 so as to enable bidirectional communication. The communication line 15 is configured to transmit data bidirectionally via serial communication. Figure 7 In the example of FIG. 8 , the main controller 80 and the plurality of controllers 82 are connected by a daisy chain. In addition, the connection method of the main controller 80 and the plurality of controllers 82 is not limited to the daisy chain.

[0147] The basic structure of the main controller 80 is Figure 2 The main controller 22 shown is the same. That is, the main controller 80 includes the programmable device 40 and the communication I / F 46.

[0148] The basic structure of each of the multiple controllers 82 is Figure 2 The gate driver 66 shown is the same. That is, the controller 82 includes the programmable device 50 and the communication I / F 56 .

[0149] The main controller 80 and each controller 82 control the corresponding power module P in cooperation with each other by executing a program (executable program) stored in advance in a memory.

[0150] The main controller 80 transmits a transmission signal T1 to each controller 82 via the communication line 15. Each controller 82 transmits a transmission signal T2 to the main controller 80 via the communication line 15. In the operation of the uninterruptible power supply device 110, the execution data is exchanged between the programmable device 40 and the programmable device 50 using the communication path, so that each power module P can be controlled. Similarly, the main controller 80 and the programmable device 50 exchange update data for updating the programmable device 50 via the communication line 15. For example, when the programmable device 50 of the power module P1 is updated, the update data is sent to the power module P1, and when the programmable device 50 of the power module P2 is updated, the update data is sent to the power module P2.

[0151] If used Figure 2 , Figure 3 As described above, the memory 502 stores an execution program in the execution program storage area 522 and an update program in the update program storage area 521. When the processor 500 receives execution data via the communication line 15, it executes the program based on the execution data. When the processor 500 receives update data via the communication line 15, it writes the update data into the memory 502 and updates the update program. When the programmable device 50 is reset after the update of the update data is completed (the instruction information is stored), the processor 500 replaces and starts the execution program and the update program.

[0152] Thus, in the modular uninterruptible power supply device 110 of the second embodiment, the uninterruptible power supply device 110 includes a plurality of modules (power modules P), a main controller 80, a plurality of controllers 82, and a communication line 15. The plurality of modules include a plurality of power conversion modules (power modules P) connected in parallel to the load 31. The main controller 80 and the plurality of controllers 82 are daisy-chain connected via the communication line 15.

[0153] In the above configuration, the main controller 80 controls a plurality of power modules P. The plurality of controllers 82 each include a programmable device 50, and drive the plurality of power modules P respectively through communication with the main controller 80. The communication line 15 connects the main controller 80 and the plurality of controllers 82 for communication. The programmable device 50 includes a memory 502 and a processor 500. The memory 502 stores an execution program and an update program. The processor 500 drives the corresponding power module P by executing the execution program. The main controller 80 can send either execution data or update data to the programmable device 50 via the communication line 15 during the execution of the execution program. The execution data is data used in the execution of the execution program. The update data is data used in the update of the update program. When the processor 500 receives the execution data, it executes the execution program based on the execution data. When the processor 500 receives the update data, it writes the update data into the memory 502 and updates the update program. When the programmable device 50 is reset after the updating of the update program is completed, the processor 500 terminates the execution program and starts the update program as the execution program.

[0154] In the modular uninterruptible power supply device 110 of the second embodiment, the same effect as the uninterruptible power supply device 100 of the first embodiment can also be obtained. That is, by using the shared communication line 15, the update of the update program is performed in parallel by the update program while the control of the power module P (execution of the execution program) is continued by the execution data. After the update is completed, these programs are replaced and started. In this way, the period of stopping the operation of the uninterruptible power supply device 110 can be shortened. In particular, if all the programmable devices 50 are reset at the same time by user operation after rewriting the programs of all the programmable devices 50 via the communication line 15, the period of stopping the operation of the uninterruptible power supply device 100 can be further shortened. In this way, all controllers can be updated efficiently with a simplified structure.

[0155] In addition, when the power supply of the modular uninterruptible power supply device 110 requires (n-1) power modules, when redundancy is achieved by installing n power modules (power modules P1 to Pn), all updates and resets can be completed without stopping the operation of the uninterruptible power supply device 110. For example, after rewriting all programmable devices 50 via the communication line 15, first, power is supplied by power modules P2 to Pn other than power module P1, and the programmable device 50 of power module P1 is reset. Next, power supply is switched to power modules P1 and P3 to Pn other than power module P2, and the programmable device 50 of power module P2 is reset. Similarly, the programmable devices 50 of power modules P3 to Pn are reset in sequence. In this way, there is no need to stop the operation of the uninterruptible power supply device 110.

[0156] Furthermore, even when a reset operation is required when updating the programmable device 50, the programmable device 50 can be reset by sending reset instruction data via the communication line 15, without requiring manual reset operation or providing a separate transmission line for sending a reset signal. Thus, all controllers can be updated efficiently with a simplified configuration.

[0157] The embodiments disclosed this time are illustrative in all aspects and should not be considered restrictive. The scope of the present invention is indicated by the claims rather than the above description, and is intended to include all modifications within the meaning and scope equivalent to the claims.

[0158] Description of Reference Numerals

[0159] 1, 5, 10 capacitor, 2, 9 reactor, 3, 11 AC filter, 4 converter, 6 DC link, 7 bidirectional chopper, 8 inverter, 12, 13 current detector, 82 controller, 22, 80 main controller, 15 communication line, 20 semiconductor switch, 24 operation unit, 30 commercial AC power supply, 31 load, 32 battery, 33 bypass AC power supply, 35 external device, 40, 50 programmable device, 46, 56 serial communication I / F, 60, 62, 64 detector, 66, 68, 70 gate driver, 72 switch I / F, 100, 110 uninterruptible Power supply device, 400, 500 processors, 402 memory, 460, 562 drivers, 406 communication I / F, 404 I / O circuit, 462, 560 receivers, 502 memory, 520 program storage area, 521 update program storage area, 522 execution program storage area, 524 indication information storage area, B0 bypass module, P1~Pn power modules, S1~S4 electromagnetic contactors, Fu update mode shift to flag, T11, T21 AC input terminals, T12 battery terminals, T13, T22 AC output terminals, NW communication network.

Claims

1. An uninterruptible power supply device, characterized in that: have: Multiple modules; A main controller, controlling the multiple modules; A plurality of controllers, each comprising a programmable device, and driving the plurality of modules respectively by communicating with the main controller; as well as A serial communication line is used to connect the main controller to the multiple controllers for communication. The programmable device comprises: A memory for storing execution programs and update programs; as well as The processor drives the corresponding module by executing the execution program. The main controller can send either execution data or update data to the programmable device via the serial communication line during the execution of the execution program, wherein the execution data is used in the execution of the execution program and the update data is used in the update of the update program. the processor, When the execution data is received, the execution program is executed based on the execution data. When the update data is received, the update data is written into the memory and the update program is updated. When the programmable device is reset after the update of the update program is completed, the execution program is terminated and the update program is activated as the execution program.

2. The uninterruptible power supply device according to claim 1, characterized in that: The main controller can send reset instruction data for resetting the programmable device to the programmable device via the serial communication line. When receiving the reset instruction data, the programmable device resets the programmable device.

3. The uninterruptible power supply device according to claim 1, characterized in that: the processor, When the updating of the updating program is completed, the instruction information for instructing the switching of the program is stored in the memory, When the programmable device is reset and the instruction information is stored in the memory, the execution program is terminated and the update program is started as the execution program.

4. The uninterruptible power supply device according to claim 1, characterized in that: The memory includes a first storage area storing the execution program and a second storage area storing the update program. When the programmable device is reset, the processor causes the execution program stored in the first storage area to be stored in the second storage area as the update program, and on the other hand, causes the update program stored in the second storage area to be stored in the first storage area as the execution program.

5. The uninterruptible power supply device according to any one of claims 1 to 4, characterized in that: The plurality of modules include a plurality of power conversion modules connected in parallel with a load.

6. The uninterruptible power supply device according to claim 5, characterized in that: The main controller and the plurality of controllers are connected in a daisy chain via the serial communication line.

7. The uninterruptible power supply device according to any one of claims 1 to 4, characterized in that: The multiple modules include: A converter converts AC power supplied from an AC power source into DC power; an inverter that converts the DC power supplied from the converter or the power storage device into AC power and supplies the AC power to a load; and a bidirectional chopper that selectively performs a charging operation of storing a part of the DC power generated by the converter in the power storage device and a discharging operation of supplying the DC power of the power storage device to the inverter, The plurality of controllers include a plurality of gate drivers that respectively drive the converter, the inverter, and the bidirectional chopper.

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