Base for epitaxy and epitaxy equipment

Abstract

The invention discloses a base for epitaxy and epitaxy equipment, and belongs to the technical field of silicon wafer manufacturing. The base for epitaxy comprises a bearing part and a limiting part; the limiting part comprises a first body and a first protrusion, the first body is arranged in the circumferential direction and connected with the bearing part, the first body is provided with a first datum plane in the axial direction, and the first protrusion is connected with the first datum plane; the first protrusion is provided with a first surface and a second surface which are opposite in the circumferential direction, and the first surface and the second surface are connected with the first datum plane and can extend in the direction away from the first body from the first datum plane. A distance between the first surface and the second surface in the circumferential direction decreases in the axial direction. The first protrusions are arranged to block the airflow blown to the silicon wafer from the outside of the base in the radial direction at the position where the growth speed of the silicon wafer is high, so that the growth speed of all the positions of the silicon wafer tends to be consistent, and then the silicon wafer obtains better flatness after epitaxy.

Description

Technical Field

[0001] The present application belongs to the field of silicon wafer manufacturing technology, and specifically relates to a base for epitaxy and epitaxial equipment. Background Art

[0002] Silicon wafer epitaxial growth is a key process for manufacturing semiconductor devices. During the growth process, the silicon substrate is heated and silicon gas is transferred into the reaction chamber. Through appropriate temperature control, silicon atoms are deposited on the surface and gradually form polycrystalline silicon or single crystal silicon layers.

[0003] However, due to various factors, the growth rates of silicon wafers in different directions during the epitaxial growth process are different. The different growth rates will make the surface of the silicon wafer after epitaxy uneven, resulting in large differences in the thickness of the silicon wafer in different parts, which in turn leads to low surface flatness of the silicon wafer. Silicon wafers with low flatness can no longer meet the requirements and usage needs of small line width production. Summary of the invention

[0004] Purpose of the invention: The present application provides a base for epitaxy, which is used to solve the technical problem that the height of a silicon wafer at certain azimuth angles is significantly greater than that at other azimuth angles; another purpose of the present application is to provide an epitaxial device.

[0005] Technical solution: This application provides a base for epitaxy, including:

[0006] A bearing portion, the bearing portion having an axial direction and a radial direction perpendicular to the axial direction, and a circumferential direction surrounding the axial direction, the bearing portion having an edge in the radial direction;

[0007] The limiting portion includes a first body and a first protrusion, the first body is arranged along the circumferential direction and connected to the edge, the first body has a first reference surface in the axial direction, and the first protrusion is connected to the first reference surface; the first protrusion, the first body and the bearing portion together enclose a bearing space for placing a silicon wafer, and the first protrusion is used to block at least part of the airflow blowing toward the silicon wafer along the radial direction;

[0008] Wherein, the first protrusion has a first surface and a second surface relative to each other in the circumferential direction, the first surface and the second surface are connected to the first reference plane, and can extend from the first reference plane in a direction away from the first body; the distance between the first surface and the second surface in the circumferential direction decreases along the axial direction.

[0009] In some embodiments, one end of the first surface along the axial direction away from the first reference plane is connected to one end of the second surface along the axial direction away from the first reference plane.

[0010] In some embodiments, the first protrusion further has a third surface, the third surface is located between the first surface and the second surface and connected to the first surface and the second surface respectively, and the third surface is connected to one end of the first surface and the second surface away from the first reference plane.

[0011] In some embodiments, the first surface protrudes toward the direction approaching the second surface, and / or the second surface protrudes toward the direction approaching the first surface.

[0012] In some embodiments, the limiting portion includes a plurality of first protrusions, the plurality of first protrusions are arranged at intervals along the circumferential direction, there are grooves between adjacent first protrusions, and the first surface, the second surface and the first reference plane form the grooves, and the airflow can pass through the grooves along the radial direction and blow toward the silicon wafer.

[0013] In some embodiments, the bearing portion includes:

[0014] A second body, the second body is connected to the first body, and the second body and the first body enclose the bearing space;

[0015] a second protrusion, which is arranged in the bearing space along the circumferential direction and connected to the second body and the first body, and is used to bear a silicon wafer so that the silicon wafer is spaced apart from the second body;

[0016] The second protrusion has a minimum dimension D along the radial direction, satisfying: 6.25 mm ≤ D ≤ 11.25 mm.

[0017] In some embodiments, the bearing portion includes:

[0018] A second body, the second body is connected to the first body, and the second body and the first body enclose the bearing space;

[0019] A second protrusion, which is arranged in the bearing space along the circumferential direction and connected to the second body and the first body. The second protrusion is used to bear the silicon wafer so that the silicon wafer is spaced apart from the second body;

[0020] The second protrusion has a fourth surface facing away from the second body, the fourth surface is used to carry the silicon wafer, and an angle α is formed between the surface where the fourth surface is located and the surface where the first reference plane is located, satisfying: 3.1°≤α≤4.1°.

[0021] In some embodiments, the first body further has a second reference surface, the second reference surface is away from the first reference surface along the axial direction, and a maximum distance d1 is formed between the first reference surface and the second reference surface in the axial direction;

[0022] The second body has a third reference surface away from the fourth surface, the third reference surface is flush with the second reference surface in the radial direction, and a maximum distance d2 is formed between the fourth surface and the third reference surface in the axial direction;

[0023] Satisfies: d1>d2.

[0024] In some embodiments, d1 and d2 satisfy: 0.8 mm ≤ d1 - d2 ≤ 1.2 mm. In some embodiments, the second body comprises:

[0025] First sub-division;

[0026] a second sub-section, the second sub-section being arranged along the circumferential direction and connected to the first sub-section along the radial direction, the second sub-section having a plurality of through holes communicating with the bearing space;

[0027] The third sub-section is arranged along the circumferential direction and connected to a side of the second sub-section away from the first sub-section along the radial direction. The third sub-section is connected to the first body along the radial direction, and the second protrusion is connected to the third sub-section along the axial direction.

[0028] In some embodiments, the maximum dimension of the first sub-portion along the radial direction is I1, and the maximum dimension of the second sub-portion along the radial direction is I2, satisfying: 220mm≤I1≤240mm, 260mm≤I2≤280mm.

[0029] In some embodiments, the maximum dimension of the first protrusion along the circumferential direction is L, satisfying: 30πmm≤L≤41πmm.

[0030] In some embodiments, the first protrusion has a maximum dimension H1 along the axial direction, satisfying: 0.3 mm ≤ H1 ≤ 0.7 mm.

[0031] Correspondingly, the present application also provides an epitaxial device, comprising an epitaxial base as described in any one of the above embodiments.

[0032] Beneficial effect: Compared with the prior art, the epitaxial base and epitaxial equipment provided in the embodiments of the present application include a bearing part and a limiting part, the bearing part has an axial direction and a radial direction perpendicular to the axial direction, and a circumferential direction surrounding the axial direction, and the bearing part has an edge in the radial direction; the limiting part includes a first body and a first protrusion, the first body is arranged along the circumferential direction and connected to the edge, the first body has a first reference surface in the axial direction, and the first protrusion is connected to the first reference surface; the first protrusion, the first body and the bearing part together enclose a bearing space for placing a silicon wafer, and the first protrusion is used to block at least part of the airflow blowing toward the silicon wafer in the radial direction; wherein the first protrusion has a first surface and a second surface relative to each other in the circumferential direction, the first surface and the second surface are connected to the first reference surface, and can extend from the first reference surface in a direction away from the first body; the distance between the first surface and the second surface in the circumferential direction decreases along the axial direction. The present application sets a first protrusion to block the airflow blowing radially from the outside of the base toward the silicon wafer at a location where the silicon wafer grows faster, thereby reducing the growth rate at the location where the growth rate is faster, and further making the growth rate at various locations of the silicon wafer more consistent, so that the silicon wafer obtains better flatness after epitaxy. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The technical solution and other beneficial effects of the present application will be made apparent by describing in detail the specific implementation methods of the present application in conjunction with the accompanying drawings.

[0034] Figure 1 A schematic diagram of the structure of an epitaxial substrate provided in one embodiment of the present application;

[0035] Figure 2 A front view of an epitaxial base provided in an embodiment of the present application;

[0036] Figure 3 for Figure 2 Detailed image at the middle AA;

[0037] Figure 4 For an embodiment of the present application, Figure 3 Detailed view of the middle frame B;

[0038] Figure 5 A front view of an epitaxial base provided in one embodiment of the present application;

[0039] Figure 6 Another embodiment of the present application is Figure 3 Detailed view of the middle frame B;

[0040] Figure 7 A front view of an epitaxial base provided in another embodiment of the present application;

[0041] Figure 8 Another embodiment of the present application is Figure 3 Detailed view of the middle frame B;

[0042] Fig. 9 A front view of an epitaxial base provided in yet another embodiment of the present application;

[0043] Fig.10 for Figure 3 Detailed view of the middle frame C;

[0044] Fig.11 A diagram showing the azimuth angle variation of the height of a silicon wafer produced by an epitaxial pedestal provided in an embodiment of the present application;

[0045] Fig.12 An internal schematic diagram of an epitaxial device provided in an embodiment of the present application;

[0046] Fig.13 A radial variation diagram of the height of a silicon wafer produced by an epitaxial susceptor provided in an embodiment of the present application;

[0047] Fig.14 Another radial variation diagram of the height of silicon wafers produced by the epitaxial base provided in an embodiment of the present application.

[0048] Figure numerals, 1-base for epitaxy, 11-carrying part, 111-edge, 112-second body, 1121-third reference plane, 1122-first sub-part, 1123-second sub-part, 1124-through hole, 1125-third sub-part, 113-second protrusion, 1131-fourth surface, 12-limiting part, 121-first body, 1211-first reference plane, 1212-second reference plane, 122-first protrusion, 1221-first surface, 1222-second surface, 1223-third surface, 1224-first edge, 123-carrying space, 124-groove, 2-silicon wafer, 21-first convex band, 22-second convex band, 23-third convex band, 3-airflow. DETAILED DESCRIPTION

[0049] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0050] In the description of the present application, it should be noted that, unless otherwise clearly specified and limited, the terms "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or can communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features.

[0051] It should also be noted that in the drawings of the embodiments of the present application, the arrows marked with X, Y, and Z respectively represent the radial direction X, the circumferential direction Y, and the axial direction Z. The description of the present application introduces the radial direction X, the circumferential direction Y, and the axial direction Z in order to more clearly express the relative positional relationship involved in the present application, wherein the radial direction X and the axial direction Z are directions intersecting and perpendicular to each other, and the circumferential direction Y is a direction surrounding the axial direction Z. The three are relative directions rather than absolute directions. In actual applications, the radial direction X, the circumferential direction Y, and the axial direction Z may be different from the drawings of the specification provided in the present application, as long as the relative relationship between the three is maintained.

[0052] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application.

[0053] Epitaxial growth of silicon wafers is a key process for manufacturing semiconductor devices. During the growth process, the silicon substrate is heated and silicon gas is transferred into the reaction chamber. Through appropriate temperature control, silicon atoms are deposited on the surface and gradually form polycrystalline silicon or single crystal silicon layers.

[0054] However, during the epitaxial growth process of the silicon wafer 2, due to various factors, the growth rates in different directions are different. The different growth rates will make the surface of the silicon wafer 2 after epitaxy uneven, resulting in large differences in the thickness of the silicon wafer 2 in different parts, and then resulting in low surface flatness of the silicon wafer 2. The silicon wafer 2 with low flatness can no longer meet the requirements and usage needs of small line width production.

[0055] Specifically, see Fig.11 , Fig.11The azimuth angle variation diagram of the height of the silicon wafer produced by the epitaxial base provided in the embodiment of the present application. Among them, "height" and the following "thickness", "high" and "low" all describe the size along the axial direction Z or the relative relationship between the sizes along the axial direction Z. Among them, the horizontal axis is the azimuth angle, and the vertical axis is the thickness of the silicon wafer 2 in the axial direction Z. Fig.11 The dashed line shows the variation trend of the height of the silicon wafer 2 after epitaxy with respect to the azimuth angle, and the solid line shows the variation trend of the height of the silicon wafer 2 produced by using the epitaxy base 1 in the embodiment of the present application with respect to the azimuth angle after epitaxy. Fig.11 It can be seen that the epitaxial silicon wafer 2 has a first convex band 21 at certain azimuth angles that is significantly higher than that at other parts, that is, the growth rate of the silicon wafer 2 at certain azimuth angles is significantly higher than that at other parts. If the growth rate at these azimuth angles can be reduced, the height at these azimuth angles can be reduced, thereby improving the flatness of the silicon wafer 2.

[0056] In order to solve the technical problem that the growth rate of the silicon wafer 2 at certain azimuth angles is significantly higher than the growth rate at other azimuth angles, thereby causing the height of the silicon wafer 2 at certain azimuth angles to be significantly greater than the height at other azimuth angles, the first embodiment of the present application provides an epitaxial base 1, see Figure 1 , including a bearing portion 11 and a limiting portion 12, the bearing portion 11 has an axial direction Z and a radial direction X perpendicular to the axial direction Z, and a circumferential direction Y surrounding the axial direction Z, and the bearing portion 11 has an edge 111 in the radial direction X, see Fig.10 The limiting portion 12 includes a first body 121 and a first protrusion 122. The first body 121 is arranged along the circumferential direction Y and connected to the edge 111. The first body 121 has a first reference surface 1211 in the axial direction Z, and the first protrusion 122 is connected to the first reference surface 1211. The first protrusion 122, the first body 121 and the bearing portion 11 together enclose a bearing space 123 for placing the silicon wafer 2. The first protrusion 122 is used to block at least part of the airflow 3 blowing toward the silicon wafer 2 along the radial direction X. The first protrusion 122 has a first surface 1221 and a second surface 1222 opposite to each other in the circumferential direction Y. The first surface 1221 and the second surface 1222 are connected to the first reference surface 1211 and can extend from the first reference surface 1211 in a direction away from the first body 121. The distance between the first surface 1221 and the second surface 1222 in the circumferential direction Y decreases along the axial direction Z.

[0057] Specifically, see Figure 4 , the distance between the first surface 1221 and the second surface 1222 in the circumferential direction Y is Figure 4In M, M decreases in the direction away from the first body 121 along the axial direction Z, and M increases in the direction toward the first body 121 along the axial direction Z. In other words, in Figure 4 In the axial direction Z, the further upward, the smaller the value of M is, and the further downward, the larger the value of M is.

[0058] Specifically, the distance between the first surface 1221 and the second surface 1222 in the circumferential direction Y gradually decreases along the axial direction Z in a direction away from the first body 121 .

[0059] Specifically, the first surface 1221 and / or the second surface 1222 may be a surface composed of multiple planes, may be a curved surface, or may be a surface composed of a plane and a curved surface.

[0060] It can be understood that the airflow 3 flows from the outside along the radial direction X to the surface of the silicon wafer 2 in the carrying space 123, so that deposition occurs on the surface of the silicon wafer 2. The faster the deposition speed, the faster the growth speed. Conversely, if the deposition speed is slower, the growth speed will also be slower.

[0061] In the above embodiment, the first protrusion 122 of the barrier is set in the direction of the airflow 3, and the airflow 3 will change direction and bypass the barrier, so that the flow of the airflow 3 behind the barrier in the direction of the airflow 3 will be reduced, that is, along the radial direction X, the flow of the airflow 3 flowing to at least part of the silicon wafer 2 located on the inner side of the first protrusion 122 is reduced, the deposition speed of this part of the silicon wafer 2 is slowed down, and the growth speed of this part of the silicon wafer 2 is reduced, so that after epitaxy, the height of this part is reduced, thereby improving the flatness. By observing Fig.11 From the solid line portion in FIG. 1 , it can be seen that the height of the first convex band 21 is reduced compared to the dotted line portion.

[0062] Further, it can be understood that the higher the height of the first protrusion 122, the higher the efficiency of blocking the airflow 3, and the smaller the flow rate of the airflow 3 flowing to at least a portion of the silicon wafer 2 located inside the first protrusion 122 along the radial direction X, the slower the deposition speed of the portion of the silicon wafer 2, and the lower the growth speed of the portion of the silicon wafer 2. Conversely, if the height of the first protrusion 122 is lower, the efficiency of blocking the airflow 3 is also lower, and the effect of reducing the thickness of the portion of the silicon wafer 2 after epitaxy is also smaller.

[0063] In some embodiments, the projection of the first protrusion 122 along the axial direction Z on the plane where the first reference plane 1211 is located falls within the projection of the first reference plane 1211 along the axial direction Z on the plane where the first reference plane 1211 is located; in other embodiments, the projection of the first protrusion 122 along the axial direction Z on the plane where the first reference plane 1211 is located not only overlaps with the projection of the first reference plane 1211 along the axial direction Z on the plane where the first reference plane 1211 is located, but also overlaps with the projection of the bearing portion 11 along the axial direction Z on the plane where the first reference plane 1211 is located.

[0064] Furthermore, the first protrusion 122 also has an inner surface that is opposite to each other and located on the inner side along the radial direction X, and an outer surface that is located on the outer side along the radial direction X. The inner surface is respectively connected to the first surface 1221 and the second surface 1222, and the outer surface is also respectively connected to the first surface 1221 and the second surface 1222. The first surface 1221, the second surface 1222, the inner surface and the outer surface are used to enclose the first protrusion 122.

[0065] See also Figure 3 , the size of the epitaxial silicon wafer 2 along the circumferential direction Y at the first convex band 21 is not consistent in the axial direction Z, but the size along the axial direction Z gradually decreases in the circumferential direction Y, that is, the size of the first convex band 21 along the circumferential direction Y gradually decreases in the direction from the first body 121 to the first protrusion 122. It can be understood that the reason why the size of the first convex band 21 along the circumferential direction Y is different in the axial direction Z is because of different deposition efficiencies, that is, the deposition efficiency is higher at higher locations, while the deposition efficiency is lower at lower locations.

[0066] In the above example, see Figure 2 , the first protrusion 122 gradually decreases along the axial direction Z because the distance between the first surface 1221 and the second surface 1222 in the circumferential direction Y, that is, the size of the first protrusion 122 along the circumferential direction Y gradually decreases in the direction from the first body 121 to the first protrusion 122, matching the shape of the first convex belt 21. In other words, the present application makes the shape of the first protrusion 122 along the radial direction X similar to the shape of the first convex belt 21 along the radial direction X, so as to reduce the flow rate of the airflow 3 flowing through the end of the first convex belt 21 to a greater extent, and reduce the flow rate of the airflow 3 flowing through the root of the first convex belt 21 to a lesser extent, so that the first convex belt 21 is more flat, thereby improving the flatness of the silicon wafer 2 after epitaxy.

[0067] In some embodiments, see Figure 1 One end of the first surface 1221 away from the first reference surface 1211 along the axial direction Z is connected to one end of the second surface 1222 away from the first reference surface 1211 along the axial direction Z.

[0068] In some embodiments, see Figure 5 The first surface 1221 and the second surface 1222 are connected to form a first edge 1224, and the projection of the first edge 1224 along the axial direction Z on the plane where the first reference surface 1211 is located falls within the projection of the first protrusion 122 along the axial direction Z on the plane where the first reference surface 1211 is located; in other embodiments, the projection of the first edge 1224 along the axial direction Z on the plane where the first reference surface 1211 is located partially or completely falls outside the projection of the first protrusion 122 along the axial direction Z on the plane where the first reference surface 1211 is located.

[0069] It can be understood that in order to avoid stress concentration at the connection between the first surface 1221 and the second surface 1222 of the epitaxial substrate 1, in some embodiments, the first edge 1224 is rounded or beveled.

[0070] In the above embodiment, the first surface 1221 and the second surface 1222 of the first protrusion 122 are directly connected to form a first ridge 1224, so that the shape of the first protrusion 122 is more consistent with the shape of the first convex band 21 on the silicon wafer 2 produced in the current technology along the radial direction X, so that the silicon wafer 2 after epitaxy is flatter at the place where the first convex band 21 is originally produced, so as to improve the flatness of the silicon wafer 2 after epitaxy.

[0071] In some embodiments, see Figure 6 , Figure 7 , Figure 8 and Fig. 9 The first protrusion 122 also has a third surface 1223, which is located between the first surface 1221 and the second surface 1222 and connected to the first surface 1221 and the second surface 1222 respectively. The third surface 1223 is connected to one end of the first surface 1221 and the second surface 1222 away from the first body 121.

[0072] Specifically, in some embodiments, see Figure 8 and Fig. 9 , the first surface 1221 and the second surface 1222 are not connected, and the third surface 1223 is located between the first surface 1221 and the second surface 1222 and connects the first surface 1221 and the second surface 1222; in other embodiments, see Figure 6 and Figure 7 , a portion of the first surface 1221 is connected to a portion of the second surface 1222 , and the third surface 1223 is located between and connected to another portion of the first surface 1221 and another portion of the second surface 1222 .

[0073] In some embodiments, the projection of the third surface 1223 along the axial direction Z on the plane where the first reference plane 1211 is located falls within the projection of the first protrusion 122 along the axial direction Z on the plane where the first reference plane 1211 is located; in other embodiments, the projection of the third surface 1223 along the axial direction Z on the plane where the first reference plane 1211 is located partially or completely falls outside the projection of the first protrusion 122 along the axial direction Z on the plane where the first reference plane 1211 is located.

[0074] In some embodiments, the third surface 1223 is a curved surface; in other embodiments, the third surface 1223 is a flat surface; in other embodiments, the third surface 1223 is composed of a flat surface and / or a curved surface.

[0075] In the above embodiment, the third surface 1223 is provided to adjust the flow direction and flow rate of the airflow 3 bypassing the first protrusion 122, so that the first protrusion 122 can be more adapted to actual production needs. In addition, the third surface 1223 can reduce or avoid the possibility of stress concentration on the epitaxial base 1, so that the service life of the epitaxial base 1 is longer.

[0076] In some embodiments, see Figure 4 , Figure 6 and Figure 8 The first surface 1221 protrudes in a direction close to the second surface 1222 , and / or the second surface 1222 protrudes in a direction close to the first surface 1221 .

[0077] Specifically, in some embodiments, the first surface 1221 protrudes in a direction close to the second surface 1222, and the second surface 1222 protrudes in a direction close to the first surface 1221; in other embodiments, only the first surface 1221 protrudes in a direction close to the second surface 1222, and in still other embodiments, only the second surface 1222 protrudes in a direction close to the first surface 1221.

[0078] For further information, see Figure 4 , Figure 6 and Figure 8 In some embodiments, the speed at which the distance between the first surface 1221 and the second surface 1222 along the circumferential direction Y decreases along the axial direction Z is first accelerated and then decelerated.

[0079] By observation Fig.11It can be seen from the dotted line part that the speed at which the size of the epitaxial silicon wafer 2 along the circumferential direction at the first convex band 21 decreases along the axial direction Z is also accelerated first and then decelerated. Therefore, in the above embodiment, the first surface 1221 of the first protrusion 122 is concave toward the second surface 1222 along the circumferential direction Y, and the second surface 1222 is concave toward the first surface 1221 along the circumferential direction. The shape along the radial direction X is more similar to the shape of the first convex band 21 along the radial direction X, and the height reduction effect on the first convex band 21 is more significant, so that the epitaxial silicon wafer 2 can obtain a better flatness. In addition, the first surface 1221 and the second surface 1222 that are concave along the circumferential direction Y can reduce the volume of the first protrusion 122, reduce the weight of the epitaxial base 1, and make the working performance of the epitaxial base 1 more excellent.

[0080] In some embodiments, see Figure 1 The limiting portion 12 includes a plurality of first protrusions 122, and the plurality of first protrusions 122 are arranged at intervals along the circumferential direction Y. There is a groove 124 between adjacent first protrusions 122, and the first surface 1221, the second surface 1222 and the first reference surface 1211 form the groove 124. The airflow 3 can pass through the groove 124 along the radial direction X and blow toward the silicon wafer 2.

[0081] See also Fig.11 It can be found that there are multiple first convex bands 21, specifically four. Therefore, in the above embodiment, multiple first protrusions 122 are provided so that each first convex band 21 can correspond to at least one first protrusion 122 so that the thickness of each first convex band 21 can be reduced, thereby further improving the flatness of the silicon wafer 2 after epitaxy.

[0082] Furthermore, in some embodiments, the first body 121 includes a plurality of equally divided bodies sequentially connected along the circumferential direction Y, and each first protrusion 122 is connected to one of the plurality of equally divided bodies.

[0083] Furthermore, in some other embodiments, the limiting portion 12 includes at least four first protrusions 122 , and the first body 121 includes four equal parts connected in sequence along the circumferential direction Y, and each of the four equal parts is connected to at least one first protrusion 122 .

[0084] Furthermore, in some other embodiments, at least four first protrusions 122 are symmetrical about the rotation axis of the epitaxial substrate 1 .

[0085] In addition, it can be understood that the flatness is used to measure whether the surface of the silicon wafer 2 is flat, and in order to improve the flatness, it can be achieved not only by reducing the thickness at higher places, but also by increasing the thickness at lower places.

[0086] In the above embodiment, at least four first protrusions 122 are provided to respectively correspond to reduce the height of the first convex band 21 of the epitaxial silicon wafer 2, so that the flatness of the epitaxial silicon wafer 2 is improved. In addition, the groove 124 can allow a larger flow of airflow 3 to flow to the silicon wafer 2, so as to increase the growth rate of the lower part relative to the first convex band 21, increase the thickness of the lower part relative to the first convex band 21, and further improve the flatness of the epitaxial silicon wafer 2. In addition, since the first surface 1221 and the second surface 1222 in some embodiments are convex toward each other, the flow cross-sectional area of ​​the groove 124 is larger, and the flow of the airflow 3 flowing through the groove 124 is larger, which further reduces the gap between the highest point and the lowest point of the epitaxial silicon wafer 2, thereby further improving the flatness of the epitaxial silicon wafer 2.

[0087] In some embodiments, the bearing portion 11 includes a second body 112 and a second protrusion 113; the second body 112 is connected to the first body 121, and the second body 112 and the first body 121 enclose a bearing space 123; the second protrusion 113 is arranged in the bearing space 123 along the circumferential direction Y, the second protrusion 113 is connected to the second body 112, and the second protrusion 113 is connected to the first body 121, and the second protrusion 113 is used to carry the silicon wafer 2 so that the silicon wafer 2 is spaced from the second body 112; wherein the second protrusion 113 has a minimum dimension D along the radial direction, satisfying: 6.25mm≤D≤11.25mm.

[0088] Specifically, the second protrusion 113 has an inner diameter and an outer diameter along the radial direction X, and a value of half of the difference between the outer diameter and the inner diameter is D, satisfying: 6.25 mm≤D≤11.25 mm.

[0089] Specifically, the value of D can be any one of 6.25mm, 6.75mm, 7.25mm, 7.75mm, 8.25mm, 8.75mm, 9.25mm, 9.75mm, 10.25mm, 10.75mm, and 11.25mm, or any value within a range consisting of any two values.

[0090] It is understandable that when the radial direction X dimension of the epitaxial base 1 remains unchanged, the change in the D value will cause the radial direction X dimension of the limiting portion 12 to change, thereby affecting the dimension of the first protrusion 122 in the radial direction X. It is understandable that the larger the dimension of the first protrusion 122 in the radial direction X, the higher the efficiency of blocking the airflow 3, and the smaller the dimension of the first protrusion 122 in the radial direction X, the lower the efficiency of blocking the airflow 3, and the efficiency of the first protrusion 122 blocking the airflow 3 can affect the epitaxial growth rate of the silicon wafer 2. When the value of D is within the range defined in the embodiment of the present application, the first protrusion 122 can better block the airflow 3, so that the silicon wafer 2 after epitaxy can obtain better flatness.

[0091] In the above embodiment, by limiting the minimum size of the second protrusion 113 along the radial direction X, the flatness of the outer edge of the silicon wafer 2 is improved.

[0092] In some embodiments, the bearing portion 11 includes a second body 112 and a second protrusion 113, the second body 112 is connected to the first body 121, and the second body 112 and the first body 121 enclose a bearing space 123; the second protrusion 113 is arranged in the bearing space 123 along the circumferential direction Y, and is connected to the second body 112 and the first body 121, and the second protrusion 113 is used to carry the silicon wafer 2 so that the silicon wafer 2 is spaced from the second body 112; wherein the second protrusion 113 has a fourth surface 1131 facing away from the second body 112, and the fourth surface 1131 is used to carry the silicon wafer 2, and the plane where the fourth surface 1131 is located has an angle α with the plane where the first reference plane 1211 is located, satisfying: 3.1°≤α≤4.1°.

[0093] Specifically, the value of α can be any one of 3.1°, 3.2°, 3.3°, 3.4°, 3.5°, 3.6°, 3.7°, 3.8°, 3.9°, 4.0°, 4.1° or any value within a range consisting of any two values.

[0094] See also Fig.14 ,in, Fig.14 The horizontal axis in is the radius of silicon wafer 2. Fig.14 The closer to the left side, the closer to the axis of the silicon wafer 2, and the closer to the right side, the closer to the edge of the silicon wafer 2. It can be found that the epitaxial silicon wafer 2 still has a second convex belt 22 extending along the circumferential direction Y and close to the outer edge of the silicon wafer 2. In the above embodiment, when the angle α is within the range defined by the embodiment of the present application, it can be found that the second convex belt 22 moves toward the right side in the figure along the radial direction X, that is, moves toward the edge of the silicon wafer 2, that is, the inner diameter of the annular second convex belt 22 increases, so that the second convex belt 22 can move out of the flatness measurement area, that is, eliminate the influence of the second convex belt 22 on the flatness, so that the flatness of the epitaxial silicon wafer 2 can be reduced.

[0095] In addition, it can be known from the above that when the angle α is larger, the second convex band 22 on the epitaxial silicon wafer 2 will move toward the outer edge along the radial direction X, and the part of the silicon wafer 2 that is closer to the first protrusion 122 along the radial direction X will be better blocked by the first protrusion 122. Therefore, when α is within the range defined by the embodiment of the present application, the effect of the first protrusion 122 in reducing the height of the overlapping portion of the first convex band 21 and the second convex band 22 can be enhanced, thereby improving the flatness of the silicon wafer 2.

[0096] In some embodiments, see Fig.10The first body 121 further has a second reference surface 1212, the second reference surface 1212 is separated from the first reference surface 1211 along the axial direction Z, and there is a maximum distance d1 between the first reference surface 1211 and the second reference surface 1212 in the axial direction Z;

[0097] The second body 112 has a third reference surface 1121 away from the fourth surface 1131 , the third reference surface 1121 is flush with the second reference surface 1212 in the radial direction X, and a maximum distance d2 is provided between the fourth surface 1131 and the third reference surface 1121 in the axial direction Z; and the following condition is satisfied: d1>d2.

[0098] In the above embodiment, a size difference along the axial direction Z is set between the first body 121 and the second protrusion 113 so that the first body 121 can limit the rotating silicon wafer 2. When the silicon wafer 2 moves along the radial direction X, the first body 121 higher than the second protrusion 113 can block the silicon wafer 2 and limit the silicon wafer 2, so that the growth environment of the silicon wafer 2 is stable and better flatness is obtained.

[0099] In some embodiments, d1 and d2 satisfy: 0.8 mm ≤ d1-d2 ≤ 1.2 mm. Specifically, the value of d1-d2 can be any one of 0.8 mm, 0.85 mm, 0.9 mm, 0.95 mm, 1.0 mm, 1.05 mm, 1.1 mm, 1.05 mm, 1.2 mm, or any value in the range formed by any two values.

[0100] In the above embodiment, when d1-d2 is within the range defined by the embodiment of the present application, the limiting portion 12 can effectively limit the silicon wafer 2, preventing the silicon wafer 2 from being thrown out when the epitaxial base 1 rotates. At the same time, when d1-d2 is within the range defined by the embodiment of the present application, it can also prevent the limiting portion 12 from excessively blocking the airflow 3. The larger the value of d1-d2, the better the limiting effect of the limiting portion 12 on the silicon wafer 2; the smaller the value of d1-d2, the smaller the impact of the limiting portion 12 on the airflow 3.

[0101] In some embodiments, see Fig.10 The bearing portion 11 includes a first sub-portion 1122, a second sub-portion 1123, a third sub-portion 1125 and a second protrusion 113; the second sub-portion 1123 is arranged along the circumferential direction Y and connected to the first sub-portion 1122 along the radial direction X, and the second sub-portion 1123 has a plurality of through holes 1124 connected to the bearing space 123; the third sub-portion 1125 is arranged along the circumferential direction Y and connected to a side of the second sub-portion 1123 away from the first sub-portion 1122 along the radial direction X, the third sub-portion 1125 is connected to the first body 121 along the radial direction X, and the second protrusion 113 is connected to the third sub-portion 1125 along the axial direction Z.

[0102] It can be understood that after the silicon wafer 2 is placed in the supporting space 123 of the epitaxial base 1, a closed space is formed between the silicon wafer 2 and the second protrusion 113 and the supporting portion 11, and the through hole 1124 can connect the closed space with the space on the side of the epitaxial base 1 away from the silicon wafer 2, so that the gas in the closed space can flow with the outside world, thereby relatively reducing the temperature of the gas in the closed space, thereby reducing the temperature and growth rate of the silicon wafer 2.

[0103] Furthermore, along the axial direction Z, the second sub-portion 1123 with the through hole 1124 can reduce the temperature of the portion of the silicon wafer 2 along the axial direction Z corresponding to the second sub-portion 1123 .

[0104] See also Fig.13 , where the horizontal axis is the radius of the silicon wafer 2, the vertical axis is the size of the silicon wafer 2 along the axial direction Z, the dotted line represents the height of the silicon wafer 2 after epitaxy, and the solid line represents the height of the silicon wafer 2 produced using the epitaxy base 1 in the embodiment of the present application. Fig.13 As can be seen from the dotted line portion, the epitaxial silicon wafer 2 also has an annular third convex band 23. When at least part of the projection of the portion where the third convex band 23 would have been generated along the axial direction Z on the plane where the first reference plane 1211 is located is located inside the projection of the second sub-portion 1123 along the axial direction Z on the plane where the first reference plane 1211 is located, please refer to Fig.13 In the solid line part, compared with the dotted line part, the second sub-portion 1123 with the through hole 1124 can reduce the partial temperature of the silicon wafer 2 after epitaxy, thereby reducing the possibility of the third convex band 23 being generated, and further improving the flatness of the silicon wafer 2 after epitaxy.

[0105] In some embodiments, see Figure 2 and Fig.10 , the maximum dimension of the first sub-portion 1122 along the radial direction X is I1, satisfying: 220mm≤I1≤240mm.

[0106] In some embodiments, when the epitaxial substrate 1 is a circular substrate, the value of I1 is the diameter of the first sub-portion 1122. In other words, the value of I1 is the value of the inner diameter of the second sub-portion 1123 in the shape of a circular ring.

[0107] Specifically, the value of I1 mm can be any one of 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, and 240, or any value between the ranges consisting of any two values.

[0108] When the value of I1 mm is within the range defined in the embodiment of the present application, the through hole 1124 has the best effect of eliminating the third convex band 23, and can reduce the possibility of the third convex band 23 to the maximum extent, thereby improving the flatness of the epitaxial silicon wafer 2. When the value of I1 mm is outside the range defined in the embodiment of the present application, the effect of the through hole 1124 in eliminating the third convex band 23 is not as good as when the value of I1 mm is within the range defined in the embodiment of the present application.

[0109] In some embodiments, see Figure 2 The maximum dimension of the first protrusion 122 along the circumferential direction Y is L, which satisfies: 30πmm≤L≤41πmm.

[0110] Specifically, the value of L mm can be any one of 30π, 31π, 32π, 33π, 34π, 35π, 36π, 37π, 38π, 39π, 40π, and 41π, or any value in a range consisting of any two values.

[0111] Specifically, in some embodiments, the maximum dimension of the first protrusion 122 along the circumferential direction Y is the dimension of the outer surface of the first protrusion 122 in the circumferential direction Y.

[0112] In the above embodiment, when L is within the range defined in the embodiment of the present application, the first convex band 21 can be effectively reduced, thereby improving the flatness of the epitaxial silicon wafer 2. On the contrary, when L is less than the range defined in the embodiment of the present application, the first convex band 21 is still relatively obvious, resulting in a small degree of improvement in the flatness of the epitaxial silicon wafer 2, and when L is greater than the range defined in the embodiment of the present application, the first protrusion 122 blocks the airflow 3 from flowing to some parts with slower growth rates, making the growth rate of these parts slower, that is, the depth of the concave part around the first convex band 21 is deeper, and the height difference between the first convex band 21 is larger, and the flatness is difficult to improve. In some embodiments, the first protrusion 122 has a maximum size H1 along the axial direction Z, satisfying: 0.3mm≤H1≤0.7mm.

[0113] Specifically, the value of H1 mm can be any one of 0.3, 0.4, 0.5, 0.6, 0.7 or any value between the ranges formed by any two values. In the above embodiment, when H1 is within the range defined by the embodiment of the present application, the first convex band 21 can be effectively reduced, thereby improving the flatness of the silicon wafer 2 after epitaxy. It can be understood that the larger the value of H1, the better the interception effect of the first protrusion 122 on the airflow 3; the smaller the value of H1, the less material consumed in manufacturing the epitaxy base 1, and the smaller the volume and weight of the epitaxy base 1.

[0114] The present application is further described in detail below in conjunction with specific embodiments. These embodiments should not be construed as limiting the scope of protection claimed in the present application.

[0115] Example 1

[0116] The minimum radial dimension D of the second protrusion 113 in Embodiment 1 is 5.25 mm.

[0117] Example 2-Example 8

[0118] The epitaxial base 1 in Example 2-8 is the same as Example 1 except for the following differences: the value of the minimum radial dimension D of the second protrusion 113 is adjusted. Please refer to Table 1 for specific parameters.

[0119] In an optional embodiment of the present application, the flatness of the silicon wafer 2 is reflected by measuring and calculating ESFQR (edge ​​flatness) which can affect the overall flatness, wherein the ESFQR value indicates the degree of change in the flatness of the outer edge area of ​​the wafer compared with the inner wafer surface. When the ESFQR is small, it indicates that the flatness of the silicon wafer 2 is high; when the ESFQR is large, it indicates that the flatness of the silicon wafer 2 is small.

[0120] The following method can be used to measure and calculate the ESFQR value of silicon wafer 2:

[0121] 1. Divide the silicon wafer 2 into 72 sectors with equal angles;

[0122] 2. Determine the maximum height of the least squares reference plane of each sector;

[0123] 3. The thickness is measured at a position 2 mm away from the arc edge of the sector and with a radial length of 15 mm as the measurement area, and the sum of the absolute value of the maximum height above the reference plane of the least squares position and the absolute value of the minimum height below the reference plane of the least squares position is obtained.

[0124] 4. Compare the sum of the absolute value of the maximum height above the reference plane of the least squares part in the 72 sectors and the absolute value of the minimum height below the reference plane of the least squares part, and take the maximum value of the 72 values ​​as the ESFQR of the silicon wafer 2.

[0125] When the ESFQR value is less than 35 nm, the quality of the silicon wafer 2 is considered to be good; when the ESFQR value is greater than 35 nm, the quality of the silicon wafer 2 is considered to be inferior to that of the silicon wafer with an ESFQR value less than 35 nm.

[0126] Table 1

[0127]

[0128]

[0129] As can be seen from Table 1, referring to Examples 1 to 8, respectively, as the value of D increases, the value of ESFQR of the silicon wafer 2 first decreases and then increases, that is, the flatness of the silicon wafer 2 at the outer edge is first improved and then gradually deteriorates. The value of ESFQR in Example 1 is the largest, which is 42, and the value of ESFQR in Example 8 is the second largest, which is 37.3, which means that the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 1 and 8 is not as good as the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 2 to 7, and the value of ESFQR in Example 4 is the smallest, which is 27.2nm. It shows that in Examples 1 to 8 of the present application, as D increases, the size of the limit portion 12 along the radial direction X gradually decreases, and the size of the first protrusion 122 along the radial direction X gradually decreases.

[0130] With reference to Examples 2 to 7, the values ​​of D are all within the range defined in the present application, the values ​​of ESFQR are all less than 35 nm, and the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 2 to 7 is good.

[0131] On the other hand, in Example 1, in the epitaxial base 1 of Example 1, D is smaller, the size of the first protrusion 122 along the radial direction X is larger, and the blocking effect of the first protrusion 122 on the airflow 3 exceeds the actual requirement, resulting in the growth rate of the part of the silicon wafer 2 that needs to slow down is too low, and the surface of the silicon wafer 2 after epitaxy is not smooth enough, which in turn leads to a larger ESFQR value of the silicon wafer 2. The quality of the silicon wafer 2 produced by the epitaxial base 1 in Example 1 is not as good as the quality of the silicon wafer 2 produced by the epitaxial base 1 in Examples 2 to 7.

[0132] On the other hand, in Example 8, in the epitaxial base 1 of Example 8, D is larger, and the size of the first protrusion 122 along the radial direction X is smaller. The blocking effect of the first protrusion 122 on the airflow 3 cannot meet the actual requirement, resulting in the growth rate of the part of the silicon wafer 2 that needs to be slowed down is still high, which in turn leads to a larger EDFQR value of the silicon wafer 2. The quality of the silicon wafer 2 produced by the epitaxial base 1 in Example 8 is not as good as the quality of the silicon wafer 2 produced by the epitaxial base 1 in Examples 2 to 7.

[0133] Example 9

[0134] The value of α of the epitaxial susceptor 1 in Example 9 is 1.6.

[0135] Example 10-Example 15

[0136] The epitaxial substrate 1 in Examples 10 to 15 is the same as that in Example 9 except for the following differences: the value of α is adjusted, please refer to Table 2 for details.

[0137] Table 2 α / ° ESFQR / nm Example 9 1.6 45.7 Example 10 2.1 33.8 Embodiment 11 2.6 28.4 Example 12 3.1 23.2 Embodiment 13 3.6 26.5 Embodiment 14 4.1 34.4 Embodiment 15 4.6 42.3

[0138] As can be seen from Table 2, referring to Example 9-Example 15, as the value of α increases, the value of ESFQR of silicon wafer 2 first decreases and then increases, that is, the flatness of silicon wafer 2 at the outer edge is first improved and then gradually deteriorates. The value of ESFQR in Example 9 is the largest, which is 45.7, and the value of ESFQR in Example 15 is the second largest, which is 42.3, which means that the quality of silicon wafer 2 produced by epitaxial substrate 1 in Example 9 and Example 15 is not as good as the quality of silicon wafer 2 produced by epitaxial substrate 1 in Example 10-Example 14, and the value of ESFQR in Example 12 is the smallest, which is 23.2nm. It shows that in Examples 9-Example 15 of the present application, as the value of α increases, the larger the maximum distance between the outer edge of silicon wafer 2 and the substrate in the axial direction Z, the lower the temperature of the outer edge of silicon wafer 2.

[0139] With reference to Examples 10 to 14, the values ​​of α are all within the range defined in the present application, the values ​​of ESFQR are all less than 35 nm, and the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 10 to 14 is good.

[0140] On the other hand, in Example 9, in the epitaxial base of Example 9, the value of α is smaller, the maximum distance between the outer edge of the silicon wafer 2 and the second body 112 is smaller, the temperature at the outer edge of the silicon wafer 2 is higher, the growth rate at the outer edge of the silicon wafer 2 is faster, and significantly faster than the growth rate near the center of the outer edge of the silicon wafer 2, which results in the surface of the silicon wafer 2 being not smooth enough, and further results in a larger value of ESFQR of the silicon wafer 2. The quality of the silicon wafer 2 produced by the epitaxial base 1 in Example 9 is not as good as the quality of the silicon wafer 2 produced by the epitaxial base 1 in Examples 10 to 14.

[0141] On the other hand, in Example 15, in the epitaxial base 1 of Example 15, the value of α is larger, the maximum distance between the outer edge of the silicon wafer 2 and the second body 112 is larger, the temperature at the outer edge of the silicon wafer 2 is lower, and the growth rate at the outer edge of the silicon wafer 2 is slower, and slower than the growth rate of the outer edge of the silicon wafer 2 near the center, which results in the surface of the silicon wafer 2 being not smooth enough, and further results in a larger value of ESFQR of the silicon wafer 2. The quality of the silicon wafer 2 produced by the epitaxial base 1 in Example 15 is not as good as the quality of the silicon wafer 2 produced by the epitaxial base 1 in Examples 10 to 14.

[0142] Example 16

[0143] The value of d1-d2 of the epitaxial susceptor 1 in Example 16 is 0.7.

[0144] Example 17-Example 22

[0145] The epitaxial substrate 1 in Examples 17 to 22 is the same as that in Example 16 except for the following differences: the values ​​of d1-d2 are adjusted, please refer to Table 3 for details.

[0146] Table 3

[0147] <![CDATA[d1-d2 / mm]]> ESFQR / nm Example 16 0.7 45.1 Embodiment 17 0.8 31.5 Embodiment 18 0.9 32.8 Embodiment 19 1.0 33.4 Embodiment 20 1.1 34 Embodiment 21 1.2 34.6 Embodiment 22 1.3 40.1

[0148] As can be seen from Table 3, referring to Examples 16 to 22, as the value of d1-d2 increases, the value of ESFQR of the silicon wafer 2 gradually increases, that is, the flatness of the silicon wafer 2 at the outer edge gradually deteriorates, and the value of ESFQR in Example 22 is the largest, which is 40.1, which means that the limiting portion 12 in the epitaxial substrate 1 in Example 22 blocks more gas flow 3, and the quality of the silicon wafer 2 produced by the epitaxial substrate 1 provided in this embodiment is not as good as the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 17 to 21. The value of ESFQR of the silicon wafer 2 produced by the epitaxial substrate 1 in Example 17 is the smallest. It shows that in Examples 16 to 22 of the present application, while ensuring that the limiting portion 12 can effectively limit the silicon wafer 2, the smaller the value of d1-d2, the smaller the effect of the limiting portion 12 on blocking the airflow 3, the greater the depth of the groove 124 along the axial direction Z, the more significant the effect of the groove 124, the smoother the surface of the silicon wafer 2 after epitaxy, and the smaller the ESFQR value of the silicon wafer 2 after epitaxy.

[0149] Referring to Example 17 to Example 21, when the values ​​of d1-d2 are within the range defined in the present application, the values ​​of ESFQR are all less than 35 nm, and the quality of the silicon wafer 2 produced by the epitaxial base 1 in Example 17 to Example 21 is good.

[0150] On the other hand, in Example 16, the value of d1-d2 is too small and smaller than the size of the silicon wafer 2 in the axial direction Z. The epitaxial base 1 has a poor airflow distribution effect on the airflow 3. The ESFQR value of the silicon wafer 2 after epitaxy is greater than 35nm. The quality of the silicon wafer 2 produced by the epitaxial base 1 in Example 16 is not as good as the quality of the silicon wafer 2 produced by the epitaxial base 1 in Examples 17 to 21.

[0151] On the other hand, in Example 22, the value of d1-d2 is larger, the limiting portion 12 blocks more airflow 3, the flow rate of airflow 3 flowing to the silicon wafer 2 through the groove 124 is insufficient, the ESFQR value of the silicon wafer 2 is greater than 35nm, and the quality of the silicon wafer 2 produced by the epitaxial base 1 in Example 22 is not as good as the quality of the silicon wafer 2 produced by the epitaxial base 1 in Examples 17 to 21.

[0152] Embodiment 23

[0153] The value of L in Example 23 is 29π.

[0154] Embodiment 24-29 Embodiment

[0155] The epitaxial substrate 1 in Examples 24 to 29 is the same as that in Example 23 except for the following differences: the value of L is adjusted, please refer to Table 4 for details.

[0156] Table 4

[0157] L / mm ESFQR / nm Embodiment 23 29π 44.2 Embodiment 24 30π 33.5 Embodiment 25 33π 26.7 Embodiment 26 36π 22.4 Embodiment 27 39π 25.5 Embodiment 28 41π 31.8 Embodiment 29 42π 41.5

[0158] As can be seen from Table 4, referring to Examples 23 to 29, as the value of L increases, the value of ESFQR of the silicon wafer 2 first decreases and then increases, that is, the flatness of the silicon wafer 2 at the outer edge is first improved and then gradually deteriorates. The value of ESFQR in Example 23 is the largest, which is 44.2, and the value of ESFQR in Example 29 is the second largest, which is 41.5, which means that the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 23 and 29 is not as good as the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 24 to 28, and the value of ESFQR in Example 26 is the smallest, which is 22.4nm. It shows that in Examples 23 to 29 of the present application, as the value of L increases, the size of the first protrusion 122 along the circumferential direction gradually increases, that is, the blocking effect of the first protrusion 122 on the airflow 3 is gradually strengthened.

[0159] With reference to Examples 24 to 28, the values ​​of L are all within the range defined in the present application, the values ​​of ESFQR are all less than 35 nm, and the quality of the silicon wafer 2 produced by the epitaxial substrate 1 in Examples 24 to 28 is relatively good.

[0160] On the other hand, in Example 23, the size of the first protrusion 122 along the circumferential direction Y is smaller than the range specified by the embodiments of the present application, and the first protrusion 122 cannot effectively block the airflow 3, and cannot suppress the growth rate of part of the silicon wafer 2, resulting in that the growth rates of various parts of the silicon wafer 2 are still quite different, which in turn results in the surface of the silicon wafer 2 being not smooth enough after epitaxy, and the ESFQR of the silicon wafer 2 after epitaxy is large. The quality of the silicon wafer 2 produced by the epitaxial base 1 in Example 23 is not as good as the quality of the silicon wafer 2 produced by the epitaxial base 1 in Examples 24 to 28.

[0161] On the other hand, in Example 29, the circumferential dimension of the first protrusion 122 is larger than the range specified by the embodiments of the present application, and the first protrusion 122 excessively suppresses the flow rate of the airflow 3, suppressing the growth rate of the portion of the silicon wafer 2 that does not need to suppress the growth rate, resulting in large differences in the growth rates of various portions of the silicon wafer 2, which in turn causes the surface of the silicon wafer 2 to be uneven after epitaxy, and the ESFQR of the silicon wafer 2 after epitaxy is large. The quality of the silicon wafer 2 produced by the epitaxial base 1 in Example 29 is not as good as the quality of the silicon wafer 2 produced by the epitaxial base 1 in Examples 24 to 28.

[0162] Embodiment 30

[0163] The value of H1 in Example 30 is 0.2 mm.

[0164] Example 31-Example 36

[0165] The epitaxial substrate 1 in Examples 31 to 36 is the same as that in Example 30 except for the following differences: the value of H1 is adjusted, please refer to Table 5 for details.

[0166] Table 5

[0167] <![CDATA[H1 / mm]]> ESFQR / nm Embodiment 30 0.2 44.8 Embodiment 31 0.3 34.2 Embodiment 32 0.4 33.5 Embodiment 33 0.5 28.1 Embodiment 34 0.6 26.4 Embodiment 35 0.7 23.7 Embodiment 36 0.8 23.4

[0168] As can be seen from Table 5, referring to Examples 30 to 36, as the value of H1 increases, the value of ESFQR of the silicon wafer 2 gradually decreases, that is, the flatness of the silicon wafer 2 at the outer edge gradually improves, and the value of ESFQR in Example 30 is the largest, which is 44.8, which means that the quality of the silicon wafer 2 produced by the epitaxial base 1 in Example 30 is not as good as the quality of the silicon wafer 2 produced by the epitaxial base 1 in Examples 31 to 36, and the value of ESFQR of the silicon wafer 2 produced by the epitaxial base 1 in Example 36 is the smallest. In addition, as the value of H1 increases, the trend of the value of ESFQR decreasing is slowing down, that is, the value of H1 does not need to increase infinitely. It shows that after the size of the first protrusion 122 along the axial direction Z increases to a certain extent, a better blocking effect can be achieved on the airflow 3, and as the size of the first protrusion 122 along the axial direction Z increases, the blocking effect of the first protrusion 122 on the airflow 3 will not be significantly improved.

[0169] Referring to Example 31-Example 35, when the value of H1 is within the range defined in the present application, the value of ESFQR is less than 35 nm, and the quality of the silicon wafer 2 produced by the epitaxial base 1 in Example 31-Example 35 is good.

[0170] On the other hand, in Example 30, the value of H1 is smaller than the range specified in the present application, the first protrusion 122 cannot effectively block the airflow 3, the ESFQR of the silicon wafer 2 after epitaxy is larger, and the quality of the silicon wafer 2 is not as good as the silicon wafer 2 produced by the epitaxy base 1 in Examples 31 to 36.

[0171] On the other hand, in Example 36, the value of H1 is greater than the range specified in the present application. Although the first protrusion 122 can have a good blocking effect on the airflow 3, and the ESFQR of the silicon wafer 2 after epitaxial growth also meets the requirements, compared with Examples 31 to 35, the extra part of the first protrusion 122 along the axial direction Z does not have a significant effect.

[0172] Embodiment 37

[0173] In Example 37, the value of I1 is 218 mm, and the value of D is 9.25 mm.

[0174] Example 38-Example 41

[0175] Example 31 - The epitaxial base 1 in Example 31 is the same as Example 30 except for the following differences: the value of I1 is adjusted, please refer to Table 6 for details.

[0176] Table 6

[0177] <![CDATA[I1 / mm]]> ESFQR / nm Embodiment 37 218 38.6 Embodiment 38 220 31.2 Embodiment 39 230 25.7 Embodiment 40 240 33.8 Embodiment 41 242 36.9

[0178] Referring to Example 37-Example 41, as the value of I1 increases, the value of ESFQR of silicon wafer 2 first decreases and then increases, that is, the flatness of silicon wafer 2 at the epitaxial portion first gradually improves and then gradually deteriorates. Among them, the value of I1 in Example 37 and Example 41 is outside the range defined by the embodiments of the present application, and the value of ESFQR in Example 37 and Example 41 is large, which means that the quality of silicon wafer 2 produced by epitaxial base 1 in Example 37 and Example 41 is not as good as the quality of silicon wafer 2 produced by epitaxial base 1 in Example 38-Example 40, and the value of ESFQR in Example 39 is small, which means that the quality of silicon wafer 2 produced by epitaxial base 1 in Example 39 is better.

[0179] Accordingly, see Fig.12 The present application also provides an epitaxial device, comprising an epitaxial base 1 as in any one of the above embodiments.

[0180] The above is a detailed introduction to an epitaxial base and epitaxial equipment provided in the embodiments of the present application. Specific examples are used in the present application to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A susceptor for epitaxy, characterized in that: include: A bearing portion (11), the bearing portion (11) having an axial direction (Z) and a radial direction (X) perpendicular to the axial direction (Z), and a circumferential direction (Y) surrounding the axial direction (Z), the bearing portion (11) having an edge (111) in the radial direction (X); A limiting portion (12), the limiting portion (12) comprising a first body (121) and a first protrusion (122), the first body (121) being arranged along the circumferential direction (Y) and connected to the edge (111), the first body (121) having a first reference surface (1211) in the axial direction (Z), the first protrusion (122) being connected to the first reference surface (1211); the first body (121) and the bearing portion (11) jointly defining a bearing space (123) for placing a silicon wafer (2), the first protrusion (122) being used to block at least part of the airflow (3) blowing toward the silicon wafer (2) along the radial direction (X); Wherein, the first protrusion (122) has a first surface (1221) and a second surface (1222) relative to each other in the circumferential direction (Y), the first surface (1221) and the second surface (1222) are connected to the first reference plane (1211), and can extend from the first reference plane (1211) in a direction away from the first body (121); the distance between the first surface (1221) and the second surface (1222) in the circumferential direction (Y) decreases along the axial direction (Z).

2. The epitaxial susceptor according to claim 1, characterized in that: One end of the first surface (1221) away from the first reference plane (1211) along the axial direction (Z) is connected to one end of the second surface (1222) away from the first reference plane (1211) along the axial direction (Z).

3. The epitaxial susceptor according to claim 2, characterized in that: The first protrusion (122) also has a third surface (1223), and the third surface (1223) is located between the first surface (1221) and the second surface (1222) and is respectively connected to the first surface (1221) and the second surface (1222), and the third surface (1223) is connected to one end of the first surface (1221) and the second surface (1222) away from the first reference plane (1211).

4. The epitaxial susceptor according to claim 3, characterized in that: The first surface (1221) protrudes in a direction approaching the second surface (1222), and / or the second surface (1222) protrudes in a direction approaching the first surface (1221).

5. The epitaxial susceptor according to claim 1, characterized in that: The limiting portion (12) comprises a plurality of first protrusions (122), the plurality of first protrusions (122) are arranged at intervals along the circumferential direction (Y), a groove (124) is provided between adjacent first protrusions (122), and the first surface (1221), the second surface (1222) and the first reference surface (1211) form the groove (124), and the airflow (3) can pass through the groove (124) and blow toward the silicon wafer (2) along the radial direction (X).

6. The epitaxial susceptor according to claim 1, characterized in that: The bearing portion (11) comprises: A second body (112), the second body (112) being connected to the first body (121), and the second body (112) and the first body (121) enclosing the bearing space (123); a second protrusion (113), the second protrusion (113) being arranged in the carrying space (123) along the circumferential direction (Y) and connected to the second body (112) and the first body (121), the second protrusion (113) being used to carry the silicon wafer (2) so that the silicon wafer (2) is spaced apart from the second body (112); The second protrusion (113) has a minimum dimension D along the radial direction (X), satisfying: 6.25 mm ≤ D ≤ 11.25 mm.

7. The epitaxial susceptor according to claim 1, characterized in that: The bearing portion (11) comprises: A second body (112), the second body (112) being connected to the first body (121), and the second body (112) and the first body (121) enclosing the bearing space (123); a second protrusion (113), the second protrusion (113) being arranged in the carrying space (123) along the circumferential direction (Y) and connected to the second body (112) and the first body (121), the second protrusion (113) being used to carry the silicon wafer (2) so that the silicon wafer (2) is spaced apart from the second body (112); The second protrusion (113) has a fourth surface (1131) facing away from the second body (112), and the fourth surface (1131) is used to support the silicon wafer (2). An angle α is formed between the surface where the fourth surface (1131) is located and the surface where the first reference plane (1211) is located, satisfying the following relationship: 3.1°≤α≤4.1°.

8. The epitaxial susceptor according to claim 7, characterized in that: The first body (121) further comprises a second reference surface (1212), the second reference surface (1212) deviates from the first reference surface (1211) along the axial direction (Z), and a maximum distance d1 is formed between the first reference surface (1211) and the second reference surface (1212) in the axial direction (Z); The second body (112) has a third reference surface (1121) away from the fourth surface (1131), the third reference surface (1121) is flush with the second reference surface (1212) in the radial direction (X), and a maximum distance d2 is formed between the fourth surface (1131) and the third reference surface (1121) in the axial direction (Z); Satisfies: d1>d2.

9. The epitaxial susceptor according to claim 8, characterized in that: d1 and d2 satisfy: 0.8mm≤d1-d2≤1.2mm.

10. The epitaxial susceptor according to claim 6 or 7, characterized in that: The second body (112) comprises: First subsection (1122); a second sub-section (1123), the second sub-section (1123) being arranged along the circumferential direction (Y) and connected to the first sub-section (1122) along the radial direction (X), the second sub-section (1123) having a plurality of through holes (1124) communicating with the bearing space (123); A third sub-section (1125), wherein the third sub-section (1125) is arranged along the circumferential direction (Y) and connected to a side of the second sub-section (1123) away from the first sub-section (1122) along the radial direction (X), the third sub-section (1125) is connected to the first body (121) along the radial direction (X), and the second protrusion (113) is connected to the third sub-section (1125) along the axial direction (Z).

11. The epitaxial susceptor according to claim 10, characterized in that: The maximum dimension of the first sub-portion (1122) along the radial direction (X) is I1, satisfying: 220mm≤I1≤240mm.

12. The epitaxial susceptor according to claim 1, characterized in that: The maximum dimension of the first protrusion (122) along the circumferential direction (Y) is L, satisfying: 30πmm≤L≤41πmm.

13. The epitaxial susceptor according to claim 1, characterized in that: The first protrusion (122) has a maximum dimension H1 along the axial direction (Z), satisfying: 0.3 mm ≤ H1 ≤ 0.7 mm.

14. An epitaxial device, characterized in that: It comprises the epitaxial susceptor as claimed in any one of claims 1 to 13.

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