Device and method for measuring additional phase noise of amplifier

Abstract

In order to simplify the complexity of an additional amplifier additional phase noise measurement system and reduce the additional phase noise measurement cost, the invention provides an amplifier additional phase noise measurement device and method, which combines the characteristic that the input and output signal frequencies of an amplifier are consistent, and uses a digital-to-analog converter to generate an input signal of the amplifier; an analog-to-digital converter is used for sampling an output signal of an amplifier, the sampling signal of the analog-to-digital converter is processed and calculated to obtain the additional phase noise of the amplifier, and the additional phase noise measuring device designed by the method is mainly composed of the digital-to-analog converter, the analog-to-digital converter and a clock source and is simple in structure; the digital-to-analog converter and the analog-to-digital converter use the same sampling clock, the phase noise requirements of the digital-to-analog converter, the analog-to-digital converter and the clock are reduced by using the correlation of the sampling clock, and the cost of the measuring device is reduced.

Description

Technical Field

[0001] The invention belongs to the technical field of microwave testing, and in particular relates to a device and method for measuring additional phase noise of an amplifier. Background Art

[0002] In communication systems, radar systems, and high-precision instruments, the additional phase noise of the amplifier has a significant impact on system performance. Additional phase noise reflects the deterioration of the amplifier's input signal phase noise, that is, the phase noise added to the input signal by the amplifier. The measurement of additional phase noise can be used to evaluate whether the amplifier's phase noise performance can meet system requirements, which is of practical significance. Existing additional phase noise measurement devices and methods, especially the test devices and methods for near-end phase noise (@1Hz), have the problem of complex measurement system structure and high cost. In the prior art, the additional phase noise measurement device is composed of hardware modules such as a reference source, a power divider, an attenuator, a phase shifter, a phase detector, a single-chip microcomputer control module, an orthogonal phase control module, a power supply module, and a noise voltage processing DSP module, and has high requirements for the phase noise of the reference source and the phase detector. This additional phase noise test system has a complex structure; or use commercial instruments for testing. When using commercial instruments for testing, not only a spectrum analyzer with extremely low noise floor is required for phase noise measurement, but also a signal source with extremely low phase noise is required to generate the input signal of the amplifier to be tested. Such an additional phase noise measurement system is very expensive. Therefore, it is necessary to invent a simple and efficient measurement device for the additional phase noise of the amplifier, simplify the complexity of the additional amplifier additional phase noise measurement system, and reduce the additional phase noise measurement cost. Summary of the invention

[0003] To this end, the present invention proposes an amplifier additional phase noise measurement device and method. Aiming at the problem that the existing amplifier additional phase noise measurement device, especially the device for measuring the proximal phase noise floor, is complex in structure and expensive, combined with the characteristic that the input and output signals of the amplifier have consistent frequencies, a digital-to-analog converter is used to generate the input signal of the amplifier, an analog-to-digital converter is used to sample the output signal of the amplifier, and the sampling signal of the analog-to-digital converter is processed and calculated to obtain the additional phase noise of the amplifier. The additional phase noise measurement device designed by the method is mainly composed of a digital-to-analog converter, an analog-to-digital converter, and a clock source, and the device structure is simple; the digital-to-analog converter and the analog-to-digital converter use the same sampling clock, and the correlation of the sampling clock is used to reduce the phase noise requirements for the digital-to-analog converter, the analog-to-digital converter, and the clock, thereby reducing the cost of the measuring device.

[0004] The invention discloses a measuring device for additional phase noise of an amplifier, comprising a digital-to-analog converter, an attenuator 1, an attenuator 2, an analog-to-digital converter, a clock source, an analog power supply, a digital power supply, a programmable logic device and a host computer; the digital-to-analog converter, the analog-to-digital converter, the clock source and the analog power supply are mounted on the same PCB circuit board, the programmable logic device and the digital power supply can be mounted on the same PCB circuit board as the above-mentioned devices, or can be mounted on the PCB circuit board and connected to the PCB circuit board on which the above-mentioned devices are mounted via cables; the host computer exchanges data with the programmable logic device via a network.

[0005] The host computer transmits the frequency Fc required to be measured by the amplifier under test to the programmable logic device, and the programmable logic device controls the digital-to-analog converter to generate a radio frequency signal of the corresponding frequency. The radio frequency signal adjusts the signal power within the allowable input power range of the amplifier under test through the attenuator 1, and the attenuated radio frequency signal is used as the input signal of the amplifier under test; the amplifier under test amplifies the input radio frequency signal to generate an output signal, and the attenuator 2 attenuates the power of the output signal of the amplifier under test within the allowable input range of the analog-to-digital converter, and outputs it to the analog-to-digital converter; the analog-to-digital converter samples the input signal and outputs the sampling result to the programmable logic device, and the programmable logic device performs digital down-conversion, filtering and extraction on the sampling result, reduces the sampling rate of the sampled data to Fs2 and uploads the extracted data to the host computer, and the host computer performs Fourier transform on the extracted data to obtain spectrum power information, and obtains the additional phase noise of the amplifier under test through calculation.

[0006] The sampling rate Fs1 of the digital-to-analog conversion device and the analog-to-digital conversion device is consistent and is generated by a clock source; the analog power supply generates power for the analog part of the digital-to-analog conversion device and the analog-to-digital conversion device; the digital power supply generates power for the digital part of the programmable logic device, the digital-to-analog conversion device and the analog-to-digital conversion device.

[0007] Furthermore, digital down-conversion, filtering, and extraction can be implemented in a programmable logic device or in a host computer. Implementing them in a programmable logic device can effectively reduce the amount of data transmitted, and the amount of data is reduced to Fs2 / Fs1, thereby reducing the transmission time from the programmable logic device to the host computer and improving measurement efficiency.

[0008] Furthermore, the clock source generates one clock signal, which enters the digital-to-analog conversion device and the analog-to-digital conversion device as their sampling clocks after power division, or the clock source can also generate two clock signals, which enter the digital-to-analog conversion device and the analog-to-digital conversion device as their sampling clocks respectively.

[0009] A method for measuring the additional phase noise of an amplifier according to the present invention includes the following steps: A programmable logic device performs digital down-conversion, filtering, and decimation on the digital signals sampled by an analog-to-digital conversion device, reduces the sampling rate of the sampled data to Fs2, and uploads the decimated data to a host computer; The host computer performs a discrete Fourier transform on the decimated data to obtain spectral power information P(f), where -Fs2 / 2 < f < Fs2 / 2; The additional phase noise at the frequency offset f is Γ(f) = P(f) - 10*log10(Δf / 1Hz) - P(0) (dBc / Hz), where P(0) is the spectral power at the frequency of the amplifier output signal, and Δf is the spectral resolution after the discrete Fourier transform, Δf = Fs2 / N, and N is the number of points of the decimated data.

[0010] The sampling time t (s) of the analog-to-digital conversion device is related to the spectral resolution Δf after the Fourier transform, t = 1 / Δf.

[0011] The measurement accuracy of the additional phase noise is affected by the system noise and the number of sampling points N. Increasing the number of sampling points N can improve the measurement accuracy until reaching the system noise floor.

[0012] The beneficial effects of the present invention are as follows

[0013] 1. The additional phase noise measurement device for an amplifier proposed by the present invention mainly consists of an analog-to-digital conversion device, an analog-to-digital conversion device, a programmable logic device, and a clock source, and has the advantage of simple structure.

[0014] 2. The present invention uses the method of generating the sampling clocks of the analog-to-digital conversion device and the analog-to-digital conversion device with the same clock source, which cancels the influence of the phase noise generated by the sampling clocks of the analog-to-digital conversion device and the analog-to-digital conversion device on the measurement of the additional phase noise, effectively reducing the requirements for the phase noise of the analog-to-digital conversion device, the analog-to-digital conversion device, and the clock source. The device has the ability to test the additional phase noise of -95dBc / Hz@1Hz within the P band.

[0015] 3. The additional phase noise measurement device for an amplifier proposed by the present invention is controlled by a host computer and can perform automated measurements, improving the measurement efficiency. Description of the Drawings

[0016] Figure 1 It is a schematic structural diagram of the device of the present invention.

[0017] Figure 2 It is a flowchart of the sampling data processing. Detailed Embodiments

[0018] The technical solutions in the embodiments of the present invention are described clearly and completely below. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0019] like Figure 1 As shown, the amplifier additional phase noise measurement device of the present invention includes a digital-to-analog converter, an attenuator 1, a device to be tested, an attenuator 2, an analog-to-digital converter, a clock source, an analog power supply, a digital power supply, a programmable logic device and a host computer.

[0020] The digital-to-analog converter is controlled by a programmable logic device to generate a radio frequency signal, which is attenuated by attenuator 1 and used as the input signal of the device under test. The function of attenuator 1 is to adjust the signal power output by the digital-to-analog converter to within the input power range allowed by the device under test.

[0021] The RF signal output by the device under test is attenuated by the attenuator 2 and then input to the analog-to-digital converter. The function of the attenuator 2 is to adjust the signal power output by the device under test to within the input power range allowed by the analog-to-digital converter.

[0022] The analog-to-digital converter device samples the input signal, converts the analog signal into a digital signal, and transmits the digital signal to the programmable logic device.

[0023] The clock source generates one clock signal, which is output to the digital-to-analog conversion device and the analog-to-digital conversion device respectively after power division, and serves as the sampling clock of the digital-to-analog conversion device and the analog-to-digital conversion device; the clock source can also generate two phase-related clock signals, which are output to the digital-to-analog conversion device and the analog-to-digital conversion device respectively, and serve as the sampling clock of the digital-to-analog conversion device and the analog-to-digital conversion device. The sampling rate of the digital-to-analog conversion device and the analog-to-digital conversion device is the same as the sampling clock frequency, which is Fs1.

[0024] The analog power supply generates the power supply for the analog part of the digital-to-analog conversion device and the analog-to-digital conversion device.

[0025] Digital power supplies generate power for programmable logic devices, the digital part of digital-to-analog converters, and the analog part of analog-to-digital converters.

[0026] The function of the programmable logic device is to control the digital-to-analog conversion device to generate the RF signal required for measurement, control the analog-to-digital conversion device to sample and collect the sampled data output by the analog-to-digital conversion device, process the sampled data signal, and exchange data with the host computer.

[0027] The calculation process of the additional phase noise is that the programmable logic device performs digital down-conversion, filtering, and decimation on the digital signal sampled by the analog-to-digital conversion device, reduces the sampling rate of the sampled data to Fs2, and uploads the decimated data to the host computer; the host computer performs discrete Fourier transform on the decimated data to obtain the spectral power information P(f), -Fs2 / 2 < f < Fs2 / 2; the additional phase noise at the frequency offset f is Γ(f) = P(f) - 10*log10(Δf / 1Hz) - P(0) (dBc / Hz), where P(0) is the spectral power at the frequency of the amplifier output signal, Δf is the spectral resolution after discrete Fourier transform, Δf = Fs2 / N, and N is the number of points of the decimated data.

[0028] The sampling time t (s) of the analog-to-digital conversion device is related to the spectral resolution Δf (Hz) after Fourier transform, t = 1 / Δf.

[0029] The measurement accuracy of the additional phase noise is affected by the system noise and the number of sampling points N. Increasing the number of sampling points N can improve the measurement accuracy until reaching the system noise floor.

[0030] The digital down-conversion, filtering, and decimation involved in the calculation process can be deployed on the programmable logic device or the host computer. Deploying on the programmable logic device can reduce the data transmission volume with the host computer, reducing it to Fs2 / Fs1 times the original data volume.

[0031] The entire measurement process is controlled by the host computer, and the control software can be designed automatically, reducing the manual measurement workload and improving the measurement efficiency.

[0032] The present invention is not limited to the above specific embodiments, and the present invention can have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made based on the technical essence of the present invention to the above embodiments shall be included in the protection scope of the present invention.

Claims

1. A device for measuring added phase noise of an amplifier, characterized in that: It includes a digital-to-analog converter, an attenuator 1, an attenuator 2, an analog-to-digital converter, a clock source, an analog power supply, a digital power supply, a programmable logic device and a host computer; the digital-to-analog converter, the analog-to-digital converter, the clock source and the analog power supply are installed on the same PCB circuit board, and the programmable logic device and the digital power supply can be installed on the same PCB circuit board as the above devices, or installed on the PCB circuit board and connected to the PCB circuit board on which the above devices are installed through a cable; the host computer exchanges data with the programmable logic device through a network; The host computer transmits the frequency Fc required to be measured by the amplifier under test to the programmable logic device, and the programmable logic device controls the digital-to-analog converter to generate a radio frequency signal of the corresponding frequency. The radio frequency signal is adjusted to a signal power within the allowable input power range of the amplifier under test through the attenuator 1, and the attenuated radio frequency signal is used as the input signal of the amplifier under test; The amplifier under test amplifies the input radio frequency signal to generate an output signal, and the attenuator 2 attenuates the power of the output signal of the amplifier under test within the input range allowed by the analog-to-digital converter and outputs it to the analog-to-digital converter; The analog-to-digital converter samples the input signal and outputs the sampling result to the programmable logic device, which performs digital down-conversion, filtering and extraction on the sampling result, reduces the sampling rate of the sampled data to Fs2 and uploads the extracted data to the host computer, which performs Fourier transform on the extracted data to obtain spectrum power information, and obtains the additional phase noise of the amplifier under test through calculation; The sampling rates Fs1 of the digital-to-analog conversion device and the analog-to-digital conversion device are consistent and are generated by a clock source; The analog power supply generates power for the digital-to-analog conversion device and the analog part of the analog-to-digital conversion device. The digital power supply generates power for programmable logic devices, digital-to-analog converters, and digital parts of analog-to-digital converters.

2. The device for measuring the added phase noise of an amplifier according to claim 1, characterized in that: Digital down-conversion, filtering, and extraction can be implemented in a programmable logic device or in a host computer. Implementing them in a programmable logic device can effectively reduce the amount of data transmitted, and the amount of data is reduced to Fs2 / Fs1, thereby reducing the transmission time from the programmable logic device to the host computer and improving measurement efficiency.

3. The device for measuring the added phase noise of an amplifier according to claim 1, characterized in that: The clock source generates one clock signal, which enters the digital-to-analog conversion device and the analog-to-digital conversion device as their sampling clocks after power division, or the clock source can also generate two clock signals, which enter the digital-to-analog conversion device and the analog-to-digital conversion device as their sampling clocks respectively.

4. A method for measuring amplifier added phase noise, applied to an amplifier added phase noise measuring device according to any one of claims 1 to 3, characterized in that: The programmable logic device performs digital down-conversion, filtering, and decimation on the digital signals sampled by the analog-to-digital conversion device, reduces the sampling rate of the sampled data to Fs2, and uploads the decimated data to the host computer; the host computer performs a discrete Fourier transform on the decimated data to obtain the spectral power information P(f), -Fs2 / 2 < f < Fs2 / 2; the additional phase noise at the frequency offset f is Γ(f) = P(f) - 10*log10(Δf / 1Hz) - P(0) (dBc / Hz), where P(0) is the spectral power at the frequency of the amplifier output signal, Δf is the spectral resolution after the discrete Fourier transform, Δf = Fs2 / N, and N is the number of points of the decimated data.

5. The method for measuring the added phase noise of an amplifier according to claim 4, characterized in that: The sampling time t (s) of the analog-to-digital conversion device is related to the spectral resolution Δf after the Fourier transform, t = 1 / Δf.

6. The method for measuring the added phase noise of an amplifier according to claim 4, characterized in that: The measurement accuracy of the additional phase noise is affected by the system noise and the number of sampling points N. Increasing the number of sampling points N can improve the measurement accuracy until reaching the system noise floor.

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