Apparatus and method for measuring amplifier additional phase noise

Abstract

In order to simplify the complexity of the additional amplifier additional phase noise measurement system and reduce the cost of the additional phase noise measurement, the application provides an amplifier additional phase noise measurement device and method, which combines the characteristics that the input and output signal frequencies of the amplifier are consistent, uses a digital-to-analog converter to generate the input signal of the amplifier, uses an analog-to-digital converter to sample the output signal of the amplifier, processes and calculates the sampling signal of the analog-to-digital converter to obtain the additional phase noise of the amplifier, the additional phase noise measurement device designed by the method mainly comprises a digital-to-analog converter, an analog-to-digital converter and a clock source, and the device structure is simple; the digital-to-analog converter and the analog-to-digital converter use the same sampling clock, the correlation of the sampling clock is utilized to reduce the phase noise requirements of the digital-to-analog converter, the analog-to-digital converter and the clock, and the cost of the measurement device is reduced.

Description

Technical Field

[0001] This invention belongs to the field of microwave testing technology, specifically relating to a device and method for measuring the additional phase noise of an amplifier. Background Technology

[0002] In communication systems, radar systems, and high-precision instruments, the added phase noise of amplifiers has a significant impact on system performance. Added phase noise reflects the degradation of the input signal's phase noise by the amplifier; that is, the phase noise added to the input signal by the amplifier. Measuring added phase noise is of practical significance in evaluating whether the amplifier's phase noise performance meets system requirements. Existing added phase noise measurement devices and methods, especially those for near-end phase noise (@1Hz), suffer from complex system structures and high costs. Current technologies typically consist of hardware modules such as a reference source, power divider, attenuator, phase shifter, phase detector, microcontroller control module, quadrature phase control module, power supply module, and noise voltage processing DSP module. These devices place high demands on the phase noise of the reference source and phase detector, making such added phase noise testing systems complex. Alternatively, commercial instruments can be used. However, using commercial instruments requires not only a spectrum analyzer with extremely low noise floor for phase noise measurement but also a signal source with extremely low phase noise to generate the input signal for the amplifier under test, making such added phase noise measurement systems very expensive. Therefore, it is necessary to invent a simple and efficient device for measuring amplifier-added phase noise, thereby simplifying the complexity of the amplifier-added phase noise measurement system and reducing the cost of added phase noise measurement. Summary of the Invention

[0003] To address this issue, this invention proposes an amplifier additional phase noise measurement device and method. It addresses the problems of complex and expensive structures in existing amplifier additional phase noise measurement devices, particularly those measuring near-end phase noise floor. Taking advantage of the consistent frequency of amplifier input and output signals, this invention uses a digital-to-analog converter (DAC) to generate the amplifier's input signal and an analog-to-digital converter (ADC) to sample the amplifier's output signal. The sampled signal from the ADC is then processed and calculated to obtain the amplifier's additional phase noise. The additional phase noise measurement device designed using this method mainly consists of a DAC, an ADC, and a clock source, resulting in a simple structure. The DAC and ADC use the same sampling clock, leveraging the correlation of the sampling clocks to reduce the phase noise requirements of the DAC, ADC, and clock, thereby lowering the cost of the measurement device.

[0004] The present invention discloses a device for measuring amplifier-added phase noise, comprising a digital-to-analog converter, attenuator 1, attenuator 2, analog-to-digital converter, clock source, analog power supply, digital power supply, programmable logic device, and host computer; the digital-to-analog converter, analog-to-digital converter, clock source, and analog power supply are mounted on the same PCB circuit board, and the programmable logic device and digital power supply may be mounted on the same PCB circuit board as the above devices, or mounted on the PCB circuit board and connected to the PCB circuit board on which the above devices are mounted via cables; the host computer exchanges data with the programmable logic device through a network.

[0005] The host computer transmits the frequency Fc to be measured by the amplifier under test (AUT) to the programmable logic device (PLD). The PLD controls the digital-to-analog converter (DAC) to generate a radio frequency (RF) signal of the corresponding frequency. The RF signal is adjusted by attenuator 1 to bring its power within the allowable input power range of the AUT. The attenuated RF signal serves as the input signal of the AUT. The AUT amplifies the input RF signal to generate an output signal. Attenuator 2 attenuates the power of the AUT output signal within the allowable input range of the DAC and outputs it to the DAC. The DAC samples the input signal and outputs the sampling result to the PLD. The PLD performs digital down-conversion, filtering, and decimation on the sampling result, reducing the sampling rate of the sampled data to Fs2 and uploading the decimated data to the host computer. The host computer performs a Fourier transform on the decimated data to obtain spectral power information and calculates the additional phase noise of the AUT.

[0006] The sampling rate Fs1 of the digital-to-analog converter and the analog-to-digital converter is consistent and is generated by a clock source; the analog power supply generates power for the analog section of the digital-to-analog converter and the analog section of the analog-to-digital converter; the digital power supply generates power for the programmable logic device, the digital-to-analog converter and the digital section of the analog-to-digital converter.

[0007] Furthermore, digital downconversion, filtering, and decimation can be implemented in the programmable logic device (PLD) or in the host computer. Implementing it in the PLD can effectively reduce the amount of data transmitted, reducing the data volume to Fs2 / Fs1, thereby reducing the transmission time from the PLD to the host computer and improving measurement efficiency.

[0008] Furthermore, the clock source generates one clock signal, which, after being divided by a power divider, enters the digital-to-analog converter and the analog-to-digital converter respectively as their sampling clocks. Alternatively, the clock source can generate two clock signals, each entering the digital-to-analog converter and the analog-to-digital converter respectively as their sampling clocks.

[0009] A method for measuring the additional phase noise of an amplifier according to the present invention includes the following steps: A programmable logic device performs digital down-conversion, filtering, and decimation on the digital signals sampled by an analog-to-digital conversion device, reduces the sampling rate of the sampled data to Fs2, and uploads the decimated data to a host computer; The host computer performs a discrete Fourier transform on the decimated data to obtain spectral power information P(f), where -Fs2 / 2 < f < Fs2 / 2; The additional phase noise at a frequency offset f is Γ(f) = P(f) - 10*log10(Δf / 1Hz) - P(0) (dBc / Hz), where P(0) is the spectral power at the frequency of the amplifier output signal, and Δf is the spectral resolution after the discrete Fourier transform, Δf = Fs2 / N, and N is the number of points of the decimated data.

[0010] The sampling time t (s) of the analog-to-digital conversion device is related to the spectral resolution Δf after Fourier transform, t = 1 / Δf.

[0011] The measurement accuracy of the additional phase noise is affected by system noise and the number of sampling points N. Increasing the number of sampling points N can improve the measurement accuracy until reaching the system noise floor.

[0012] The beneficial effects of the present invention are as follows

[0013] 1. The additional phase noise measurement device for an amplifier proposed by the present invention mainly consists of an analog-to-digital conversion device, an analog-to-digital conversion device, a programmable logic device, and a clock source, and has the advantage of a simple structure.

[0014] 2. The method of using the same clock source to generate the sampling clocks of the analog-to-digital conversion device and the analog-to-digital conversion device in the present invention cancels the influence of the phase noise generated by the sampling clocks of the analog-to-digital conversion device and the analog-to-digital conversion device on the measurement of the additional phase noise, effectively reducing the requirements for the phase noise of the analog-to-digital conversion device, the analog-to-digital conversion device, and the clock source. The device has the ability to test additional phase noise of -95dBc / Hz@1Hz within the P band.

[0015] 3. The additional phase noise measurement device for an amplifier proposed by the present invention is controlled by a host computer and can perform automated measurements, improving the measurement efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic structural diagram of the device of the present invention.

[0017] Figure 2 It is a flow chart of sampling data processing. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0018] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] like Figure 1 As shown, the amplifier additional phase noise measurement device of the present invention comprises a digital-to-analog converter, an attenuator 1, a device under test, an attenuator 2, an analog-to-digital converter, a clock source, an analog power supply, a digital power supply, a programmable logic device, and a host computer.

[0020] The digital-to-analog converter (DAC) generates a radio frequency (RF) signal under the control of a programmable logic device (PLD). The RF signal is attenuated by attenuator 1 and then used as the input signal of the device under test (DUT). The function of attenuator 1 is to adjust the signal power output by the DAC to the range of the input power allowed by the DUT.

[0021] The radio frequency signal output by the device under test is attenuated by attenuator 2 and then input to the analog-to-digital converter. The function of attenuator 2 is to adjust the signal power output by the device under test to the range of input power allowed by the analog-to-digital converter.

[0022] Analog-to-digital converters sample the input signal, convert the analog signal into a digital signal, and transmit the digital signal to a programmable logic device.

[0023] The clock source generates one clock signal, which is then divided and output to the digital-to-analog converter (DAC) and the analog-to-digital converter (ADC) respectively, serving as their sampling clocks. The clock source can also generate two phase-dependent clock signals, which are output to the DAC and the ADC respectively, serving as their sampling clocks. The sampling rate of the DAC and the ADC is the same as the sampling clock frequency, which is Fs1.

[0024] The analog power supply generates power for the analog-to-digital converter and the analog section of the analog-to-digital converter.

[0025] Digital power supplies provide power to programmable logic devices, the digital section of digital-to-analog converters, and the analog section of analog-to-digital converters.

[0026] The function of a programmable logic device is to control the digital-to-analog converter to generate the radio frequency signal required for measurement, control the analog-to-digital converter to sample and collect the sampled data output by the analog-to-digital converter, process the sampled data signal, and interact with the host computer.

[0027] The calculation process of the additional phase noise is that the programmable logic device performs digital down-conversion, filtering, and decimation on the digital signal sampled by the analog-to-digital conversion device, reduces the sampling rate of the sampled data to Fs2, and uploads the decimated data to the host computer; the host computer performs discrete Fourier transform on the decimated data to obtain the spectral power information P(f), -Fs2 / 2 < f < Fs2 / 2; the additional phase noise at the frequency offset f is Γ(f) = P(f) - 10*log10(Δf / 1Hz) - P(0) (dBc / Hz), where P(0) is the spectral power at the frequency of the amplifier output signal, Δf is the spectral resolution after discrete Fourier transform, Δf = Fs2 / N, and N is the number of points of the decimated data.

[0028] The sampling time t (s) of the analog-to-digital conversion device is related to the spectral resolution Δf (Hz) after Fourier transform, t = 1 / Δf.

[0029] The measurement accuracy of the additional phase noise is affected by the system noise and the number of sampling points N. Increasing the number of sampling points N can improve the measurement accuracy until reaching the system noise floor.

[0030] The digital down-conversion, filtering, and decimation involved in the calculation process can be deployed on the programmable logic device or the host computer. Deploying on the programmable logic device can reduce the data transmission volume with the host computer, reduced to Fs2 / Fs1 times of the original data volume.

[0031] The entire measurement process is controlled by the host computer, and the control software can be designed automatically, reducing the manual amount of measurement and improving the measurement efficiency.

[0032] The present invention is not limited to the above specific embodiments, and the present invention can have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made based on the technical essence of the present invention to the above embodiments shall be included in the protection scope of the present invention.

Claims

1. An apparatus for measuring the additional phase noise of an amplifier, characterized by: The device comprises a digital-to-analog converter, an attenuator 1, an attenuator 2, an analog-to-digital converter, a clock source, an analog power supply, a digital power supply, a programmable logic device and a host computer; the digital-to-analog converter, the analog-to-digital converter, the clock source and the analog power supply are installed on the same PCB circuit board, the programmable logic device and the digital power supply can be installed on the same PCB circuit board as the above-mentioned devices or on a PCB circuit board connected with the above-mentioned device-installed PCB circuit board through a cable; the host computer exchanges data with the programmable logic device through a network. The host computer transmits the frequency Fc required for measuring the to-be-tested amplifier to the programmable logic device, the programmable logic device controls the digital-to-analog converter to generate a radio frequency signal of the corresponding frequency, the radio frequency signal is adjusted in power by the attenuator 1 within the input power range allowed by the to-be-tested amplifier, and the attenuated radio frequency signal is used as the input signal of the to-be-tested amplifier. The to-be-tested amplifier amplifies the input radio frequency signal to generate an output signal, the attenuator 2 attenuates the power of the output signal of the to-be-tested amplifier within the input range allowed by the analog-to-digital converter, and outputs the signal to the analog-to-digital converter. The analog-to-digital converter samples the input signal and outputs the sampling result to the programmable logic device, the programmable logic device performs digital down-conversion, filtering and decimation on the sampling result, reduces the sampling rate of the sampling data to Fs2, uploads the decimated data to the host computer, the host computer performs Fourier transform on the decimated data to obtain the frequency spectrum power information, and calculates the additional phase noise of the to-be-tested amplifier. The sampling rates of the digital-to-analog converter and the analog-to-digital converter are consistent and are generated by the clock source. The analog power supply generates the power supply for the analog part of the digital-to-analog converter and the analog-to-digital converter. The digital power supply generates the power supply for the digital part of the programmable logic device, the digital-to-analog converter and the analog-to-digital converter.

2. The apparatus for measuring the additional phase noise of an amplifier according to claim 1, wherein: Digital down-conversion, filtering and decimation can be implemented in the programmable logic device or in the host computer, and implementation in the programmable logic device can effectively reduce the amount of data transmitted, reduce the transmission time from the programmable logic device to the host computer and improve the measurement efficiency.

3. The apparatus of claim 1, wherein: The clock source generates one clock signal, which is divided into two parts and enters the digital-to-analog converter and the analog-to-digital converter as their sampling clock, or the clock source can generate two clock signals, each of which enters the digital-to-analog converter and the analog-to-digital converter as their sampling clock.

4. A method for measuring the additional phase noise of an amplifier, applied to the measuring device of the additional phase noise of an amplifier according to any one of claims 1 to 3, characterized in that: The programmable logic device performs digital down conversion, filtering and decimation on the digital signal of the collected analog-to-digital converter device sample, reduces the sampling rate of the sample data to Fs2, and uploads the decimated data to the host computer; the host computer performs discrete Fourier transform on the decimated data to obtain frequency spectrum power information P(f), -Fs2 / 2<f<Fs2 / 2; the additional phase noise at the frequency offset f is Γ(f)=P(f)-10*log10(Δf / 1Hz)-P(0)(dBc / Hz), P(0) is the frequency spectrum power at the frequency of the amplifier output signal, and Δf is the frequency spectrum resolution after the discrete Fourier transform, Δf=Fs2 / N, N is the number of points of the decimated data.

5. The method of claim 4, wherein: The sampling time t of the analog-to-digital converter device is related to the frequency spectrum resolution Δf after the Fourier transform, t=1 / Δf.

6. The method of claim 4, wherein: The measurement accuracy of the additional phase noise is affected by the system noise and the sampling point number N, and increasing the sampling point number N can improve the measurement accuracy until the system noise background is reached.

Images