Chip performance detection circuit and method and vehicle gauge level chip

Abstract

The invention provides a chip performance detection circuit and method and a vehicle gauge level chip. The chip performance detection circuit comprises a first chip, a first bonding wire and a second chip, the first chip comprises a first pin bonding pad and a detection circuit, and the second chip comprises a second pin bonding pad. And acquiring an electric signal for representing whether the first bonding wire is in an open circuit state from the first pin bonding pad through the detection circuit. Therefore, the detection circuit can obtain the detection result used for determining whether the first chip and the second chip are successfully electrically connected or not according to the electric signal, and outputs the detection result through the pin, so that the chip performance detection circuit can test whether the first chip and the second chip are successfully electrically connected or not through the pin of the first chip. Therefore, the chips which are not electrically connected successfully can be screened out, the situation that circuits in the chips work in a non-ideal state for a long time is avoided, and the reliability of the chips is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a chip performance detection circuit, method and automotive-grade chip. Background Art

[0002] In chip design, bonding wires are often used to package multiple chips in a package structure to form a multi-chip module (MCM). MCM has the advantages of small size, high reliability, high performance and multi-function, and is widely used in automotive electronics, communication systems and medical equipment.

[0003] At present, when the bonding wire is in an open circuit state, the MCM works in a non-ideal state for a long time, which will cause the internal circuit of the chip to be in a state of breakdown voltage (BV) or produce negative bias temperature instability (NBIT) effect, seriously affecting the reliability of the chip. Therefore, how to detect whether the bonding wire is in an open circuit state is an urgent research topic. Summary of the invention

[0004] The present application provides a chip performance detection circuit, method and automotive-grade chip, which can detect chips with open bonding wires through the chip pins, thereby improving the reliability of the chip.

[0005] In a first aspect, the present application provides a chip performance detection circuit, which includes: a first chip, a first bonding wire and a second chip, the first chip includes: a first pin pad and a detection circuit, and the second chip includes a second pin pad.

[0006] The first end of the first pin pad is electrically connected to the second pin pad through the first bonding wire, the second end of the first pin pad is electrically connected to the input end of the detection circuit, the output end of the detection circuit is electrically connected to a pin in the first chip, wherein the first pin pad is also electrically connected to the internal circuit in the first chip.

[0007] The detection circuit is used to obtain an electrical signal from the first pin pad, and the electrical signal is used to indicate whether the first bonding wire is in an open circuit state.

[0008] The detection circuit is also used to obtain a detection result according to the electrical signal and output the detection result through a pin. The detection result is used to determine whether the first chip and the second chip are successfully electrically connected.

[0009] Through the chip performance detection circuit provided in the first aspect, an electrical signal for characterizing whether the first bonding wire is in an open circuit state is obtained from the first pin pad through the detection circuit. In this way, the detection circuit can obtain a detection result for determining whether the first chip and the second chip are successfully electrically connected based on the electrical signal, and output the detection result through the pin, so that the chip performance detection circuit can test whether the first chip and the second chip are successfully electrically connected through the pin of the first chip. Thus, the chips that are not successfully electrically connected can be screened out, avoiding the circuit inside the chip from working in a non-ideal state for a long time, and improving the reliability of the chip.

[0010] In one possible design, the detection circuit is specifically used to obtain a detection result of a first level when the electrical signal indicates that the first bonding wire is not in an open-circuit state, and the first level is used to indicate that the first chip and the second chip are successfully electrically connected; or, when the electrical signal indicates that the first bonding wire is in an open-circuit state, obtain a detection result of a second level, and the second level is used to indicate that the first chip and the second chip are not successfully electrically connected.

[0011] In a possible design, when the electrical signal is a current signal, the detection circuit includes: a current source and a first output component.

[0012] The first end of the current source is electrically connected to the second end of the first pin pad, the input end of the first output component is electrically connected between the first end of the current source and the second end of the first pin pad, the output end of the first output component is electrically connected to a pin in the first chip, and the second end of the current source is grounded.

[0013] The first output component is used to obtain a current signal from the first pin pad and to obtain a reference current signal from a current source.

[0014] The first output component is also used to compare the current signal with the reference current signal to obtain a detection result, and output the detection result through a pin.

[0015] In a possible design, a current value of the reference current signal is smaller than a current value of the current signal.

[0016] In a possible design, when the electrical signal is a voltage signal, the detection circuit includes: a switch component, a weak pull-down component and a second output component.

[0017] The first end of the switch component is electrically connected to the second end of the first pin pad, the control end of the switch component is used to access the control signal, the control signal is used to control the conduction or shutdown of the switch component, the second end of the switch component is electrically connected to the first end of the weak pull-down component, the input end of the second output component is electrically connected between the second end of the switch component and the first end of the weak pull-down component, the output end of the second output component is electrically connected to a pin in the first chip, and the second end of the weak pull-down component is grounded.

[0018] The weak pull-down component is used to generate a detection result under the action of a voltage signal when the switch component is turned on, and transmit the detection result to the second output component.

[0019] The second output component is used to output the detection result through a pin.

[0020] In one possible design, the weak pull-down component is a resistor.

[0021] In one possible design, the chip performance detection circuit also includes: a second bonding wire.

[0022] The second end of the first chip is electrically connected to the second end of the second chip through a second bonding wire, wherein whether the second bonding wire is in an open circuit state is detected through a pin in the first chip.

[0023] In one possible design, the first chip and the second chip also include: a third pin pad, which is electrically connected to the second bonding lead, wherein the third pin pad is used to transmit electrical signals between the first chip and the second chip to detect through the pin whether the second bonding lead is in an open circuit state.

[0024] In a second aspect, the present application provides a chip performance detection method, which is applied to the chip performance detection circuit in the first aspect and each possible design of the first aspect. The method comprises:

[0025] The detection circuit obtains an electrical signal from the first pin pad, and the electrical signal is used to indicate whether the first bonding wire is in an open circuit state.

[0026] The detection circuit obtains a detection result according to the electrical signal, and the detection result is used to determine whether the first chip and the second chip are successfully electrically connected.

[0027] The beneficial effects of the methods provided in the above-mentioned second aspect and each possible design of the above-mentioned second aspect can be referred to the beneficial effects brought about by the above-mentioned first aspect and each possible implementation method of the first aspect, and will not be repeated here.

[0028] In a third aspect, the present application provides an automotive-grade chip, which includes the chip performance detection circuit in the above-mentioned first aspect and various possible designs of the above-mentioned first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a structural schematic diagram of a multi-chip module in the related art;

[0030] Figure 2 A schematic diagram of the structure of a chip performance detection circuit provided in an embodiment of the present application;

[0031] Figure 3 A schematic diagram of a chip performance detection method provided in an embodiment of the present application;

[0032] Figure 4 A schematic diagram of the structure of another chip performance detection circuit provided in an embodiment of the present application;

[0033] Figure 5 A schematic diagram of the structure of another chip performance detection circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0034] In this application, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c alone can represent: a, b, c, a and b, a and c, or a, b, and c, where a, b, and c can be single or multiple. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0035] The directions or positional relationships indicated by terms such as "center", "longitudinal", "lateral", "up", "down", "left", "right", "front", and "back" are based on the directions or positional relationships shown in the accompanying drawings and are only for the convenience of describing the present application and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present application.

[0036] The terms "connected" and "connected" should be understood in a broad sense. For example, the "connected" or "connected" of a circuit structure can refer to not only physical connection, but also electrical connection or signal connection. For example, it can be directly connected, that is, physically connected, or indirectly connected through at least one intermediate element, as long as the circuit is connected, or it can be the internal connection of two elements; signal connection can refer to signal connection through a circuit or through a media medium, such as radio waves. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0037] Reference Figure 1 , Figure 1FIG. 1 is a schematic diagram of the structure of a multi-chip module in the related art. Figure 1 As shown, pin pads PAD1' and pin pads PAD2' are on chip A', pin pads PAD3' and pin pads PAD4' are on chip B', and pin pads PAD1' and pin pads PAD3', as well as pin pads PAD2' and pin pads PAD4' are all connected by bonding wires.

[0038] Among them, since one of the pin pads PAD2' and the pin pad PAD4' is electrically connected to the pins PIN_1 to PIN_6 of the MCM, the connection between the pin pads PAD2' and the pin pads PAD4' can be detected through the pins PIN_1 to PIN_6 of the MCM. Therefore, the chip function or chip performance of the MCM is tested by automatic test equipment (ATE). In this way, it can be screened out that when the bonding wire is in an open circuit state, the chip A' and the chip B' are not successfully electrically connected.

[0039] However, since one of the pin pads PAD1' and the pin pad PAD3' is not electrically connected to the pins PIN_1 to PIN_6 of the MCM, the connection between the pin pads PAD1' and the pin pads PAD3' only affects the internal circuit of the chip. Therefore, it is impossible to detect through the pins PIN_1 to PIN_6 of the MCM, that is, the chip function or chip performance of the MCM cannot be tested by ATE. If the connection between the pin pads PAD1' and the pin pads PAD3' is not tested, the MCM may work in a non-ideal state for a long time, causing the internal circuit of the chip to be in a BV state for a long time, or the voltage on the gate-source of the transistor PMOS inside the chip, that is, the gate-source voltage is always a negative voltage. In this way, when the gate-source voltage of the transistor PMOS is always a negative voltage, the chip can produce an NBTI effect, which increases the gate current of the transistor PMOS, drifts negatively, and causes more serious negative effects such as mismatch and timing drift. As a result, the reliability of the chip is seriously affected.

[0040] To this end, the present application provides a chip performance detection circuit, method and automotive-grade chip.

[0041] Among them, automotive-grade chips refer to chips that have reached automotive-grade technical standards and can be used in automotive control. Since automotive-grade chips are chips used in cars, they are characterized by high reliability.

[0042] In this application, automotive-grade chips are generally used in various electronic systems of automobiles, which may include but are not limited to: engine control, body control and infotainment systems.

[0043] Reference Figure 2 , Figure 2 This is a schematic diagram of the structure of a chip performance detection circuit provided in an embodiment of the present application. Figure 2 As shown, the chip performance detection circuit 1000 may include: a first chip 100, a first bonding wire 300 and a second chip 200. The first chip 100 may include: a first pin pad PAD1 and a detection circuit 110, and the second chip 200 may include a second pin pad PAD2.

[0044] The first end of the first pin pad PAD1 is electrically connected to the second pin pad PAD2 through the first bonding wire 300 , the second end of the first pin pad PAD1 is electrically connected to the input end of the detection circuit 110 , and the output end of the detection circuit 110 is electrically connected to any pin PIN of the first chip 100 .

[0045] The first lead pad PAD1 is also electrically connected to the internal circuit of the first chip 100. That is, it is not possible to directly detect whether the first bonding wire 300 is in an open circuit state through ATE testing.

[0046] In the case where the second pin pad PAD2 transmits an electrical signal to the first pin pad PAD1, the first chip 100 is chip A. In the case where the first pin pad PAD1 transmits an electrical signal to the second pin pad PAD2, the first chip 100 is chip B. Since when the first chip 100 is chip B, the detection principle of the chip performance detection circuit 1000 is similar to the detection principle of the chip performance detection circuit 1000 when the first chip 100 is chip A. Therefore, for ease of understanding, the embodiments of the present application are all described by taking the first chip 100 as chip A as an example.

[0047] The output end of the detection circuit 110 is electrically connected to a pin in the first chip 100. The pin may be pin PIN_1 of the first chip 100, pin PIN_2 of the first chip 100, or pin PIN_3 of the first chip 100, which is not specifically limited in the embodiment of the present application.

[0048] Below, refer to Figure 3 , Figure 3 A schematic diagram of a chip performance detection method provided in accordance with an embodiment of the present application.

[0049] like Figure 3 As shown, the method includes:

[0050] S101 . A detection circuit obtains an electrical signal from a first pin pad.

[0051] The electrical signal is used to indicate whether the first bonding wire is in an open circuit state.

[0052] S102: The detection circuit obtains a detection result according to the electrical signal and outputs the detection result through a pin.

[0053] The detection result is used to determine whether the first chip and the second chip are successfully electrically connected. If the first chip and the second chip are successfully electrically connected, the first chip and the second chip can perform digital transmission, communication, and control signal transmission.

[0054] The detection circuit 110 may obtain an electrical signal from the first pin pad PAD1 .

[0055] The electrical signal is used to indicate whether the first bonding wire 300 is in an open circuit state.

[0056] The electrical signal may include: a current signal I1 and a voltage signal V1. When the electrical signal is the current signal I1, the test result BD_TEST may be specifically represented by DBD_TEST. When the electrical signal is the voltage signal V1, the test result BD_TEST may be specifically represented by VBD_TEST.

[0057] When the electrical signal is a current signal I1, when the current value of the current signal I1 is zero, the current signal I1 indicates that the first bonding wire 300 is in an open circuit state. When the current value of the current signal I1 is not zero, the current signal I1 indicates that the first bonding wire 300 is not in an open circuit state.

[0058] When the electrical signal is a voltage signal V1, when the voltage value of the voltage signal V1 is zero, the voltage signal V1 indicates that the first bonding wire 300 is in an open circuit state. When the voltage value of the voltage signal V1 is not zero, the voltage signal V1 indicates that the first bonding wire 300 is not in an open circuit state.

[0059] In this way, when the electrical signal indicates that the first bonding wire 300 is not in an open circuit state, the detection result BD_TEST that the detection circuit 110 can obtain is a first level, for example, a high level. Furthermore, the detection circuit 110 can determine that the first pin pad PAD1 and the second pin pad PAD2 are successfully electrically connected, so that the detection circuit 110 can determine that the first chip 100 and the second chip 200 are successfully electrically connected, and output the detection result BD_TEST through the pin PIN. In this way, the chip performance detection circuit 1000 can test that the first chip 100 and the second chip 200 are successfully electrically connected through the pin PIN of the first chip 100.

[0060] When the electrical signal indicates that the first bonding wire 300 is in an open circuit state, the detection result BD_TEST obtained by the detection circuit 110 is a second level, for example, a low level. Furthermore, the detection circuit 110 can determine that the first pin pad PAD1 and the second pin pad PAD2 are not successfully electrically connected, so that the detection circuit 110 can determine that the first chip 100 and the second chip 200 are not successfully electrically connected, and output the detection result BD_TEST through the pin PIN. In this way, the chip performance detection circuit 1000 can test that the first chip 100 and the second chip 200 are not successfully electrically connected through the pin PIN of the first chip 100.

[0061] The test result BD_TEST is used to determine whether the first chip 100 and the second chip 200 are successfully electrically connected.

[0062] In summary, the detection circuit 110 can determine whether the first chip 100 and the second chip 200 are successfully electrically connected according to the electrical signal, and output it through the pin PIN, so that the chip performance detection circuit 1000 can test whether the first chip 100 and the second chip 200 are successfully electrically connected through the pin PIN of the first chip 100. Therefore, the chips that are not successfully electrically connected can be screened out, so as to avoid the circuit inside the chip working in a non-ideal state for a long time, and improve the reliability of the chip.

[0063] The chip performance detection circuit, method and automotive-grade chip provided in the present application obtain an electrical signal from the first pin pad through the detection circuit to characterize whether the first bonding wire is in an open circuit state. In this way, the detection circuit can obtain a detection result for determining whether the first chip and the second chip are successfully electrically connected based on the electrical signal, and output the detection result through the pin, so that the chip performance detection circuit can test whether the first chip and the second chip are successfully electrically connected through the pin of the first chip. In this way, chips that have not been successfully electrically connected can be screened out, avoiding the circuit inside the chip from operating in a non-ideal state for a long time, and improving the reliability of the chip.

[0064] Based on the description of the above embodiment, a possible implementation of the detection circuit 110 is exemplified. Figure 4 , Figure 4 Shows Figure 2 The structural diagram of the detection circuit is shown in Figure 2. Figure 4 As shown, when the electrical signal is a current signal I1 , the detection circuit 110 may include: a current source 111 and a first output component 112 .

[0065] The first end of the current source 111 is electrically connected to the second end of the first pin pad PAD1, the input end of the first output component 112 is electrically connected between the first end of the current source 111 and the second end of the first pin pad PAD1, the output end of the first output component 112 is electrically connected to a pin PIN in the first chip 100, and the second end of the current source 111 is grounded.

[0066] In some examples, the current value of the reference current signal I2 is smaller than the current value of the current signal I1 .

[0067] The first output component 112 can obtain the current signal I1 from the first pin pad PAD1 and obtain the reference current signal I2 from the current source 111 .

[0068] In this way, when the current signal I1 indicates that the first bonding wire 300 is not in an open circuit state, since the current value of the current signal I1 is not equal to zero, the current signal I1 is greater than the reference current signal I2. In this way, the current signal I1 can pull up the potential of the input end of the first output component 112, so that the detection result DBD_TEST that the first output component 112 can obtain is a high level. Furthermore, the first output component 112 can transmit the high-level detection result DBD_TEST to the pin PIN of the first chip 100 to output the high-level detection result DBD_TEST, so that the detection circuit 110 can obtain the detection result DBD_TEST. Thus, the detection circuit 110 can determine that the first pin pad PAD1 and the second pin pad PAD2 are successfully electrically connected.

[0069] When the current signal I1 indicates that the first bonding wire 300 is in an open circuit state, since the current value of the current signal I1 is equal to zero, the current signal I1 is less than the reference current signal I2. In this way, the reference current signal I2 can pull down the potential of the input end of the first output component 112, so that the detection result DBD_TEST that the first output component 112 can obtain is a low level. Furthermore, the first output component 112 can transmit the low-level detection result DBD_TEST to the pin PIN of the first chip 100 to output the low-level detection result DBD_TEST, so that the detection circuit 110 can obtain the detection result DBD_TEST. Thus, the detection circuit 110 can determine that the first pin pad PAD1 and the second pin pad PAD2 are not successfully electrically connected.

[0070] In summary, the first output component can obtain a current signal from the first pin pad, and obtain a reference current signal from the current source. In this way, the first output component can compare the current signal and the reference current signal to obtain a detection result, so that the first output component can transmit the detection result to the pin of the first chip to output the detection result, so that the detection circuit can obtain the detection result. Thus, the detection circuit can determine whether the first pin pad and the second pin pad are successfully electrically connected.

[0071] Based on the description of the above embodiment, another possible implementation of the detection circuit 110 is exemplified. Figure 5 , Figure 5 Shows Figure 2 The structural diagram of the detection circuit is shown in Figure 2. Figure 5 As shown, when the electrical signal is a voltage signal V1 , the detection circuit 110 may include: a switch component 111 , a weak pull-down component 113 , and a second output component 112 .

[0072] The first end of the switch component 111 is electrically connected to the second end of the first pin pad PAD1, the control end of the switch component 111 is used to access the control signal, the control signal is used to control the conduction or shutdown of the switch component 111, the second end of the switch component 111 is electrically connected to the first end of the weak pull-down component 113, the input end of the second output component 112 is electrically connected between the second end of the switch component 111 and the first end of the weak pull-down component 113, the output end of the second output component 112 is electrically connected to a pin PIN in the first chip 100, and the second end of the weak pull-down component 113 is grounded.

[0073] In some examples, weak pull-down component 113 is a resistor.

[0074] The first output component 112 and the second output component 112 are, for example, switch tubes.

[0075] The switch component 111 may be a switch tube or a switch group composed of multiple switch tubes, which is not specifically limited in the embodiment of the present application.

[0076] When the control signal controls the switch component 111 to be turned on, that is, when the chip performance detection circuit 100 enters the detection mode, the weak pull-down component 113 is in a working state. In this way, when the voltage signal V1 indicates that the first bonding lead 300 is not in an open circuit state, since the voltage value of the voltage signal V1 is not zero, the voltage signal V1 can pull up the potential of the input end of the second output component 112. Furthermore, the weak pull-down component 113 can generate a non-zero level detection result VBD_TEST. In addition, the weak pull-down component 113 can transmit the non-zero level detection result VBD_TEST to the second output component 112, so that the second output component 112 can transmit the non-zero level detection result VBD_TEST to the pin PIN of the first chip 100 to output the non-zero level detection result VBD_TEST, so that the detection circuit 110 can obtain the detection result VBD_TEST. Thus, the detection circuit 110 can determine that the first pin pad PAD1 and the second pin pad PAD2 have been successfully electrically connected.

[0077] When the voltage signal V1 indicates that the first bonding wire 300 is in an open circuit state, the voltage value of the voltage signal V1 is zero. Therefore, the weak pull-down component 113 can pull down the potential of the input end of the second output component 112. Furthermore, the weak pull-down component 113 can generate a low-level detection result VBD_TEST. In addition, the weak pull-down component 113 can transmit the low-level detection result VBD_TEST to the second output component 112, so that the second output component 112 can transmit the low-level detection result VBD_TEST to the pin PIN of the first chip 100 to output the low-level detection result VBD_TEST, so that the detection circuit 110 can obtain the detection result VBD_TEST. Thus, the detection circuit 110 can determine that the first pin pad PAD1 and the second pin pad PAD2 are not successfully electrically connected.

[0078] When the control signal controls the switch component 111 to be turned off, that is, when the chip performance detection circuit 100 does not enter the detection mode, the weak pull-down component 113 is in a non-operating state, which can avoid affecting the normal operation of the first chip 100 and the second chip 200 .

[0079] In addition, the weak pull-down component 113 will not affect the normal operation of the second chip 200 .

[0080] In summary, when the switch component is turned on, under the action of the voltage signal, the weak pull-down component can generate a detection result and transmit the detection result to the second output component, so that the second output component can transmit the detection result to the pin of the first chip to output the detection result, so that the detection circuit can obtain the detection result. Thus, the detection circuit can determine whether the first pin pad and the second pin pad are connected.

[0081] Based on the description of the above embodiment, another possible implementation of the chip performance detection circuit 1000 is exemplified. Figure 2 , Figure 4 and Figure 5 As shown, the chip performance detection circuit 1000 may further include: a second bonding wire 400 .

[0082] The second end of the first chip 100 is electrically connected to the second end of the second chip 200 through the second bonding wire 400 .

[0083] Whether the second bonding wire 400 is in an open circuit state is detected through a pin in the first chip 100 , that is, whether the second bonding wire 400 is in an open circuit state can be directly detected through ATE testing.

[0084] Based on the description of the above embodiment, another possible implementation of the chip performance detection circuit 1000 is exemplified. Figure 2 , Figure 4 and Figure 5 As shown, the first chip 100 or the second chip 200 may further include: a third pin pad PAD3.

[0085] The third lead pad PAD3 is electrically connected to the second bonding wire 400 .

[0086] The third pin pad PAD3 in the first chip 100 is a third pin pad PAD3-1, and the third pin pad PAD3 in the second chip 200 is a third pin pad PAD3-2.

[0087] The electrical connection between the third pin pad PAD3-1 and the third pin pad PAD3-2 can be detected through the pins PIN1 to PIN6 of the chip. That is, the third pin pad PAD3 can transmit the electrical signal between the first chip 100 and the second chip 200, so that the pins PIN1 to PIN6 of the chip can detect whether the second bonding wire 400 is in an open circuit state.

[0088] Finally, it should be noted that the above embodiments are only specific implementation methods of the present application, but the protection scope of the present application is not limited thereto, and any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A chip performance detection circuit, characterized in that: include: A first chip, a first bonding wire, and a second chip, wherein the first chip comprises: a first pin pad and a detection circuit, and the second chip comprises a second pin pad; The first end of the first pin pad is electrically connected to the second pin pad through the first bonding wire, the second end of the first pin pad is electrically connected to the input end of the detection circuit, the output end of the detection circuit is electrically connected to a pin in the first chip, wherein the first pin pad is also electrically connected to an internal circuit in the first chip; The detection circuit is used to obtain an electrical signal from the first pin pad, and the electrical signal is used to indicate whether the first bonding wire is in an open circuit state; The detection circuit is further used to obtain a detection result according to the electrical signal, and output the detection result through the pin, wherein the detection result is used to determine whether the first chip and the second chip are successfully electrically connected.

2. The circuit according to claim 1, characterized in that The detection circuit is specifically configured to obtain, when the electrical signal indicates that the first bonding wire is not in an open circuit state, a first level as the detection result, wherein the first level is used to indicate that the first chip and the second chip are successfully electrically connected; Alternatively, when the electrical signal indicates that the first bonding wire is in an open circuit state, the detection result is obtained as a second level, and the second level is used to indicate that the first chip and the second chip are not successfully electrically connected.

3. The circuit according to claim 2, characterized in that When the electrical signal is a current signal, the detection circuit includes: a current source and a first output component; The first end of the current source is electrically connected to the second end of the first pin pad, the input end of the first output component is electrically connected between the first end of the current source and the second end of the first pin pad, the output end of the first output component is electrically connected to a pin of the first chip, and the second end of the current source is grounded; The first output component is used to obtain the current signal from the first pin pad and obtain a reference current signal from the current source; The first output component is further used to compare the current signal with the reference current signal to obtain the detection result, and output the detection result through the pin.

4. The circuit according to claim 3, characterized in that A current value of the reference current signal is smaller than a current value of the current signal.

5. The circuit according to claim 2, characterized in that When the electrical signal is a voltage signal, the detection circuit includes: a switch component, a weak pull-down component and a second output component; The first end of the switch component is electrically connected to the second end of the first pin pad, the control end of the switch component is used to access a control signal, and the control signal is used to control the on or off of the switch component, the second end of the switch component is electrically connected to the first end of the weak pull-down component, the input end of the second output component is electrically connected between the second end of the switch component and the first end of the weak pull-down component, the output end of the second output component is electrically connected to a pin in the first chip, and the second end of the weak pull-down component is grounded; The weak pull-down component is used to generate the detection result under the action of the voltage signal when the switch component is turned on, and transmit the detection result to the second output component; The second output component is used to output the detection result through the pin.

6. The circuit according to claim 5, characterized in that The weak pull-down component is a resistor.

7. The circuit according to any one of claims 1 to 6, characterized in that: The chip performance detection circuit further includes: a second bonding wire; The second end of the first chip is electrically connected to the second end of the second chip through the second bonding wire; Whether the second bonding wire is in an open circuit state is detected through a pin in the first chip.

8. The circuit according to claim 7, characterized in that The first chip or the second chip further includes: a third pin pad, the third pin pad being electrically connected to the second bonding wire; The third pin pad is used to transmit an electrical signal between the first chip and the second chip, so as to detect whether the second bonding wire is in an open circuit state through the pin.

9. A chip performance detection method, characterized in that: The method is applied to the chip performance detection circuit according to any one of claims 1 to 8, and the method comprises: The detection circuit obtains an electrical signal from the first pin pad, wherein the electrical signal is used to indicate whether the first bonding wire is in an open circuit state; The detection circuit obtains a detection result according to the electrical signal and outputs the detection result through the pin, and the detection result is used to determine whether the first chip and the second chip are successfully electrically connected.

10. An automotive-grade chip, characterized in that: include: A chip performance detection circuit as described in any one of claims 1 to 8.

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