Chip module and embedded chip
By adopting chip modules in an operating system environment in an embedded chip, using permission authentication and index number management, the resource consumption and security problems of algorithm updates in an embedded chip are solved, and the embedding of high security and flexible applications is achieved type chip.
Patent Information
- Application Number
- CN202411168959.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-23
- Publication Date
- 2024-12-20
AI Technical Summary
Algorithm updates in embedded chips have problems such as high resource consumption, low security, large resource utilization and lack of security protection, especially in limited memory and multiple application scenarios.
Using chip modules in an operating system environment, permission authentication, security download and integrity check are performed through communication units, processing units and algorithm units, and secret calls and updates are used to ensure the high security of algorithm units. and resource optimization.
Without relying on the on-chip operating system, the security and resource utilization of embedded chips are improved, and are suitable for embedded chips with limited resources, ensuring the concealment and security of algorithm updates, and enhancing the universality of chips and flexibility.
Smart Images
Figure CN119167438A_ABST
Abstract
Description
Technical Field
[0001] This article relates to chip technology, especially chip modules and embedded chips. Background Art
[0002] Embedded chips have the characteristics of small memory space, multiple application scenarios and high security requirements. Therefore, algorithm updates in embedded chips usually rely on built-in chip operating systems (Chip Operating System, COS) (such as Linux, RTOS, etc.) to be implemented. Specifically, the services and interfaces provided by the chip operating system are used to update and manage the algorithm; the multi-tasking method supported by the chip operating system is used to allow the algorithm update process to run in the background without affecting other functions of the device; the file system management function provided by the chip operating system is used to store, read and update algorithm files; and the network communication function of the chip operating system is used to download, install and verify the application.
[0003] When updating the algorithm in the embedded chip, the embedded chip can establish communication with the external device through the network connection, and complete the algorithm update by downloading the algorithm source file, source code or installation package in the container (Service Object, SO). In actual application, this update method has problems such as high resource consumption and low security. Summary of the invention
[0004] Embodiments of the present application provide a chip module and an embedded chip.
[0005] A chip module comprises a communication unit, a processing unit and at least one algorithm unit, each algorithm unit processes received data using its own algorithm and key; wherein the processing unit is used to distribute the data received from the communication unit to the corresponding algorithm unit for processing, and output the data processed by the algorithm unit through the communication unit; wherein:
[0006] A processing unit is used to determine, after determining that the external device currently connected to the chip module is a device authorized to update the algorithm unit, a target algorithm unit in at least one algorithm unit that the external device requests to update, receive update data of the executable file of the target algorithm unit from the external device, and when determining that the update data satisfies a preset integrity condition, update the executable file of the target algorithm unit using the update data.
[0007] An embedded chip comprises the chip module mentioned above.
[0008] The embodiments of the present application, without relying on the on-chip operating system, utilize the limited resources of the embedded chip to solve the pain point that the embedded chip has small memory but high demand, and through permission authentication, secure download and integrity check, ensure the high security of the algorithm unit update operation, prevent malicious attacks, improve the versatility of the embedded chip, and enable the embedded chip to be flexibly used in various application scenarios.
[0009] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by implementing the present application. Other advantages of the present application can be realized and obtained by the schemes described in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] The accompanying drawings are used to provide an understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.
[0011] Figure 1 A schematic diagram of the structure of a chip module provided in an embodiment of the present application;
[0012] Figure 2A A schematic diagram of an algorithm and a key dynamically selected by an external device according to an embodiment of the present application;
[0013] Figure 2B A schematic diagram of an algorithm used for updating an external device provided in an embodiment of the present application;
[0014] Figure 2C A schematic diagram of an external device dynamically selecting an updated algorithm and a non-updated key used in an embodiment of the present application;
[0015] Figure 3 A schematic diagram of the interaction between an external device and a chip module for data updating provided in an embodiment of the present application. DETAILED DESCRIPTION
[0016] The present application describes multiple embodiments, but the description is exemplary rather than restrictive, and it is obvious to those skilled in the art that there may be more embodiments and implementations within the scope of the embodiments described in the present application. Although many possible feature combinations are shown in the drawings and discussed in the specific embodiments, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with any other feature or element in any other embodiment, or may replace any other feature or element in any other embodiment.
[0017] The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed in the present application may also be combined with any conventional features or elements to form a unique invention scheme. Any features or elements of any embodiment may also be combined with features or elements from other invention schemes to form another unique invention scheme. Therefore, it should be understood that any feature shown and / or discussed in the present application may be implemented individually or in any appropriate combination. Therefore, except for the limitations made according to the attached claims and their equivalents, the embodiments are not subject to other restrictions. In addition, various modifications and changes may be made within the scope of protection of the attached claims.
[0018] In addition, when describing representative embodiments, the specification may have presented the method and / or process as a specific sequence of steps. However, to the extent that the method or process does not rely on the specific order of the steps described herein, the method or process should not be limited to the steps of the specific order described. As will be understood by those of ordinary skill in the art, other sequences of steps are also possible. Therefore, the specific sequence of the steps set forth in the specification should not be interpreted as a limitation to the claims. In addition, the claims for the method and / or process should not be limited to the steps of performing them in the order written, and those skilled in the art can easily understand that these sequences can be changed and still remain within the spirit and scope of the embodiments of the present application.
[0019] In the process of implementing this application, it is found that the algorithm update method in the embedded chip in the related art has at least the following problems, including:
[0020] 1. Deploying an on-chip operating system in an embedded chip will occupy the memory and computing resources of the embedded chip. For embedded devices with limited memory and processing capabilities, the resource consumption required for running the on-chip operating system may affect the normal operation of the code in the embedded chip;
[0021] 2. The algorithm function is updated through the installation package or source code, which is vulnerable to attack. The algorithm is easy to be replaced or tampered with, endangering the security of user data;
[0022] 3. The operation of the algorithm unit consumes a lot of resources and is not suitable for embedded chips with limited resources;
[0023] 4. The algorithm update operation lacks security protection, which brings risks to the safe operation of embedded chips;
[0024] 5. The algorithm type and algorithm key will appear in plain text, and it cannot be ensured that the required algorithm and algorithm key can be called safely and secretly at runtime.
[0025] Based on the above analysis, the embodiment of the present application provides an algorithm update solution in an embedded chip in an environment without an operating system, which overcomes the problems in the above-mentioned prior art solutions and is particularly suitable for embedded chips with limited resources.
[0026] Figure 1 This is a schematic diagram of the structure of the chip module provided in the embodiment of the present application. Figure 1 As shown, the chip module can be deployed in an embedded chip, and the chip module includes a communication unit, a processing unit and at least one algorithm unit:
[0027] Each algorithm unit processes the received data using its own algorithm and key.
[0028] When the algorithm of the embedded chip is updated, at least one of the algorithm and the key in one or at least two algorithm units may be updated.
[0029] Each algorithm unit has an algorithm and at least two keys built in. Therefore, when the external device uses the chip module to process data, it can dynamically select the algorithm and key to be used.
[0030] See also Figure 1 As shown, the chip module is provided with m algorithm units, where m is an integer greater than or equal to 2; each algorithm unit has its own algorithm, such as algorithm unit 1 uses algorithm 1, algorithm unit 2 uses algorithm 2, algorithm unit m uses algorithm m, etc.; there are N1 keys in algorithm unit 1, N2 keys in algorithm unit 2, and Nm keys in algorithm unit m; the total number of keys in the algorithm units may be equal or unequal, and N1 to Nm are all integers greater than or equal to 2.
[0031] Specifically, each algorithm unit may use its own algorithm and key to perform at least one of signing, signature verification, encryption and decryption operations on the received data.
[0032] The processing unit is used to distribute the data received from the communication unit to the corresponding algorithm unit for processing, and output the data processed by the algorithm unit through the communication unit.
[0033] Specifically, the processing unit determines the algorithm unit that needs to be called for the data received from the communication unit, and sends the data received from the communication unit to the corresponding algorithm unit; after the algorithm unit completes data processing, it obtains the data processed by the algorithm unit, and then outputs the data processed by the algorithm unit through the communication unit.
[0034] Usually, an embedded chip is provided with at least two algorithm units, each of which can be set to an inactive state by default. After the processing unit determines the algorithm unit to be called for the data received from the communication unit, the algorithm unit to be called can be controlled to be in an active state to avoid unreasonable occupation of resources in the embedded chip by the algorithm unit.
[0035] Furthermore, when the external device dynamically selects the algorithm and key to be used, the processing unit does not output the algorithm type and algorithm key in plain text, but outputs them through an index number, thereby ensuring that the required algorithm and algorithm key can be called safely and secretly at runtime.
[0036] Specifically, the algorithm in each algorithm unit has a uniquely identified algorithm index number, and the key in the algorithm unit has a uniquely identified key index number;
[0037] When the external device dynamically selects the algorithm and key to be used, the processing unit is used to obtain the algorithm index number and the key index number from the external device. Figure 2A .
[0038] Figure 2A Schematic diagram of the algorithm and key used by the external device dynamically selecting provided in the embodiment of the present application. Figure 2A As shown, the external device needs to call algorithm 2 and key 2-1 in algorithm unit 2 to perform encryption and decryption operations. Therefore, the external device sends the algorithm index number of algorithm 2 and the key index number of key 2-1 to the chip module. The processing unit determines that algorithm unit 2 needs to be called based on the received algorithm index number of algorithm 2 and the key index number of key 2-1, and notifies algorithm unit 2 of the key index number of key 2-1, so that algorithm unit 2 can use key 2-1 to perform encryption and decryption operations on the data sent by the external device.
[0039] When the external device updates the data in the target algorithm unit, the processing unit is used to receive an update request carrying at least one of the algorithm index number and the key index number from the external device, and determine the target algorithm unit according to the index number in the update request, see Figure 2B .
[0040] Figure 2B Schematic diagram of an algorithm used for updating an external device provided in an embodiment of the present application. Figure 2B As shown, the external device obtains the updated data of algorithm 2 in algorithm unit 2 and obtains the data of algorithm 2-v1. Therefore, the external device sends the algorithm index number of algorithm 2 to the chip module. The processing unit determines that algorithm unit 2 needs to be updated based on the received algorithm index number of algorithm 2, and obtains the data of algorithm 2-v1 to complete the update of the algorithm in algorithm unit 2.
[0041] After completing the update of at least one of the algorithm and the key, the external device can dynamically select the updated algorithm and the updated key, that is, the processing unit is used to obtain at least one of the algorithm index number of the updated algorithm and the key index number of the updated key from the external device, see Figure 2C .
[0042] Figure 2C Schematic diagram of an external device dynamically selecting an updated algorithm and an unupdated key used in an embodiment of the present application. Figure 2C As shown, the external device needs to call algorithm 2-v1 and key 2-1 in algorithm unit 2 to perform encryption and decryption operations. Therefore, the external device sends the algorithm index number of algorithm 2-v1 and the key index number of key 2-1 to the chip module. The processing unit determines that algorithm unit 2 needs to be called based on the received algorithm index number of algorithm 2-v1 and the key index number of key 2-1, and notifies algorithm unit 2 of the key index number of key 2-1, so that algorithm unit 2 can use key 2-1 to perform encryption and decryption operations on the data sent by the external device.
[0043] Furthermore, the processing unit is used to receive update data and ensure that only authorized external devices can perform algorithm update operations to prevent illegal access by unauthorized devices; and after obtaining the update data, store the update data in a specified location and ensure its correct execution.
[0044] Specifically, the processing unit is used to determine the target algorithm unit that the external device currently connected to the chip module requests to update in at least one algorithm unit after determining that the external device is authorized to update the algorithm unit, receive update data of the executable file of the target algorithm unit from the external device, and when it is determined that the update data satisfies a preset integrity condition, use the update data to update the executable file of the target algorithm unit.
[0045] Optionally, the update data may be used to replace at least part of the executable file in the target unit, thereby optimizing the storage space occupied by the target computing unit. For example, when the update data is used to update the algorithm in the target algorithm unit, the update data may be saved to the storage space for the algorithm data in the executable file of the target algorithm unit, thereby replacing the original algorithm in the target algorithm unit.
[0046] by Figure 2B Taking the scenario shown as an example, the updated data is the data of algorithm 2-v1. The processing module can store the data of algorithm 2-v1 in the storage space of algorithm 2 in algorithm unit 2 to complete the update of the algorithm in algorithm unit 2.
[0047] In the embodiment of the present application, the update data is a binary file, and the data in the algorithm unit is updated in a binary file manner, thereby ensuring the concealment and security of the update algorithm, and being applicable to a variety of application scenarios.
[0048] In actual applications, the update content can be generated in advance as a binary file executable by the chip module and imported into the external device. The external device sends the binary file to the chip module by exchanging data with the chip module.
[0049] Furthermore, the processing unit is used to receive algorithm-encrypted data obtained by encrypting the update data based on the ciphertext download key recorded by the external device from the external device, and decrypt the algorithm-encrypted data using the ciphertext download key recorded by the processing unit to obtain the update data.
[0050] The key download key is used to transmit the update data, so as to realize the encrypted transmission of the update data, improve the concealment of the algorithm function, and reduce the risk of the update data being tampered with or leaked.
[0051] The ciphertext download key recorded by the processing unit is generated based on the first random number generated by the chip module and the second random number generated by the external device. For example, the value obtained by performing XOR processing on the first random number and the second random number is used as the ciphertext download key recorded by the processing unit.
[0052] Furthermore, when determining whether the external device is an authorized device to update the algorithm unit, the processing module also uses the first random number and the second random number mentioned above to perform permission authentication. In addition, each algorithm unit has its own built-in algorithm update key and cooperates with the first random number and the second random number to complete the permission authentication. The specific implementation method is as follows:
[0053] Each algorithm unit has its own algorithm update key built in;
[0054] The processing unit is used to send the first random number generated by the chip module to the external device, receive permission encrypted data from the external device, wherein the permission encrypted data is obtained by the external device encrypting the first random number and the second random number generated by the external device based on the algorithm update key of the target algorithm unit recorded by the external device; send the permission encrypted data to the target algorithm unit, after the target algorithm unit decrypts the permission encrypted data using the algorithm update key of the target algorithm unit, obtain the permission decrypted data corresponding to the permission encrypted data, judge whether the first random number in the permission decrypted data is consistent with the first random number generated by the chip module, obtain a first judgment result, and when the first judgment result is consistent, determine that the external device is a device authorized to update the algorithm unit.
[0055] By authenticating the data update authority of external devices, illegal devices can be prevented from updating the data of the chip module, thereby improving the security of the chip module.
[0056] Furthermore, the read and write permissions of the algorithm update key are such that the corresponding algorithm units cannot be derived, which can improve the security and confidentiality of data operations performed by the algorithm units.
[0057] Optionally, the processing unit is used to receive first summary data generated by the external device in response to the update data sent by the external device, and to generate second summary data corresponding to the update data received from the external device; determine whether the first summary data is consistent with the second summary data to obtain a second judgment result, and when the second judgment result is consistent, determine that the update data satisfies the integrity condition.
[0058] By using the summary calculation results of the processing unit and the external device on their respective update data to judge the integrity of the update data received by the processing unit, the normal operation of the target algorithm unit after the update can be effectively guaranteed and the stability of the chip module can be improved.
[0059] Optionally, the processing unit is used to record the initial state of the executable file of the algorithm unit after detecting that an external device requests to update the executable file of the algorithm unit, and control the algorithm unit to return to the initial state if the external device cannot successfully update the executable file of the algorithm unit.
[0060] By recording the initial state, when the update operation fails or is interrupted during the update process of the external device, the algorithm unit in the chip module can be restored to the initial state to ensure the stability of the chip module.
[0061] In addition, an embodiment of the present application further provides an embedded chip, comprising the chip module described above.
[0062] Figure 3 The following is a schematic diagram of the interaction between the external device and the chip module for data update provided in the embodiment of the present application. Figure 3 As shown, the interactive process update process is divided into three stages, namely, authority authentication and index selection, ciphertext download, and integrity verification, where the encryption algorithm used is not limited to domain symmetric algorithms.
[0063] Phase 1: Permission Authentication and Index Selection
[0064] The default working state of the chip module provides encryption and decryption functions for external devices.
[0065] Step A1: When the external device needs to update the target algorithm unit, the external device obtains the first random number R1 generated by the chip module from the chip module;
[0066] Step A2: The external device generates a second random number R2;
[0067] Step A3: the external device uses the algorithm ALG_O in the target algorithm unit recorded by the external device and the algorithm update key KCH to perform an encryption operation ALG_OKCH(R1|R2) on the combined data R1|R2 of the first random number R1 and the second random number R2 to obtain the authority encrypted data;
[0068] Step A4: the external device sends the authority encryption data and the algorithm index number of the algorithm ALG_O in the target algorithm unit requested to be updated to the chip module;
[0069] Step A5: The chip module sends the authority encrypted data to the target algorithm unit, and the target algorithm unit decrypts the authority encrypted data using the target algorithm unit's algorithm ALG_0 and the update key KCH to obtain authority decrypted data, wherein the authority decrypted data includes the decrypted first random number R1' and the decrypted second random number R2';
[0070] Step A6: the chip module determines whether the first random number R1' in the authority decryption data is consistent with the first random number R1 generated by the chip module, and obtains a first determination result;
[0071] Step A7: When the first judgment result is consistent, determine that the external device is a device authorized to update the algorithm unit, send a status code indicating successful authorization authentication to the external device, and use the first random number R1' and the second random number R2' in the authorization decryption data to obtain the ciphertext download key EXK'. For details, see Figure 3 A7-1 and A7-2, and proceed to step B1.
[0072] Step A8: When the first judgment result is inconsistent, the chip module does not return any status data to the external device, and controls the chip module to return to the initial state, and the process ends.
[0073] Phase 2: Ciphertext download
[0074] Step B1: After receiving the status code of successful authority authentication, the external device generates a ciphertext download key EXK using the first random number R1 and the second random number R2;
[0075] Step B2: The external device uses the algorithm ALG_O in the target algorithm unit and the ciphertext download key EXK to perform an encryption operation ALG_OEXK(FD) on the binary file FD of the new algorithm to generate algorithm encrypted data;
[0076] Step B3: The external device sends the algorithm encrypted data to the chip module;
[0077] Step B4: After receiving the algorithm encrypted data, the chip module sends the algorithm encrypted data and the ciphertext download key EXK' to the target algorithm unit, and the target algorithm unit decrypts the algorithm encrypted data using the target algorithm unit's algorithm ALG_O algorithm and the ciphertext download key EXK'.
[0078] Step B5: If the decryption is successful, the chip module obtains the binary file FD' of the new algorithm and sends a status code of successful ciphertext download to the external device. For details, see Figure 3 B5-1 and B5-2, and continue with C1.
[0079] Step B6: If the decryption fails, the chip module does not return any status data to the external device, and controls the chip module to return to the initial state, and the process ends.
[0080] Phase 3: Integrity Check
[0081] Step C1: After receiving the status code indicating that the ciphertext download is successful, the external device performs a digest calculation HASH(FD) on the binary file FD of the new algorithm to obtain the second digest data HFD;
[0082] Step C2: the external device sends the second summary data HFD to the chip module;
[0083] Step C3: the chip module performs digest calculation HASH(FD') on the binary file FD' data of the new algorithm to obtain the first digest data HFD';
[0084] Step C4: the chip module compares whether the second summary data HFD is the same as the first summary data HFD';
[0085] Step C5: If they are the same, the chip module updates the algorithm in the target algorithm unit and returns a status code that the integrity check passed. For details, see Figure 3 middle C5-1 and C5-2;
[0086] Step C6: If different, the chip module does not return any status data to the external device, and controls the chip module to return to the initial state, and the process ends.
[0087] Based on the above interaction process, it can be seen that the embodiment of the present application realizes the update of algorithm data in the embedded chip, which makes up for the shortcomings of embedded chip products due to small memory space, multiple application scenario requirements and high security requirements, ensures the application flexibility of embedded chip products and the concealment of encryption and decryption functions, and can effectively prevent attacks. It is widely suitable for embedded systems related to security encryption, and is particularly suitable for embedded chips that support multiple algorithms.
[0088] Based on the code execution principle of embedded chips, the update operation process is implemented using software code to realize the call and update of the algorithm unit; in addition, the operation process adopts permission authentication and secure download of algorithm binary files to ensure the security and reliability of the update process. In addition, the algorithm and algorithm key in the algorithm unit are managed using index numbers to ensure the confidentiality and security of the algorithm.
[0089] The solution provided in the embodiment of the present application, without relying on the on-chip operating system, utilizes the limited resources of the embedded chip to solve the pain point of the embedded chip having small memory but high demand. Through permission authentication, secure download and integrity check, the high security of the algorithm unit update operation is guaranteed, malicious attacks are prevented, the versatility of the embedded chip is improved, and the embedded chip can be flexibly used in various application scenarios.
[0090] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all components may be implemented as software executed by a processor, such as a digital signal processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those skilled in the art, the term "computer storage medium" includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those of ordinary skill in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.
Claims
1. A chip module, comprising a communication unit, a processing unit and at least one algorithm unit, each algorithm unit using its own algorithm and key to process received data; wherein, The processing unit is used to distribute the data received from the communication unit to the corresponding algorithm unit for processing, and output the data processed by the algorithm unit through the communication unit; wherein: A processing unit is used to determine, after determining that the external device currently connected to the chip module is a device authorized to update the algorithm unit, a target algorithm unit in at least one algorithm unit that the external device requests to update, receive update data of the executable file of the target algorithm unit from the external device, and when determining that the update data satisfies a preset integrity condition, update the executable file of the target algorithm unit using the update data.
2. The chip module according to claim 1, characterized in that: The processing unit is used to receive algorithm-encrypted data obtained by encrypting update data based on the ciphertext download key recorded by the external device from the external device, and decrypt the algorithm-encrypted data using the ciphertext download key recorded by the processing unit to obtain update data.
3. The chip module according to claim 2, characterized in that: The ciphertext download key recorded by the processing unit is generated based on a first random number generated by the chip module and a second random number generated by the external device.
4. The chip module according to claim 3, characterized in that: Each algorithm unit has its own algorithm update key built in; Wherein, the processing unit is used to send the first random number generated by the chip module to the external device, receive permission encryption data from the external device, wherein the permission encryption data is obtained by the external device encrypting the first random number and the second random number generated by the external device based on the algorithm update key of the target algorithm unit recorded by the external device; send the permission encryption data to the target algorithm unit, after the target algorithm unit decrypts the permission encryption data using the algorithm update key of the target algorithm unit, obtain the permission decryption data corresponding to the permission encryption data, judge whether the first random number in the permission decryption data is consistent with the first random number generated by the chip module, obtain a first judgment result, and when the first judgment result is consistent, determine that the external device is a device authorized to update the algorithm unit.
5. The chip module according to claim 4, characterized in that: The read and write permissions of the algorithm update key are such that the corresponding algorithm units cannot be derived.
6. The chip module according to claim 1, characterized in that: The processing unit is configured to receive, from the external device, first summary data generated by the external device for the updated data sent, and to generate second summary data corresponding to the updated data received from the external device; It is determined whether the first summary data is consistent with the second summary data to obtain a second determination result, and when the second determination result is consistent, it is determined that the updated data satisfies the integrity condition.
7. The chip module according to any one of claims 1 to 6, characterized in that: The update data is a binary file.
8. The chip module according to any one of claims 1 to 6, characterized in that: The algorithm in each algorithm unit has a uniquely identified algorithm index number, and the key in the algorithm unit has a uniquely identified key index number; The processing unit is used to receive an update request carrying at least one of an algorithm index number and a key index number from the external device, and determine a target algorithm unit according to the index number in the update request.
9. The chip module according to any one of claims 1 to 6, characterized in that: The processing unit is used to record the initial state of the executable file of the algorithm unit after detecting that an external device requests to update the executable file of the algorithm unit, and control the algorithm unit to return to the initial state if the external device cannot successfully update the executable file of the algorithm unit.
10. An embedded chip, comprising the chip module according to any one of claims 1 to 9.