Manufacturing method of T-shaped gate of trench power device and trench power device
By forming and removing dielectric layers in the trench and filling with conductive materials to form a T-electrode structure, the production process of the T-type gate of the trench power device is simplified, and the cost is reduced and the production quality is improved.
Patent Information
- Application Number
- CN202411159855.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-22
- Publication Date
- 2024-12-20
AI Technical Summary
The manufacturing process of existing trench power devices T-type gates is complicated, resulting in high costs.
By etching the trench on the substrate surface, a first dielectric layer is formed and filled to form a sacrificial structure, a first dielectric layer part is removed, a second dielectric layer is formed, and a T-shaped electrode structure is formed using conductive material to simplify the process flow and reduce costs .
It realizes low-cost production of T-gate, improves the shape and size consistency of the device, and improves production quality and yield.
Smart Images
Figure CN119170493A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and in particular to a method for manufacturing a T-type gate of a trench power device and a trench power device. Background Art
[0002] The gate structure of the trench power device is buried in the substrate, and the gate structure includes a gate electrode. The manufacturing process of the trench power device includes forming a trench in the substrate and forming a gate electrode in the trench.
[0003] The T-type gate of a trench power device refers to a gate structure in which the cross-section of the gate electrode in the trench power device is T-shaped, wherein the gate electrode with a T-shaped cross-section includes a narrower gate root at the bottom and a wider gate cap at the top, and the narrower gate root at the bottom is to increase the cutoff frequency of the trench power device, and the wider gate cap at the top is to reduce the resistance of the gate structure.
[0004] There are some methods for manufacturing T-type gates of trench power devices in the prior art, but the process flows of these methods are relatively complicated, which makes the manufacturing cost of the T-type gates of trench power devices relatively high. Summary of the invention
[0005] In view of the above problems, the purpose of the present application is to provide a method for manufacturing a T-type gate of a trench power device and a trench power device, so as to reduce the manufacturing cost of the T-type gate of the trench power device by simplifying the process flow.
[0006] According to a first aspect of the present application, a method for manufacturing a T-type gate of a trench power device is provided, comprising: providing a substrate; etching a trench on a surface of the substrate; forming a first dielectric layer in the trench, the first dielectric layer covering the sidewalls and bottom surface of the trench; filling the trench formed with the first dielectric layer to form a sacrificial structure; removing a portion of the first dielectric layer at a notch of the trench; removing the sacrificial structure and forming a second dielectric layer on the sidewalls at the notch of the trench after the first dielectric layer is removed, the thickness of the second dielectric layer being less than that of the first dielectric layer; and filling the trench with the sacrificial structure removed and the second dielectric layer formed with a conductive material to form an electrode structure.
[0007] According to a second aspect of the present application, a trench power device is provided, wherein the trench power device comprises a T-type gate, and the T-type gate is manufactured by any one of the manufacturing methods described in the first aspect of the present application.
[0008] After the groove is etched on the surface of the substrate, the first dielectric layer is formed in the groove and the groove formed with the first dielectric layer is filled to form a sacrificial structure. Then, the first dielectric layer at the groove notch is etched away and a second dielectric layer is formed on the sidewall at the groove notch after the first dielectric layer is etched away. Since the thickness of the formed second dielectric layer is less than the first dielectric layer, a wide-upper-narrow-lower-gap is constructed in the groove by the first dielectric layer and the second dielectric layer after the sacrificial structure is removed. In this way, a T-shaped electrode structure is formed by filling with a conductive material, thereby realizing the production of a T-type gate with a relatively simplified process flow and low cost. In addition, the embodiment of the present application fills the entire groove with the sacrificial structure, which is conducive to controlling the height of the sacrificial structure on the entire wafer and the etching depth of the first dielectric layer, improving the consistency of the shape and size of the T-type gate, thereby improving the production quality and yield of the device. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] The above and other objects, features and advantages of the present application will become more apparent through the following description of the embodiments of the present application with reference to the accompanying drawings:
[0010] Figure 1 Shown is a flow chart of a method for manufacturing a T-type gate of a trench power device provided in an embodiment of the present application;
[0011] Figure 2a FIG. 1 is a cross-sectional schematic diagram of a substrate surface after a groove is etched in a manufacturing method provided in an embodiment of the present application;
[0012] Figure 2b It is a cross-sectional schematic diagram after forming a first dielectric layer in a groove on the surface of a substrate in a manufacturing method provided by an embodiment of the present application;
[0013] Figure 2c It is a cross-sectional schematic diagram of a manufacturing method provided in an embodiment of the present application after a sacrificial structure is formed in a groove on the surface of a substrate;
[0014] Figure 2d It is a cross-sectional schematic diagram after a portion of the first dielectric layer is removed from a groove on the surface of a substrate in a manufacturing method provided by an embodiment of the present application;
[0015] Figure 2e It is a cross-sectional schematic diagram after the sacrificial structure is removed and the second dielectric layer is formed in the groove on the surface of the substrate in a manufacturing method provided by an embodiment of the present application;
[0016] Figure 2f It is a cross-sectional schematic diagram of a manufacturing method provided in an embodiment of the present application after an electrode structure is formed in a groove on the surface of a substrate;
[0017] Figure 3aFIG. 1 is a schematic cross-sectional view of another manufacturing method provided in an embodiment of the present application after a groove is etched on the surface of the substrate;
[0018] Figure 3b FIG. 1 is a cross-sectional schematic diagram of another manufacturing method provided in an embodiment of the present application after a first dielectric layer is formed in a groove on a surface of a substrate;
[0019] Figure 3c FIG. 1 is a cross-sectional schematic diagram of forming a silicon nitride layer in a groove on a surface of a substrate in another manufacturing method provided in an embodiment of the present application;
[0020] Figure 3d FIG. 1 is a schematic cross-sectional view of another manufacturing method provided in an embodiment of the present application after the groove on the surface of the substrate is filled with photoresist;
[0021] Figure 3e FIG. 1 is a cross-sectional schematic diagram of another manufacturing method provided in an embodiment of the present application after a sacrificial structure is formed in a groove on the surface of a substrate;
[0022] Figure 3f FIG. 1 is a cross-sectional schematic diagram of another manufacturing method provided in an embodiment of the present application after a portion of the first dielectric layer is removed from a groove on the surface of the substrate;
[0023] Figure 3g FIG. 1 is a cross-sectional schematic diagram of another manufacturing method provided in an embodiment of the present application after the sacrificial structure is removed and the second dielectric layer is formed in the groove on the surface of the substrate;
[0024] Figure 3h FIG. 1 is a cross-sectional schematic diagram of another manufacturing method provided in an embodiment of the present application after an electrode structure is formed in a groove on the surface of a substrate;
[0025] Figure 4a FIG. 1 is a cross-sectional schematic diagram of another manufacturing method provided in an embodiment of the present application after a groove is etched on the surface of the substrate;
[0026] Figure 4b FIG. 1 is a cross-sectional schematic diagram of another manufacturing method provided in an embodiment of the present application after a first dielectric layer is formed in a groove on the surface of a substrate;
[0027] Figure 4c FIG. 1 is a cross-sectional schematic diagram of another manufacturing method provided in an embodiment of the present application after a sacrificial structure is formed in a groove on the surface of a substrate;
[0028] Figure 4d FIG. 1 is a cross-sectional schematic diagram of another manufacturing method provided in an embodiment of the present application after a portion of the first dielectric layer is removed from the groove on the surface of the substrate;
[0029] Figure 4eFIG. 1 is a cross-sectional schematic diagram of another manufacturing method provided in an embodiment of the present application after the sacrificial structure is removed and the second dielectric layer is formed in the groove on the surface of the substrate;
[0030] Figure 4f Shown is a cross-sectional schematic diagram after an electrode structure is formed in a groove on the surface of a substrate in another manufacturing method provided in an embodiment of the present application.
[0031] Explanation of the reference numerals: 11 - substrate; 12 - epitaxial layer; 13 - trench; 14 - first dielectric layer; 15a - first sacrificial structure; 15b - silicon nitride layer; 15c - photoresist core; 15d - third sacrificial structure; 16 - second dielectric layer; 17 - electrode structure. DETAILED DESCRIPTION
[0032] In the following drawings, the same elements are represented by similar reference numerals. For the sake of clarity, the various parts in the drawings are not drawn to scale. In addition, some well-known parts may not be shown. For the sake of simplicity, the semiconductor structure obtained after several steps can be described in one figure.
[0033] Figure 1 FIG. 1 is a flow chart of a method 100 for manufacturing a T-type gate of a trench power device according to an embodiment of the present application. Figure 1 As shown, the manufacturing method includes steps S110 to S170, which are specifically as follows.
[0034] Step S110, providing a substrate.
[0035] Step S120, etching a groove on the surface of the substrate.
[0036] Step S130 , forming a first dielectric layer in the trench, wherein the first dielectric layer covers the sidewalls and bottom surface of the trench.
[0037] Step S140 , filling the trench formed with the first dielectric layer to form a sacrificial structure.
[0038] Step S150, removing a portion of the first dielectric layer at the groove opening.
[0039] Step S160 , removing the sacrificial structure and forming a second dielectric layer on the sidewalls of the groove notch after the first dielectric layer is removed, wherein the thickness of the second dielectric layer is smaller than that of the first dielectric layer.
[0040] Step S170 , filling the trench where the sacrificial structure is removed and the second dielectric layer is formed with a conductive material to form an electrode structure.
[0041] Specifically, the first dielectric layer can be formed in the groove by thermal oxidation growth or the like, and the groove is not filled with the first dielectric layer. After the first dielectric layer covers the sidewalls and bottom surface of the groove, there is still a gap in the groove, so that the groove formed with the first dielectric layer can be filled to form a sacrificial structure.
[0042] In step S140, the sacrificial structure fills the entire groove, so that the height of the sacrificial structure in each groove on the entire wafer is consistent, which is beneficial to the subsequent height control of the first dielectric layer in the groove during etching, that is, it is beneficial to control the height of the first dielectric layer, so that the shape and size of the electrode structure are more consistent.
[0043] It should be noted that the remaining portion of the first dielectric layer after the trench notch is removed and the second dielectric layer are used together as the gate dielectric layer included in the gate structure of the trench power device, and the electrode structure is used as the gate electrode included in the gate structure of the trench power device.
[0044] In the embodiment of the present application, after a groove is etched on the surface of the substrate, a dielectric layer is formed in the groove and the groove formed with the first dielectric layer is filled to form a sacrificial structure, and then the first dielectric layer at the groove opening is etched away, and a second dielectric layer is formed on the sidewall of the groove opening after the first dielectric layer is etched away. The thickness of the second dielectric layer is less than the first dielectric layer, so after the sacrificial structure is removed, a gap with a wide top and a narrow bottom is constructed in the groove by the first dielectric layer and the second dielectric layer, so that a T-shaped electrode structure is formed by filling with a conductive material, thereby realizing the production of a T-shaped gate with a relatively simplified process flow, and the cost is low.
[0045] Figure 2a to Figure 2f FIG. 1 is a schematic diagram showing the execution results of each step in a method for manufacturing a T-type gate provided in an embodiment of the present application. Figures 2a to 2f The manufacturing method of the T-type grid is introduced in detail.
[0046] The substrate described in step S110 is as follows Figure 2a As shown, the substrate 11 and the epitaxial layer 12 located on the surface of the substrate 11 may be included.
[0047] Specifically, the substrate 11 can be a silicon substrate, a strained silicon substrate, a germanium substrate, a germanium silicon substrate, a silicon carbide substrate, a III-V compound substrate, etc., and is not limited to the examples listed above. For an N-type trench power device, the epitaxial layer 12 is N-type doped, and the substrate 11 is N-type heavily doped compared to the epitaxial layer 12, and the N-type dopant includes, for example, phosphorus (P) and arsenic (As). For a P-type trench power device, the epitaxial layer 12 is P-type doped, and the substrate 11 is P-type heavily doped compared to the epitaxial layer 12, and the P-type dopant includes, for example, boron (B).
[0048] The execution process of step S120 is as follows: Figure 2a As shown, when the base includes a substrate 11 and an epitaxial layer 12 , the groove 13 is formed by etching the surface of the epitaxial layer 12 .
[0049] The first dielectric layer formed in step S130 may be an oxide layer, such as Figure 2b As shown, the first dielectric layer 14 may be formed in the trench 13 by deposition or thermal growth.
[0050] Specifically, the first dielectric layer 14 is formed by deposition, that is, the oxide material is directly deposited on the sidewalls and bottom surface of the groove 13. The thickness of the first dielectric layer 14 can be controlled by controlling the execution time of the deposition process, and at the same time, a gap is left in the groove 13 to form a sacrificial structure later. The first dielectric layer 14 is formed by thermal growth, that is, the sidewalls and bottom surface of the groove 13 are heated under the condition of oxygen filling to participate in the oxidation reaction to generate the oxide material for forming the first dielectric layer 14. The thickness of the first dielectric layer 14 can be controlled by controlling the amount of oxygen filled, and at the same time, a gap is left in the groove 13 to form a sacrificial structure later. Exemplarily, the substrate is made of doped silicon material, and the first dielectric layer 14 is made of silicon dioxide.
[0051] The execution process of step S140 may include: filling the trench 13 where the first dielectric layer 14 is formed with silicon nitride by deposition, that is, filling the gap remaining in the trench 13 after the first dielectric layer 14 is formed with silicon nitride.
[0052] In one embodiment, after silicon nitride is formed by deposition, a small amount of silicon nitride may be deposited outside the trench 13. Step S140 also includes removing the silicon nitride deposited outside the trench 13, thereby forming a silicon nitride layer in the trench 13. Figure 2c The first sacrificial structure 15a shown is a sacrificial structure. Specifically, the silicon nitride deposited outside the groove 13 includes the silicon nitride deposited on the top of the first dielectric layer 14 on the sidewall of the groove, so the silicon nitride deposited outside the groove 13 is removed (by etching or grinding, etc.) so that the first dielectric layer 14 is not covered by silicon nitride, and the silicon nitride is exposed on the surface of the power device and is flush with the surface of the power device, thereby ensuring that the first dielectric layer 14 at the notch of the groove 13 can be removed later. This method is easy to control the depth of the removed portion of the first dielectric layer 14, ensuring that the depth of the first dielectric layer 14 in each groove on the wafer is consistent.
[0053] The execution process of step S150, when the substrate, the first dielectric layer 14 and the sacrificial structure (for example, the first sacrificial structure 15a) are made of different materials, can include: using a first selective etching process to etch the first dielectric layer 14 at the notch of the groove 13, thereby avoiding the problem of high cost caused by using a mask for etching.
[0054] Specifically, the first selective etching process uses a first etchant. Compared with the material used for the substrate and the material used for the sacrificial structure, the first etchant has a higher etching rate for the material used for the first dielectric layer 14, so that the first dielectric layer 14 at the notch of the groove 13 is removed without damaging the substrate and the sacrificial structure. The sacrificial structure is not damaged, which is conducive to etching the first dielectric layer 14 into Figure 2d The shape shown in FIG. 1 is that the first dielectric layer 14 is only etched from top to bottom so that only the portion of the first dielectric layer 14 at the notch of the trench 13 is removed, and the rest of the first dielectric layer 14 (i.e. Figure 2d The portion of the first dielectric layer 14 whose distance from the bottom surface of the trench 13 is not greater than the threshold value h will not be etched by the first etchant due to the removal of the sacrificial structure (eg, the first sacrificial structure 15a) and the gap left after the removal of the sacrificial structure.
[0055] In this embodiment, silicon nitride is used as the sacrificial structure. Silicon nitride has high etching accuracy, is easy to control, and has relatively mature etching technology. Through dry etching and wet etching, the etching degree of silicon nitride can be accurately controlled, so that the height of the sacrificial structure in each groove is consistent, so as to ensure that the etching depth of the first dielectric layer 14 is consistent.
[0056] It should be noted that the first dielectric layer 14 is partially removed at the notch of the groove 13. Figure 2d As shown, the portion of the first dielectric layer 14 whose distance from the bottom surface of the groove 13 is greater than the threshold value h is removed. Since the portion of the first dielectric layer 14 at the notch of the groove 13 is removed and the remaining portion is to be present together with the second dielectric layer formed later as the gate dielectric layer of the T-type gate, the depth of the first dielectric layer 14 etched at the notch of the groove 13 is determined according to the shape of the T-type gate, in other words, the value of the threshold value h is determined according to the structure of the T-type gate.
[0057] In some examples, during the formation of the first dielectric layer 14, the surface of the epitaxial layer 12 is also covered by the material used by the first dielectric layer 14. For example, the first dielectric layer 14 is formed in the trench 13 by deposition or thermal growth, and during this process, an oxidized material is deposited on the surface of the epitaxial layer 12 or an oxidized material is formed by an oxidation reaction due to contact with oxygen, so that the surface of the epitaxial layer 12 is Figure 2bIn this case, the silicon nitride deposited outside the groove 13 may also include silicon nitride covering the material used in the first dielectric layer 14 on the surface of the epitaxial layer 12, so that after the silicon nitride deposited outside the groove 13 is ground off, the material used in the first dielectric layer 14 on the surface of the epitaxial layer 12 is as follows: Figure 2c As shown, the first dielectric layer 14 on the surface of the epitaxial layer 12 is not covered by silicon nitride. The material used in the first selective etching process is also as shown in FIG. Figure 2d As shown, it is etched away.
[0058] Removing the sacrificial structure in step S160 may also include: etching the sacrificial structure using a second selective etching process when the substrate, the first dielectric layer 14 and the sacrificial structure are made of different materials, thereby avoiding the problem of high cost caused by etching using a mask.
[0059] Specifically, the second selective etching process uses a second etchant different from the first etchant. Compared with the material used for the substrate and the material used for the first dielectric layer 14, the second etchant has a higher etching rate for the material used for the sacrificial structure, so that the sacrificial structure (such as Figure 2d The substrate will not be damaged while the first sacrificial structure 15a) is removed, and the remaining portion of the first dielectric layer 14 will not be damaged, so the manufactured T-type gate has a higher yield.
[0060] The second dielectric layer formed in step S160 may be an oxide layer, and the first dielectric layer 14 may also be an oxide layer. In this case, a dielectric layer such as Figure 2e The thickness of the second dielectric layer 16 can be controlled by controlling the amount of oxygen injected during the thermal growth process, but the first dielectric layer 14 will not undergo further oxidation reaction during the process to change the type of material used, and the sidewalls and bottom surfaces covered by the first dielectric layer 14 in the trench 13 will not be exposed to oxygen, so the thickness of the first dielectric layer 14 will not increase. Exemplarily, the substrate is made of doped silicon material, and the first dielectric layer 14 and the second dielectric layer 16 are both made of silicon dioxide.
[0061] It should be noted that the order of removing the sacrificial structure and forming the second dielectric layer 16 in step S160 is not limited in the embodiment of the present application, that is, forming the second dielectric layer 16 can be performed before or after removing the sacrificial structure.
[0062] The execution process of step S170 may be to fill the trench 13 where the sacrificial structure is removed and the second dielectric layer 16 is formed with a conductive material (eg, polysilicon) to form the electrode structure 17 .
[0063] Figure 3a to Figure 3h FIG. 1 is a schematic diagram showing the execution results of each step in another method for manufacturing a T-type gate provided in an embodiment of the present application. Figure 3h Another method for manufacturing the T-type gate provided in an embodiment of the present application is described.
[0064] Compared to Figure 2a to Figure 2f The method for making the T-type grid shown in FIG. Figure 3a to Figure 3h The manufacturing method of the T-type gate shown in the figure mainly differs in the material used for the sacrificial structure, the formation process and the removal process. The material used for the sacrificial structure is changed from silicon nitride to silicon nitride and photoresist. The following mainly describes the formation of the sacrificial structure. Figure 3c to Figure 3e and a schematic diagram showing the removal of the sacrificial structure Figure 3f to Figure 3g The groove 13 is formed in detail. Figure 3a and schematically showing the first dielectric layer 14 formed Figure 3b , please refer to the above Figure 2a and Figure 2b Description of the schematic electrode structure 17 formed Figure 3h , please refer to the above Figure 2f Description.
[0065] Specifically, the formation process of the sacrificial structure may include: forming a sacrificial structure in the groove 13 where the first dielectric layer 14 is formed by deposition. Figure 3c The silicon nitride layer 15b shown in FIG. 1 covers the first dielectric layer 14; a photoresist is filled into the groove 13 formed with the silicon nitride layer 15b by deposition to form a silicon nitride layer 15b. Figure 3d The photoresist core 15c is shown.
[0066] In order to make the surface of the power device flat, the above method of forming a sacrificial structure may further include removing the photoresist and silicon nitride outside the groove 13. Specifically, the photoresist is etched back to remove the photoresist deposited outside the groove 13, forming a Figure 3d The silicon nitride deposited outside the groove 13 is etched or ground off to form a Figure 3e The second sacrificial structure shown in the trench 13 includes a silicon nitride layer 15b and a photoresist core 15c. The second sacrificial structure is exposed on the surface of the power device and is flush with the surface of the power device.
[0067] The silicon nitride layer 15b is formed in the groove 13 by deposition, so that the surface of the epitaxial layer 12 is directly or indirectly covered by silicon nitride, and the silicon nitride layer 15b only includes silicon nitride located in the groove 13. The direct coverage refers to the direct deposition of silicon nitride on the surface of the epitaxial layer 12, corresponding to the situation that the surface of the epitaxial layer 12 is not covered by the material used in the first dielectric layer 14 during the formation of the first dielectric layer 14; the indirect coverage refers to the surface of the epitaxial layer 12 is directly deposited with silicon nitride, corresponding to the situation that the surface of the epitaxial layer 12 is not covered by the material used in the first dielectric layer 14 during the formation of the first dielectric layer 14; Figure 3c As shown in FIG. 1 , the surface of the epitaxial layer 12 is covered by the material used in the first dielectric layer 14 and then covered by silicon nitride, corresponding to the process of forming the first dielectric layer 14. Figure 3b The situation shown is covered by the material used by the first dielectric layer 14.
[0068] It should be noted that the silicon nitride deposited outside the groove 13 includes: the silicon nitride deposited on the top of the first dielectric layer 14 on the sidewall of the groove and the silicon nitride directly or indirectly covering the surface of the epitaxial layer 12; the photoresist deposited outside the groove 13 includes: the photoresist deposited on the top of the first dielectric layer 14 on the sidewall of the groove and the photoresist directly or indirectly covering the surface of the epitaxial layer 12. The photoresist directly or indirectly covering the surface of the epitaxial layer 12 can be understood with reference to the above-mentioned silicon nitride directly or indirectly covering the surface of the epitaxial layer 12, which will not be repeated here. The photoresist and silicon nitride deposited outside the groove 13 are removed, for example, by etching or grinding, so as to ensure that the first dielectric layer 14 at the notch of the groove 13 can be partially removed later, and the depth of the first dielectric layer 14 removed in each groove on the wafer is kept consistent.
[0069] The process of removing the sacrificial structure may include: Figure 3f The photoresist core 15c shown in the figure can be removed by selectively etching the first sub-etchant which has a relatively large etching rate for the photoresist but a relatively small etching rate for the substrate, the first dielectric layer 14 and the silicon nitride; Figure 3f The removal of the silicon nitride layer 15b shown can be achieved by selectively etching with a second sub-etchant having a higher etching rate for silicon nitride but a lower etching rate for the substrate and the first dielectric layer 14. The first sub-etchant and the second sub-etchant are both second etchants used in the second selective etching process for removing the sacrificial structure. Figure 3g FIG. 1 is a cross-sectional view of the trench 13 after the photoresist core 15c and the silicon nitride layer 15b are removed and the second dielectric layer 16 is formed. Figure 3g As shown, the remaining first dielectric layer 14 and the second dielectric layer 16 form a T-shaped gap, so that Figure 3h A T-shaped electrode structure 17 is formed.
[0070] The use of the silicon nitride layer 15b to wrap the photoresist core 15c can fully utilize the advantage of high etching precision of silicon nitride, which is beneficial to controlling the height of the sacrificial structure and controlling the subsequent etching depth of the first dielectric layer.
[0071] Figures 4a to 4f FIG. 4 is a schematic diagram showing the execution results of each step in another method for manufacturing a T-type gate provided in an embodiment of the present application. Figure 4f Another method for manufacturing the T-type gate provided in the embodiment of the present application is described.
[0072] Compared to Figure 2a to Figure 2f The method for making the T-type grid shown in FIG. Figures 4a to 4f The manufacturing method of the T-type gate shown in the figure mainly differs in the material used for the sacrificial structure, that is, the material used for the sacrificial structure is changed from silicon nitride to photoresist. The following mainly illustrates the difference in the material used for the sacrificial structure. Figure 4c The groove 13 is formed in detail. Figure 4a and schematically showing the first dielectric layer 14 formed Figure 4b , please refer to the above Figure 2a and Figure 2b Description of steps after the sacrificial structure is formed Figure 4d to Figure 4f , please refer to the above Figure 2d and Figure 2f The difference is that Figure 4d The removal process of the third sacrificial structure 15d as a sacrificial structure shown in the figure uses a second etchant having a higher etching rate for the photoresist but a lower etching rate for the substrate and the first dielectric layer 14 to perform a second selective etching process to remove the sacrificial structure.
[0073] Specifically, the formation process of the sacrificial structure includes: filling the trench 13 where the first dielectric layer 14 is formed with photoresist by deposition.
[0074] In order to make the surface of the power device flat, the formation process of the sacrificial structure may further include etching back the photoresist to remove the photoresist deposited outside the groove 13, thereby obtaining the following: Figure 4c A third sacrificial structure 15d is shown.
[0075] The above-mentioned method of filling the trenches where the first dielectric layer 14 is formed by deposition with photoresist will cause the surface of the epitaxial layer 12 to be directly or indirectly covered by the photoresist, and the third sacrificial structure 15d finally formed only includes the photoresist located in the trenches 13. The direct coverage refers to the direct deposition of photoresist on the surface of the epitaxial layer 12, corresponding to the situation that the surface of the epitaxial layer 12 is not covered by the material used in the first dielectric layer 14 during the formation of the first dielectric layer 14; the indirect coverage refers to the surface of the epitaxial layer 12 such as Figure 4b As shown in FIG. 1 , the surface of the epitaxial layer 12 is covered by the material used in the first dielectric layer 14 and then covered by the photoresist, corresponding to the process of forming the first dielectric layer 14. Figure 4b The situation shown is covered by the material used by the first dielectric layer 14.
[0076] It should be noted that the photoresist deposited outside the groove 13 includes: the photoresist deposited on the top of the first dielectric layer 14 on the sidewall of the groove and the photoresist directly or indirectly covering the surface of the epitaxial layer 12. Removing the photoresist deposited outside the groove 13 can ensure that the height of the sacrificial structure in each groove is consistent, and then the part of the first dielectric layer 14 at the notch of the groove 13 can be removed, which is conducive to controlling the consistency of the depth of the first dielectric layer 14 being etched.
[0077] Three different methods for making a T-type gate are provided above. The differences are reflected in the sacrificial structure, but none of them will complicate the process flow, nor will they introduce multi-level mask-based etching. Therefore, the three different methods for making a T-type gate have the advantages of simple process flow and low cost.
[0078] Corresponding to the method for manufacturing the T-type gate of the trench power device provided in the above embodiments, another embodiment of the present application also provides a trench power device, which includes a T-type gate, and the T-type gate is manufactured by any of the manufacturing methods provided in the above embodiments, thereby reducing the manufacturing cost of the trench power device.
[0079] It should be understood that after the T-type gate is made, the manufacturing process of the trench power device also includes the formation of the body region (body), the deposition of an oxide layer as an interlayer dielectric layer, the etching of connection holes in the interlayer dielectric layer, and the deposition of metal materials in the connection holes. These common processes of the trench power device are not described here one by one.
[0080] After the groove is etched on the surface of the substrate, the present application forms a dielectric layer in the groove and fills the groove formed with the first dielectric layer to form a sacrificial structure, then etches the first dielectric layer at the groove opening and forms a second dielectric layer on the sidewall at the groove opening after the first dielectric layer is etched. Since the thickness of the formed second dielectric layer is less than the first dielectric layer, a wide-upper-narrow-lower-gap is constructed in the groove by the first dielectric layer and the second dielectric layer after the sacrificial structure is removed, so that a T-shaped electrode structure is formed by filling with a conductive material, thereby realizing the production of a T-type gate with a relatively simplified process flow and low cost. The embodiment of the present application fills the entire groove with a sacrificial structure, which is conducive to controlling the height of the sacrificial structure on the entire wafer and the etching depth of the first dielectric layer, improving the consistency of the shape and size of the T-type gate, and thus improving the production quality and yield of the device.
[0081] The embodiments of the present application are described above, and these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can make good use of the present application and the modifications based on the present application. The present application is only limited by the claims and their full scope and equivalents.
Claims
1. A method for manufacturing a T-type gate of a trench power device, comprising: providing a substrate; Etching a groove on the surface of the substrate; forming a first dielectric layer in the trench, wherein the first dielectric layer covers the sidewalls and bottom surface of the trench; Filling the trench formed with the first dielectric layer to form a sacrificial structure; removing a portion of the first dielectric layer at the groove opening; Removing the sacrificial structure and forming a second dielectric layer on the sidewall of the groove notch after removing the first dielectric layer, wherein the thickness of the second dielectric layer is smaller than that of the first dielectric layer; as well as The trench where the sacrificial structure is removed and the second dielectric layer is formed is filled with a conductive material to form an electrode structure.
2. The method according to claim 1, wherein: The base comprises a substrate and an epitaxial layer located on the surface of the substrate, and the groove is formed by etching the surface of the epitaxial layer.
3. The method according to claim 1, wherein: The first dielectric layer is an oxide layer, which is formed in the trench by deposition or thermal growth.
4. The method according to claim 1, wherein: Filling the trench formed with the first dielectric layer comprises: The trench formed with the first dielectric layer is filled with silicon nitride by deposition.
5. The method according to claim 1, wherein: Filling the trench formed with the first dielectric layer comprises: forming a silicon nitride layer in the groove where the first dielectric layer is formed by deposition, wherein the silicon nitride layer covers the first dielectric layer; and The trench where the silicon nitride layer is formed is filled with photoresist by deposition.
6. The method according to claim 1, wherein: Filling the trench formed with the first dielectric layer comprises: The trench formed with the first dielectric layer is filled with photoresist by deposition.
7. The method according to claim 1, wherein: The substrate, the first dielectric layer and the sacrificial structure are made of different materials; Removing a portion of the first dielectric layer at the groove opening includes: etching the first dielectric layer at the groove opening using a first selective etching process; Removing the sacrificial structure includes: etching the sacrificial structure using a second selective etching process.
8. The method according to claim 1, wherein: The first dielectric layer and the second dielectric layer are both oxide layers, and the second dielectric layer is formed on the sidewall of the groove notch after the first dielectric layer is etched away by thermal growth.
9. The method according to claim 1, wherein: The conductive material is polysilicon.
10. A trench power device, comprising a T-type gate, wherein the T-type gate is manufactured by the manufacturing method according to any one of claims 1 to 9.