Composite dielectric gate photosensitive detector capable of improving radiation resistance
By setting up a multi-layer isolation structure and doping region in the composite dielectric grid photosensitive detector, combined with negative voltage processing, the dark current and performance degradation of the composite dielectric grid photosensitive detector under high dose irradiation is solved, and the problem of dark current and performance degradation of the composite dielectric grid photosensitive detector under high dose irradiation is significantly improved. Radiation resistance and reliability.
Patent Information
- Application Number
- CN202411310843.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-20
- Publication Date
- 2024-12-20
AI Technical Summary
The existing composite dielectric grid photosensitive detectors significantly increase the dark current after high dose irradiation, the initial grayscale value drifts significantly, the device's photoelectric performance deteriorates, the imaging quality becomes worse, the life becomes shorter, the reliability is reduced, and it cannot work normally, especially There is a problem of insufficient radiation resistance in space-based applications.
A composite dielectric gate photosensitive detector structure is adopted, including forming a composite dielectric gate MOS capacitor and MOSFET portion on a P-type semiconductor substrate, and a first shallow isolation groove and a deep isolation groove are arranged therebetween, polysilicon is filled, and N-type doping is arranged The hybrid region and the P-type heavily doped isolation region reduce the accumulation of interface states and positive charges through negative voltage and doping, and improve radiation resistance.
Significantly reduce the dark current of the device, improve radiation resistance, extend the reliability of the device's long-term application, reduce device performance degradation caused by radiation, and improve imaging quality and life.
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Figure CN119170616A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a composite dielectric grating photosensitive detector, in particular to a composite dielectric grating photosensitive detector for application scenarios such as space-based remote sensing, nuclear industry, and high-energy physics research, and mainly relates to a reinforcement structure that enables the detector to resist total dose radiation. Background Art
[0002] With the development of aerospace technology, nuclear technology and high-energy physics research, image sensors, as part of aerospace and nuclear weapon systems and particle accelerators, are exposed to a large number of high-energy particles and rays in their operating environment. These particles and rays can penetrate the shielding layer of the image sensor and interact with the materials of the components to produce radiation effects, causing device performance degradation or functional abnormalities, affecting the performance reliability and service life of the device, and endangering the on-orbit safety of the spacecraft. Therefore, higher requirements are placed on the radiation resistance and reliability of the device.
[0003] During the total dose irradiation process, high-energy radiation ionization produces electron-hole pairs. Since the mobility of electrons in the dielectric layer is much greater than that of holes, a portion of the positive charges that have not been recombined are captured by defects in the dielectric layer, causing the gradual accumulation of positive charges in the dielectric layer. On the other hand, during the radiation process, protons in the dielectric layer are transported to the interface. The protons combine with the interface passivation bonds to cause the depassivation of interface defects, and the interface states gradually increase during the irradiation process. The positive charges accumulated in the dielectric layer and the interface states accumulated at the interface between silicon and the substrate will cause the device threshold to drift, dark current and leakage to increase. This will cause the optical performance of the chip to deteriorate or even fail to work.
[0004] Chinese patent application CN107658321A proposes a dual-device photosensitive detector based on a composite dielectric gate. Each detection unit of the detector includes a composite dielectric gate MOS capacitor part and a composite dielectric gate MOSFET part formed on the same P-type semiconductor substrate. The composite dielectric gate MOS capacitor part is used for light sensing, and the composite dielectric gate MOSFET realizes the reading function of the composite dielectric gate photosensitive detector. The floating gate and the control gate are shared by the composite dielectric gate MOS capacitor and the composite dielectric gate MOSFET. The light signal obtained by the composite dielectric gate MOS capacitor part is coupled to the composite dielectric gate MOSFET part through charge coupling for reading. This pixel structure is simple, can realize ultra-large array integration, and has unique advantages in space-based applications. However, the dual-device photosensitive detector has not been specially optimized for radiation resistance. Ground simulation experiments have found that the dark current of the device increases significantly after high-dose irradiation (total dose 50Krad (Si)), the initial gray value drifts more significantly, and the leakage of the device also increases. The photoelectric performance of the device is seriously degraded, the imaging quality deteriorates, the life is shortened, and the reliability is reduced, which ultimately leads to abnormal chip function and inability to work normally. Therefore, it is necessary to reinforce the composite dielectric grating photosensitive detector against radiation to improve its lifespan in space-based applications, while expanding its application scenarios and leveraging its unique advantages to serve the nuclear industry and high-energy physics research.
[0005] In order to improve the radiation resistance of the device, it can be carried out from three aspects: shielding reinforcement, process reinforcement and design reinforcement. Since pixels directly receive electromagnetic wave imaging, pixel devices cannot be shielded during operation, especially in high-energy physics research and nuclear industry, where pixel radiation accumulation cannot be shielded. However, the cost of shielding reinforcement for aerospace applications is relatively high. For process reinforcement, the process exploration time is long and the cost is also high, and the radiation resistance of the device is very sensitive to process changes. Therefore, it is possible to consider combining design reinforcement with process reinforcement to improve the radiation resistance of the device. Summary of the invention
[0006] The present invention provides a structure of a composite dielectric grating photosensitive detector, which can significantly improve the radiation resistance of the device.
[0007] In order to achieve the above object, the technical solution adopted by the present invention is as follows:
[0008] A composite dielectric gate photosensitive detector with improved radiation resistance, wherein the detector unit comprises a composite dielectric gate MOS capacitor and a composite dielectric gate MOSFET part formed on the same P-type semiconductor substrate, and a first shallow isolation groove is arranged between the detector units; the first shallow isolation groove is located at the gate of the composite dielectric gate MOS capacitor and the periphery of the gate of the composite dielectric gate MOSFET part, and does not contact the body depletion region in the substrate below the gate of the composite dielectric gate MOS capacitor, nor does it contact the body depletion region in the substrate below the gate of the composite dielectric gate MOSFET part.
[0009] Furthermore, the distance between the first shallow isolation trench and the gate of the composite dielectric gate MOS capacitor and the gate of the composite dielectric gate MOSFET part is not less than the depth value of the first shallow isolation trench.
[0010] Furthermore, polysilicon isolation gates are provided inside and outside the first shallow isolation trench, the depth of the isolation gates is not less than 1 / 3 of the depth of the first isolation trench, and the isolation gates surround the first shallow isolation trench.
[0011] Furthermore, the isolation gate is added with 0V or floated when the detector is reset, and a negative voltage of -2V is added when the detector is exposed and read.
[0012] Furthermore, backside deep isolation grooves are provided between the detector units.
[0013] Furthermore, the structure of the first shallow isolation trench and the deep isolation trench is: polysilicon is filled in the middle of the silicon dioxide medium containing fluorine or chromium.
[0014] Furthermore, a buried trench structure is provided in the substrate below the gate of the composite dielectric gate MOS capacitor and the gate of the composite dielectric gate MOSFET part, and an N-type doped region is formed on the surface of the substrate.
[0015] Furthermore, the concentration of the N-type doping region is 2-3 times the concentration of the substrate.
[0016] Furthermore, a second shallow isolation trench is provided between the gate of the composite dielectric gate MOS capacitor and the gate of the composite dielectric gate MOSFET portion.
[0017] Furthermore, the sidewalls of the second shallow isolation trench are wrapped by a P-type heavily doped region.
[0018] The detector proposed by the present invention can significantly reduce the dark current of the device and improve the radiation resistance of the device. The isolation gate with doping or negative voltage is used to isolate the silicon and dielectric layer at the interface, reduce the interface state in the depletion region, and reduce the accumulation of positive charge by reducing the volume of the dielectric layer, thereby improving the radiation resistance of the device and greatly improving the long-term application reliability of the device. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 1 is a schematic diagram of the three-dimensional structure of a photosensitive detector in an embodiment of the present invention;
[0020] Figure 2 Schematic diagram of the three-dimensional structure of the composite gate of the photosensitive detector in the embodiment of the present invention, (a) is a schematic diagram of the gate structure, and (b) is a schematic diagram of the tunneling oxide layer structure;
[0021] Figure 3 Schematic diagram of the three-dimensional structure of the aa' section of the photosensitive detector in an embodiment of the present invention;
[0022] Figure 4 Schematic diagram of the depletion region below the gate of the photosensitive detector in an embodiment of the present invention;
[0023] Figure 5 Schematic diagram of the layout of the photosensitive detector in an embodiment of the present invention;
[0024] Figure 6 4 is a timing diagram of the photosensitive detector in an embodiment of the present invention. DETAILED DESCRIPTION
[0025] In order to make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.
[0026] Figure 1 The three-dimensional structure of the composite dielectric grating photosensitive detector with radiation resistance reinforcement in this embodiment is schematically shown, wherein 1 is the substrate area, which is P-type doped silicon in this embodiment, and 2 is the gate area of the composite dielectric grating photosensitive detector. Figure 2 As shown in (a), the gate is formed by depositing and etching 6 layers of materials in sequence, wherein 4 is the tunneling oxide layer of the composite dielectric grating photosensitive detector, 5 is the polysilicon floating gate of the composite dielectric grating photosensitive detector, 6 is the silicon oxide layer of the composite dielectric grating photosensitive detector, 7 is the silicon nitride layer of the composite dielectric grating photosensitive detector, 8 is the silicon oxide layer of the composite dielectric grating photosensitive detector, and 9 is the polysilicon control gate of the composite dielectric grating photosensitive detector. Figure 2 In (b), the left region a of the tunneling oxide layer 4 is the tunneling oxide layer of the composite dielectric gate MOS capacitor, the right region b is the tunneling oxide layer of the composite dielectric gate MOSFET, and the middle region c connects regions a and b. The six layers that make up the gate are the same, except for the different materials and thicknesses.
[0027] The gate portion corresponding to region a is the gate region of the composite dielectric gate MOS capacitor, and the gate portion corresponding to region b is the gate region of the composite dielectric gate MOSFET. Figure 3 and 4As shown, 16 is a body depletion region formed in the substrate region below the gate of the composite dielectric gate MOS capacitor when a positive voltage is applied to the gate, 15 is an N-type heavily doped buried trench region on the surface of the substrate below the gate of the composite dielectric gate photosensitive detector, 17 is a body depletion region formed in the substrate region below the gate of the composite dielectric gate MOSFET when a positive voltage is applied to the gate, 12 is a shallow isolation trench STI (Shallow Trench Isolation) on the front side, 13 is a region filled with polysilicon in the STI, 14 is a deep isolation trench DTI (Deep Trench Isolation) on the back side, and there is also a region 13 filled with polysilicon in the DTI, 10 is a shallow isolation trench STI between the gate region of the composite dielectric gate MOS capacitor and the gate region of the composite dielectric gate MOSFET, 3 is a substrate P-type heavily doped isolation region at the interface between the STI 10 and the substrate, and 11 is an isolation gate. Filling the shallow isolation trench STI and the deep isolation trench DTI with polysilicon reduces charge accumulation in the dielectric layer and reduces the drift of the threshold voltage.
[0028] The anti-irradiation reinforcement scheme of the composite dielectric grating photosensitive detector in this embodiment is specifically described as follows:
[0029] 1) The composite dielectric gate MOS capacitor and the composite dielectric gate MOSFET expand the area of the active region to the surroundings, so that the gate region 2 of the composite dielectric gate MOS capacitor and the composite dielectric gate MOSFET maintains a certain distance from the shallow isolation groove STI 12 between pixels. In this way, the shallow isolation groove STI 12 between pixels around the channel / depletion region 16 of the composite dielectric gate MOS capacitor region is expanded outwardly beyond the gate, which can ensure that the channel / depletion region 16 of the composite dielectric gate MOS capacitor region is not adjacent to the isolation STI 12 between pixels. The larger the distance between the gate and the STI, the better. However, the larger the distance, the smaller the pixel filling factor. Generally, the distance is at least greater than or equal to the depth value of STI 12, which reduces the generation of dark current and also reduces the influence of the positive charge accumulated by STI 12 on the floating gate voltage of the composite dielectric gate MOS capacitor. Similarly, the composite dielectric gate MOSFET channel / depletion region 17 is not adjacent to the shallow isolation groove STI 12 between pixels. In this way, after fixed positive charges are generated in the silicon dioxide insulating dielectric layer of the shallow isolation trench STI (10, 12) between pixels due to irradiation, no parasitic channels will be generated on both sides of the composite dielectric gate MOSFET channel / depletion region 17, thereby eliminating the leakage channel on the side wall of the composite dielectric gate MOSFET channel, so that the device has very good total radiation dose resistance performance.
[0030] 2) A polysilicon isolation gate 11 is deposited on both the inner and outer sides of the shallow isolation trench STI12 between pixels. The depth of the isolation gate 11 is not less than 1 / 3 of the depth of the isolation trench STI12, and the isolation gate 11 surrounds the shallow isolation trench STI12 between pixels. A negative voltage of -2V is applied to the isolation gate 11 when the pixel is exposed and read, and a hole accumulation zone is formed under the isolation gate 11, which inhibits the interface state-related dark generated electrons on the side wall of the shallow isolation trench STI12 from being transported to the depletion zone under the composite dielectric gate MOS capacitor, thereby reducing the dark current of the device.
[0031] 3) The bottom of the shallow isolation trench STI12 between pixels on the front of the pixel and the DTI14 on the back, the STI10 between the pixel composite dielectric gate MOS capacitor and the composite dielectric gate MOSFET are all made of fluorine- or chromium-containing silicon dioxide, the middle is filled with polysilicon, and the top is a fluorine- or chromium-containing silicon dioxide structure, where the depth of the polysilicon area is about 7 / 15 of the isolation trench depth. The polysilicon in the isolation structure (STI, DTI) is surrounded by silicon oxide. Polysilicon is filled in the STI (10, 12) on the front of the pixel and the DTI14 on the back. Since radiation will accumulate positive charges in silicon dioxide, reducing the volume of silicon dioxide will also reduce the accumulation of positive charges caused by radiation, thereby reducing the impact of positive charges in the isolation structure on the drift of device parameters (mainly threshold voltage). In addition, the silicon dioxide at all silicon and silicon dioxide interfaces of the composite dielectric grating photosensitive detector is thermally grown in a fluorine-containing atmosphere. Since the Si-F bond is longer than the Si-H bond and is less likely to break, the fluorine-passivated silicon dioxide dielectric layer interface has better total dose resistance, which can significantly reduce the generation of interface states and reduce dark current.
[0032] 4) A buried trench structure is made in the substrate below the gate region of the composite dielectric gate MOS capacitor and the gate region of the composite dielectric gate MOSFET, and an N-type heavily doped buried trench region 15 is formed on the surface of the substrate. Through the buried layer on the surface of the substrate, a composite dielectric gate MOSFET body depletion region 17 and a composite dielectric gate MOS capacitor region body depletion region 16 are formed below the composite dielectric gate MOS capacitor and the composite dielectric gate MOSFET substrate surface. By having the buried trench body depletion regions 16 and 17 in the substrate, the composite dielectric gate MOSFET body depletion region 17 and the composite dielectric gate MOS capacitor region body depletion region 16 are separated from the composite dielectric gate MOS capacitor and the composite dielectric gate MOSFET gate 2 and the substrate 1 interface, which can significantly reduce the dark current and leakage current of the device caused by irradiation, and improve the dark current characteristics of the device.
[0033] 5) A P-type heavily doped isolation region 3 is set for the isolation STI10 between the gate region of the composite dielectric gate MOS capacitor and the gate region of the composite dielectric gate MOSFET and the substrate region at the junction of the substrate. Since the composite dielectric gate MOS capacitor is connected to the gate and oxide layer of the composite dielectric gate MOSFET, the isolation below cannot be achieved by an isolation gate. By doping and wrapping the side wall of the STI10 between the composite dielectric gate MOS capacitor and the composite dielectric gate MOSFET, the depletion region of the composite dielectric gate MOS capacitor and the composite dielectric gate MOSFET can be disconnected from the STI, thereby reducing the dark current of the device. P-type heavy doping increases the threshold of the parasitic transistor and can reduce the leakage of the composite dielectric gate MOSFET caused by irradiation.
[0034] Figure 5 This is the layout of the photosensitive detector of this embodiment, which is also a top view of the device. The layout includes two pixels.
[0035] Specifically, during the device manufacturing process, STI12 is etched in the silicon substrate 1, and silicon oxide is deposited to fill the isolation groove. Then, the top 1 / 3 of the silicon oxide is removed by etching, but the side walls of the etched isolation groove retain 1 / 4 of the thickness of the silicon oxide, and then the polysilicon is filled, and the top polysilicon of 1 / 3 of the depth of STI12 is etched, and then silicon oxide is deposited, so that the isolation groove is completely filled with oxide and polysilicon. If the thickness of the silicon oxide above the polysilicon and on the side walls in STI12 is too thin, the large surface voltage on the substrate during the reading and resetting process may cause FN (Flower-Nordheim) tunneling, and the polysilicon in STI12 enters the charge, affecting the optoelectronic performance indicators of the device.
[0036] Then, both sides of the inter-pixel isolation STI12 of the substrate area 1 are etched, and polysilicon is deposited to form a mesh isolation gate 11 surrounding the STI area 12 on the upper surface of the substrate. Specifically, the isolation gate 11 is added with 0V or floated during resetting, and a negative voltage of -2V is added to the isolation gate 11 during exposure and reading.
[0037] Then, an N-type buried channel region 15 is formed by ion implantation under the gate region of the composite dielectric gate MOSFET. The specific implantation energy is 2-3 KeV, the angle is 2-5°, and the total injection amount is 2-3 times the substrate concentration for better results. The buried channel region is under the gate, not the entire active area. After the buried channel is completed, the gate and oxide layer processes are carried out.
[0038] Then, the substrate STI10 below the gate of the composite dielectric gate MOSFET and the composite dielectric gate MOS capacitor MOSFET is wrapped with P-type heavy doping. Through simulation, it is found that when the injection energy is 15-20KeV, the angle is 7-10°, and the injection amount is 30-50% of the substrate concentration, the STI10 side wall wrapping effect is better, which can not only significantly reduce the dark current, but also does not affect other electrical characteristics of MOSFET.
[0039] Finally, the back process is performed to etch DTI14 on the silicon substrate and deposit silicon oxide to fill the isolation groove. Then the top 2 / 3 of the silicon oxide is etched away, but 1 / 5 of the thickness of silicon oxide is retained on both sides of the etched isolation groove. Then polysilicon is filled, and the top polysilicon is etched to 1 / 5 of the depth of DTI, and then silicon oxide is deposited to completely fill the isolation groove with oxide and polysilicon.
[0040] Figure 6 The timing diagram of the photosensitive detector is shown in Figure 1. The device works in three voltage-applied states, and the voltage of the isolation gate is different in different states. Before taking a picture, the pixel is reset first, the control gate 9 is added with -4V, and the substrate, the source and drain of the composite dielectric gate MOSFET, and the isolation gate are added with 0V voltage. Then enter the exposure mode. During exposure, the control gate voltage is 0V, the source of the composite dielectric gate MOSFET is added with 0V, the drain is added with 0.5V voltage, the substrate voltage is -3V, and the isolation gate is connected with a voltage of -2V. After the exposure is completed, the reading state is entered. During reading, the control gate voltage is swept from 0 to 6V, and the voltage of the source, drain, substrate and isolation gate of the composite dielectric gate MOSFET remains the same as the exposure mode. After resetting, exposure, and reading, the photosensitive detector completes an imaging.
Claims
1. A composite dielectric gate photosensitive detector with improved radiation resistance, wherein the detector unit comprises a composite dielectric gate MOS capacitor and a composite dielectric gate MOSFET part formed on the same P-type semiconductor substrate, and a first shallow isolation trench is provided between the detector units; characterized in that: The first shallow isolation trench is located at the periphery of the gate of the composite dielectric gate MOS capacitor and the gate of the composite dielectric gate MOSFET part, and does not contact the body depletion region in the substrate under the gate of the composite dielectric gate MOS capacitor, nor does it contact the body depletion region in the substrate under the gate of the composite dielectric gate MOSFET part.
2. The composite dielectric grating photosensitive detector with improved radiation resistance according to claim 1, characterized in that: The distance between the first shallow isolation trench and the gate of the composite dielectric gate MOS capacitor and the gate of the composite dielectric gate MOSFET part is not less than the depth value of the first shallow isolation trench.
3. The composite dielectric grating photosensitive detector with improved radiation resistance according to claim 1, characterized in that: Polysilicon isolation gates are disposed inside and outside the first shallow isolation trench. The depth of the isolation gates is not less than 1 / 3 of the depth of the first isolation trench. The isolation gates surround the first shallow isolation trench.
4. The composite dielectric grating photosensitive detector with improved radiation resistance according to claim 1, characterized in that: The isolation gate is added with 0V or floated when the detector is reset, and added with a negative voltage of -2V when the detector is exposed and read.
5. The composite dielectric grating photosensitive detector with improved radiation resistance according to claim 1, characterized in that: Deep back isolation grooves are also provided between the detector units.
6. The composite dielectric grating photosensitive detector with improved radiation resistance according to claim 5, characterized in that: The structure of the first shallow isolation trench and the deep isolation trench is: polysilicon is filled in the middle of a silicon dioxide medium containing fluorine or chromium.
7. The composite dielectric grating photosensitive detector with improved radiation resistance according to claim 1, characterized in that: A buried trench structure is arranged in the substrate below the gate of the composite dielectric gate MOS capacitor and the gate of the composite dielectric gate MOSFET part, and an N-type doping region is formed on the surface of the substrate.
8. The composite dielectric grating photosensitive detector with improved radiation resistance according to claim 7, characterized in that: The concentration of the N-type doping region is 2-3 times that of the substrate.
9. The composite dielectric grating photosensitive detector with improved radiation resistance according to claim 1, characterized in that: A second shallow isolation trench is provided between the gate of the composite dielectric gate MOS capacitor and the gate of the composite dielectric gate MOSFET part.
10. The composite dielectric grating photosensitive detector with improved radiation resistance according to claim 9, characterized in that: The sidewall of the second shallow isolation trench is wrapped by a P-type heavily doped region.