Resistivity measurement method

Abstract

The present invention is a resistivity measurement method in which the resistivity of an EP layer formed on an EPW manufactured using a low-resistivity substrate is measured by a C-V method, and the SEMI-converted resistivity obtained by measuring the resistivity of the EP layer to be measured by the C-V method, or the resistivity obtained by performing a fixed conversion on the SEMI-converted resistivity, the SEMI-converted resistivity being measured by the C-V method, or the SEMI-converted resistivity being measured by the C-V method, or the SEMI-converted resistivity being measured by the C-V method. A four-probe resistivity of an EP layer to be measured is obtained by performing conversion based on a first conversion formula obtained by comparing a four-probe standard resistivity with a C-V resistivity obtained by measuring a standard PW to which a four-probe standard resistivity assignment has been performed by a C-V method, and conversion based on a second conversion formula obtained by comparing a four-probe standard resistivity with a C-V resistivity obtained by measuring a standard PW to which the four-probe standard resistivity assignment has been performed by a C-V method. The second conversion formula is obtained by comparing the C-V electrical resistivity of the EP layer of a high-electrical-resistivity substrate EPW manufactured using a high-electrical-resistivity substrate having an electrical resistivity that can be measured by the C-V method and a low-electrical-resistivity substrate EPW manufactured using a low-electrical-resistivity substrate. As a result, it is possible to provide a resistivity measurement method having a novel resistivity conversion in which the C-V method is performed when the international standard is traced using a PW wafer.

Description

Technical Field

[0001] The present invention relates to a resistivity measurement method, and more particularly to a resistivity measurement method for converting the resistivity of a silicon epitaxial layer measured by a CV method into a four-probe resistivity traceable to international standards such as NIST. Background Art

[0002] Conventionally, a CV (Capacitance-Voltage) method is known as a method for measuring the resistivity of a polished wafer (PW) (hereinafter sometimes simply referred to as PW) after the main surface of a single crystal silicon wafer has been polished, or a silicon epitaxial wafer (hereinafter sometimes simply referred to as EPW) on which a silicon epitaxial layer (hereinafter sometimes simply referred to as epitaxial layer) has been vapor-grown on the main surface of the PW wafer.

[0003] For example, as described in Patent Document 1, in order to measure the CV characteristics of a single crystal silicon wafer, a Schottky junction is formed using a metal electrode on the main surface (first main surface) of a single crystal silicon wafer serving as a sample, the sample is fixed to a wafer stage of a CV measuring device, and a reverse bias is applied to the electrode while the reverse bias is continuously varied, thereby expanding the depletion layer inside the single crystal silicon wafer and changing its capacity.

[0004] Then, based on the relationship between the bias voltage and the capacity of the depletion layer, the impurity concentration and resistivity at a predetermined depth from the main surface of the single crystal silicon wafer are calculated.

[0005] In order to obtain highly accurate CV characteristics, it is necessary to keep the contact between the main back surface (second main surface) of the sample and the wafer stage small.

[0006] Patent Document 1 discloses a method of placing a conductive pad on the wafer stage, bringing a single crystal silicon wafer having a conductive paste applied on its main back surface into close contact with the conductive pad, and measuring CV characteristics.

[0007] As the conductive pad, it is preferable to use silicone rubber doped with silver or carbon, having a resistivity of 0.01 Ω·cm or less and a thickness of 0.2 mm to 0.75 mm or less.

[0008] The conversion from CV characteristics to resistivity uses SEMI MF723-0307 or Irvin curve. The resistivity measurement value based on the four-probe method can be corrected using the following standard wafers, which have traceability to international standards such as the seven levels of resistivity standard materials (SRM: Standard Reference Material) provided by NIST (National Institute of Standards and Technology: National Institute of Standards and Technology) SRM2541 (0.01Ω·cm) to SRM2547 (200Ω·cm).

[0009] The resistivity measurement value by the CV method also preferably has traceability to international standards such as NIST. Therefore, it is proposed to ensure traceability by, for example, measuring a standard wafer having traceability to the resistivity standard material SRM by the CV method.

[0010] For example, in patent document 2, in a four-probe method measurement device that uses the resistivity standard materials SRM2541~SRM2547 as primary standard samples for calibration, the resistivity of the epitaxial layer of a silicon epitaxial wafer with a P / N junction is assigned as a secondary standard sample, and the epitaxial layer is measured by a CV method measurement device using a surface electrode to calibrate the CV method measurement device using the surface electrode.

[0011] In addition, it is proposed to use a CV method measurement device for the surface electrode calibrated by the secondary standard sample to measure the epitaxial layer resistivity of a P / P type or N / N type silicon epitaxial wafer as a tertiary standard sample, and use the tertiary standard sample to calibrate the CV method measurement device for the back electrode.

[0012] Prior art literature

[0013] Patent Literature

[0014] Patent Document 1: Japanese Patent Application Publication No. 2016-76662

[0015] Patent Document 2: Japanese Patent Application Publication No. 2018-32771 Summary of the invention

[0016] 1. Technical issues to be resolved

[0017] When the method proposed in Patent Document 2 is used, it is necessary to calibrate the resistivity using a silicon epitaxial wafer (EPW) having a P / N junction, and it is also necessary to have both a CV measurement device for the surface electrode and a CV measurement device for the back electrode.

[0018] The present invention has been made in view of the above technical problems, and its object is to provide a resistivity measurement method having a novel resistivity conversion of the CV method when using a PW wafer traceable to international standards such as NIST.

[0019] (II) Technical solution

[0020] In order to solve the above technical problems, the present invention provides a resistivity measurement method, which uses a CV method to measure the resistivity of a silicon epitaxial layer as a measurement object formed on a silicon epitaxial wafer, wherein the silicon epitaxial wafer is manufactured using a low-resistivity substrate having a resistivity of 0.02Ω·cm or less, and the resistivity measurement method is characterized in that:

[0021] The SEMI-converted resistivity obtained by measuring the resistivity of the silicon epitaxial layer as the measurement object by the CV method, or the resistivity to which the SEMI-converted resistivity is subjected to a prescribed conversion, is converted based on a first conversion formula and converted based on a second conversion formula to obtain the four-probe resistivity of the silicon epitaxial layer as the measurement object, wherein:

[0022] The first conversion formula is obtained by comparing the CV resistivity obtained by measuring a standard polished wafer with a four-probe standard resistivity value using the CV method with the four-probe standard resistivity, wherein the second conversion formula is obtained by comparing the CV resistivity of a silicon epitaxial layer of a high-resistivity substrate silicon epitaxial wafer with a silicon epitaxial layer of a low-resistivity substrate silicon epitaxial wafer,

[0023] The high-resistivity substrate silicon epitaxial wafer is manufactured using a high-resistivity substrate having a resistivity measurable by a CV method, and the low-resistivity substrate silicon epitaxial wafer is manufactured using a low-resistivity substrate having a resistivity of 0.02 Ω·cm or less.

[0024] Here, the resistivity of the high resistivity substrate having a resistivity measurable by a CV method is, for example, 0.1 Ω·cm or more and 1000 Ω·cm or less.

[0025] By using the present invention, in addition to conversion based on the first conversion formula, conversion based on the second conversion formula is also performed, thereby being able to convert the CV resistivity of a silicon epitaxial layer formed on a low-resistivity substrate into a four-probe resistivity that can be traced back to international standards such as NIST, wherein the first conversion formula is obtained by comparing the CV resistivity of a standard polished wafer with the four-probe standard resistivity, and the second conversion formula is obtained by comparing the CV resistivity of a silicon epitaxial layer formed on a high-resistivity substrate silicon epitaxial wafer with the CV resistivity of a silicon epitaxial layer formed on a low-resistivity substrate silicon epitaxial wafer.

[0026] That is, according to the present invention, it is possible to provide a resistivity measurement method having a novel resistivity conversion by the CV method when using a PW wafer traceable to an international standard such as NIST.

[0027] Preferably, the four-probe standard resistivity assignment of the standard polished wafer has the following characteristics:

[0028] Four-probe resistivity measurement device calibration process, using standard wafers traceable to international standards to calibrate the four-probe resistivity measurement device; and

[0029] The polished wafer standard resistivity assignment process uses the four-probe resistivity measurement device calibrated in the four-probe resistivity measurement device calibration process to perform the four-probe standard resistivity assignment on the polished wafer.

[0030] The first conversion formula is obtained using the standard polished wafer obtained in this way. By performing conversion based on the first conversion formula, the CV resistivity of the silicon epitaxial layer formed on the high resistivity substrate can be converted into a four-probe resistivity traceable to international standards such as NIST with higher accuracy.

[0031] In this case, in the polished wafer standard resistivity assignment process, the main surface of the polished wafer may also be measured using the four-probe resistivity measurement device.

[0032] Alternatively, the polished wafer may be ground to obtain a ground surface, and the ground surface may be measured using the four-probe resistivity measurement device. Preferably, the grinding may be plane grinding.

[0033] In this way, the main surface (PW surface) of the polished wafer can be measured using the four-probe resistivity measuring device, or the ground surface can be measured using the four-probe resistivity measuring device. When the ground surface is measured using the four-probe resistivity measuring device, the measurement accuracy of the four-probe resistivity is improved compared to the case of measuring the PW surface.

[0034] Preferably, as the polished wafer, a wafer subjected to a heat treatment for eliminating oxygen donors is used.

[0035] In this way, the four-probe standard resistivity can be assigned with higher accuracy.

[0036] Alternatively, preferably, as the standard polished wafer on which the four-probe standard resistivity assignment has been performed, a wafer that has undergone the following steps is used:

[0037] The four-probe resistivity measurement device calibration process uses standard wafers traceable to international standards to calibrate the four-probe resistivity measurement device;

[0038] an assignment step of measuring the resistivity of a single crystal silicon wafer that has been subjected to a heat treatment to eliminate oxygen donors by using the four-probe resistivity measuring device calibrated in the four-probe resistivity measuring device calibration step, and performing a four-probe standard resistivity assignment;

[0039] a processing step of processing at least a first main surface of the single crystal silicon wafer after the value assignment to obtain a polished wafer; and

[0040] The cleaning step is to clean the polished wafer. As the single crystal silicon wafer, for example, a wafer whose main surface is a surface after lapping, a surface after grinding, or a surface after chemical etching is used.

[0041] By using such a standard polished wafer, the CV resistivity of the silicon epitaxial layer to be measured can be converted with higher accuracy into a four-probe resistivity that can be traced back to international standards such as NIST.

[0042] Preferably, the second conversion formula is obtained by the following steps:

[0043] a substrate polishing wafer preparation step of preparing a high-resistivity polishing wafer having a resistivity measurable by a CV method and a low-resistivity polishing wafer having a resistivity of 0.02 Ωcm or less;

[0044] an epitaxial wafer preparation step, respectively on the high-resistivity polished wafer and the low-resistivity polished wafer, under growth conditions of the same doping concentration, epitaxially growing a silicon epitaxial layer of the same resistivity and the same conductivity type as the high-resistivity polished wafer, to prepare the high-resistivity substrate silicon epitaxial wafer and the low-resistivity substrate silicon epitaxial wafer;

[0045] A CV measurement step for comparing epitaxial wafers, wherein CV measurement is performed on the silicon epitaxial layer of the low-resistivity substrate silicon epitaxial wafer and the silicon epitaxial layer of the high-resistivity substrate silicon epitaxial wafer; and

[0046] A comparison step of comparing the CV resistivity of the silicon epitaxial layer of the low-resistivity substrate silicon epitaxial wafer and the silicon epitaxial layer of the high-resistivity substrate silicon epitaxial wafer,

[0047] A second conversion step is performed to convert the CV resistivity measurement result of the silicon epitaxial layer formed on the low resistivity substrate into the CV resistivity of the silicon epitaxial layer formed on the silicon epitaxial wafer including the high resistivity substrate by using the second conversion formula.

[0048] By performing the second conversion step in addition to the conversion based on the first conversion formula, the CV resistivity of the silicon epitaxial layer formed on the low-resistivity substrate can be converted into a four-probe resistivity traceable to international standards such as NIST with higher accuracy.

[0049] Moreover, preferably, when obtaining the first conversion formula, before measuring the resistivity of the standard polished wafer by the CV method, the standard polished wafer is subjected to a heat treatment in a hydrogen atmosphere at a temperature of not less than 250° C. and not more than 1150° C.

[0050] By subjecting the standard polished wafer subjected to the heat treatment in this manner to CV measurement, it is possible to prevent a high resistance region from appearing in the surface layer portion of the impurity concentration distribution or the resistivity distribution.

[0051] In addition, preferably, when obtaining the first conversion formula, a conductive pad is arranged between the second main surface of the standard polished wafer and the measuring table of a measuring device using the CV method, and a high-frequency voltage is applied to the first main surface of the standard polished wafer, and the resistance of the standard polished wafer is measured using the CV method.

[0052] When obtaining the first conversion formula, by measuring the CV resistivity of a standard polished wafer in a state where a conductive pad is configured, even for high-resistivity wafers with different resistivities, the contact resistance relative to the wafer table remains constant. Therefore, it can be expected that the accuracy of the first conversion formula and the second conversion formula will be improved.

[0053] (III) Beneficial effects

[0054] As described above, in the present invention, in addition to the conversion based on the first conversion formula, the second conversion formula is also used for conversion, thereby being able to convert the CV resistivity of a silicon epitaxial layer formed on a low-resistivity substrate into a four-probe resistivity that can be traced back to international standards such as NIST, wherein the first conversion formula is obtained by comparing the CV resistivity of a standard polished wafer with the four-probe standard resistivity, and the second conversion formula is obtained by comparing the CV resistivity of a silicon epitaxial layer formed on a high-resistivity substrate silicon epitaxial wafer with the CV resistivity of a silicon epitaxial layer formed on a low-resistivity substrate silicon epitaxial wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 This is a schematic process diagram showing a schematic process of obtaining a first conversion formula in the resistivity measurement method according to the first embodiment of the present invention.

[0056] Figure 2 This is a schematic process diagram showing a schematic process of obtaining the second conversion formula in the resistivity measurement method of the present invention.

[0057] Figure 3 This is a schematic diagram of a CV measurement device.

[0058] Figure 4This is a schematic diagram showing a process of converting a CV resistivity measurement result of a silicon epitaxial layer formed on a silicon epitaxial wafer as a measurement target into a four-probe resistivity by performing conversion based on a second conversion formula and conversion based on a first conversion formula.

[0059] Figure 5 This is a schematic process diagram showing a schematic process of obtaining a first conversion formula in the resistivity measurement method according to the second embodiment of the present invention.

[0060] Figure 6 This is a graph showing the amount of deviation of the resistivity when the second conversion formula is not used, relative to the resistivity converted using the second conversion formula.

[0061] Figure 7 This is a graph comparing the four-probe standard resistivity and the CV resistivity measurement results of the silicon epitaxial layer formed on the silicon epitaxial wafer converted by the second conversion formula and the first conversion formula. DETAILED DESCRIPTION

[0062] As described above, there is a demand for development of a resistivity measurement method having a novel resistivity conversion of the CV method while tracing back to international standards such as NIST using a polished wafer (hereinafter simply referred to as a "PW wafer").

[0063] The inventors of the present invention have conducted in-depth research on the above-mentioned technical problem, and found that in addition to the conversion based on the first conversion formula, the second conversion formula is also used for conversion, thereby being able to convert the CV resistivity of the silicon epitaxial layer as the measurement object into a four-probe resistivity that can be traced back to international standards such as NIST, thereby completing the present invention, wherein the first conversion formula is obtained by comparing the CV resistivity of a standard polished wafer with the four-probe standard resistivity, and the second conversion formula is obtained by comparing the CV resistivity of the epitaxial layer of a silicon epitaxial wafer with a high-resistivity substrate and the epitaxial layer of a silicon epitaxial wafer with a low-resistivity substrate.

[0064] That is, the present invention is a resistivity measurement method, which uses a CV method to measure the resistivity of a silicon epitaxial layer as a measurement object formed on a silicon epitaxial wafer, wherein the silicon epitaxial wafer is manufactured using a low-resistivity substrate having a resistivity of 0.02 Ω·cm or less, and the resistivity measurement method is characterized in that:

[0065] The SEMI-converted resistivity obtained by measuring the resistivity of the silicon epitaxial layer as the measurement object by the CV method, or the resistivity to which the SEMI-converted resistivity is subjected to a prescribed conversion, is converted based on a first conversion formula and converted based on a second conversion formula to obtain the four-probe resistivity of the silicon epitaxial layer as the measurement object, wherein:

[0066] The first conversion formula is obtained by comparing the CV resistivity obtained by measuring a standard polished wafer to which a four-probe standard resistivity value has been assigned using the CV method with the four-probe standard resistivity.

[0067] The second conversion formula is obtained by comparing the CV resistivity of a silicon epitaxial layer of a high-resistivity substrate silicon epitaxial wafer and a silicon epitaxial layer of a low-resistivity substrate silicon epitaxial wafer, wherein the high-resistivity substrate silicon epitaxial wafer is made using a high-resistivity substrate having a resistivity that can be measured using a CV method, and the low-resistivity substrate silicon epitaxial wafer is made using a low-resistivity substrate having a resistivity of less than 0.02Ω·cm.

[0068] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings, but the present invention is not limited thereto.

[0069] [First embodiment]

[0070] Hereinafter, a first embodiment of the present invention will be described based on the accompanying drawings.

[0071] Figure 1 This is a schematic process diagram showing a schematic process of obtaining a first conversion formula in the resistivity measurement method according to the first embodiment of the present invention.

[0072] First, the four-probe resistivity measurement device is calibrated using a standard wafer traceable to an international standard, such as NIST. Figure 1 (a) Calibration procedure of four-probe resistivity measurement device).

[0073] For example, for resistivity measurements based on the four-probe method, it is possible to use standard wafers with traceability to seven levels of resistivity standard materials (SRM: Standard Reference Material) such as SRM2541 (0.01Ω·cm) to SRM2547 (200Ω·cm) provided by NIST (National Institute of Standards and Technology), and perform calibration and correction of the four-probe resistivity measurement device.

[0074] In this example, in order to calibrate the four-probe resistivity measuring device, the resistivity standard materials such as SRM2541 to SRM2547 are measured using the four-probe resistivity measuring device, and the measurement results are confirmed to be within the management standard. In addition, in order to make corrections, the resistivity standard materials are measured using the four-probe resistivity measuring device, and the ratio of the measurement results to the standard value assigned to the resistivity standard materials is calculated, and the ratio is multiplied by the measurement value of the four-probe resistivity measuring device.

[0075] Next, the resistivity of the PW wafer is measured using the four-probe resistivity measurement device calibrated in the four-probe resistivity measurement device calibration process, and a four-probe standard resistivity assignment is performed ( Figure 1 (b) Standard resistivity assignment procedure).

[0076] As the PW wafer, it is preferred to use a wafer having a resistivity that can be measured using the CV method and that has been subjected to a heat treatment to eliminate oxygen donors. In the case of measuring the PW surface of the PW wafer using the four-probe resistivity measuring device, in order to ensure the accuracy of the four-probe standard resistivity, it is preferred to measure the resistivity multiple times and use the average value as the standard value. If the PW wafer is ground (e.g., surface grinding) to form a ground surface, and the ground surface is measured using the four-probe resistivity measuring device, the measurement accuracy of the four-probe standard resistivity is improved compared to the case of measuring the PW surface. In the future, a PW wafer that has been assigned a four-probe standard resistivity value is sometimes referred to as a standard PW.

[0077] Next, the standard PW was subjected to CV measurement ( Figure 1 (c) Standard PW CV measurement process). In the PW standard resistivity assignment process ( Figure 1 In the case where the surface is ground in (b), CV measurement is performed on other PW wafers with the same resistivity. When a high resistance region appears in the surface layer of its impurity concentration distribution or resistivity distribution during CV measurement, it is preferred to perform heat treatment in a hydrogen atmosphere at a temperature of 250°C to 1150°C for 10 to 60 minutes before performing CV measurement on the standard PW.

[0078] Then, the CV resistivity obtained by measuring the standard PW by the CV method and the four-probe standard resistivity are compared ( Figure 1 (d) Comparison step of the CV measurement value of the standard PW and the four-probe standard resistivity), thereby obtaining the first conversion formula ( Figure 1 (e)).

[0079] The first conversion formula thus obtained can be applied to a substrate using a high resistivity substrate, such as P - Type PW, N - Type PW, P / P - Type silicon epitaxial wafer (hereinafter sometimes simply referred to as "EPW"), N / N - The EPW type cannot be applied to low resistivity substrates, such as P / P + Type EPW or N / N +This is because the contact resistance of the wafer stage that fixes the wafer on the back side of the EPW during CV measurement is different when the back side of the EPW is a high resistivity substrate or a low resistivity substrate, and this difference affects the CV resistivity measurement result.

[0080] Therefore, a high resistivity substrate EPW and a low resistivity substrate EPW having the same doping concentration of a silicon epitaxial layer (hereinafter sometimes simply referred to as an "epitaxial layer") are prepared, and by comparing the CV resistivity of the epitaxial layers of these EPWs, a second conversion formula ( ) for converting the CV resistivity of the epitaxial layer of the low resistivity substrate EPW to the CV resistivity of the epitaxial layer of the high resistivity substrate EPW is obtained. Figure 2 ).Right now, Figure 2 This is a schematic process diagram showing a schematic process of obtaining the second conversion formula in the resistivity measurement method of the present invention.

[0081] exist Figure 2 First, a high-resistivity PW wafer having a resistivity measurable by a CV method and a low-resistivity PW wafer having a resistivity of 0.02 Ω·cm or less are prepared ( Figure 2 (a) Preparation step of PW wafer for substrate). Here, the resistivity of the high resistivity substrate having a resistivity measurable by the CV method is, for example, 0.1 Ω·cm to 1000 Ω·cm. The lower limit of the resistivity of the low resistivity PW wafer is not particularly limited, and can be, for example, 0.0001 Ω·cm.

[0082] Next, a silicon epitaxial layer having substantially the same resistivity and conductivity as the high resistivity PW wafer is epitaxially grown on the high resistivity PW wafer and the low resistivity PW wafer under the same doping concentration growth conditions. Thus, a high resistivity substrate EPW and a low resistivity substrate EPW ( Figure 2 (b) Comparison with EPW preparation process).

[0083] Next, CV measurement is performed on the epitaxial layer of the low resistivity substrate EPW and the epitaxial layer of the high resistivity substrate EPW ( Figure 2 (c) CV measurement step of comparative EPW). Further, the CV resistivity of the epitaxial layer of the low resistivity substrate EPW and the epitaxial layer of the high resistivity substrate EPW are compared ( Figure 2 (d) step of comparing the CV resistivity of the EP layer of the low resistivity substrate EPW and the EP layer of the high resistivity substrate EPW).

[0084] Then, a second conversion formula ( ) for converting the CV resistivity of the epitaxial layer of the low resistivity substrate EPW to the CV resistivity of the epitaxial layer of the high resistivity substrate EPW is obtained. Figure 2(e)). A high resistivity substrate EPW in which the resistivity of the epitaxial layer and the substrate are the same is substantially the same as PW. Therefore, the second conversion formula can also be used to convert the CV resistivity of the epitaxial layer of the low resistivity substrate EPW to the CV resistivity of PW.

[0085] As described above, the contact resistance between the wafer stage fixing the EPW and the back side of the EPW during CV measurement is different between the case where the back side of the EPW is a high resistivity substrate and the case where it is a low resistivity substrate, and this difference affects the measurement result of the CV resistivity. Furthermore, even for the same high resistivity substrate and high resistivity PW, the contact resistance relative to the wafer stage is different at, for example, 1Ω·cm and 100Ω·cm.

[0086] Therefore, when a high resistivity substrate EPW or a high resistivity PW (hereinafter sometimes simply referred to as a high resistivity wafer) is fixed to a wafer stage for CV measurement, it is preferred to perform CV measurement while sandwiching a conductive pad between the high resistivity wafer and the wafer stage. In this way, even for high resistivity wafers with different resistivities, the contact resistance with respect to the wafer stage is kept constant, and therefore, it can be expected that the accuracy of the first conversion formula and the second conversion formula will be improved.

[0087] Figure 3 2 is a schematic diagram of a CV measurement apparatus 10 (hereinafter sometimes simply referred to as an apparatus 10 ) used when CV measurement is performed while sandwiching the conductive pad 7 between the high resistivity wafer 3 and the wafer stage 6 .

[0088] The high resistivity wafer 3 is formed by vapor-growing a silicon epitaxial layer 2 on a high resistivity substrate 1 and can be applied to P / P - or N / N - However, for the sake of convenience, P / P is shown in the figure. - Further, the electrode of the device 10 is a back electrode, but it can also be applied to a surface electrode.

[0089] As a pre-treatment for CV measurement, the high resistivity wafer 3 is treated with hydrofluoric acid (HF), for example, to remove the oxide film formed on the surface. Next, a metal electrode 4 is formed at a desired position on the surface of the silicon epitaxial layer 2. The metal of the metal electrode 4 is preferably samarium (Sm) when the silicon epitaxial layer 2 is P-type, and is preferably gold (Au) when the silicon epitaxial layer 2 is N-type. When mercury (Hg) is used as the metal electrode 4, it can be applied to both P-type and N-type.

[0090] Next, while a conductive pad 7 is sandwiched between the second main surface (main back surface) of the high resistivity wafer 3 that has been HF-treated and the measurement table 6 of the CV measurement device 10, a high-frequency voltage is applied to the metal electrode 4 in contact with the first main surface of the high resistivity wafer 3 to perform CV measurement.

[0091] Conductive pad 7 is preferably made of silver or carbon-doped silicone rubber with a resistivity of 1 Ωcm or less. Conductive pad 7 is used to maintain good ohmic contact between the second main surface of high resistivity wafer 1 and measurement stage 6 of CV measurement device 10 at a constant resistivity.

[0092] In the case where the conductive pad 7 is not used, the magnitude of the resistance formed between the second main surface of the high resistivity wafer 3 and the measurement stage 6 varies depending on the resistivity of the high resistivity substrate 1. In addition, it also varies depending on the adsorption strength between the back surface of the high resistivity wafer 3 and the measurement stage 6. The magnitude of the resistance formed between the second main surface of the high resistivity wafer 3 and the measurement stage 6 becomes smaller if the adsorption force is strong, and becomes larger if the adsorption force is weak.

[0093] If a reverse bias is applied to the metal electrode 4 in contact with the first main surface of the high-resistivity wafer 3 , a depletion layer formed near the surface of the EP layer 2 in contact with the metal electrode 4 expands.

[0094] The depletion layer width W can be calculated by the following formula.

[0095] (Formula 1)

[0096] W = Aε0ε Si / C

[0097] Here, A is the area of ​​the metal electrode 4, ε0 is the dielectric constant, and ε Si is the relative dielectric constant of silicon, and C is the electrostatic capacitance formed by the depletion layer of epitaxial layer 2.

[0098] Then, the doping concentration N(W) in the depletion layer width W is calculated by the following formula.

[0099] (Formula 2)

[0100] N(W)=2 / (qε0ε Si A 2 )*{d(C -2 ) / dV} -1

[0101] Here, q is the charge of the electron.

[0102] For doping concentration N (W), if a corresponding table is created with depletion layer width W (depth), it can be output as a doping concentration distribution. In addition, after doping concentration N (w) is converted to resistivity (SEMI converted resistivity) using SEMI MF723-0307, ​​if a corresponding table is created with depletion layer width (depth), it can also be output as a resistivity distribution.

[0103] By converting the SEMI converted resistivity or the resistivity after a predetermined conversion is performed on the SEMI converted resistivity using the first conversion formula, the measurement result of the CV resistivity of the high resistivity wafer 3 can be converted into a four-probe resistivity traceable to NIST.

[0104] When the object of CV measurement does not include the high resistivity substrate 1, that is, P / P + Type EPW, N / N + In the case of a low resistivity substrate EPW such as a EPW type, it is not necessary to use the conductive pad 7. As for the CV resistivity of the epitaxial layer (hereinafter sometimes referred to as "EP layer") formed on the low resistivity substrate EPW, in addition to not using the conductive pad 7, it is also possible to Figure 3 Furthermore, the CV resistivity measurement result ( Figure 4 (a)), conversion is performed using the second conversion formula ( Figure 4 (b)) and the conversion using the first conversion formula ( Figure 4 (c)), so that the measurement result of the CV resistivity of the silicon epitaxial layer as the measurement object can be converted into a four-probe resistivity ( Figure 4 (d)).

[0105] The prescribed conversion performed on the SEMI converted resistivity includes, for example, conversion for matching with other CV resistivity measuring devices, conversion for matching with customer's measured values ​​(customer conversion), and conversion for correcting deviation from standard values.

[0106] [Second embodiment]

[0107] Hereinafter, a second embodiment of the present invention will be described based on the accompanying drawings.

[0108] In the first embodiment, the resistivity of a PW wafer is measured using a calibrated four-probe resistivity measuring device, and a four-probe standard resistivity is assigned. In contrast, in the second embodiment, a four-probe standard resistivity is assigned to a single crystal silicon wafer (hereinafter sometimes simply referred to as LW) whose main surface is ground (hereinafter sometimes simply referred to as LW surface), a single crystal silicon wafer whose main surface is ground (hereinafter sometimes simply referred to as ground surface), or a single crystal silicon wafer (hereinafter sometimes simply referred to as CW) whose main surface is chemically etched (hereinafter sometimes simply referred to as CW surface).

[0109] Figure 5 1 is a schematic process diagram showing the schematic process of the resistivity measurement method according to the second embodiment of the present invention. First, a four-probe resistivity measurement device ( Figure 5 (a) Calibration procedure of four-probe resistivity measurement device).

[0110] Next, the four-probe standard resistivity is assigned to the single crystal silicon wafer whose main surface is the LW surface, the ground surface or the CW surface ( Figure 5 (b) Standard resistivity assignment process). In this way, the deviation of repeated measurements is reduced compared with the case where the PW wafer whose main surface is the PW surface is measured by the four-probe method. The CW surface includes a high-brightness flat ground surface.

[0111] If oxygen in single crystal silicon is subjected to heat treatment at around 450°C, several atoms gather and emit one electron, generating donors. Therefore, it is preferred to use crystals with low oxygen concentration in single crystal silicon wafers used for the assignment of four-probe standard resistivity. In addition, it is preferred to perform heat treatment (donor elimination heat treatment) for the purpose of eliminating oxygen donors before the assignment of four-probe standard resistivity.

[0112] Next, at least the first main surface of the single crystal silicon wafer after the assignment is processed to form a PW wafer ( Figure 5 (c) Processing step). When the main surface of the wafer is an LW surface, etching, chemical mechanical polishing (polishing), etc. are performed to make a PW wafer. Furthermore, in order to clean the PW surface, the PW wafer is cleaned. For example, a combination of ammonia and hydrogen peroxide water, hydrochloric acid and hydrogen peroxide water, ozone water, and hydrofluoric acid is used for cleaning.

[0113] When the PW wafer is cleaned, hydrogen is introduced into the PW wafer, and the resistivity of the surface layer of the PW wafer increases. As a countermeasure, the cleaned PW wafer is heated at a temperature of 250°C to 1150°C. The heat-treated standard PW prepared in this way is used for CV measurement.

[0114] The CV measurement procedure of this standard PW ( Figure 5After (d)), the CV measurement step described in the first embodiment ( Figure 1 (c) CV measurement of standard PW after the same procedure).

[0115] By assigning the four-probe standard resistivity to a single crystal silicon wafer whose main surface is an LW surface, a grinding surface, or a CW surface, the repeated measurement deviation is reduced compared to the case where the PW wafer whose main surface is a PW surface is measured. As a result, a first conversion formula and a second conversion formula with higher accuracy can be obtained, so that the CV resistivity measurement result of the EP layer formed on the low resistivity substrate EPW can be converted to the four-probe resistivity with higher accuracy.

[0116] Example

[0117] Hereinafter, the present invention will be specifically described using examples and comparative examples, but the present invention is not limited thereto. Figure 3 The reference numbers shown correspond.

[0118] [Example 1]

[0119] First, as a PW wafer for a substrate for obtaining the second conversion formula, for a PW wafer with a diameter of 300 mm, P type, and <100>, 5 high-resistivity PW wafers with 5 levels of resistivity of 1 to 100 Ω·cm measurable by the CV method and 5 low-resistivity PW wafers with a resistivity of 0.015 Ω·cm were prepared.

[0120] Next, a silicon epitaxial layer 2 having substantially the same resistivity and the same conductivity type as the high resistivity PW wafer is epitaxially grown on the high resistivity PW wafer 1 and the low resistivity PW wafer 1 under growth conditions of the same doping concentration. For example, a P-type silicon epitaxial layer 2 having a resistivity of approximately 1Ω·cm is epitaxially grown on a high resistivity P-type PW wafer 1 having a resistivity of 1Ω·cm and a low resistivity P-type PW wafer 1 having a resistivity of 0.015Ω·cm under growth conditions of the same doping concentration as EPW 3 (low resistivity substrate EPW and high resistivity substrate EPW).

[0121] Next, an electrode 4 is formed on the main surface of EPW3, and CV measurement is performed on the epitaxial layers 2 of the EPW3 with the high resistivity PW1 and the EPW3 with the low resistivity PW1 that have been epitaxially grown. When the CV measurement is performed on the epitaxial layer 2 of the high resistivity substrate EPW3, the high resistivity substrate EPW3 is adsorbed and held on the wafer stage 6 with a conductive pad 7 having a resistivity of 0.9Ω·cm sandwiched between the high resistivity substrate EPW3 and the wafer stage 6 for measurement.

[0122] Then, the CV resistivity of the epitaxial layer 2 of the low resistivity substrate EPW3 and the epitaxial layer 2 of the high resistivity substrate EPW3 are compared to obtain a second conversion formula for converting the CV resistivity of the epitaxial layer of the low resistivity substrate EPW to the CV resistivity of the epitaxial layer of the high resistivity substrate EPW.

[0123] Figure 6 In the figure, the ratio of the CV resistivity of the epitaxial layer of the high resistivity substrate EPW to the epitaxial layer of the low resistivity substrate EPW, that is, the deviation of the resistivity when the second conversion formula is not used relative to the resistivity converted using the second conversion formula (measured value - standard value) is expressed as a percentage. It can be seen that when the second conversion formula is not used, the resistivity is measured to be increased by about 1% at a resistivity level of 10Ω·cm, and the resistivity is measured to be increased by about 6% at a resistivity level of 100Ω·cm.

[0124] Figure 6 The definition of "deviation (%)" on the vertical axis is as follows.

[0125] Deviation (%) = (measured value - standard value) / standard value × 100 (%)

[0126] Furthermore, the CV resistivity obtained by measuring the standard PW to which the four-probe standard resistivity value has been assigned using the CV method is compared with the four-probe standard resistivity, and a first conversion formula for converting the CV measurement value of the high-resistivity PW wafer into a four-probe resistivity traceable to the international standard is obtained, wherein the four-probe standard resistivity is obtained in advance by measuring using the four-probe method.

[0127] On the other hand, a silicon epitaxial wafer (EPW) manufactured using a low resistivity substrate having a resistivity of 0.015 Ω·cm was prepared as a measurement object. The resistivity of the silicon epitaxial layer formed on the EPW was measured by CV to obtain the SEMI-converted resistivity of the silicon epitaxial layer (EP layer) formed on the low resistivity substrate as the measurement object.

[0128] Finally, by performing conversion using the second conversion formula and conversion using the first conversion formula on the SEMI converted resistivity of the silicon epitaxial layer as the measurement object, the measurement result of the CV resistivity of the EP layer formed on the low resistivity substrate EPW as the measurement object is converted into a four-probe resistivity traceable to NIST.

[0129] Figure 7 , a graph comparing the CV resistivity measurement results (after conversion) of the EP layer as the measurement object, which is converted into a four-probe resistivity traceable to NIST, and the four-probe standard resistivity obtained in advance by the four-probe method. Figure 7As shown, according to the present invention, the measurement results of the four-probe resistivity and the CV resistivity of the EP layer as the measurement object are substantially the same value.

[0130] That is, according to the present invention, the CV resistivity of a silicon epitaxial layer as a measurement object formed on a silicon epitaxial wafer manufactured using a low resistivity substrate can be converted into a four-probe resistivity traceable to international standards such as NIST. In other words, a resistivity measurement method can be provided, which has a novel resistivity conversion by the CV method when using a PW wafer traceable to international standards such as NIST.

[0131] Industrial Applicability

[0132] In addition to the conversion using the first conversion formula for comparing the CV resistivity of the standard PW with the four-probe standard resistivity, the present invention can convert the CV resistivity of the EP layer formed on the EPW manufactured using a low-resistivity substrate (for example, a resistivity of 0.0001 Ω·cm or more and 0.02 Ω·cm or less) into a four-probe resistivity traceable to international standards such as NIST by performing conversion based on the second conversion formula, wherein the second conversion formula is obtained by comparing the CV resistivity of the EP layer of the high-resistivity substrate EPW and the low-resistivity substrate EPW.

[0133] The present invention is not limited to the above-described embodiments. The above-described embodiments are illustrative, and any scheme having substantially the same structure and achieving the same function and effect as the technical concept described in the claims of the present invention is included in the technical scope of the present invention.

Claims

1. A resistivity measurement method, which uses a CV method to measure the resistivity of a silicon epitaxial layer as a measurement object formed on a silicon epitaxial wafer, wherein: The silicon epitaxial wafer is manufactured using a low-resistivity substrate having a resistivity of 0.02 Ω·cm or less, and the resistivity measurement method is characterized in that: The SEMI-converted resistivity obtained by measuring the resistivity of the silicon epitaxial layer as the measurement object by the CV method, or the resistivity to which the SEMI-converted resistivity is subjected to a prescribed conversion, is converted based on a first conversion formula and converted based on a second conversion formula to obtain the four-probe resistivity of the silicon epitaxial layer as the measurement object, wherein: The first conversion formula is obtained by comparing the CV resistivity obtained by measuring a standard polished wafer to which a four-probe standard resistivity value has been assigned using the CV method with the four-probe standard resistivity. The second conversion formula is obtained by comparing the CV resistivity of a silicon epitaxial layer of a high-resistivity substrate silicon epitaxial wafer and a silicon epitaxial layer of a low-resistivity substrate silicon epitaxial wafer, wherein the high-resistivity substrate silicon epitaxial wafer is made using a high-resistivity substrate having a resistivity that can be measured using a CV method, and the low-resistivity substrate silicon epitaxial wafer is made using a low-resistivity substrate having a resistivity of less than 0.02Ω·cm.

2. The resistivity measurement method according to claim 1, characterized in that: The four-probe standard resistivity assignment for the standard polished wafer has the following characteristics: The four-probe resistivity measurement device calibration process uses standard wafers that can be traced back to international standards to calibrate the four-probe resistivity measurement device; as well as The polished wafer standard resistivity assignment process uses the four-probe resistivity measurement device calibrated in the four-probe resistivity measurement device calibration process to perform the four-probe standard resistivity assignment on the polished wafer.

3. The resistivity measurement method according to claim 2, characterized in that: In the polished wafer standard resistivity assignment process, the main surface of the polished wafer is measured using the four-probe resistivity measurement device.

4. The resistivity measurement method according to claim 2, characterized in that: In the polished wafer standard resistivity assignment process, the polished wafer is ground to form a ground surface, and the ground surface is measured using the four-probe resistivity measurement device.

5. The resistivity measurement method according to claim 4, characterized in that: As the grinding, surface grinding was performed.

6. The resistivity measurement method according to any one of claims 2 to 4, characterized in that: As the polished wafer, a wafer subjected to heat treatment for eliminating oxygen donors is used.

7. The resistivity measurement method according to claim 1, characterized in that: As the standard polished wafer on which the four-probe standard resistivity assignment has been performed, a wafer that has been subjected to the following steps is used: The four-probe resistivity measurement device calibration process uses standard wafers traceable to international standards to calibrate the four-probe resistivity measurement device; an assignment step of measuring the resistivity of a single crystal silicon wafer that has been subjected to a heat treatment to eliminate oxygen donors by using the four-probe resistivity measuring device calibrated in the four-probe resistivity measuring device calibration step, and performing a four-probe standard resistivity assignment; a processing step of processing at least a first main surface of the single crystal silicon wafer after the value assignment to obtain a polished wafer; and A cleaning step is performed to clean the polished wafer.

8. The resistivity measurement method according to claim 7, characterized in that: As the single crystal silicon wafer, a wafer whose main surface is a polished surface, a ground surface, or a chemically etched surface is used.

9. The resistivity measurement method according to claim 1, characterized in that: The second conversion formula is obtained by the following steps: a substrate polishing wafer preparation step of preparing a high-resistivity polishing wafer having a resistivity measurable by a CV method and a low-resistivity polishing wafer having a resistivity of 0.02 Ωcm or less; an epitaxial wafer preparation step, respectively on the high-resistivity polished wafer and the low-resistivity polished wafer, under growth conditions of the same doping concentration, epitaxially growing a silicon epitaxial layer of the same resistivity and the same conductivity type as the high-resistivity polished wafer, to prepare the high-resistivity substrate silicon epitaxial wafer and the low-resistivity substrate silicon epitaxial wafer; A CV measurement step for comparing epitaxial wafers, wherein CV measurement is performed on the silicon epitaxial layer of the low-resistivity substrate silicon epitaxial wafer and the silicon epitaxial layer of the high-resistivity substrate silicon epitaxial wafer; as well as A comparison step of comparing the CV resistivity of the silicon epitaxial layer of the low-resistivity substrate silicon epitaxial wafer and the silicon epitaxial layer of the high-resistivity substrate silicon epitaxial wafer, A second conversion step is performed to convert the CV resistivity measurement result of the silicon epitaxial layer formed on the low resistivity substrate into the CV resistivity of the silicon epitaxial layer formed on the silicon epitaxial wafer including the high resistivity substrate by using the second conversion formula.

10. The resistivity measurement method according to claim 1, characterized in that: When obtaining the first conversion formula, before measuring the resistivity of the standard polished wafer by the CV method, the standard polished wafer is subjected to a heat treatment in a hydrogen atmosphere at a temperature of not less than 250° C. and not more than 1150° C.

11. The resistivity measurement method according to claim 1, characterized in that: When obtaining the first conversion formula, a conductive pad is arranged between the second main surface of the standard polished wafer and the measuring table of a measuring device using the CV method, and a high-frequency voltage is applied to the first main surface of the standard polished wafer, and the resistivity of the standard polished wafer is measured using the CV method.

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