Method for forming groove and semiconductor process equipment

Abstract

The invention discloses a method for forming a groove and semiconductor process equipment, and the method comprises the steps: providing an object to be etched, and enabling the object to be etched to comprise a fin-shaped structure and a plurality of gate structures across the fin-shaped structure, in the first etching step, a predetermined region in the fin-shaped structure is etched to a predetermined depth by using a first process gas, and in the second etching step, the predetermined region is etched to a target depth from the predetermined depth by using the first process gas so as to form a target groove, the etching temperature when the second etching step is executed is higher than the etching temperature when the first etching step is executed, so that in the etching process of the target groove, by-products accumulated on the inner wall of the target groove can be effectively removed on the premise of ensuring the etching rate of the target groove and reducing the damage degree of the side wall of the gate structure in the to-be-etched object, and the etching efficiency of the target groove is improved. Therefore, the target groove can present a smooth and continuous U-shaped morphology.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a method for forming a groove and semiconductor process equipment. Background Art

[0002] With the development of semiconductor process technology, due to the structural and / or performance requirements of the semiconductor device to be manufactured, it is usually necessary to form a groove in a predetermined structure using an etching process, wherein the morphology of the groove has an important influence on the performance of the semiconductor device.

[0003] At present, in the process of forming grooves by etching technology, there may be a problem that the groove morphology is poor due to the characteristics of the material and structure of the etched object, which greatly affects the performance of the prepared semiconductor device. Summary of the invention

[0004] In order to solve the above technical problems, the present invention discloses a method for forming a groove and a semiconductor process equipment to solve the problem of sharp corners on the inner wall of the groove formed in the prior art.

[0005] To achieve the above technical objectives, the embodiments of the present invention disclose the following technical solutions:

[0006] In a first aspect, an embodiment of the present invention discloses a method for forming a groove, comprising:

[0007] Providing an object to be etched, wherein the object to be etched includes a fin-shaped structure and a plurality of gate structures spanning the fin-shaped structure;

[0008] In a first etching step, a predetermined area in the fin-shaped structure is etched to a predetermined depth using a first process gas under a first process condition, wherein the predetermined area includes an area between two adjacent gate structures in the fin-shaped structure, and the first process condition includes an etching temperature of a first temperature;

[0009] In the second etching step, under the second process conditions, the predetermined area is etched from the predetermined depth to the target depth using the first process gas to form a target groove; the predetermined depth is less than the target depth, and the second process conditions include the etching temperature being a second temperature, and the second temperature is greater than the first temperature.

[0010] In one embodiment, the first temperature is lower than the volatilization temperature of the by-products in the first etching step, and / or the second temperature is greater than or equal to the volatilization temperature of the by-products.

[0011] In one embodiment, the first process gas includes a bromine-containing gas and an inert gas, and the ratio of the bromine-containing gas to the inert gas is in a range of 1-2.

[0012] In one embodiment, the first temperature ranges from 80°C to 100°C, and / or the second temperature ranges from 150°C to 180°C.

[0013] In one embodiment, the first process condition further includes that the pressure of the process chamber where the object to be etched is located is a first pressure, and the second process condition further includes that the pressure of the process chamber is a second pressure, and the second pressure is greater than the first pressure.

[0014] In one embodiment, the first pressure ranges from 15 mTorr to 60 mTorr, and / or the second pressure ranges from 40 mTorr to 80 mTorr.

[0015] In one embodiment, the first process condition also includes that the RF power applied by the lower RF power supply to the process chamber where the object to be etched is located is a first RF power, and the second process condition also includes that the RF power applied by the lower RF power supply to the process chamber is a second RF power, and the second RF power is greater than the first RF power.

[0016] In one embodiment, the first radio frequency power ranges from 400W to 600W, and / or the second radio frequency power ranges from 800W to 1000W.

[0017] In one embodiment, after the second etching step is completed, the method further includes:

[0018] In a third etching step, under a third process condition, etching is performed in a width and / or depth direction of the target groove using a second process gas to adjust the width and / or depth of the target groove.

[0019] In one embodiment, the second process gas includes a fluorine-containing gas and a hydrogen-containing gas, and the ratio of the hydrogen-containing gas to the fluorine-containing gas is in the range of 3-4.

[0020] In one embodiment, the second process gas further includes a nitrogen-containing gas, and the proportion of the nitrogen-containing gas in the second process gas is in a range of 10% to 20%.

[0021] In a second aspect, an embodiment of the present invention discloses a semiconductor process equipment, comprising: a process chamber, an air intake assembly, an upper electrode assembly, a lower electrode assembly and a controller, wherein the controller comprises at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method for forming a groove as described above is implemented.

[0022] In a third aspect, an embodiment of the present specification discloses a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the method for forming a groove as described above is implemented.

[0023] In a fourth aspect, an embodiment of the present specification discloses a computer program product or a computer program, wherein the computer program product includes a computer program, and the computer program is stored in a computer-readable storage medium; a processor of the computer device reads the computer program from the computer-readable storage medium, and the processor implements the steps of the above-mentioned method for forming a groove when executing the computer program.

[0024] The method for forming a groove and the semiconductor process equipment disclosed in the present invention provide an object to be etched, the object to be etched includes a fin-shaped structure and a plurality of gate structures spanning the fin-shaped structure, in a first etching step, a predetermined area in the fin-shaped structure is etched to a predetermined depth using a first process gas, and in a second etching step, the predetermined area is etched from a predetermined depth to a target depth using the first process gas to form a target groove, the predetermined area includes an area between two adjacent gate structures in the fin-shaped structure, and the predetermined depth is less than the target depth, so that the target groove can be completed by the first etching step and the second etching step. Etching of the groove; wherein, the etching temperature when executing the second etching step is greater than the etching temperature when executing the first etching step, thereby, during the etching process of the target groove, the by-products accumulated on the inner wall of the target groove can be effectively removed while ensuring the etching rate of the target groove and reducing the degree of damage to the side wall of the gate structure in the etching object, thereby avoiding the occurrence of sharp corners on the inner wall of the target groove due to the inability to effectively etch the area where the by-products are accumulated during the subsequent adjustment of the target groove, so that the target groove presents a smooth and continuous U-shaped morphology, thereby effectively improving the performance of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the disclosed drawings without paying creative work.

[0026] Figure 1 Schematic diagram of the structure of a fin field effect transistor.

[0027] Figure 2 Schematic diagram of the groove formation process when using the two-step etching method.

[0028] Figure 3A schematic flow chart of a method for forming a groove disclosed in one embodiment of the present invention.

[0029] Figure 4 A schematic diagram of a preparation process of a method for forming a groove disclosed in one embodiment of the present invention.

[0030] Figure 5 A schematic structural diagram of a semiconductor process equipment disclosed in one embodiment of the present invention. DETAILED DESCRIPTION

[0031] Unless otherwise defined, the technical terms or scientific terms used in the embodiments of this specification shall have the common meanings understood by persons with ordinary skills in the field to which this specification belongs. The words "first", "second" and similar words used in the embodiments of this specification do not indicate any order, quantity or importance, but are only used to avoid confusion of constituent elements.

[0032] Unless the context requires otherwise, throughout the specification, "plurality" means "at least two", and "including" is interpreted as an open, inclusive meaning, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "examples", "specific examples" or "some examples" are intended to indicate that a particular feature, structure, material or characteristic associated with the embodiment or example is included in at least one embodiment or example of the specification. The schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0033] The following will be combined with the drawings in the embodiments of this specification to clearly and completely describe the technical solutions in the embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this specification, not all of the embodiments. Based on the embodiments in this specification, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this specification.

[0034] As described in the background technology, with the development of semiconductor process technology, due to the structure and / or performance requirements of the semiconductor device to be prepared, it is usually necessary to use an etching process to form a groove in a predetermined structure. For example, a fin field effect transistor (Fin Field Effect Transistor, FinFET) requires a larger drive current to increase the speed of the circuit. In order to increase the drive current, a groove can be pre-formed in the source and drain region of the fin field effect transistor, and an embedded germanium silicon structure can be epitaxially grown in the groove to achieve epitaxial growth of germanium silicon in the source and drain region, thereby forming a strong compressive stress on the channel, which can significantly improve the mobility of hole carriers and reduce the contact resistance of the source and drain extension region.

[0035] Among them, the morphology of the groove has an important influence on the performance of the semiconductor device. For example, in the fin field effect transistor, with the continuous improvement of the semiconductor device, the requirements for the groove morphology are getting higher and higher. For example, when the characteristic size of the semiconductor device is reduced from 14nm to 10nm, the groove morphology is required to be a standard U-shape, so as to facilitate the subsequent wet etching to form a sigma groove (a large bottom cut shape of the germanium silicon groove) for the epitaxial growth of germanium silicon, and finally achieve a larger driving current of the semiconductor device.

[0036] In the process of etching the groove using the etching process, dry plasma etching is usually first used to form a U-shaped or bowl-shaped groove, and then tetramethylammonium hydroxide is used to perform crystal plane selective wet etching on the groove. The process of dry plasma etching the groove can be called PSR (P-channel Metal Oxide Semiconductor Silicon Recess). During the dry plasma etching process, the problem of poor groove morphology may occur due to the characteristics of the material and structure of the etched object.

[0037] In order to improve the morphology of the groove, the inventors have studied that a two-step etching method can be used to form the groove, namely the ME (Main Etch) step using hydrogen bromide (HBr) as the main etching gas and the Pullback (lateral modification) step using nitrogen trifluoride (NF3) and hydrogen (H2) as the main etching gases. The ME step is mainly used to etch the groove to a certain depth in the vertical direction, and the Pullback step is mainly used to perform synchronous etching of the groove in the horizontal and vertical directions to adjust the width and depth of the groove.

[0038] For example, the structure of a FinFET can be as follows Figure 1 As shown, it includes an insulating layer 105, a fin-shaped structure 104, and a plurality of parallel gate structures 106 across the fin-shaped structure 104. The gate structure 106 and the fin-shaped structure 104 can be perpendicular to each other in space, and the gate structure 106 can contact the top and sidewalls of the fin-shaped structure 104. The gate structure 106 can include a hard mask layer 102, a polysilicon film layer 103, and a sidewall 101. The insulating layer 105 can be made of silicon oxide (SiO2), the fin-shaped structure 104 can be made of silicon (Si), and the sidewall 101 can be made of silicon nitride (SiN). Among them, the trench can be etched in the area between two adjacent gate structures 106 in the fin-shaped structure 104.

[0039] In the process of trench etching of fin field effect transistors, the process recipe of two-step etching can be referred to Table 1:

[0040] Table 1

[0041]

[0042] Among them, in the ME step, hydrogen bromide is used as the main etching gas, the pressure of the process chamber is 15mTorr~80mTorr, the RF power of the upper RF power supply (SRF) is 800W~1000W, and the RF power of the lower RF power supply (BRF) is 400W~600W; the flow range of the main etching gas hydrogen bromide is 100sccm~600sccm, and 200sccm~400sccm of helium (He) is used for ignition assistance and main etching gas dilution, the etching temperature is 40℃~70℃, the etching time is 40s~80s, and the etching depth is Among them, in the process of trench etching at a relatively low etching temperature in the ME step, the sidewall 101 of the gate structure 106 is more selective, thereby effectively reducing the degree of damage to the sidewall 101 of the gate structure 106 during the trench etching process, thereby avoiding device failure caused by damage to the sidewall 101; at the same time, the rate of etching the groove at a relatively low etching temperature is also relatively high, thereby improving the production efficiency during the trench etching process; in addition, a layer of silicon bromide (SiBr4) by-product is deposited on the inner wall of the groove during the longitudinal etching process, thereby preventing lateral etching to obtain a groove with a straighter inner wall, thereby obtaining a straighter groove morphology, however, as the etching time gradually increases, more by-products are easily accumulated in the junction area 107 of the inner wall of the groove with the sidewall 101 of the gate structure 106, resulting in the accumulation of by-products, which can be specifically described as follows: Figure 2 shown.

[0043] In the Pullback step, nitrogen trifluoride is used as the main etching gas, the pressure of the process chamber is 300mTorr~400mTorr, the RF power of the upper RF power supply is 400W~600W, the flow ranges of the main etching gas nitrogen trifluoride and hydrogen are 10sccm~20sccm and 30sccm~80sccm respectively, and 300sccm~500sccm of argon (Ar), 300sccm~500sccm of helium and 100sccm~200sccm of nitrogen (N2) are added at the same time, the etching temperature is 40℃~70℃, and the etching time is 10s~40s. This step mainly relies on the isotropic etching of silicon by F radicals in the plasma to achieve the purpose of lateral etching of the groove. However, since a large amount of silicon bromide byproducts have accumulated in the boundary region 107 between the inner wall of the trench and the sidewall 101 of the gate structure 106 in the ME step, and the F radicals cannot etch silicon bromide, the silicon in this region is retained, and finally a sharp corner defect is formed in this region, as shown in FIG. Figure 2As shown, the sharp-angle defect causes the morphology of the groove to be not a standard U-shape, which will seriously affect the subsequent wet etching to form a sigma groove, causing defects during the epitaxial growth of germanium silicon, making it impossible to transfer stress to the channel of the semiconductor device, causing the failure of the semiconductor device.

[0044] In order to further solve the problem of sharp corners on the inner wall of the formed groove, in the technical solution of the present invention, an object to be etched can be provided, such as Figure 4 As shown, the object to be etched includes a fin-shaped structure 104 (for example, the material of the fin-shaped structure 104 can be silicon) and a plurality of gate structures 106 spanning the fin-shaped structure 104 (for example, the gate structure 106 can include a hard mask layer 102, a polysilicon film layer 103 and a sidewall 101 made of silicon nitride, and the hard mask layer 102 can be silicon oxide, silicon nitride, or a stack of silicon oxide and silicon nitride), wherein the gate structure 106 and the fin-shaped structure 104 can be perpendicular to each other in space, and in a first etching step, a predetermined area in the fin-shaped structure 104 is etched to a predetermined depth using a first process gas, and in a second etching step, the predetermined area is etched from a predetermined depth to a target depth using the first process gas to form a target trench, and the predetermined area includes a predetermined depth in the fin-shaped structure 104. In the area between two adjacent gate structures 106, the predetermined depth is less than the target depth, so that the etching of the target groove can be completed by the first etching step and the second etching step; wherein, the etching temperature when executing the second etching step is greater than the etching temperature when executing the first etching step, thereby, in the etching process of the target groove, the by-products accumulated on the inner wall of the target groove can be effectively removed under the premise of ensuring the etching rate of the target groove and reducing the degree of damage to the side wall 101 of the gate structure 106 in the etching object, thereby avoiding the sharp corners of the inner wall of the target groove caused by the inability to effectively etch the area where the by-products are accumulated in the subsequent adjustment process of the target groove, so that the target groove presents a smooth and continuous U-shaped morphology, thereby effectively improving the performance of the semiconductor device.

[0045] In addition, the method for forming a trench disclosed in the embodiment of the present invention also improves the process parameters during the execution of the first etching step and the second etching step.

[0046] As an optional implementation of the content disclosed in the present invention, an embodiment of the present invention discloses a method for forming a groove, such as Figure 3 As shown, including:

[0047] S301 , providing an object to be etched, wherein the object to be etched includes a fin-shaped structure 104 and a plurality of gate structures 106 spanning the fin-shaped structure 104 .

[0048] Specifically, the object to be etched may be a semiconductor device to be trench-etched, and the object to be etched may include a fin-shaped structure 104 and a plurality of parallelly arranged gate structures 106 spanning the fin-shaped structure 104 . The gate structure 106 and the fin-shaped structure 104 may be perpendicular to each other in space. For example, the object to be etched may be a fin field effect transistor.

[0049] S302, a first etching step, under a first process condition, using a first process gas to etch a predetermined area in the fin-shaped structure 104 to a predetermined depth, the predetermined area including an area between two adjacent gate structures 106 in the fin-shaped structure 104, and the first process condition including an etching temperature of a first temperature.

[0050] Specifically, the first etching step may be used to perform longitudinal etching of a groove in a predetermined region in the fin-shaped structure 104. The predetermined region may include a region between two adjacent gate structures 106 in the fin-shaped structure 104, that is, longitudinal etching may be performed in the predetermined region in the fin-shaped structure 104 starting from the contact surface between the fin-shaped structure 104 and the gate structure 106, and etching may be performed to a predetermined depth to form an initial groove in the predetermined region.

[0051] The first process gas may be used to perform anisotropic etching on a predetermined area to selectively remove material in three-dimensional space to achieve vertical etching. For example, the first process gas may include fluorine-containing gas, chlorine-containing gas, or bromine-containing gas.

[0052] As a preferred embodiment, the first process gas may include a bromine-containing gas. The bromine groups dissociated from the bromine-containing gas can be adsorbed with the etched material silicon in the fin-shaped structure 104 to achieve rapid and effective etching of the groove. In the process of etching by the bromine groups, the selectivity of the side wall 101 in the gate structure 106 is relatively high, thereby effectively reducing the degree of damage to the side wall 101 during the trench etching process. At the same time, during the trench etching process, the bromine-containing gas can react with the etched material silicon in the fin-shaped structure 104 to produce silicon bromide by-products. The silicon bromide by-products are deposited on the inner wall of the target trench and can effectively prevent the lateral etching of the target trench, thereby obtaining a vertical trench morphology.

[0053] The first process condition may include parameter values ​​of various first process parameters during the execution of the first etching step. For example, the first process parameter may include etching temperature, pressure of the process chamber where the object to be etched is located, RF power of the RF power supply, gas flow rate, etching time, etching depth, etc. The etching temperature under the first process condition may be the first temperature, and the etching temperature may be the temperature of an electrostatic chuck in the process chamber where the object to be etched is located.

[0054] Among them, the etching temperature can be negatively correlated with the etching rate, that is, the higher the etching temperature, the lower the etching rate. In implementation, the effect of temperature on the etching rate during etching the initial groove can be reduced by setting a lower first temperature, thereby achieving an effective increase in the etching rate in the first etching step.

[0055] At the same time, the etching temperature can affect the selectivity of the sidewall 101 in the gate structure 106 during the etching process. The etching temperature may be negatively correlated with the selectivity, that is, the higher the etching temperature, the lower the selectivity, and the higher the degree of damage to the sidewall 101 in the gate structure 106 during the etching process. Therefore, the degree of damage to the sidewall 101 in the gate structure 106 during the etching of the initial groove can be reduced by setting a lower first temperature.

[0056] In implementation, the temperature threshold can be determined based on the required etching rate in the first etching step and the required selection ratio in the first etching step, and the first temperature is set to be lower than the temperature threshold, thereby effectively ensuring the etching rate in the first etching step and reducing the degree of damage to the sidewall 101 in the gate structure 106.

[0057] It is understandable that during the first etching step, the first process gas may react with a predetermined area in the fin structure 104 to produce a solid byproduct, wherein the material of the fin structure 104 may be silicon, and thus the byproduct may be silicon bromide. The lower the first temperature, the less the byproduct volatilizes, thereby causing the accumulation of byproducts in the inner wall of the initial trench and the boundary area 107 of the sidewall 101 of the gate structure 106. At the same time, the longer the etching time of the first etching step, the more byproducts are accumulated, and the greater the difficulty of subsequent removal.

[0058] S303, a second etching step, under a second process condition, using the first process gas to etch the predetermined area from the predetermined depth to the target depth to form a target groove; the predetermined depth is less than the target depth, and the second process condition includes the etching temperature being a second temperature, and the second temperature is greater than the first temperature.

[0059] Specifically, the second etching step can be used to continue to longitudinally etch the predetermined area in the fin structure 104 based on the first etching step, so as to etch the predetermined area from the predetermined depth to the target depth, that is, the initial groove formed in the first etching step can be further longitudinally etched in the second etching step to etch the initial groove to the target depth, and the groove etched to the target depth is used as the target groove, and the predetermined depth can be less than the target depth. At the same time, the second etching step is also used to remove the byproducts accumulated in the inner wall of the target groove and the boundary area 107 of the sidewall 101 of the gate structure 106 when executing the first etching step.

[0060] The process gas used in the second etching step is the same as the process gas used in the first etching step, both of which are the first process gas, so as to achieve vertical etching.

[0061] The second process condition may include parameter values ​​of each second process parameter during the execution of the second etching step, and the second process parameter may be the same as the first process parameter, wherein the etching temperature under the second process condition may be a second temperature, and the second temperature is greater than the first temperature. For example, the second temperature may be greater than or equal to the volatilization temperature of the by-products in the first etching step. Thus, during the execution of the second etching step, the by-products accumulated on the inner wall of the initial groove in the first etching step can volatilize at the higher second temperature, so that by executing the second etching step, the by-products accumulated on the inner wall of the target groove during the execution of the first etching step can be effectively removed on the basis of completing the longitudinal etching of the target groove, thereby avoiding the occurrence of sharp corners on the inner wall of the target groove due to the inability to effectively etch the area where the by-products are accumulated during the subsequent adjustment of the target groove.

[0062] Taking into account that the higher etching temperature during the execution of the second etching step will cause a significant reduction in the etching rate and the selectivity of the sidewall 101 in the gate structure 106, thereby affecting the overall etching rate of the target trench and causing the sidewall 101 in the gate structure 106 to be damaged, in implementation, the predetermined depth can be determined based on the required etching rate during the etching process of the target trench, the maximum allowable degree of damage to the sidewall 101, and the maximum allowable accumulation of by-products in the target trench, so as to ensure that the sidewall 101 in the gate structure 106 has a certain thickness while ensuring that the by-products are effectively removed and the etching rate is reduced, thereby preventing the polysilicon film layer 103 from being exposed, thereby avoiding the influence on the performance of the semiconductor device caused by the growth of excess germanium silicon defects in the gate structure 106 in the subsequent epitaxial process due to the exposure of the polysilicon film layer 103.

[0063] For example, the target depth can be The predetermined depth can be Correspondingly, the execution time of the first etching step can be 20s to 40s, and the etching time of the second etching step can be 30s to 50s, which effectively shortens the etching time of the first etching step. Furthermore, the shorter etching time of the first etching step can effectively reduce the accumulation of by-products in the boundary area 107 of the inner wall of the target groove and the side wall 101 of the gate structure 106, and reserve a certain amount of longitudinal etching for the second etching step.

[0064] Therefore, by completing the longitudinal etching of the target groove together through the first etching step and the second etching step, it is possible to effectively avoid the accumulation of by-products on the inner wall of the target groove at the end of etching, while ensuring the etching rate of the target groove and reducing the degree of damage to the side wall 101 in the gate structure 106, thereby avoiding the formation of sharp corners on the inner wall of the target groove due to the inability to effectively etch the area where the by-products accumulate during the subsequent adjustment of the target groove, so that the target groove presents a smooth and continuous U-shaped morphology, so as to facilitate the subsequent wet etching to form a sigma groove for epitaxial growth of germanium silicon, thereby effectively improving the performance of the semiconductor device.

[0065] In some embodiments of the present invention, the first temperature is lower than the volatilization temperature of the by-products in the first etching step, and / or the second temperature is greater than or equal to the volatilization temperature of the by-products.

[0066] Specifically, the first temperature can be lower than the volatilization temperature of the by-products in the first etching step. Thus, during the longitudinal etching process, the silicon bromide by-products deposited on the inner wall of the groove can effectively prevent the lateral etching, thereby obtaining a straighter groove morphology. At the same time, the lower first temperature can effectively reduce the effect of the temperature on the etching rate during the initial groove etching process, thereby achieving an effective improvement in the etching rate in the first etching step and reducing the degree of damage to the sidewall 101 in the gate structure 106 during the trench etching process.

[0067] In addition, the second temperature may be greater than or equal to the volatilization temperature of the byproducts. When the etching temperature in the first etching step is less than the volatilization temperature of the byproducts, the byproducts will be accumulated in the boundary region 107 of the inner wall of the trench and the sidewall 101 of the gate structure 106. Therefore, by setting the second temperature greater than or equal to the volatilization temperature of the byproducts, the byproducts accumulated on the inner wall of the target trench in the first etching step can be effectively removed, thereby avoiding the formation of sharp corners on the inner wall of the target trench due to the inability to effectively etch the area where the byproducts are accumulated during the subsequent adjustment of the target trench.

[0068] In some embodiments of the present invention, the difference between the first temperature and the second temperature is less than or equal to a first threshold, and the first threshold is determined based on the time required for the etching temperature to rise from the first temperature to the second temperature.

[0069] Specifically, the difference between the first temperature and the second temperature can be less than or equal to the first threshold value. In implementation, the first threshold value can be determined based on the time required for the etching temperature to rise from the first temperature to the second temperature and the working parameters of the temperature control component corresponding to the etching temperature. This can effectively shorten the waiting time required for the etching temperature to rise during the process of switching from the first etching step to the second etching step, thereby effectively improving the etching efficiency of the target groove.

[0070] In some embodiments of the present invention, the first process gas includes a bromine-containing gas and an inert gas, and the ratio of the bromine-containing gas to the inert gas is in the range of 1-2.

[0071] Specifically, the first process gas may include a bromine-containing gas, for example, the bromine-containing gas may be hydrogen bromide. During the first etching step and the second etching step, bromine groups dissociated from the hydrogen bromide may be adsorbed to the etched material silicon in the fin structure 104 to achieve etching of the target groove.

[0072] In the etching process of the target trench, the silicon bromide byproduct generated by the reaction between hydrogen bromide and the etched material in the fin-shaped structure 104 is deposited on the inner wall of the target trench, so that the deposited silicon bromide byproduct can effectively prevent the lateral etching of the target trench to obtain a vertical trench morphology. At the same time, in the process of etching the target trench by bromine groups, the sidewall 101 in the gate structure 106 is more selective, thereby effectively reducing the degree of damage to the sidewall 101 in the gate structure 106 during the etching process of the target trench.

[0073] In addition, the first process gas may also include an inert gas, such as helium, argon or nitrogen. As a preferred embodiment, the inert gas may be helium, so as to assist in ignition and dilute hydrogen bromide, thereby enabling more precise, controllable and efficient etching of the target groove.

[0074] In practice, the ratio of hydrogen bromide to helium may be in the range of 1 to 2. For example, the flow rate of hydrogen bromide may be in the range of 100 sccm to 600 sccm, and the flow rate of helium may be in the range of 200 sccm to 400 sccm, to ensure a sufficient etching rate.

[0075] In some embodiments of the present invention, the first temperature ranges from 80°C to 100°C, and / or the second temperature ranges from 150°C to 180°C.

[0076] Specifically, when the first process gas includes a bromine-containing gas, the by-product in the first etching step may be silicon bromide, which has a volatilization temperature of approximately 150°C. Thus, the first temperature may be set in the range of 80°C to 100°C. In addition, the second temperature may be set in the range of 150°C to 180°C. This effectively reduces the waiting time for the etching temperature to rise from the first temperature to the second temperature while ensuring a higher etching rate for the target trench, a lower degree of damage to the sidewall 101 in the gate structure 106, and effective removal of by-products accumulated on the inner wall of the target trench, thereby further improving the etching efficiency of the target trench.

[0077] In some embodiments of the present invention, the first process condition further includes that the pressure of the process chamber where the object to be etched is located is a first pressure, and the second process condition further includes that the pressure of the process chamber is a second pressure, and the second pressure is greater than the first pressure.

[0078] Specifically, the first process condition may include that the pressure of the process chamber where the object to be etched is located is a first pressure. In addition, the second process condition may include that the pressure of the process chamber where the object to be etched is located is a second pressure. The second pressure may be greater than the first pressure, thereby being able to effectively compensate for the influence of the higher etching temperature on the etching rate of the target groove during the execution of the second etching step. At the same time, during the execution of the second etching step, by setting a higher pressure, the by-products can be evaporated at a higher etching temperature and then be extracted in time, thereby avoiding the influence of the accumulation of by-products on the smoothness of the inner wall of the groove during the subsequent adjustment of the target groove.

[0079] In some embodiments of the present invention, the first pressure ranges from 15 mTorr to 60 mTorr, and / or the second pressure ranges from 40 mTorr to 80 mTorr.

[0080] Specifically, the first pressure can range from 15mTorr to 60mTorr, which can effectively reduce the etching depth during the first etching step, reserve a certain etching amount for the second etching step, and then effectively remove the by-products accumulated on the inner wall of the target groove during the first etching step while ensuring the total etching depth of the target groove.

[0081] In addition, the second pressure can be in the range of 40mTorr to 80mTorr. On the one hand, it can effectively compensate for the influence of the higher etching temperature on the etching rate of the target groove during the second etching step. On the other hand, it can also avoid lateral etching caused by the reduction of the average molecular free path due to excessive pressure. Therefore, by setting the second pressure range to 40mTorr to 80mTorr, the verticality of the inner wall of the target groove can be effectively guaranteed while ensuring the etching rate of the target groove.

[0082] In some embodiments of the present invention, the first process condition also includes that the RF power applied by the lower RF power supply to the process chamber where the object to be etched is located is a first RF power, and the second process condition also includes that the RF power applied by the lower RF power supply to the process chamber is a second RF power, and the second RF power is greater than the first RF power.

[0083] Specifically, the first process condition may include that the RF power applied by the lower RF power supply to the process chamber where the object to be etched is located is a first RF power. At the same time, the second process condition may include that the RF power applied by the lower RF power supply to the process chamber where the object to be etched is located is a second RF power. The second RF power may be greater than the first RF power. By increasing the RF power applied by the lower RF power supply in the second etching step, the physical effects of plasma bombardment, such as plasma energy and density, can be effectively improved, thereby effectively improving the etching rate of the target groove during the second etching step, thereby compensating for the influence of the higher etching temperature on the etching rate of the target groove during the second etching step.

[0084] In some embodiments of the present invention, the first radio frequency power ranges from 400W to 600W, and / or the second radio frequency power ranges from 800W to 1000W.

[0085] Specifically, the range of the first RF power can be 400W to 600W, which can effectively reduce the increase in the deposition amount of by-products caused by excessively high RF power during the first etching step, thereby reducing the difficulty of removing the by-products during the second etching step; at the same time, by setting the range of the first RF power to 400W to 600W, the etching depth during the first etching step can also be reduced, and a certain etching amount can be reserved for the second etching step, thereby effectively removing the by-products accumulated on the inner wall of the target groove during the first etching step while ensuring the total etching depth of the target groove.

[0086] In addition, the range of the second RF power can be 800W~1000W. On the one hand, it can effectively compensate for the influence of the high etching temperature on the etching rate of the target groove during the execution of the second etching step. On the other hand, it can also avoid the influence of plasma instability caused by excessive RF power on the etching quality, and the damage of the gate structure 106 and / or the insulating layer 105 caused by high-energy plasma bombardment provided by excessive RF power. Therefore, by setting the range of the second RF power to 800W~1000W, it is possible to effectively avoid damage to the gate structure 106 and / or the insulating layer 105 of the etching object while ensuring the etching rate and etching quality of the target groove.

[0087] In some embodiments of the present invention, after the second etching step is completed, the process further includes:

[0088] In a third etching step, under a third process condition, etching is performed in a width and / or depth direction of the target groove using a second process gas to adjust the width and / or depth of the target groove.

[0089] Specifically, after the second etching step is completed, a third etching step may be performed. The third etching step may be used to etch in the width and / or depth direction of the target groove to adjust the width and / or depth of the target groove.

[0090] The third process conditions may include parameter values ​​of the third process parameters during the execution of the third etching step. For example, the third process parameters may include the etching temperature, the pressure of the process chamber where the object to be etched is located, the RF power of the RF power supply, the gas flow rate, the etching time, etc.

[0091] The second process gas can be used to isotropically etch the target groove to remove material at a similar rate in the width and depth directions of the target groove, so that the width and depth of the target groove can be adjusted while ensuring the aspect ratio of the target groove. For example, the second process gas can include a fluorine-containing gas, a chlorine-containing gas, or a bromine-containing gas. As a preferred embodiment, the second process gas can include a fluorine-containing gas, and the fluorine groups dissociated from the fluorine-containing gas can better etch the target groove isotropically, thereby improving the controllability of the aspect ratio of the target groove, so as to obtain a controlled lateral etching effect, and achieve accurate and effective etching of the target groove.

[0092] Among them, by removing the by-products accumulated on the inner wall of the target groove in the second etching step, it is possible to effectively avoid the sharp corners on the inner wall of the target groove due to the inability to effectively etch the area where the by-products are accumulated during the isotropic etching in the third etching step, thereby obtaining a target groove with a relatively smooth and vertical inner wall, so that the groove has a standard U-shape.

[0093] In some embodiments of the present invention, the third process condition includes the etching temperature being a third temperature, the difference between the third temperature and the second temperature being less than or equal to a second threshold, and the second threshold is determined based on the time required for the etching temperature to change from the second temperature to the third temperature.

[0094] Specifically, the etching temperature under the third process condition can be a third temperature, and the difference between the third temperature and the second temperature can be less than or equal to the second threshold. In implementation, the second threshold can be determined based on the time required for the etching temperature to change from the second temperature to the third temperature and the working parameters of the temperature control component corresponding to the etching temperature. This can effectively shorten the waiting time required for the etching temperature to change during the process of switching from the second etching step to the third etching step, thereby effectively improving the etching efficiency of the target groove.

[0095] In some embodiments of the present invention, the third temperature ranges from 150°C to 180°C, wherein the third temperature can be the same as the second temperature, so that the etching temperature in the third etching step has less effect on the morphology of the target groove, and avoids the waiting time required for the etching temperature change in the process of switching from the second etching step to the third etching step, thereby effectively improving the etching efficiency of the target groove while ensuring the morphology of the target groove.

[0096] In some embodiments of the present invention, the second process gas includes a fluorine-containing gas and a hydrogen-containing gas, and the ratio of the hydrogen-containing gas to the fluorine-containing gas is in the range of 3-4.

[0097] Specifically, the second process gas may include a fluorine-containing gas, and the fluorine groups dissociated from the fluorine-containing gas can better etch the target groove isotropically, thereby improving the controllability of the aspect ratio of the target groove to obtain a controlled lateral etching effect, thereby achieving accurate and effective etching of the target groove.

[0098] Among them, the fluorine-containing gas may include carbon-fluorine gas, carbon-hydrogen-fluorine gas, sulfur-fluorine gas or nitrogen-fluorine gas, etc. As a preferred embodiment, the fluorine-containing gas may be nitrogen trifluoride, which will not introduce carbon-containing by-products and other by-products that are not conducive to the lateral etching of the target groove during the etching process, and avoid the excessive etching rate caused by excessive fluorine content, which leads to the inability to effectively control the morphology of the target groove during the etching process, thereby achieving precise and effective etching.

[0099] The second process gas may also include a hydrogen-containing gas, for example, the hydrogen-containing gas may be hydrogen. The hydrogen atoms generated by the hydrogen-containing gas in the plasma may combine with fluorine atoms to form hydrogen fluoride (HF), and the byproducts attached to the inner wall of the target groove in the third etching step may be effectively removed by hydrogen fluoride. Among them, the byproducts attached to the inner wall of the target groove in the third etching step may be byproducts such as silicon fluoride (SiF4) generated by etching by F groups during the execution of the third etching step, and the byproducts such as silicon fluoride are unevenly distributed on the inner wall of the target groove, thereby removing the byproducts attached to the inner wall of the target groove by hydrogen fluoride can obtain a smoother groove morphology.

[0100] In practice, the ratio of hydrogen to nitrogen trifluoride may be in the range of 3 to 4. For example, the flow rate of nitrogen trifluoride may be in the range of 10 sccm to 20 sccm, and the flow rate of hydrogen may be in the range of 30 sccm to 80 sccm, so as to obtain a smoother groove morphology.

[0101] In some embodiments of the present invention, the second process gas further includes a nitrogen-containing gas, and the proportion of the nitrogen-containing gas in the second process gas is in the range of 10% to 20%.

[0102] Specifically, the second process gas may also include a nitrogen-containing gas, which may be nitrogen. During the third etching step, byproducts of the fluorine group etching the sidewall 101 of the gate structure 106 may include silicon fluoride, nitrogen trifluoride and nitrogen, wherein the material of the sidewall 101 of the gate structure 106 is silicon nitride, and by introducing nitrogen into the process chamber during the third etching step, the nitrogen content in the process chamber can be effectively increased, and since nitrogen is a product of the reaction between the fluorine group and silicon nitride, the increase in nitrogen content can effectively reduce the reaction rate of the fluorine group and silicon nitride, thereby increasing the selectivity of the sidewall 101 of the gate structure 106 during the third etching step, thereby effectively reducing the degree of damage to the sidewall 101 of the gate structure 106 during the etching of the target trench.

[0103] In implementation, the proportion of nitrogen in the second process gas can be in the range of 10% to 20%. For example, the flow rate of nitrogen can be in the range of 100 sccm to 200 sccm. This can provide better protection for the sidewall 101 of the gate structure 106 during the third etching step, and can effectively avoid the obstruction of target trench etching caused by excessive nitrogen concentration, thereby ensuring etching efficiency.

[0104] In some embodiments of the present invention, the second process gas may further include argon and / or helium. Argon and helium can assist in ignition and dilute nitrogen trifluoride and hydrogen. At the same time, by introducing argon and / or helium, the gas pressure in the process chamber can also be assisted in controlling, so that the target groove can be etched more accurately, controllably and efficiently.

[0105] In implementation, the second process gas may include argon and helium at the same time. The flow rate of the argon may be in the range of 300 sccm to 500 sccm, and the flow rate of the helium may be in the range of 300 sccm to 500 sccm.

[0106] In some embodiments of the present invention, the third process condition also includes that the pressure of the process chamber where the object to be etched is located is a third pressure. The third pressure can range from 300mTorr to 400mTorr. A higher pressure can minimize the average molecular free path to the greatest extent to obtain more isotropic etching, thereby effectively improving the etching rate during the execution of the third etching step.

[0107] In some embodiments of the present invention, the first process condition also includes that the RF power applied by the upper RF power supply to the process chamber where the object to be etched is located is a third RF power, the second process condition also includes that the RF power applied by the upper RF power supply to the process chamber where the object to be etched is located is a fourth RF power, and the third process condition also includes that the RF power applied by the upper RF power supply to the process chamber where the object to be etched is located is a fifth RF power.

[0108] Among them, the third RF power can range from 800W to 1000W, the fourth RF power can range from 800W to 1000W, and the fifth RF power can range from 400W to 600W, so as to effectively improve the etching quality of the target groove while ensuring the etching efficiency.

[0109] In a feasible implementation of the present specification, a specific process recipe of an etching process is provided, and specific reference is made to Table 2. The process of forming a groove by the process recipe shown in Table 2 can be as follows Figure 4 As shown by Figure 4 It can be seen that after executing the first etching step, by-products are accumulated in the boundary area 107 of the inner wall of the target groove and the side wall 101 of the gate structure 106. After executing the second etching step, the by-products accumulated in the boundary area 107 of the inner wall of the target groove and the side wall 101 of the gate structure 106 are effectively removed, and a relatively smooth and vertical target groove is obtained. After executing the third etching step, there are no sharp corners in the boundary area 107 of the inner wall of the target groove and the side wall 101 of the gate structure 106, and a smooth and continuous U-shaped groove is obtained, thereby effectively ensuring that the morphology of the target groove obtained by etching is a standard U-shape.

[0110] Table 2

[0111]

[0112] As an optional implementation of the content disclosed in the present invention, the embodiment of the present invention further discloses a semiconductor process equipment, referring to Figure 5 The semiconductor process equipment 200 may include a process chamber 20, an inlet assembly 20A, an upper electrode assembly 20B, a lower electrode assembly 20C, a gas extraction assembly 20D and a controller ( Figure 5 The controller includes at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method of any one of the above embodiments is implemented.

[0113] Exemplarily, the controller can be a host computer or a slave computer. The controller can control the valve opening of the air inlet component 20A to introduce the corresponding process gas into the process chamber 20; the controller can also control the opening and closing degree of the valve of the air inlet component 20A to control the flow rate of the process gas. The controller can also control the exhaust component 20D to exhaust the interior of the process chamber 20, such as controlling the valve opening degree or the exhaust pump speed of the exhaust component 20D, to control the pressure inside the process chamber 20, discharge reaction byproducts, etc.

[0114] The upper electrode assembly 20B may include an RF coil 21, an upper RF power source 23 and an upper matcher 25. The controller is also used to control the upper RF power source 23 to provide RF power to the RF coil 21 through the upper matcher 25, so that the RF coil 21 excites the process gas inside the process chamber 20 to generate plasma 100.

[0115] The lower electrode assembly 20C may include a wafer carrier 22, a lower RF power supply 24, and a lower matcher 26. The controller is also used to control the lower RF power supply 24 to provide RF power to the wafer carrier 22 through the lower matcher 26 to provide RF bias. The wafer carrier 22 may be, for example, an electrostatic chuck, a mechanical chuck, or a vacuum adsorption chuck.

[0116] The semiconductor process equipment 200 of the embodiment of the present application may be an inductively coupled plasma (ICP) device or a capacitively coupled plasma (CCP) device. The embodiment of the present application does not limit the type of the semiconductor process equipment 200.

[0117] In addition to the above-mentioned methods and devices, the method for forming a groove provided in the embodiments of the present specification may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to execute the steps of the method for forming a groove according to various embodiments of the present specification described in the above-mentioned "Exemplary Method" section of the present specification.

[0118] The computer program product may be written in any combination of one or more programming languages ​​to write program code for performing the operations of the embodiments of the present specification, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0119] In addition, an embodiment of the present specification also provides a computer-readable storage medium on which a computer program is stored, and the computer program is executed by a processor to execute the steps of the method for forming a groove according to various embodiments of the present specification described in the above "Exemplary Method" section of the present specification.

[0120] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this specification can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0121] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0122] The above-mentioned embodiments only express several implementation methods of this specification, and the descriptions are relatively specific and detailed, but they cannot be understood as limiting the scope of the solutions provided by the embodiments of this specification. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of this specification, which all belong to the protection scope of this specification. Therefore, the protection scope of the patent of this specification shall be based on the attached claims.

Claims

1. A method for forming a groove, characterized in that: include: Providing an object to be etched, wherein the object to be etched includes a fin-shaped structure and a plurality of gate structures spanning the fin-shaped structure; In a first etching step, a predetermined area in the fin-shaped structure is etched to a predetermined depth using a first process gas under a first process condition, wherein the predetermined area includes an area between two adjacent gate structures in the fin-shaped structure, and the first process condition includes an etching temperature of a first temperature; In a second etching step, the predetermined area is etched from the predetermined depth to a target depth using the first process gas under a second process condition to form a target groove; The predetermined depth is smaller than the target depth, and the second process condition includes that the etching temperature is a second temperature, and the second temperature is greater than the first temperature.

2. The method according to claim 1, characterized in that The first temperature is lower than the volatilization temperature of the by-products in the first etching step, and / or the second temperature is higher than or equal to the volatilization temperature of the by-products.

3. The method according to claim 2, characterized in that The first process gas includes a bromine-containing gas and an inert gas, and the ratio of the bromine-containing gas to the inert gas is in the range of 1-2.

4. The method according to claim 3, characterized in that The first temperature ranges from 80°C to 100°C, and / or the second temperature ranges from 150°C to 180°C.

5. The method according to claim 1, characterized in that The first process condition further includes that the pressure of the process chamber where the object to be etched is located is a first pressure, and the second process condition further includes that the pressure of the process chamber is a second pressure, and the second pressure is greater than the first pressure.

6. The method according to claim 5, characterized in that The first pressure ranges from 15 mTorr to 60 mTorr, and / or the second pressure ranges from 40 mTorr to 80 mTorr.

7. The method according to claim 1, characterized in that The first process condition also includes that the RF power applied by the lower RF power supply to the process chamber where the object to be etched is located is a first RF power, and the second process condition also includes that the RF power applied by the lower RF power supply to the process chamber is a second RF power, and the second RF power is greater than the first RF power.

8. The method according to claim 7, characterized in that The first radio frequency power ranges from 400W to 600W, and / or the second radio frequency power ranges from 800W to 1000W.

9. The method according to any one of claims 1 to 8, characterized in that After the second etching step is completed, the method further comprises: In a third etching step, under a third process condition, etching is performed in a width and / or depth direction of the target groove using a second process gas to adjust the width and / or depth of the target groove.

10. The method according to claim 9, characterized in that The second process gas includes a fluorine-containing gas and a hydrogen-containing gas, and the ratio of the hydrogen-containing gas to the fluorine-containing gas is in the range of 3-4.

11. The method according to claim 10, characterized in that The second process gas further includes nitrogen-containing gas, and the proportion of the nitrogen-containing gas in the second process gas is in a range of 10% to 20%.

12. A semiconductor process equipment, characterized in that: include: A process chamber, an air inlet assembly, an upper electrode assembly, a lower electrode assembly and a controller, wherein the controller includes at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method for forming a groove according to any one of claims 1 to 11 is implemented.

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