State machine recoding method for driving non-combinational logic circuit

Abstract

The invention belongs to the field of integrated circuit design, and discloses a state machine recoding method for driving a non-combinatorial logic circuit, which comprises the following steps of: 1, state classification; classifying the coding of the state machine based on whether the KEEP value depends on a previous state S'of the state machine; and step 2, state machine jump classification: according to classification of state machine codes and starting and ending point state codes of state jump, the jump of the state machine is subdivided into five types. Step 3, performing jump modification and recoding operation on the state machine; the state machine is adjusted, so that the jump among the states of the state machine meets the five types of jump requirements in the step 2; and step 4, flow and summarization. According to the invention, recoding of the state machine in a general circuit can be realized, so that the state machine can directly drive a circuit with a non-combinational logic ring. Through the two steps of state machine jump graph modification and bit recoding operation, an existing state machine is transformed, and the method has wide applicability.

Description

Technical Field

[0001] The invention belongs to the field of integrated circuit design, and in particular relates to a state machine recoding method for driving a non-combinatorial logic circuit. Background Art

[0002] Logic locking technology protects integrated circuits by inserting key gates. It can provide full-process protection from design to manufacturing and is widely used to deal with hardware security issues such as hardware Trojans, intellectual property piracy, and reverse engineering. The cyclic logic locking technology adds loops to the circuit, making it impossible to express it as a directed acyclic graph, so as to increase the complexity of SAT (Boolean Satisfiability) solution. It has the characteristics of high structural security and low encryption overhead. However, cyclic logic decryption technology represented by CycSAT and BeSAT focuses on the "loop-free" preprocessing of the circuit before SAT solution, combined with ATPG (Automatic Test Pattern Generation) to identify loop types, and has successfully cracked the advanced cyclic logic locking method LOOPLock 2.0. Therefore, it is urgent to study more secure and effective loop structures and their cyclic logic locking methods.

[0003] Loop logic locking is based on a core assumption: loop structures are difficult to express in conjunctive normal form (CNF)

[41] , and therefore cannot be solved by SAT solvers. By introducing loops in combinational circuits, the circuit structure is no longer a directed acyclic graph (DAG)

[42] , making traditional SAT attacks ineffective.

[0004] The core technology used in the field of loop logic locking to enhance security is the addition of specific loops to the circuit. When the circuit receives an incorrect key input, these loops can induce output signal errors, thus affecting the overall circuit function. Through detailed analysis, four types of loops that have been introduced in the current loop logic locking technology have been identified:

[0005] (1) Pseudo-loop: This loop is a structure originally used in cyclic logic lock encryption technology. The so-called pseudo-loop means that after the correct key is entered and the chip is operating normally, the signal in the loop will remain static and no jump will occur. Therefore, this loop does not actually play any functional role in the circuit and only serves as a structural loop, similar to a "dead circuit". However, when the wrong key is entered, the existence of the pseudo-loop becomes critical, which will cause the circuit output signal to oscillate or have timing changes, thereby interfering with the normal output of the circuit. Therefore, when the pseudo-loop is removed from the encryption netlist, the corresponding circuit can be decrypted. This design aims to enhance the security of the circuit through a non-functional loop, so that when the key is entered incorrectly, the circuit will become an erroneous loop state.

[0006] (2) Hyperloop: This loop was first introduced by SRCLock encryption technology and is designed by stacking multiple layers on the basis of a pseudoloop. This structure results in a large number of loops of varying sizes in the circuit. By increasing the complexity of the loop, SRCLock technology greatly increases the computational difficulty of the CycSAT solver when calculating the pre-set "loop-free" condition constraints. In essence, the hyperloop is similar to the pseudoloop. After the chip is activated with the correct key, the hyperloop will not affect the output function of the circuit and will appear as a "dead circuit." Therefore, once the hyperloop is removed from the encrypted netlist, the circuit can be decrypted. This design strategy aims to increase the security of the circuit design by increasing its complexity, making the CycSAT decryption process more difficult.

[0007] (3) Combinatorial logic loop: This loop can also be called a functional combinatorial logic loop, which was originally proposed by the LOOPLock encryption technology. By adopting NM technology, some gates in the circuit can be optimized and merged to eventually construct a functional combinatorial logic loop. Unlike pseudo-loops or hyperloops, functional combinatorial logic loops will play a key role in the normal operation of the chip. Therefore, even if the circuit inputs the correct key, the values ​​in the functional combinatorial logic loop will still change and affect the output signal of the circuit. Once these functional combinatorial logic loops are removed from the encrypted netlist, the circuit cannot be decrypted or will result in decryption errors. Therefore, to correctly decrypt the circuit, the attacker must retain these functional combinatorial logic loops.

[0008] (4) Non-combinatorial logic loop: This type of loop can be called a non-functional non-combinatorial logic loop, which was originally proposed by the LOOPLock encryption technology. The main difference from the combinatorial logic loop is its timing characteristics. The value in the loop depends not only on the current input signal, but also on the input signal at the previous moment, while the combinatorial logic loop only depends on the current input signal. Due to its timing, when the non-combinatorial logic loop is added to the combinatorial logic circuit, the value in the loop will be regarded as "X". In the LOOPLock and LOOPLock2.0 encryption technologies, in order to ensure the correctness of the function of the combinatorial logic circuit, "X" from the perspective of the logic function is combined with a zero value (logical AND), so that "X" will not affect the output of the logic function, and thus will not affect the functionality of the circuit. Therefore, this type of loop is also called a non-functional non-combinatorial logic loop. Due to its non-functional characteristics, like pseudo-loops and hyperloops, once the non-functional non-combinatorial logic loop in the encrypted netlist is removed, the circuit can be decrypted.

[0009] Table 1 Loop types in current cyclic logic lock

[0010]

[0011] The four existing loops are shown in Table 1. Among the four loops, pseudo-loops and hyperloops are only used to introduce false loops in combinational logic circuits from a structural perspective. These two loops do not affect the normal operation of the circuit in terms of function, so they can be eliminated through the simplification process. For example, pseudo-loops can be simplified and eliminated through the "no loop" assumption and related constraints added by the CycSAT tool. Hyperloops are essentially no different from pseudoloops, but the time required for CycSAT to add constraints increases exponentially with the number of keys. In actual circuits, hyperloops consume a lot of layout and routing resources, so in practical applications, the practical value of this encryption technology is low.

[0012] Unlike pseudo-loops and hyperloops, combinational logic loops and non-combinatorial logic loops are introduced into loop logic locks from the perspective of circuit function. This means that these two loops have actual functionality in the normal operation of the circuit. Therefore, the attacker must include these two loops in the encrypted netlist to ensure the functional correctness of the final decrypted netlist. The main difference between these two loops lies in the variables on which their values ​​depend: the loop value of the combinational logic loop is directly determined by the current input signal, and its variable is only the current input signal; while the loop value of the non-combinatorial logic loop depends on the input signal at the current and previous moment, and its variables include the current input signal and the previous input signal. Since both loops are based on functionality, each loop plays a specific and important role in circuit design.

[0013] Although LOOPLock encryption technology introduces non-combinatorial logic loops for the first time, these loops are ultimately non-functional. In the process of building the loop, a blocking node is embedded in the driver circuit downstream of the non-combinatorial logic loop, which is used to prevent the further transmission of the loop value signal. From a logical function perspective, this blocking node connects (AND) the loop value with the previous logic 0 value. The loop value signal after processing by the blocking node will be transformed into a constant value (logic 0), ensuring that it will not have any effect on the final output signal of the circuit. The design of LOOPLock is intended to maintain the core function of the circuit by controlling signal transmission, keeping the circuit in the form of combinational logic while achieving encryption purposes.

[0014] The non-combinatorial logic loops in LOOPLock encryption technology and its upgraded version, LOOPLock 2.0 encryption technology, are non-functional. Although these loops produce jumps in the loop value during normal operation of the circuit, from the perspective of the output signal, they can actually be regarded as inactive circuit parts, that is, the propagation of the uncertain state "X" in the loop value will stop at a certain node in the circuit. The cracking strategy of LOOPLock 2.0 encryption technology is based on this feature, that is, to identify the blocking nodes in the circuit through ATPG technology to determine the inactive loops. The loops with blocking nodes can be regarded as inactive "dead circuits", so they can be removed and replaced with logic 0 or 1, and the functionality of the circuit remains unchanged. After removing the non-combinatorial logic loops in the encrypted netlist, the remaining key values ​​can be decrypted by SAT decryption technology, and finally a decrypted netlist containing only functional combinatorial logic loops is obtained. Although the decrypted netlist does not contain non-combinatorial logic loops, it is functionally equivalent to the correct circuit netlist, so the effectiveness of this decryption method can be proved.

[0015] In general, although the current loop logic locking encryption technology introduces non-combinatorial logic loops, these loops are easy to crack due to the non-functionality of the introduced loops, which reflects a major flaw in encryption technology in this field: no encryption technology currently effectively utilizes functional non-combinatorial logic loops. If the non-combinatorial logic loops in the circuit are functional, then such loops will no longer be considered "dead circuits", which means that such loops should be retained in the decryption netlist, and this retention behavior directly breaks the decryption premise of the current decryption technology. Therefore, studying encryption technology that can effectively utilize functional non-combinatorial logic loops is a key direction for enhancing circuit security in the field of loop logic locking.

[0016] Since non-combinatorial logic loops have sequential properties, directly introducing functional non-combinatorial logic loops into general circuits will make the circuit functions uncontrollable. In order to allow any circuit to use functional non-combinatorial logic loops, the state machine encoding needs to be modified so that the timing of the modified state machine meets specific restrictions. Under these restrictions, the functional non-combinatorial logic loop can work safely and effectively in the circuit. Summary of the invention

[0017] The object of the present invention is to provide a state machine recoding method for driving a non-combinatorial logic circuit to solve the above-mentioned technical problem.

[0018] In order to solve the above technical problems, the specific technical solution of a state machine recoding method for driving a non-combinatorial logic circuit of the present invention is as follows:

[0019] A state machine recoding method for driving a non-combinatorial logic circuit comprises the following steps:

[0020] Step 1: State classification: Classify the encoding of the state machine based on whether the KEEP value depends on the previous state S′ of the state machine;

[0021] Step 2: Classification of state machine jumps: According to the classification of state machine encoding and the start and end state encoding of the state jump, the state machine jumps are subdivided into five types.

[0022] Step 3: state machine jump modification and re-encoding operation; adjust the state machine so that its state jumps meet the five types of jump requirements in step 2;

[0023] Step 4: Process and summary.

[0024] Furthermore, in step 1, it is assumed that the output signal of the circuit containing the non-combinatorial logic loop is represented by y, and the logic function of the circuit is represented by f, then the encoding of the state machine is divided into the following two categories:

[0025] (1) Sf (State free), free coding state. In this state, the ring value of the non-combinatorial logic ring will not affect the output port. In this case,

[0026] y=f(S)(3.8)

[0027] (2) Sk (State keep), keep state, in this state, the loop value of the non-combinatorial logic loop will affect the output port of the circuit. In this case,

[0028] y=f(S,S′). (3.9) Furthermore, the five types of jumps in step 2 are internal jump, Sf to Sf jump, Sf to Sk jump, Sk to Sf jump, Sk to Sk jump,

[0029] The internal jump: in this jump type, the encoding of the starting state and the end state remains unchanged; the Sf to Sf jump: in this jump type, the starting state and the end state are both Sf;

[0030] The Sf to Sk jump: This type of jump causes the ring value in the non-combinatorial logic ring in the Sf state to be latched to the Sk state;

[0031] The Sk to Sf jump: In this jump type, the destination state is Sf.

[0032] Furthermore, each type of step 2 has its own specific requirements and constraints, where some jump types are not allowed:

[0033] The internal jump is allowed in the circuit design;

[0034] The Sf to Sf jump: This state machine jump path is allowed;

[0035] The jump from Sf to Sk: The jump from Sf to Sk must ensure that the jump entry is unique, and this jump is allowed;

[0036] The Sk to Sf jump: In a circuit containing a non-combinatorial logic loop, this jump is not only allowed, but also the number of jumps is not limited;

[0037] The Sk to Sk jump: In a circuit containing a non-combinatorial logic loop, this jump is not allowed.

[0038] Furthermore, the classification and related restrictions of the jumps between different states in step 2 are as follows:

[0039] Internal jump: the starting state is S0, the end state is S0, which is allowed;

[0040] Jump from Sf to Sk: the starting state is S0, the end state is S1, and part of it is allowed to be 1;

[0041] Jump from Sf to Sk: the starting state is S0, the end state is S2, and part of it is allowed to be 2;

[0042] Sf to Sf jump: the starting state is S0, the end state is S3, which is allowed;

[0043] Sk to Sf jump: the starting state is S1, the end state is S0, which is allowed;

[0044] Sf to Sf jump: the starting state is S0, the end state is S3, which is allowed;

[0045] Internal jump: The starting state is S1, the end state is S1, which is allowed;

[0046] Sk to Sk jump: the starting state is S1, the end state is S2, which is not allowed;

[0047] Sk to Sf jump: the starting state is S1, the end state is S3, which is allowed;

[0048] Sk to Sf jump: the starting state is S2, the end state is S0, which is allowed;

[0049] Sk to Sk jump: the starting state is S2, the end state is S1, which is not allowed;

[0050] Internal jump: The starting state is S2, the end state is S2, which is allowed;

[0051] Sk to Sf jump: the starting state is S2, the end state is S3, which is allowed;

[0052] Sf to Sf jump: the starting state is S3, the end state is S0, which is allowed;

[0053] Jump from Sf to Sk: the starting state is S3, the end state is S1, and part of it is allowed to be 1;

[0054] Jump from Sf to Sk: the starting state is S3, the end state is S2, and part of it is allowed to be 2;

[0055] Internal jump: The starting state is S3, and the end state is S3, which is allowed;

[0056] Among them, in the jump category marked as "partially allowed 1", only one of the two possible jumps is allowed to be implemented; similarly, the jump category marked as "partially allowed 2" also only allows one of the jumps to exist.

[0057] Furthermore, in step 2, for any circuit, as long as the coding classification and state jump of its state machine meet the restriction conditions, the state machine can be used to drive the functional non-combinatorial logic loop; for a state machine with multiple bits, a splitting strategy is adopted to treat some of its bits as an independent 2-bit state machine for processing; thereafter, it is analyzed whether the coding and jump of this 2-bit state machine meet the previously proposed requirements.

[0058] Furthermore, step 3 includes some stricter restrictions, including: for a jump from Sf to Sk, only one jump entry is allowed for a state encoded as Sk; and for a jump from Sk to Sk, this jump is not allowed.

[0059] To ensure that the state jumps after the state machine is re-encoded meet the above constraints, the jump structure of the state machine needs to be adjusted first, which includes ensuring that the state machine has multiple states with only one entry jump, and then marking these states as Sk. Next, re-encoding is performed according to the specific encoding requirements of Sk and Sf;

[0060] When modifying the jump path of a state machine, the first task is to ensure that the functionality of each state remains unchanged; then, adjust the jump path itself; given the two restrictions mentioned above, state copying is an effective strategy, which generates a state copy with the same functionality as the original state; then, appropriately restrict the jump entry of the original state and its copy.

[0061] Furthermore, the specific implementation method of step 3 is:

[0062] An original state machine includes state Si and other parts. State Si has three jump entries a, b, and c, and two jump exits d and e. If Si is considered as the driving part of a non-combinatorial logic ring, that is, the Sk state, but because Si has three entries, it does not meet the requirement that the Sk state has only one jump entry. Therefore, the jump entry of Si needs to be divided into three parts.

[0063] According to the state machine re-encoding strategy, Si is first copied to form three copies Si0, Si1 and Si2. These copies are the same as the original Si state in terms of the exit entrance, that is, they all have two exits d and e, and each inherits the entrances a, b and c of Si. In the new state machine design, these copies will replace the original Si state. If Si in the original state machine functions through path a, the corresponding path a in the new state machine will jump to state Si0. The functions of Si0, Si1 and Si2 in the circuit are consistent with the original Si. Through this state copying strategy, any two of Si0, Si1 and Si2 can be selected as Sk, and then the state machine is re-encoded according to the specific encoding requirements of Sk to ensure that the newly encoded state machine can effectively drive the functional non-combinatorial logic loop.

[0064] Further, the step 4 comprises:

[0065] The key to the state machine recoding strategy is to first analyze the circuit containing non-combinatorial logic loops and accurately identify the type of each input signal. Since the state machine is the core of driving such circuits, a detailed analysis of each input signal is performed;

[0066] Under the premise that the state machine will be re-encoded eventually, at this stage, there is no need to deeply analyze whether Sk and Sf in the existing state machine jump diagram meet specific restriction rules. Instead, we focus on the symbolization of each state and the direct analysis of its jump path;

[0067] For states with jump entries greater than or equal to 2, a state copy method is used to maintain the invariance of the circuit function. By copying, a copy state with the same function as the original state is generated. These copies will inherit all the jump exits of the original state, and each entry of the original state is assigned to each copy to ensure that each copy has only one independent jump entry. In addition, due to the state copying, there will be no direct jump relationship between the newly generated state copies, which meets the requirement that there should be no jump relationship between Sk states.

[0068] After each state copy, the number of copies is divided by 2 and rounded to the integer, which represents the number of states that can drive the functional non-combinatorial logic ring circuit, and is also equal to the number of keys that can be inserted. Once the number of copied states reaches the required number of keys, the state copying operation will stop. Subsequently, the modified state jump diagram will be re-encoded based on the {Sk} and {Sf} sets obtained from the previous analysis. For multi-bit state machines, their encoding requires splitting some of the bits, treating the bit subset as a small state machine, and starting the encoding operation from the small state machine.

[0069] The state machine recoding method for driving a non-combinatorial logic circuit of the present invention has the following advantages:

[0070] The present invention can realize the recoding of the state machine in the general circuit, so that it can directly drive the circuit with non-combinatorial logic loop. Through the two steps of state machine jump diagram modification and bit recoding operation, the existing state machine is transformed, which has wide applicability. The transformed state machine can drive the circuit containing the non-combinatorial logic loop, and the non-combinatorial logic loop is functional, that is, it has an impact on the output of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0071] Figure 1(a) is a schematic diagram of a circuit structure with a non-combinatorial logic loop;

[0072] FIG1(b) is a schematic diagram of the truth value representation of the circuit in FIG1(a);

[0073] Figure 1(c) is a schematic diagram of a circuit with two registers;

[0074] FIG1(d) is a schematic diagram of adding the circuit structure in FIG1(a) to FIG1(c);

[0075] Figure 2(a) is a schematic diagram of the circuit after the key is inserted;

[0076] FIG2(b) is a schematic diagram of all allowed jump entries of the state machine S to ensure that the KEEP value of the 'X' state is not output;

[0077] FIG2(c) is a schematic diagram showing that when the previous state of the state machine S is fixed, the KEEP value corresponding to the output signal c will no longer be 'X';

[0078] Figure 3 Find methods for 2-bit state machines in practical circuits;

[0079] Figure 4 Recode the flow diagram for the state machine;

[0080] Figure 5(a) is a schematic diagram of the original state machine;

[0081] FIG5( b ) is a schematic diagram of the state machine after re-encoding. DETAILED DESCRIPTION

[0082] In order to better understand the purpose, structure and function of the present invention, a state machine recoding method for driving a non-combinatorial logic circuit of the present invention is further described in detail below with reference to the accompanying drawings.

[0083] In order to explain more clearly how to re-encode the state machine, the following first introduces the background of the re-encoding method, namely the FCLock encryption technology. This encryption technology uses the non-combinatorial logic loop used in Figure 1(a). However, in order to make the loop applicable to general circuits, the state machine driving the loop in Figure 1(a) needs to be re-encoded so that the circuit with the loop can be functionally correct.

[0084] Secondly, we first introduce how to classify state machine encoding (Sf or Sk). This classification is the basis for the subsequent classification of state machine jumps and the final encoding of the state machine.

[0085] Then, how to classify the state machine jump is introduced. The present invention needs to modify the original state machine jump so that the final state machine jump type meets the requirements corresponding to the five types of classification proposed below. The jump diagram is modified in the form shown in Figure 5, that is, the state is copied first, and then the jump entry is modified.

[0086] The final encoding value of the state machine is based on the state machine modified by the jump. The specific encoding method of each bit depends on the classification of the state, that is, whether it belongs to Sf or Sk, and the final encoding value of Sf and Sk depends on the classification method of the state machine in the first step.

[0087] Finally, the state machine recoding method is introduced through a flowchart.

[0088] Introduction to FCLock encryption technology: background knowledge of state machine recoding

[0089] In order to make full use of functional non-combinatorial logic loops, a new encryption technology, FCLock, is introduced. To explain this approach more clearly, this section first explores why the LOOPLock 2.0 encryption technology does not adopt functional non-combinatorial logic loops. Secondly, the challenges encountered in introducing functional non-combinatorial logic loops in combinatorial logic circuits are analyzed, and a detailed example is used to show how the FCLock encryption technology overcomes these difficulties. Finally, this section elaborates on the working principle of the FCLock encryption technology and its application in circuit encryption.

[0090] From the perspective of logic functions, the loop value function of non-combinatorial logic loops exhibits obvious timing, in which the variables include not only the current input signals (CIs), but also the input signals of the previous moment, which can be called latched input signals (LIs). Specifically, if the current input signal CIs does not directly affect the loop value, then the loop value is mainly determined by LIs, and the expression is Y = F (CIs, LIs). In the LOOPLock 2.0 encryption technology, non-combinatorial logic loops are functional to some downstream circuits on a smaller scale. However, the loop value Y does not drive the final output signal, so this loop is considered non-functional. This setting is based on the core consensus of loop logic locking technology, that is, the purpose of encryption is to enhance the security of combinatorial logic circuits. In order to ensure the security of circuit functions, that is, to avoid the occurrence of timing features that should not appear in combinatorial logic circuits, the final encryption circuit should avoid containing timing devices, and non-combinatorial logic loops can obviously be regarded as timing devices. Since the non-combinatorial logic loop is sequential and its variable LIs does not belong to the current moment, it is regarded as an unstable variable "X" in the combinatorial logic circuit whose input signal is a free variable. To prevent the potential impact of "X" on the circuit function, LOOPLock 2.0 encryption technology adds blocking nodes at appropriate locations. The role of these nodes is to prevent the further propagation of "X" and ensure that from the perspective of the output port, the non-combinatorial logic loop in the circuit maintains its non-functional characteristics, thereby ensuring the combinatorial logic characteristics of the circuit.

[0091] In cyclic logic locking, a major challenge of using functional non-combinatorial logic loops is to ensure that even with the introduction of such loops, the combinatorial logic circuit can still avoid the timing problems caused by the loop value, thereby ensuring that the output of the circuit is only a function of the current input signal CIs. Assume that in the current combinatorial logic circuit, the output variable is represented by g, and the logical operation is represented by F. Then, for any combinatorial logic function, its goal is to maintain direct responsiveness to the current input and avoid dependence on historical states. This requires that the design must cleverly manage the impact of non-combinatorial logic loops to ensure that they do not destroy the basic logic of the circuit. For a combinatorial logic function,

[0092] g=F(CIs) (3.1)

[0093] After the introduction of the non-combinatorial logic ring, assuming that the ring value is represented by the logic function y, then:

[0094] g=F(CIs,y) (3.2)

[0095] Since y is a function of CIs and LIs,

[0096] g=F(CIs,y(CIs,CIs)) (3.3)

[0097] In a combinational logic circuit, the value of the latch input signal comes from the previous beat, so it has timing. According to the characteristics of the combinational logic function, this timing information must be eliminated. However, in a standard combinational logic circuit, neither the internal circuit components nor the current input signal can deduce the CIs information of the previous beat through the logic function. This characteristic of being unable to infer the historical state from the current logic state is the main reason why the loop logic locking technology does not adopt a functional non-combinatorial logic loop.

[0098] In FCLock encryption technology, in order to correctly use the functional non-combinatorial logic ring, CIs must become a function of the current input signal CIs to eliminate the timing brought by the ring value, that is, the following function must be constructed:

[0099] LIs=f(CIs) (3.4)

[0100] In a combinational logic circuit, the function f is usually unknown, but the circuit structure of the chip includes not only the combinational logic part, but also sequential logic devices such as registers. These sequential logic devices essentially constitute a state machine. In this architecture, the current input signal CIs of the combinational logic circuit is generated by the state machine. Therefore, when considering the overall design of the circuit, the construction of the function f needs to take into account the state machine that drives the combinational logic circuit to ensure the coordinated operation of the entire system.

[0101] The encryption principle of FCLock encryption technology is to use the constructor f so that even if the combinational logic circuit contains a functional non-combinatorial logic loop, the circuit is still combinational in nature, that is:

[0102] g=F(CIs,y(CIs,f(CIs))) (3.5)

[0103] The following is a detailed description of the FCLock encryption technology through a specific example. In order to ensure that the non-combinatorial logic loop in the circuit is not affected by competition and risk and cause functional problems, the non-combinatorial logic loop used in the FCLock encryption technology needs to be specially designed to ensure that the loop value is not affected by glitches. These non-combinatorial logic loops that are functionally immune to glitches have multiple implementation methods, one of which is shown in Figure 1(a). The logic function of this type of non-combinatorial logic loop can be specifically expressed as:

[0104] c=((a&b)|(a&c)|(b&c))(3.6)In the application example of FCLock encryption technology, that is, the circuit design shown in Figure 1(a), the variable c on the right side of the equal sign represents the ring value of the non-combinatorial logic ring, marked with "KEEP". Figure 1(b) reveals the corresponding logical behavior, especially when the input signal ab is 01 or 10, the output signal c will maintain the ring value KEEP. The specific value of the ring value depends on the previous state of the input signal ab. If there is no timing information about the input signal ab, ab can be regarded as two independent and free input variables. In this case, when the input signal ab takes the value of 01 or 10, the output signal c will be in an uncertain state, that is, the value of KEEP is considered to be "X".

[0105] In order to eliminate the uncertainty of the output signal, it is necessary to ensure that when the input signal ab is equal to 01 or 10, the loop value KEEP has a clear value of 0 or 1. For example, the fourth column of Figure 1(b) shows a possible situation. When the input signal ab is equal to 01, the output signal c is 1 (KEEP=1), and when ab is equal to 10, the output signal c is 0 (KEEP=0). In this configuration, although the circuit shown in Figure 1(a) still contains a non-combinatorial logic loop and this loop will affect the output signal c, its logical function actually still only depends on the current input signal ab. This design makes the circuit logically exhibit the characteristics of a combinational logic circuit, that is, the output is completely determined by the current input.

[0106] In order to ensure that the circuit truth table in Figure 1(a) conforms to the pattern shown in the first, second, and fourth columns of Figure 1(b), the input signal ab must abandon its free change state and be subject to specific constraints. This constraint ensures that when the ab signal jumps from other values ​​to 01, the ring value KEEP remains at 1; when the ab signal jumps to 10, the ring value KEEP remains at 0. Obviously, the combinational logic circuit cannot implement this constraint with timing properties, so the input signal ab containing time series information must be introduced. Considering that the combinational logic in the actual circuit is usually driven by the register output, without loss of generality, it can be assumed that the input signal ab is driven by two registers A and B, as shown in Figure 1(c). Further imagine that registers A and B together constitute a state machine S, where the 0th bit of S drives the signal a and the second bit drives the signal b. Therefore, the change of the ab signal depends on the state jump of the state machine S, and the specific value of ab is determined by the encoding of the state machine S.

[0107] When the encoding and jump configuration of the state machine S meets the conditions, the output signal c of the circuit in Figure 1(a) behaves as shown in Figure 1(b). The truth table of c in this configuration can be used to simplify the circuit in Figure 1(a). It is obvious from the truth table in Figure 1(b) that the logic function of the output signal c in this case can be clearly defined as:

[0108] c=b(3.7)

[0109] This logic function exhibits the characteristics of combinatorial logic and can be directly integrated into the actual circuit shown in Figure 1(c), thereby introducing the non-combinatorial logic loop shown in Figure 1(a) in the actual circuit layout. Figure 1(d) shows a possible way of such integration. As long as the state machine S composed of registers AB in Figure 1(c) meets the specific timing requirements, the circuit function shown in Figure 1(d) will be consistent with that in Figure 1(c). In addition, the non-combinatorial logic loop added in this way is functional because according to the truth table in Figure 1(b), the loop value KEEP of the loop directly affects the logical function expression of the output signal c.

[0110] Registers A and B together form a 2-bit state machine S, which has four possible encodings: 00, 01, 10, and 11, marked as S0, S1, S2, and S3, respectively. The first three columns shown in Figure 2(c) describe the correspondence between the input signal ab and the state machine encoding in these four states. In this configuration, when the state machine is in the S1 and S2 states, the output signal c of the circuit shown in Figure 2(a) will remain at the KEEP value, which corresponds to the third column in Figure 1(b). Specifically, when the state machine changes from the S0 state of the previous beat to S1 or S2, the value of KEEP is 0; and when it changes from the S3 state of the previous beat to S1 or S2, the value of KEEP is 1.

[0111] In order to make the truth table of the circuit in Figure 1(a) conform to the situation shown in the fourth column of Figure 2(b), the state transition of the state machine S needs to meet specific preconditions. Specifically, when the state machine S is currently in the S1 state, its previous state must be S3; when the state machine S is in the S2 state, its previous state must be S0. However, when the state machine is in the S0 or S3 state, there is no specific requirement for the previous state, because when S is equal to S0 or S3, the loop value of the non-combinatorial logic loop is directly affected by the current input signal ab and does not depend on the signal of the previous beat. This state dependency relationship constitutes the truth table shown in Figure 2(c), in which the KEEP value is no longer in an uncertain state. Through this design, the state machine S correctly drives the input signal ab, thereby ensuring the predictability of the loop circuit.

[0112] The state machine jump diagram in Figure 2(b) can more clearly illustrate this special timing or state machine dependency. In the figure, internal state jumps such as S0 self-jump to S0 are omitted, and all key jump paths to ensure that the output signal is not in the uncertain state "X" are displayed. In the figure, the jump paths from state S0 to S2 and from state S3 to S1 are marked with red arrows, indicating that these paths are core and cannot be deleted. Other jumps marked with black arrows can be adjusted or deleted as needed.

[0113] Figure 2(b) clearly shows that the jump entry of states S1 and S2 is unique, while the jump entry and exit of S0 and S3 are not restricted. In particular, when the state machine is in S2, it is not allowed to jump to S1, because in the states of S1 and S2, the loop value latched by the non-combinatorial logic loop directly affects the output signal. For example, if the state machine is allowed to jump from S2 to S1, it may go through the path of S2→S0→S1 or S2→S3→S1, where S0 and S3, as intermediate states, will have different effects on the latched loop value. Such state transitions will cause the loop value in the S1 state to be in an uncertain state, thereby affecting the stability and predictability of the circuit. This meticulous state design is to ensure that the circuit can maintain the predetermined logical function under all operating conditions and avoid any form of logical errors or uncertainties.

[0114] When the state machine S in the circuit meets the aforementioned special timing requirements, the key addition operation can be performed. Unlike the XOR gate or XNOR gate commonly used in existing encryption methods, the FCLock encryption technology can insert an AND gate K in the feedback loop, as shown in Figure 2(a). The driving key Key of this AND gate K will determine whether the loop is activated. For example, if the correct value of Key is set to 1, and the input signal ab is driven as shown in Figure 2(c), when Key is 0, the AND gate will be closed, causing the loop value to be fixed to 0, thereby changing the final combinational logic function and affecting the output signal, causing the so-called logic "pollution".

[0115] In fact, the gates added by the key are not limited to AND gates, and other types of logic gates can also be used for encryption. For example, if an XOR gate is inserted into the loop, it means that the feedback loop must exist, and the role of the key is to decide whether to add a NOT gate to the loop. This design allows for more flexible encryption implementation, allowing circuit designers to choose the most suitable encryption strategy based on security requirements and circuit characteristics.

[0116] In summary, this section first analyzes the necessary conditions when a functional non-combinatorial logic loop is introduced into a combinational logic circuit through logical reasoning. Only when the state machine driving the combinational logic circuit meets specific requirements can the functional non-combinatorial logic loop be effectively integrated into the circuit for encryption operations. This section describes the working principle of FCLock encryption technology in detail by showing a typical circuit containing a non-combinatorial logic loop and a 2-bit state machine. In similar cases, if there is a state machine similar to the example in the circuit, a similar method can be used to introduce a functional non-combinatorial logic loop to achieve effective encryption of the circuit.

[0117] Although the state machines described in the previous examples are common in many circuits, in reality, many circuits cannot be directly encrypted using the functional non-combinatorial logic loop in Figure 1(a) due to the high degree of freedom of the encoding and jump paths of the state machines. In order to improve the versatility of the FCLock encryption technology, this section introduces a state machine re-encoding strategy. The core purpose of this strategy is to ensure that any state machine meets the conditions for adding a functional non-combinatorial logic loop by re-encoding the state machine and re-planning the jump paths. This method will expand the scope of application of the FCLock encryption technology, enabling it to adapt to more diverse circuit design requirements, thereby improving the overall encryption effect and circuit security.

[0118] A state machine recoding method for driving a non-combinatorial logic circuit of the present invention comprises the following steps:

[0119] Step 1: Status classification;

[0120] Through the analysis of the above examples, a classification method is proposed to classify the encoding of the state machine based on whether the KEEP value depends on the previous state S' of the state machine. Assuming that the output signal of the circuit containing the non-combinatorial logic loop is represented by y, and the logic function of the circuit is represented by f, the encoding of the state machine can be divided into the following two categories:

[0121] (1) Sf (State free), free coding state, in this state, the ring value of the non-combinatorial logic ring will not affect the output port. In this case,

[0122] y=f(S)(3.8)

[0123] (2) Sk (State keep), keep state, in this state, the loop value of the non-combinatorial logic loop will affect the output port of the circuit. In this case,

[0124] y=f(S,S ′ )(3.9) Table 2 lists the different status classifications in the previous examples:

[0125] Table 2: Status classification in the example

[0126]

[0127] Step 2: State machine jump classification:

[0128] Furthermore, according to the classification of state machine encoding and the start and end state encoding of state jumps, state machine jumps can be subdivided into the following five types. Each type has its own specific requirements and constraints, and some jump types are not allowed:

[0129] (1) Internal jump: In this type of jump, the encoding of the start state and the end state remains unchanged. In this case, since the encoding of the state machine has not changed, the circuit input signal remains stable in the combinational logic circuit. Obviously, this internal jump is allowed in circuit design because it does not cause signal changes and can ensure the stability of the circuit.

[0130] (2) Sf to Sf jump: The starting state and the end state of this jump type are both Sf. Therefore, whether before or after the jump, the loop value of the non-combinatorial logic loop in the circuit will change instantly according to the current input state. Even if the jump from Sf to Sf involves an intermediate state, the latched loop value in the intermediate state will be reset by the end state to ensure that the output result of the circuit remains correct in the final state. Therefore, the jump path of this state machine is allowed, which can effectively maintain the logical consistency and correctness of the circuit.

[0131] (3) Jump from Sf to Sk: This type of jump causes the loop value in the non-combinatorial logic loop in the Sf state to be latched into the Sk state. To ensure that the loop value in the Sk state remains unique and deterministic, the jump from Sf to Sk must ensure that the jump entry is unique. Under this restriction, the jump from Sf to Sk is allowed because it guarantees the consistency and predictability of the loop value in the terminal state Sk, thereby ensuring the correct execution of the circuit logic.

[0132] (4) Sk to Sf jump: In this jump type, the end state is Sf, so the loop value of the end state will be directly driven by the current input signal, and the loop value latched inside it will be updated immediately when the state machine jumps to Sf. Therefore, in a circuit containing a non-combinatorial logic loop, this jump is not only allowed, but also the number of jumps is not limited.

[0133] (5) Sk to Sk jump: Since both the starting state and the end state are Sk, the function of this jump is to maintain the loop value in the non-combinatorial logic loop unchanged while allowing the circuit input signal to change. However, whether it is the starting state or the end state, the loop value of the non-combinatorial logic loop in this state depends on the previously latched loop value. Given the intermediate states that may be involved in the Sk to Sk jump, this may cause the loop value in the starting state and the end state to change, causing the loop value in the end state Sk to present an uncertain state "X". This result is inconsistent with the expected function of the jump. Therefore, in circuits containing non-combinatorial logic loops, this jump is not allowed. This restriction helps maintain the consistency and reliability of circuit logic and avoids circuit function errors caused by state uncertainty.

[0134] Table 3 shows the jump classification and related restrictions between different states in the example. Among them, in the jump category marked as "partially allowed 1", only one of the two possible jumps is allowed to be implemented; similarly, the jump category marked as "partially allowed 2" also only allows one of the jumps to exist.

[0135] Table 3 Classification and related restrictions of jumps between different states

[0136]

[0137]

[0138] For any circuit, as long as the coding classification and state jump of its state machine meet the aforementioned restrictions, the state machine can be used to drive a functional non-combinatorial logic loop. For example, if a circuit contains a 2-bit state machine, and the state machine coding and jump analysis confirms that its jump type meets the five types discussed previously and meets the corresponding restrictions, then the output of the state machine can be directly introduced into a functional non-combinatorial logic loop using the circuit described in Figure 2(a), thereby achieving effective encryption operations.

[0139] For a state machine with multiple bits, a splitting strategy can be adopted to treat some of its bits as an independent 2-bit state machine for processing. Afterwards, the encoding and jump of this 2-bit state machine are analyzed to see whether they meet the requirements previously proposed. The advantage of this is that it can still be based on the requirements without re-encoding the entire state machine. Figure 3 The process shown quickly determines whether the state machine in the circuit meets the requirements of FCLock encryption.

[0140] Step 3: State machine jump modification and re-encoding operation

[0141] Although in practice, the state machine encoding and jumps in the circuit may not fully meet the determination requirements of the above process, in addition, the number of 2-bit state machines obtained from this process may not meet the number of keys. Therefore, in order to improve the versatility of FCLock encryption technology and ensure that it can be implemented in most circuits, it is necessary to re-encode the state machine. This operation aims to adjust the state machine so that its state jumps meet the five jump requirements discussed previously.

[0142] Most of the requirements provide relatively relaxed conditions, but some also include some stricter restrictions, including:

[0143] (1) For a jump from Sf to Sk, only one jump entry is allowed for a state encoded as Sk.

[0144] (2) Jump from Sk to Sk. This jump is not allowed.

[0145] To ensure that the state jumps after re-encoding the state machine meet the above constraints, the jump structure of the state machine needs to be adjusted first. This includes ensuring that the state machine has multiple states with only one entry jump, and then marking these states as Sk. Next, re-encoding is performed according to the specific encoding requirements of Sk and Sf. Figure 4 The flowchart shown shows the key steps of the state machine recoding strategy in detail.

[0146] When modifying the state machine jump path, the first task is to ensure that the functionality of each state remains unchanged. Next, you can consider adjusting the jump path itself. Given the two constraints mentioned above, state copying is an effective strategy, which can generate a state copy with the same functionality as the original state. Then, the jump entry of the original state and its copy can be appropriately restricted. This method can effectively modify the state machine jump path without changing the basic function of the circuit, thereby optimizing the encryption strategy and functional implementation of the entire circuit.

[0147] Figure 5(a) and Figure 5(b) show the specific implementation method of this strategy. Figure 5(a) describes an original state machine, including state Si and other parts. State Si has three jump entries a, b, and c, and two jump exits d and e. If Si is considered as the driving part of a non-combinatorial logic ring (i.e., Sk state), but because Si has three entries, it does not meet the requirement that the Sk state has only one jump entry, so the jump entry of Si needs to be divided into three parts.

[0148] According to the state machine recoding strategy, Si is first copied to form three copies Si 0 、Si 1 With Si 2 These copies have the same exit points as the original Si state, that is, they all have two exits, d and e, and each inherits the entry points a, b and c of Si. In the new state machine design, these copies will replace the original Si state. For example, if Si in the original state machine works through path a, the corresponding path a in the new state machine will jump to state Si 0 .Si 0 、Si 1 With Si 2 The function of the circuit is consistent with the original Si. Through this state copy strategy, you can choose any Si 0 、Si 1 With Si 2 The two of them are taken as Sk, and then the state machine is re-encoded according to the specific encoding requirements of Sk to ensure that the newly encoded state machine can effectively drive the functional non-combinatorial logic ring.

[0149] Step 4: Process and summary

[0150] The key to this strategy is to first analyze the circuit containing non-combinatorial logic loops and accurately identify the type of each input signal. This step is crucial because FCLock encryption technology is not limited to the non-combinatorial logic loop circuits in the previous example. Other types of circuits containing functional non-combinatorial logic loops are also suitable for FCLock encryption. Since the state machine is the core of driving such circuits, a detailed analysis of each input signal can help divide the encoding of the state machine into two sets: {Sk} and {Sf}. This preliminary analysis provides the necessary data support and design basis for the subsequent modification of the state machine jump path.

[0151] Under the premise that the state machine will eventually be re-encoded, there is no need to deeply analyze whether the Sk and Sf in the existing state machine jump diagram meet the specific restriction rules at the current stage. Instead, we should focus on the symbolization of each state and the direct analysis of its jump path, which will ensure that the state machine structure can be adjusted and optimized more flexibly and effectively during the design process to meet the encryption requirements of FCLock encryption technology.

[0152] Continuing with the above strategy, for states with a number of jump entries greater than or equal to 2, it is an effective means to adopt a state copy method to maintain the invariance of the circuit function. By copying, a copy state with the same function as the original state can be generated. These copied copies will inherit all the jump exits of the original state, and the various entries of the original state are assigned to each copy to ensure that each copy has only one independent jump entry. In addition, due to the state copying, there will be no direct jump relationship between the newly generated state copies, which meets the requirement that there should be no jump relationship between Sk states. This method not only maintains the original function of the circuit, but also meets specific encryption requirements by simplifying the structure of the state machine.

[0153] After each state copy, the number of copies is divided by 2 and rounded to the integer, which represents the number of states that can drive the functional non-combinatorial logic ring circuit, and is also equal to the number of keys that can be inserted. Once the number of copied states reaches the required number of keys, the state copy operation stops. Subsequently, the modified state jump diagram is re-encoded based on the {Sk} and {Sf} sets obtained from the previous analysis. For multi-bit state machines, its encoding needs to consider splitting some of the bits, treating the bit subset as a small state machine, and starting the encoding operation from the small state machine. In summary, the state machine re-encoding strategy described in this section makes the FCLock encryption technology applicable to most circuits, thereby significantly improving its versatility. This strategy not only optimizes the encryption process, but also ensures the feasibility and effectiveness of the encryption solution in different circuit designs.

[0154] It is to be understood that the present invention is described by some embodiments, and it is known to those skilled in the art that various changes or equivalent substitutions may be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, under the teachings of the present invention, these features and embodiments may be modified to adapt to specific circumstances and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the scope of protection of the present invention.

Claims

1. A state machine recoding method for driving a non-combinatorial logic circuit, characterized in that: The steps include: Step 1: State classification; based on whether the KEEP value depends on the previous state of the state machine To classify the encoding of the state machine; Step 2: Classification of state machine jumps: According to the classification of state machine encoding and the start and end state encoding of state jumps, the state machine jumps are subdivided into five types; Step 3: state machine jump modification and re-encoding operation; adjust the state machine so that its state jumps meet the five types of jump requirements in step 2; Step 4: Process and summary.

2. The state machine recoding method for driving a non-combinatorial logic circuit according to claim 1, characterized in that: In step 1, it is assumed that the output signal of the circuit including the non-combinatorial logic loop is The logic function of the circuit is represented by Indicates that the encoding of the state machine is divided into the following two categories: (1) Sf (State free), free coding state. In this state, the ring value of the non-combinatorial logic ring will not affect the output port. In this case, ， (2) Sk (State keep), keep state, in this state, the ring value of the non-combinatorial logic loop will affect the output port of the circuit. In this case, 3. The state machine recoding method for driving a non-combinatorial logic circuit according to claim 1, characterized in that: The five types of jump types in step 2 are internal jump, Sf to Sf jump, Sf to Sk jump, Sk to Sf jump, Sk to Sk jump, Internal jump: In this jump type, the encoding of the start state and the end state remains unchanged; The Sf to Sf jump: the starting state and the end state of this jump type are both Sf; The Sf to Sk jump: This type of jump causes the ring value in the non-combinatorial logic ring in the Sf state to be latched to the Sk state; The Sk to Sf jump: In this jump type, the destination state is Sf.

4. The state machine recoding method for driving a non-combinatorial logic circuit according to claim 1, characterized in that: Each type of step 2 has its own specific requirements and constraints, where some jump types are not allowed: The internal jump is allowed in the circuit design; The Sf to Sf jump: This state machine jump path is allowed; The jump from Sf to Sk: The jump from Sf to Sk must ensure that the jump entry is unique, and this jump is allowed; The Sk to Sf jump: In a circuit containing a non-combinatorial logic loop, this jump is not only allowed, but also the number of jumps is not limited; The Sk to Sk jump: In a circuit containing a non-combinatorial logic loop, this jump is not allowed.

5. The state machine recoding method for driving a non-combinatorial logic circuit according to claim 1, characterized in that: The classification and related restrictions of jumps between different states in step 2 are as follows: Internal jump: the starting state is S0, the end state is S0, which is allowed; Jump from Sf to Sk: the starting state is S0, the end state is S1, and part of it is allowed to be 1; Jump from Sf to Sk: the starting state is S0, the end state is S2, and part of it is allowed to be 2; Sf to Sf jump: the starting state is S0, the end state is S3, which is allowed; Sk to Sf jump: the starting state is S1, the end state is S0, which is allowed; Sf to Sf jump: the starting state is S0, the end state is S3, which is allowed; Internal jump: The starting state is S1, the end state is S1, which is allowed; Sk to Sk jump: the starting state is S1, the end state is S2, which is not allowed; Sk to Sf jump: the starting state is S1, the end state is S3, which is allowed; Sk to Sf jump: the starting state is S2, the end state is S0, which is allowed; Sk to Sk jump: the starting state is S2, the end state is S1, which is not allowed; Internal jump: The starting state is S2, the end state is S2, which is allowed; Sk to Sf jump: the starting state is S2, the end state is S3, which is allowed; Sf to Sf jump: the starting state is S3, the end state is S0, which is allowed; Jump from Sf to Sk: the starting state is S3, the end state is S1, and part of it is allowed to be 1; Jump from Sf to Sk: the starting state is S3, the end state is S2, and part of it is allowed to be 2; Internal jump: The starting state is S3, and the end state is S3, which is allowed; Among them, in the jump category marked as "partially allowed 1", only one of the two possible jumps is allowed to be implemented; Likewise, a jump category marked as "Partially Allowed 2" only allows one type of jump to exist.

6. The state machine recoding method for driving a non-combinatorial logic circuit according to claim 5, characterized in that: In step 2, for any circuit, as long as the coding classification and state jump of its state machine meet the restriction conditions, the state machine can be used to drive the functional non-combinatorial logic loop; For a state machine with multiple bits, a splitting strategy is adopted to treat some of its bits as an independent 2-bit state machine for processing; thereafter, the encoding and jump of this 2-bit state machine are analyzed to see whether they meet the requirements previously proposed.

7. The state machine recoding method for driving a non-combinatorial logic circuit according to claim 5, characterized in that: Step 3 includes some stricter restrictions, including: For a jump from Sf to Sk, only one jump entry is allowed for a state encoded as Sk; The jump from Sk to Sk is not allowed; To ensure that the state jumps after the state machine is re-encoded meet the above constraints, the jump structure of the state machine needs to be adjusted first, which includes ensuring that the state machine has multiple states with only one entry jump, and then marking these states as Sk. Next, re-encoding is performed according to the specific encoding requirements of Sk and Sf; When modifying the jump path of a state machine, the first task is to ensure that the functionality of each state remains unchanged; then, adjust the jump path itself; given the two restrictions mentioned above, state copying is an effective strategy, which generates a state copy with the same functionality as the original state; then, appropriately restrict the jump entry of the original state and its copy.

8. The state machine recoding method for driving a non-combinatorial logic circuit according to claim 5, characterized in that: The specific implementation method of step 3 is: An original state machine includes state Si and other parts. State Si has three jump entries a, b, and c, and two jump exits d and e. If Si is considered as the driving part of a non-combinatorial logic ring, that is, the Sk state, but because Si has three entries, it does not meet the requirement that the Sk state has only one jump entry. Therefore, the jump entry of Si needs to be divided into three parts. According to the state machine re-encoding strategy, Si is first copied to form three copies Si0, Si1 and Si2. These copies are the same as the original Si state in terms of the exit entrance, that is, they all have two exits d and e, and each inherits the entrances a, b and c of Si. In the new state machine design, these copies will replace the original Si state. If Si in the original state machine functions through path a, the corresponding path a in the new state machine will jump to state Si0. The functions of Si0, Si1 and Si2 in the circuit are consistent with the original Si. Through this state copying strategy, any two of Si0, Si1 and Si2 can be selected as Sk, and then the state machine is re-encoded according to the specific encoding requirements of Sk to ensure that the newly encoded state machine can effectively drive the functional non-combinatorial logic loop.

9. The state machine recoding method for driving a non-combinatorial logic circuit according to claim 5, characterized in that: The step 4 comprises: The key to the state machine recoding strategy is to first analyze the circuit containing non-combinatorial logic loops and accurately identify the type of each input signal. Since the state machine is the core of driving such circuits, a detailed analysis of each input signal is performed; Under the premise that the state machine will be re-encoded eventually, at this stage, there is no need to deeply analyze whether Sk and Sf in the existing state machine jump diagram meet specific restriction rules. Instead, we focus on the symbolization of each state and the direct analysis of its jump path; For states with jump entries greater than or equal to 2, a state copy method is used to maintain the invariance of the circuit function. By copying, a copy state with the same function as the original state is generated. These copies will inherit all the jump exits of the original state, and each entry of the original state is assigned to each copy to ensure that each copy has only one independent jump entry. In addition, due to the state copying, there will be no direct jump relationship between the newly generated state copies, which meets the requirement that there should be no jump relationship between Sk states. After each state copy, the number of copies is divided by 2 and rounded to the integer, which represents the number of states that can drive the functional non-combinatorial logic ring circuit, and is also equal to the number of keys that can be inserted. Once the number of copied states reaches the required number of keys, the state copying operation will stop. Subsequently, the modified state jump diagram will be re-encoded based on the {Sk} and {Sf} sets obtained from the previous analysis. For multi-bit state machines, their encoding requires splitting some of the bits, treating the bit subset as a small state machine, and starting the encoding operation from the small state machine.

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