Simulation design method, device and equipment of PCB connector and storage medium

Abstract

The invention provides a simulation design method and device of a PCB connector, equipment and a storage medium, and relates to the technical field of circuits. The method comprises the following steps: acquiring a first impedance difference value at a first bonding pad corresponding to a first connector in a PCB design file, wherein the first impedance difference value is an impedance difference value between a maximum impedance value and a minimum impedance value corresponding to the first bonding pad; if the first impedance difference value meets the preset requirement, obtaining a first simulation adjustment value and a level identifier of a first reference PCB layer; according to the first impedance difference value, the first simulation adjustment value and the level identifier of the first reference PCB layer, design parameters corresponding to the second connectors in the PCB design file are determined, the second connectors and the first connectors are the same in crimping form and different in type, and the purpose that the second connectors and the first connectors can be connected in a crimping mode based on the simulation result of the first connectors is achieved. And the design parameters corresponding to the second connector can be quickly determined, so that the simulation efficiency can be improved and the design cost can be reduced.

Description

Technical Field

[0001] The present application relates to the field of circuit technology, and in particular to a simulation design method, device, equipment and storage medium for a PCB connector. Background Art

[0002] As signal transmission rates continue to increase, more consideration needs to be given to signal integrity issues during PCB design. Signal transmission structures, especially structures in discontinuous areas (such as differential equal-length windings, layer-changing vias, coupling capacitors, and high-speed connectors, etc.), have a significant impact on the impedance consistency of high-speed signals, causing signal integrity to deteriorate.

[0003] In the prior art, when performing simulation analysis on a connector on a PCB board, it is necessary to rely on a simulation model of the connector to perform simulation analysis iterations, and then determine more accurate PCB-related design parameters.

[0004] However, due to the wide variety of connectors on PCBs, if conventional simulation analysis iterations are performed on each type of connector and then related PCB designs are performed, it will take a huge amount of simulation time and computing resources, and the design cost will be high. Summary of the invention

[0005] The purpose of this application is to provide a simulation design method, device, equipment and storage medium for a PCB connector to address the deficiencies in the above-mentioned prior art, which can improve simulation efficiency and reduce design costs.

[0006] To achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

[0007] In a first aspect, the present invention provides a simulation design method for a PCB connector, the method comprising:

[0008] Obtain a first impedance difference value at a first pad corresponding to a first connector in a PCB design file, where the first impedance difference value is an impedance difference between a maximum impedance value and a minimum impedance value corresponding to the first pad;

[0009] If the first impedance difference meets the preset requirements, a first simulation adjustment value and a layer identifier of a first reference PCB layer are obtained, where the first reference PCB layer is a PCB layer where a first hollowed-out area corresponding to the first connector is located, and the first simulation adjustment value is used to characterize a target adjustment amplitude corresponding to the first hollowed-out area when the first impedance difference meets the preset requirements;

[0010] According to the first impedance difference, the first simulation adjustment value and the layer identifier of the first reference PCB layer, the design parameters corresponding to each second connector in the PCB design file are determined, wherein the second connector and the first connector have the same crimping form but different types.

[0011] In an optional implementation manner, obtaining a first impedance difference at a first pad corresponding to a first connector in a PCB design file includes:

[0012] According to the input signal line of the first connector, setting a first simulation input port of the first connector;

[0013] Adding a simulation model of the first connector on the first pad;

[0014] A first target simulation signal is input to the first simulation input port, and a first impedance difference corresponding to the first pad is obtained through a first simulation output port of the simulation model.

[0015] In an optional embodiment, the method further comprises:

[0016] If the first impedance difference does not meet the preset requirement, iteratively determine the layer identifier of the first reference PCB layer and the size parameters of the first hollowed-out area set in the first reference PCB layer, so that the first impedance difference meets the preset requirement;

[0017] Among them, the first hollowed-out area at least partially overlaps with the projection of the first solder pad in the first direction; the first reference PCB layer includes: at least one PCB layer other than the first PCB layer in the PCB stack corresponding to the PCB design file, and the first PCB layer is the PCB layer where the first solder pad is located.

[0018] In an optional implementation, the iterative determination of the layer identifier of the first reference PCB layer and the size parameter of the first hollowed-out area set in the first reference PCB layer includes:

[0019] Based on the first initial reference PCB layer and setting the first initial hollowed-out area, iteratively adjust the size parameters of the first initial reference PCB layer and / or the first initial hollowed-out area to determine the layer identifier of the first reference PCB layer and the size parameters of the first hollowed-out area.

[0020] In an optional implementation, the first initial hollowed-out area is set based on the first initial reference PCB layer, the size parameters of the first initial reference PCB layer and / or the first initial hollowed-out area are iteratively adjusted to determine the level identifier of the first reference PCB layer and the size parameters of the first hollowed-out area, including:

[0021] Based on the first initial reference PCB layer and setting a first initial hollowed-out area, iteratively adjusting size parameters of the first initial hollowed-out area, and determining whether the first impedance difference meets preset requirements;

[0022] If not, the size parameters of the first initial reference PCB layer and the first initial hollowed-out area are iteratively adjusted to determine the size parameters of the first reference PCB layer and the first hollowed-out area.

[0023] In an optional implementation, determining the design parameters corresponding to each second connector in the PCB design file according to the first impedance difference, the first simulation adjustment value, and the level identifier of the first reference PCB layer includes:

[0024] Determine, according to the layer identifier of the first reference PCB layer, the layer identifier of the second reference PCB layer corresponding to the second connector, the second reference PCB layer being the layer where the second hollowed-out area corresponding to the second connector is located, and the second hollowed-out area at least partially overlaps with a projection of the second pad corresponding to the second connector in the first direction;

[0025] According to the layer identifier of the second reference PCB layer, the first impedance difference and the first simulation adjustment value, design parameters corresponding to each second connector in the PCB design file are determined.

[0026] In an optional implementation, acquiring design parameters corresponding to each second connector in the PCB design file according to the layer identifier of the second reference PCB layer, the first impedance difference, and the first simulation adjustment value includes:

[0027] Iteratively acquiring a plurality of second impedance difference values ​​at a second pad corresponding to a second connector in the PCB design file based on a level identifier of the second reference PCB layer and a size parameter of the second initial hollowed-out area;

[0028] If it is determined that a target impedance difference between a second target impedance difference and the first impedance difference among the multiple second impedance differences meets a preset impedance difference threshold, a second simulation adjustment value corresponding to the second target impedance difference is obtained, where the second simulation adjustment value is used to characterize a current adjustment amplitude corresponding to the second hollowed-out area;

[0029] According to the second simulation adjustment value and the first simulation adjustment value, the size parameters of the second initial hollowed-out area are adjusted to obtain target design parameters of the second hollowed-out area corresponding to the second connector.

[0030] In an optional implementation, adjusting the size parameters of the second initial hollowed-out area according to the second simulation adjustment value and the first simulation adjustment value to obtain target design parameters of the second hollowed-out area corresponding to the second connector includes:

[0031] Calculating a simulation repair value corresponding to the second connector according to the first simulation adjustment value and the second simulation adjustment value;

[0032] If it is determined that the simulation repair value does not meet the preset repair requirement, adjusting the second simulation adjustment value to obtain the adjusted second simulation adjustment value;

[0033] According to the adjusted second simulation adjustment value, the size parameter of the second initial hollowed-out area is adjusted to obtain a target size of the second hollowed-out area corresponding to the second connector.

[0034] In an optional implementation manner, obtaining a second impedance difference at a second pad corresponding to a second connector in the PCB design file includes:

[0035] According to a preset setting rule, respectively determine a second simulation input port and a second simulation output port of the second connector, wherein the second simulation input port and the second simulation output port are symmetrical about the center position of the second pad, and the second simulation input port is set on the input signal line of the second connector, and the second simulation output port is set on the output signal line of the second connector;

[0036] A second target simulation signal is input to the second simulation input port, and a second impedance difference at a second pad corresponding to the second connector is acquired through the second simulation output port.

[0037] In an optional embodiment, the first connector is any one of the following: a horizontal surface mount connector, a vertical surface mount connector, and a clamping board surface mount connector.

[0038] In a second aspect, the present invention provides a simulation design device for a PCB connector, comprising:

[0039] A first acquisition module is used to acquire a first impedance difference at a first pad corresponding to a first connector in a PCB design file, where the first impedance difference is an impedance difference between a maximum impedance value and a minimum impedance value corresponding to the first pad;

[0040] a second acquisition module, configured to acquire a first simulation adjustment value and a layer identifier of a first reference PCB layer if the first impedance difference meets a preset requirement, the first reference PCB layer being a PCB layer where a first hollowed-out area corresponding to the first connector is located, and the first simulation adjustment value being used to characterize a target adjustment amplitude corresponding to the first hollowed-out area when the first impedance difference meets a preset requirement;

[0041] A determination module is used to determine the design parameters corresponding to each second connector in the PCB design file according to the first impedance difference, the first simulation adjustment value and the layer identifier of the first reference PCB layer, wherein the second connector has the same crimping form as the first connector but a different type.

[0042] In an optional implementation manner, the first acquisition module is specifically configured to set a first simulation input port of the first connector according to an input signal line of the first connector;

[0043] Adding a simulation model of the first connector on the first pad;

[0044] A first target simulation signal is input to the first simulation input port, and a first impedance difference corresponding to the first pad is obtained through a first simulation output port of the simulation model.

[0045] In an optional embodiment, the second acquisition module is further used to iteratively determine the layer identifier of the first reference PCB layer and the size parameters of the first hollowed-out area set in the first reference PCB layer if the first impedance difference does not meet the preset requirements, so that the first impedance difference meets the preset requirements;

[0046] Among them, the first hollowed-out area at least partially overlaps with the projection of the first solder pad in the first direction; the first reference PCB layer includes: at least one PCB layer other than the first PCB layer in the PCB stack corresponding to the PCB design file, and the first PCB layer is the PCB layer where the first solder pad is located.

[0047] In an optional embodiment, the second acquisition module is specifically used to iteratively adjust the size parameters of the first initial reference PCB layer and / or the first initial hollowed-out area based on the first initial reference PCB layer, and determine the layer identification of the first reference PCB layer and the size parameters of the first hollowed-out area.

[0048] In an optional embodiment, the second acquisition module is specifically used to iteratively adjust the size parameters of the first initial hollowing area based on the first initial reference PCB layer and to determine whether the first impedance difference meets the preset requirements;

[0049] If not, the size parameters of the first initial reference PCB layer and the first initial hollowed-out area are iteratively adjusted to determine the size parameters of the first reference PCB layer and the first hollowed-out area.

[0050] In an optional embodiment, the determination module is used to determine the layer identifier of the second reference PCB layer corresponding to the second connector according to the layer identifier of the first reference PCB layer, the second reference PCB layer is the layer where the second hollowed-out area corresponding to the second connector is located, and the second hollowed-out area and the projection of the second pad corresponding to the second connector in the first direction at least partially overlap;

[0051] According to the layer identifier of the second reference PCB layer, the first impedance difference and the first simulation adjustment value, design parameters corresponding to each second connector in the PCB design file are determined.

[0052] In an optional implementation, the determination module is specifically used to iteratively obtain multiple second impedance difference values ​​at the second pad corresponding to the second connector in the PCB design file based on the level identifier of the second reference PCB layer and the size parameter of the second initial hollowed-out area;

[0053] If it is determined that a target impedance difference between a second target impedance difference and the first impedance difference among the multiple second impedance differences meets a preset impedance difference threshold, a second simulation adjustment value corresponding to the second target impedance difference is obtained, where the second simulation adjustment value is used to characterize a current adjustment amplitude corresponding to the second hollowed-out area;

[0054] According to the second simulation adjustment value and the first simulation adjustment value, the size parameters of the second initial hollowed-out area are adjusted to obtain target design parameters of the second hollowed-out area corresponding to the second connector.

[0055] In an optional implementation manner, the determination module is specifically configured to calculate a simulation repair value corresponding to the second connector according to the first simulation adjustment value and the second simulation adjustment value;

[0056] If it is determined that the simulation repair value does not meet the preset repair requirement, adjusting the second simulation adjustment value to obtain the adjusted second simulation adjustment value;

[0057] According to the adjusted second simulation adjustment value, the size parameter of the second initial hollowed-out area is adjusted to obtain a target size of the second hollowed-out area corresponding to the second connector.

[0058] In an optional embodiment, the determination module is specifically used to determine the second simulation input port and the second simulation output port of the second connector respectively according to a preset setting rule, wherein the second simulation input port and the second simulation output port are symmetrical about the center position of the second pad, and the second simulation input port is set on the input signal line of the second connector, and the second simulation output port is set on the output signal line of the second connector;

[0059] A second target simulation signal is input to the second simulation input port, and a second impedance difference at a second pad corresponding to the second connector is acquired through the second simulation output port.

[0060] In an optional embodiment, the first connector is any one of the following: a horizontal surface mount connector, a vertical surface mount connector, and a clamping board surface mount connector.

[0061] In a third aspect, the present invention provides an electronic device, comprising: a processor, a storage medium and a bus, wherein the storage medium stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor communicates with the storage medium through the bus, and the processor executes the machine-readable instructions to perform the steps of the simulation design method of the PCB connector as described in any of the aforementioned embodiments.

[0062] In a fourth aspect, the present invention provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the simulation design method of a PCB connector as described in any of the aforementioned embodiments is executed.

[0063] The beneficial effects of this application are:

[0064] In the simulation design method, device, equipment and storage medium of the PCB connector provided in the embodiment of the present application, a first impedance difference at a first pad corresponding to a first connector in a PCB design file is obtained, where the first impedance difference is the impedance difference between a maximum impedance value and a minimum impedance value corresponding to the first pad; if the first impedance difference meets the preset requirements, a first simulation adjustment value and a hierarchical identifier of a first reference PCB layer are obtained, where the first reference PCB layer is a PCB layer where a first hollowed-out area corresponding to the first connector is located, and the first simulation adjustment value is used to characterize a target adjustment amplitude corresponding to the first hollowed-out area when the first impedance difference meets the preset requirements; according to the first impedance difference, the first simulation adjustment value and the hierarchical identifier of the first reference PCB layer, the design parameters corresponding to each second connector in the PCB design file are determined, where the second connector and the first connector have the same crimping form but different types, thereby realizing that the design parameters corresponding to the second connector can be quickly determined based on the simulation results of the first connector, thereby improving simulation efficiency and reducing design costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0066] Figure 1 A schematic diagram of a flow chart of a simulation design method for a PCB connector provided in an embodiment of the present application;

[0067] Figure 2 A schematic diagram of a flow chart of another PCB connector simulation design method provided in an embodiment of the present application;

[0068] Figure 3 A schematic diagram of a flow chart of another PCB connector simulation design method provided in an embodiment of the present application;

[0069] Figure 4 A schematic diagram of a method for adjusting a hollowed-out area provided in an embodiment of the present application;

[0070] Figure 5 A schematic diagram of a flow chart of another PCB connector simulation design method provided in an embodiment of the present application;

[0071] Figure 6 A schematic diagram of a flow chart of another PCB connector simulation design method provided in an embodiment of the present application;

[0072] Figure 7A schematic diagram of a flow chart of another PCB connector simulation design method provided in an embodiment of the present application;

[0073] Figure 8 A schematic diagram of a flow chart of another PCB connector simulation design method provided in an embodiment of the present application;

[0074] Fig. 9 A schematic diagram of a second solder pad provided in an embodiment of the present application;

[0075] Fig.10 A schematic diagram of functional modules of a PCB connector simulation design device provided in an embodiment of the present application;

[0076] Fig.11 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0077] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0078] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0079] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0080] In the prior art, when simulating and analyzing the connector on the PCB, it is necessary to rely on the simulation model of the connector to perform simulation analysis iterations, and then determine more accurate PCB design parameters. However, due to the wide variety of connectors on the PCB, if conventional simulation analysis iterations are performed on each type of connector and then the PCB design is performed, it will take a huge amount of simulation time and computing resources, and the design cost is high.

[0081] In view of this, an embodiment of the present application provides a simulation design method for a PCB connector. By applying this method, the design parameters of connectors with the same crimping form but different types on the PCB board can be effectively controlled to ensure the reliability of high-speed signal design.

[0082] Figure 1 A schematic diagram of a flow chart of a simulation design method for a PCB connector provided in an embodiment of the present application. The execution subject of the method can be an electronic device such as a computer, a server, a processor, etc. Figure 1 As shown, the method includes:

[0083] Step 101: Obtain a first impedance difference at a first pad corresponding to a first connector in a PCB design file, where the first impedance difference is an impedance difference between a maximum impedance value and a minimum impedance value corresponding to the first pad.

[0084] Among them, the PCB design file is also the PCB file that needs to be optimized for design. The PCB design file may include various types of electronic component symbols, connection lines, network symbols, power and ground symbols, pads, etc. that represent layout signals, which are not limited here. Optionally, in some embodiments, it may include pads corresponding to multiple target connectors of the same crimping form but different types.

[0085] Among them, the first pad corresponding to the first connector, that is, the pad for placing the first connector, can be used to transmit differential signals or single-ended signals, and correspondingly, the first pad can be a first differential pad or a first single-ended pad, which is not limited here. Optionally, the first pad corresponding to the first connector can be a pad corresponding to any connector among multiple target connectors, which is not limited here.

[0086] For the first pad, a first impedance difference at the first pad may be further acquired.

[0087] In some embodiments, when obtaining the first impedance difference, impedance simulation can be performed on the first pad to obtain the maximum impedance value and the minimum impedance value in the simulation results, and the impedance difference between the maximum impedance value and the minimum impedance value is calculated as the first impedance difference.

[0088] Among them, it should be noted that the first impedance difference at the first pad can represent the magnitude of the impedance fluctuation at the first pad. It can be understood that, if the first impedance difference is larger, the impedance fluctuation is larger, and the signal stability is poor and the signal quality is poor when the signal is transmitted through the first connector; the smaller the first impedance difference is, the smaller the impedance fluctuation is, and the signal is more stable when the signal is transmitted through the first connector, which can avoid the eye closure caused by impedance discontinuity and the signal quality is better.

[0089] Step 102: If the first impedance difference meets the preset requirement, obtain a first simulation adjustment value and a layer identifier of a first reference PCB layer.

[0090] Among them, the first reference PCB layer is the PCB layer where the first hollowed-out area corresponding to the first connector is located, and the first simulation adjustment value is used to characterize the target adjustment amplitude corresponding to the first hollowed-out area when the first impedance difference meets the preset requirements.

[0091] For the first solder pad, it should be noted that if the first hollow area is not set therefor, since the size of the first solder pad is wider than the routing in the PCB, it exhibits more capacitive effects, which often leads to the first impedance difference not meeting the preset requirements. Therefore, the capacitive effect of the first solder pad can be reduced by setting the first hollow area, and the inductive effect can be increased to achieve impedance compensation at the first solder pad, so that the first impedance difference meets the preset requirements, and then when the signal is transmitted through the first connector, the integrity of the transmitted signal can be guaranteed.

[0092] Optionally, the preset requirement may correspond to a preset impedance difference. If the first impedance difference is greater than or equal to the preset impedance difference, it may be considered that the first impedance difference does not meet the preset requirement. If the first impedance difference is less than the preset impedance difference, it may be considered that the impedance fluctuation at the first pad is small, the impedance design is better, and the first impedance difference meets the preset requirement. In this case, the first simulation adjustment value and the hierarchical identification of the first reference PCB layer may be obtained.

[0093] Among them, the first reference layer, that is, the PCB layer where the first hollowed-out area corresponding to the first connector is located when the first impedance difference meets the preset requirements, optionally, the first reference layer can include one layer or multiple layers, which is not limited here. Correspondingly, the layer identifier of the first reference PCB layer can include one or more, which is not limited here.

[0094] The first simulation adjustment value, that is, the target adjustment amplitude corresponding to the first hollowed-out area when the first impedance difference meets the preset requirements. Optionally, it can be determined by the following process. For example, during the simulation process, if the first impedance difference does not meet the preset requirements, the initial hollowed-out area can be adjusted according to the initial simulation adjustment value and the first impedance difference corresponding to the adjustment can be calculated. If the first impedance difference still does not meet the preset requirements at this time, the initial simulation adjustment value can be fine-tuned, and the fine-tuned simulation adjustment value can be used to adjust the current hollowed-out area until the first impedance difference meets the preset requirements. The simulation adjustment value at this time is recorded as the first simulation adjustment value.

[0095] It should be noted that, whether the first impedance difference meets the preset requirements can also be determined based on whether the first impedance difference is the minimum impedance difference corresponding to the preset number of iterations. If it is the minimum impedance difference corresponding to the preset number of iterations, it is determined that the first impedance difference meets the preset requirements, otherwise, it can be considered that it does not meet the preset requirements. The setting method of the preset requirements is not limited here, and can be flexibly set according to the actual application scenario.

[0096] Step 103: Determine design parameters corresponding to each second connector in the PCB design file according to the first impedance difference, the first simulation adjustment value, and the level identifier of the first reference PCB layer.

[0097] The second connector has the same crimping form as the first connector but a different type. For example, the first connector and the second connector may both be surface mount type, the first connector may be horizontal type, and the second connector may be vertical type or clamp type.

[0098] Of course, it should be noted that the crimping form of the second connector and the first connector is not limited to this, and the types of connectors are not limited to the above examples, and can be flexibly selected according to the actual application scenario.

[0099] Optionally, the selection of the first connector may be determined based on a connector simulation model or based on a poor wiring principle. For example, if the current simulation software includes a horizontal type connector simulation model, any horizontal type connector may be selected as the first connector.

[0100] In some embodiments, the bad routing principle may include but is not limited to: the spacing of the routing lines at the connector on the PCB is close and the crosstalk is large; due to the limitation of stacking, the spacing between the second and third layers in the stacking and the surface layer (i.e., the first layer) is close or far; the hollow area corresponding to the connector is affected by other planes (such as adjacent power or ground planes), resulting in poor signal quality of the connector; the impedance at the pad corresponding to the connector deviates greatly from the target impedance. According to the setting of the bad routing principle, the first connector can be selected and determined from the PCB design file.

[0101] It can be understood that since the second connector has the same crimping form and the same specific attribute parameters as the first connector, after obtaining the first simulation adjustment value corresponding to the first connector and the hierarchical identification of the first reference PCB layer, the design parameters corresponding to each second connector in the PCB design file can be determined accordingly, wherein the design parameters corresponding to the second connector may include the PCB hierarchical identification of the second hollowed-out area corresponding to the second connector, the size parameters of the second hollowed-out area, the stacking structure of the PCB, etc., which are not limited here.

[0102] It can be seen that compared with the conventional method of performing conventional simulation analysis iterations on the first connector and the second connector respectively in the prior art, the present application realizes that the design parameters corresponding to the second connector can be quickly determined based on the simulation results of the first connector, thereby improving simulation efficiency and reducing design costs.

[0103] In summary, an embodiment of the present application provides a simulation design method for a PCB connector, the method comprising: obtaining a first impedance difference at a first solder pad corresponding to a first connector in a PCB design file, the first impedance difference being the impedance difference between a maximum impedance value and a minimum impedance value corresponding to the first solder pad; if the first impedance difference meets a preset requirement, obtaining a first simulation adjustment value and a hierarchical identifier of a first reference PCB layer, the first reference PCB layer being the PCB layer where a first hollowed-out area corresponding to the first connector is located, the first simulation adjustment value being used to characterize a target adjustment amplitude corresponding to the first hollowed-out area when the first impedance difference meets the preset requirement; determining design parameters corresponding to each second connector in the PCB design file according to the first impedance difference, the first simulation adjustment value and the hierarchical identifier of the first reference PCB layer, wherein the second connector and the first connector have the same crimping form but different types, thereby realizing that the design parameters corresponding to the second connector can be quickly determined based on the simulation result of the first connector, thereby improving simulation efficiency and reducing design costs.

[0104] Figure 2 A schematic diagram of a flow chart of another PCB connector simulation design method provided in an embodiment of the present application. Figure 2 As shown, the above-mentioned obtaining of the first impedance difference at the first pad corresponding to the first connector in the PCB design file includes:

[0105] Step 201: According to the input signal line of the first connector, a first simulation input port of the first connector is set.

[0106] Step 202: Add a simulation model of the first connector on the first pad.

[0107] Step 203: input a first target simulation signal to the first simulation input port, and obtain a first impedance difference corresponding to the first pad through the first simulation output port of the simulation model.

[0108] Optionally, the first connector may be any of a variety of types of connectors.

[0109] In some embodiments, the above method of the present application can be implemented by PCB simulation software, such as High Frequency Structure Simulator (HFSS), but not limited thereto.

[0110] Among them, the PCB simulation software may include a simulation model of the first connector. During the simulation process, the simulation model of the first connector can be added to the first pad; the first simulation input port is set according to the input signal line of the first connector, and the first target simulation signal is input to the first simulation input port. The first impedance difference corresponding to the first pad is determined by simulating the first simulation output port of the simulation model.

[0111] Optionally, the first impedance difference corresponding to the first pad can be determined by a first impedance curve simulated and outputted by a first simulation output port. In some embodiments, the first impedance curve can be determined by referring to the following steps: setting the center frequency point of the simulation and the frequency range of the simulation in the PCB simulation software; performing frequency domain simulation based on the center frequency point and the frequency range of the simulation; performing inverse Fourier transform on the frequency domain result to obtain the time domain result; performing time domain reflectometry (TDR) simulation using a step signal with a preset rise time (such as 15ps) to obtain the first impedance curve.

[0112] In addition, it should be noted that the present application does not limit the position of the first simulation input port on the input signal line, which can be flexibly selected according to the actual application scenario. For example, it can be set in combination with the complexity of the simulation algorithm.

[0113] Optionally, the above method further includes:

[0114] If the first impedance difference does not meet the preset requirements, the layer identifier of the first reference PCB layer and the size parameters of the first hollowed-out area set in the first reference PCB layer are iteratively determined to make the first impedance difference meet the preset requirements.

[0115] Among them, the first hollowed-out area and the projection of the first solder pad in the first direction at least partially overlap; the first reference PCB layer includes: at least one PCB layer other than the first PCB layer in the PCB stack corresponding to the PCB design file, and the first PCB layer is the PCB layer where the first solder pad is located.

[0116] Optionally, the first direction may be a horizontal projection direction, that is, the first hollowed-out area and the first pad at least partially overlap in horizontal projection. In some embodiments, considering that the spacing between the connector pads is small, a rectangle with the same size works best. Optionally, the first hollowed-out area may be set to a rectangle, but is not limited thereto. For example, it may be set to a circle, a pentagon, etc.

[0117] Among them, the PCB layer where the first solder pad is located is referred to as the first PCB layer. Optionally, the first reference PCB layer may include one or more other PCB layers. It can be understood that, in combination with the first hollowed-out area, the first reference PCB layer is also the PCB layer where the first hollowed-out area is located.

[0118] Based on the above description, it can be understood that, of course, there may be a situation where the first impedance difference does not meet the preset requirements. In this case, the layer identification of the first reference PCB layer and the size parameters of the first hollowed-out area can be iteratively determined until the first impedance difference meets the preset requirements.

[0119] Optionally, when performing iterative determination, the first impedance difference at the first pad may be determined by simulation by adjusting the layer identifier of the first reference PCB layer and / or the size parameters of the first hollowed-out area.

[0120] In an optional implementation manner, the above-mentioned iterative determination of the layer identifier of the first reference PCB layer and the size parameter of the first hollowed-out area set in the first reference PCB layer includes:

[0121] Based on the first initial reference PCB layer and setting the first initial hollowed-out area, iteratively adjust the size parameters of the first initial reference PCB layer and / or the first initial hollowed-out area to determine the layer identifier of the first reference PCB layer and the size parameters of the first hollowed-out area.

[0122] Among them, the first initial reference PCB layer can be any PCB layer except the first PCB layer, and the size parameter of the first initial hollowed-out area can be a preset size parameter. Optionally, the preset size parameter can be determined according to an empirical value, or can be determined according to the circumscribed rectangle corresponding to the first pad. It is not limited here and can be flexibly set according to the actual application scenario.

[0123] Optionally, when performing iterative adjustment, different combinations can be achieved by changing the size parameters of the first initial reference PCB layer and / or the first initial hollowed-out area, and the first impedance difference corresponding to each combination can be determined by simulation until the first impedance difference meets preset requirements.

[0124] Figure 3 A schematic diagram of a flow chart of another PCB connector simulation design method provided in an embodiment of the present application. Figure 3 As shown, the above-mentioned method of setting the first initial hollowed-out area based on the first initial reference PCB layer, iteratively adjusting the size parameters of the first initial reference PCB layer and / or the first initial hollowed-out area, and determining the layer identifier of the first reference PCB layer and the size parameters of the first hollowed-out area includes:

[0125] Step 301: Based on a first initial reference PCB layer, a first initial hollowed-out area is set, and size parameters of the first initial hollowed-out area are iteratively adjusted to determine whether a first impedance difference meets a preset requirement.

[0126] Step 302: If not, iteratively adjust the size parameters of the first initial reference PCB layer and the first initial hollowed-out area to determine the size parameters of the first reference PCB layer and the first hollowed-out area.

[0127] Optionally, when performing iterative adjustments, the size parameters of the first initial hollowed-out area can be adjusted multiple times based on the first initial reference PCB layer, and the first impedance difference at the first pad can be obtained by simulation to determine whether the first impedance difference meets preset requirements; if so, the current simulation process can be stopped, and the first simulation adjustment value and the hierarchical identifier of the first reference PCB layer can be output.

[0128] Among them, if the first impedance difference does not meet the preset requirements, the size parameters of the first initial reference PCB layer and the first initial hollowed-out area can be iteratively adjusted to obtain multiple combinations, and the first impedance difference at the first pad in each combination is simulated until the first impedance difference meets the preset requirements. For example, if it is limited by the PCB stacking structure in the PCB design file, when the reference PCB layer adjacent to the first PCB layer (which can be a dielectric layer, a metal layer, a non-metal layer, etc.) is close to the first pad corresponding to the first connector, it is further possible to increase the number of hollowed-out signal layers for reasonable impedance compensation, that is, increase the number of PCB layers corresponding to the first initial reference PCB layer for reasonable impedance compensation. It should be noted that when making specific adjustments, the stacking structure of the PCB, that is, the arrangement order of each PCB layer, can also be adjusted according to the actual application scenario.

[0129] It should be noted that when iteratively adjusting the size parameters of the first initial hollow-out area, the adjustment can be made based on a first initial simulation adjustment value. For example, the first initial simulation adjustment value is X1, and the first initial hollow-out area is a rectangular area. Optionally, during the first adjustment, the first initial simulation adjustment value X1 can be used to adjust the size parameters (length and / or width) of the first initial hollow-out area. If it is determined after the adjustment that the first impedance difference still does not meet the preset requirements, the first initial simulation adjustment value X1 can be adjusted to X2, and the second initial simulation adjustment value X2 can be used to continue adjusting the size parameters of the first initial hollow-out area, and the process is repeated until the first impedance difference meets the preset requirements.

[0130] Figure 4 A schematic diagram of an adjustment method for a hollowed-out area provided in an embodiment of the present application. Optionally, taking the first initial simulation adjustment value X1 as an example, when the first initial simulation adjustment value X1 is used to adjust the size parameters (length and / or width) of the first initial hollowed-out area, the first initial simulation adjustment value X1 can be used to synchronously adjust the length and width of the first initial hollowed-out area, that is, increase or decrease the same size.

[0131] Alternatively, if Figure 4 (a) is a top view of a PCB board, wherein, in order to show the relationship between the pad and the hollow area, the first PCB layer where the first pad 10 is located and the PCB layer where the first initial hollow area S1 is located are not shown. Optionally, when making adjustments, the length and width of the first initial hollow area S1 can be enlarged respectively using the first initial simulation adjustment value X1, and the following is obtained: Figure 4 (b) shows the adjusted first initial hollowed-out area S2.

[0132] Of course, it should be noted that, according to the actual application scenario, the length parameter of the first initial hollowed-out area may be adjusted, or the width parameter of the first initial hollowed-out area may be adjusted.

[0133] Of course, during the adjustment process, the present application does not limit the size relationship between two adjacent initial simulation adjustment values. Taking the first initial simulation adjustment value X1 and the second initial simulation adjustment value X2 as an example, the first initial simulation adjustment value may be greater than the second initial simulation adjustment value, or, may be less than or equal to the second initial simulation adjustment value, which is not limited here.

[0134] Figure 5 A schematic diagram of a flow chart of another PCB connector simulation design method provided in an embodiment of the present application. Figure 5 As shown, the above-mentioned determination of the design parameters corresponding to each second connector in the PCB design file according to the first impedance difference, the first simulation adjustment value and the level identifier of the first reference PCB layer includes:

[0135] Step 401: Determine the layer identifier of the second reference PCB layer corresponding to the second connector according to the layer identifier of the first reference PCB layer.

[0136] The second reference PCB layer is a layer where the second hollowed-out area corresponding to the second connector is located, and the projection of the second hollowed-out area and the second pad corresponding to the second connector in the first direction at least partially overlaps.

[0137] Optionally, the first direction may be a horizontal projection direction, and the second connector may correspond to the second pad, that is, the second hollow area and the second pad at least partially overlap in horizontal projection. Optionally, the first hollow area may be a rectangle, but is not limited thereto.

[0138] The second pad corresponding to the second connector is the pad used to place the second connector, and the second connector can be used to transmit differential signals.

[0139] In some embodiments, considering that the PCB design file where the second connector is located is the same PCB design file as the PCB design file where the first connector is located, and the second connector has the same crimping form as the first connector, optionally, the level identifier of the second reference PCB layer corresponding to the second connector can be set to be the same as the level identifier of the first reference PCB layer. Compared with the prior art, the further simulation process of the second reference PCB layer can be omitted, thereby improving the simulation efficiency.

[0140] Step 402: Determine design parameters corresponding to each second connector in the PCB design file according to the layer identifier of the second reference PCB layer, the first impedance difference, and the first simulation adjustment value.

[0141] Based on the above description, after determining the hierarchical identification of the second reference PCB layer, it can be based on this, combined with the first impedance difference and the first simulation adjustment value, to simulate so that the relationship between the second impedance difference and the first impedance difference at the second pad corresponding to the second connector meets the preset conditions, and then determine the design parameters corresponding to each second connector in the PCB design file.

[0142] Of course, it should be noted that the first pad may also be a first single-ended pad for transmitting a single-ended signal, and correspondingly, the second pad may also be a second single-ended pad for transmitting a single-ended signal, which is not limited here.

[0143] Figure 6 A schematic diagram of a flow chart of another PCB connector simulation design method provided in an embodiment of the present application. Figure 6 As shown, the above-mentioned obtaining the design parameters corresponding to each second connector in the PCB design file according to the layer identification of the second reference PCB layer, the first impedance difference and the first simulation adjustment value includes:

[0144] Step 501: based on the level identifier of the second reference PCB layer and the size parameters of the second initial hollowed-out area, iteratively obtain a plurality of second impedance difference values ​​at a second pad corresponding to a second connector in a PCB design file.

[0145] Optionally, the size parameters of the second initial hollowed-out area can be determined based on empirical values, or determined based on the circumscribed rectangle corresponding to the second pad, or set based on the size parameters of the first initial hollowed-out area mentioned above. No limitation is made here and it can be flexibly set according to the actual application scenario.

[0146] Among them, after determining the hierarchical identification of the second reference PCB layer, a corresponding second initial hollowed-out area can be set in the second reference PCB layer according to the size parameters of the second initial hollowed-out area. Based on this design method, iterative simulation is performed to obtain multiple second impedance differences at the second pad corresponding to the second connector.

[0147] It should be noted that the second initial hollowing area may correspond to a first initial simulation adjustment value, and during the iterative simulation process, the size parameters of the second initial hollowing area may be adjusted based on the first initial simulation adjustment value. Optionally, each time the adjustment is made, the first initial simulation adjustment value may be adjusted first, and then the size parameters of the second initial hollowing area may be adjusted using the adjusted first initial simulation adjustment value.

[0148] Step 502: If it is determined that a target impedance difference between a second target impedance difference and the first impedance difference among the plurality of second impedance differences meets a preset impedance difference threshold, a second simulation adjustment value corresponding to the second target impedance difference is obtained.

[0149] The second target impedance difference may be an impedance difference among the plurality of second impedance differences whose target impedance difference with the first impedance difference meets a preset impedance difference threshold.

[0150] If there is a second target impedance difference among the multiple second impedance differences, a second simulation adjustment value corresponding to the second target impedance difference can be obtained, and the second simulation adjustment value is also the current adjustment amplitude corresponding to the second hollowed-out area.

[0151] Optionally, for different second impedance difference values, the corresponding second simulation adjustment values ​​may be different.

[0152] It should be noted that, in some embodiments, the second simulation adjustment value corresponding to the second target impedance difference can also be obtained according to the first impedance curve corresponding to the first pad and the second impedance curve corresponding to the second pad. Specifically, when obtaining, the second simulation adjustment value corresponding to the second pad can be obtained when the second impedance curve approximately coincides with the first impedance curve.

[0153] Step 503: Adjust the size parameters of the second initial hollowed-out area according to the second simulation adjustment value and the first simulation adjustment value, and obtain target design parameters of the second hollowed-out area corresponding to the second connector.

[0154] Optionally, after obtaining the second simulation adjustment value, it can be determined whether the size parameters of the current second initial hollow-out area are reasonable based on the relationship between the second simulation adjustment value and the first simulation adjustment value. If unreasonable, the size parameters of the second initial hollow-out area can be further adjusted, and the process can be repeated until it is determined that the size parameters of the second initial hollow-out area are reasonably designed. At this time, the size parameters of the second initial hollow-out area can be used as the target design parameters of the second hollow-out area corresponding to the second connector, thereby obtaining the target design parameters of the second hollow-out area.

[0155] It can be seen that compared with the method of using conventional simulation methods in the prior art to iterate the simulation analysis of the second connector, the present application realizes that the design parameters corresponding to the second connector can be quickly determined based on the simulation results of the first connector, thereby improving the simulation efficiency of the second connector and reducing the design cost.

[0156] Figure 7 A schematic diagram of a flow chart of another PCB connector simulation design method provided in an embodiment of the present application. Figure 7 As shown, the size parameters of the second initial hollowing area are adjusted according to the second simulation adjustment value and the first simulation adjustment value to obtain the target design parameters of the second hollowing area corresponding to the second connector, including:

[0157] Step 601: Calculate a simulation repair value corresponding to a second connector according to a first simulation adjustment value and a second simulation adjustment value.

[0158] The calculation of the simulation repair value corresponding to the second connector can be referred to the formula: Among them, W represents the first simulation adjustment value, K represents the second simulation adjustment value, and U represents the simulation repair value corresponding to the second connector.

[0159] Step 602: If it is determined that the simulation repair value does not meet the preset repair requirement, the second simulation adjustment value is adjusted to obtain the adjusted second simulation adjustment value.

[0160] Among them, if the simulation repair value U corresponding to the second connector is less than or equal to 0, it is determined that the simulation repair value meets the preset repair requirements. Referring to the above process, at this time, the size parameters of the second initial hollowed-out area can be used as the target design parameters of the second hollowed-out area corresponding to the second connector; if the simulation repair value U corresponding to the second connector is greater than 0, that is, the simulation repair value does not meet the preset repair requirements, at this time, the second simulation adjustment value can be adjusted to obtain the adjusted second simulation adjustment value, so that the simulation repair of the second connector calculated based on the first simulation adjustment value and the adjusted second simulation adjustment value meets the preset repair requirements.

[0161] It should be noted that when it is determined that the simulation repair value does not meet the preset repair requirements, the present application does not limit the number of times the second simulation adjustment value is adjusted, and it can be adjusted once or multiple times according to the actual application scenario.

[0162] Step 603: According to the adjusted second simulation adjustment value, the size parameter of the second initial hollowed-out area is adjusted to obtain a target size of the second hollowed-out area corresponding to the second connector.

[0163] Based on the above description, if the second simulation adjustment value is adjusted, the size parameters of the second initial hollow-out area can also be fine-tuned according to the adjusted second simulation adjustment value. For example, the size parameters of the current second initial hollow-out area can be reduced according to the adjusted second simulation adjustment value, and the reduced size parameters of the second initial hollow-out area can be used as the target size parameters of the second hollow-out area corresponding to the second connector, so as to obtain more accurate design parameters of the second hollow-out area.

[0164] In combination with the above description, it can be understood that after obtaining the target size parameters of the second hollowed-out area corresponding to the second connector and the hierarchical identification of the second reference PCB layer corresponding to the second connector, the PCB design file can be accurately designed or optimized based on this to ensure the quality of the signals transmitted by the first connector and the second connector. For example, when it is used to transmit high-speed signals, it can provide effective guarantee for the reliable design of high-speed PCBs.

[0165] Figure 8 A schematic flow chart of another PCB connector simulation design method provided in an embodiment of the present application. Fig. 9 A schematic diagram of a second solder pad provided in an embodiment of the present application.

[0166] Alternatively, if Figure 8 As shown, the above-mentioned obtaining the second impedance difference at the second pad corresponding to the second connector in the PCB design file includes:

[0167] Step 701: Determine a second simulation input port and a second simulation output port of a second connector respectively according to a preset setting rule.

[0168] The second simulation input port and the second simulation output port are symmetrical about the center position of the second pad, and the second simulation input port is arranged on the input signal line of the second connector, and the second simulation output port is arranged on the output signal line of the second connector.

[0169] Step 702: input a second target simulation signal to the second simulation input port, and obtain a second impedance difference at a second pad corresponding to the second connector through the second simulation output port.

[0170] In some embodiments, when simulating the second connector, considering that the simulation model of the second connector may not exist in the simulation software, optionally, as Fig. 9 As shown, the second simulation input port A and the second simulation output port B can be set symmetrically about the center position O of the second pad corresponding to the second connector, thereby simulating the simulation model of the second connector and improving the applicability of the method of the present application.

[0171] The second simulation input port can be set on the input signal line of the second connector, and the second simulation output port can be set on the output signal line of the second connector. During the simulation process, the second target simulation signal can be input to the second simulation input port, and the second impedance difference can be obtained by simulation through the second simulation output port. Optionally, the second target simulation signal can be the same as or different from the first target simulation signal, which is not limited here.

[0172] Optionally, the second impedance difference may be obtained through a second impedance curve. The acquisition of the second impedance curve may refer to the above-mentioned first impedance curve, which will not be described in detail herein.

[0173] In an optional embodiment, the first connector is any one of the following: a horizontal surface mount connector, a vertical surface mount connector, and a clamping board surface mount connector.

[0174] The second connector is of a different type from the first connector.

[0175] Optionally, the first connector can be a horizontal surface mount connector, and the second connector can be a vertical surface mount connector or a plywood surface mount connector; alternatively, the first connector can be a vertical surface mount connector, and the second connector can be a vertical horizontal connector or a plywood surface mount connector; alternatively, the first connector can be a plywood surface mount connector, and the second connector can be a vertical horizontal connector or a horizontal surface mount connector. There is no limitation here, and it can be flexibly selected according to the actual application scenario.

[0176] Fig.10 This is a functional module diagram of a PCB connector simulation design device provided in an embodiment of the present application, wherein the basic principle and technical effects of the device are the same as those of the corresponding method embodiment described above. For the sake of brief description, the parts not mentioned in this embodiment can be referred to the corresponding contents in the method embodiment. Fig.10 As shown, the simulation design device 100 includes:

[0177] A first acquisition module 110 is used to acquire a first impedance difference at a first pad corresponding to a first connector in a PCB design file, where the first impedance difference is an impedance difference between a maximum impedance value and a minimum impedance value corresponding to the first pad;

[0178] A second acquisition module 120 is used to acquire a first simulation adjustment value and a layer identifier of a first reference PCB layer if the first impedance difference meets the preset requirements, the first reference PCB layer being the PCB layer where the first hollowed-out area corresponding to the first connector is located, and the first simulation adjustment value is used to characterize a target adjustment amplitude corresponding to the first hollowed-out area when the first impedance difference meets the preset requirements;

[0179] The determination module 130 is used to determine the design parameters corresponding to each second connector in the PCB design file according to the first impedance difference, the first simulation adjustment value and the layer identifier of the first reference PCB layer, wherein the second connector has the same crimping form as the first connector but a different type.

[0180] In an optional implementation manner, the first acquisition module 110 is specifically configured to set a first simulation input port of the first connector according to an input signal line of the first connector;

[0181] Adding a simulation model of the first connector on the first pad;

[0182] A first target simulation signal is input to the first simulation input port, and a first impedance difference corresponding to the first pad is obtained through a first simulation output port of the simulation model.

[0183] In an optional embodiment, the second acquisition module 120 is further used to iteratively determine the layer identifier of the first reference PCB layer and the size parameters of the first hollowed-out area set in the first reference PCB layer if the first impedance difference does not meet the preset requirements, so that the first impedance difference meets the preset requirements;

[0184] Among them, the first hollowed-out area at least partially overlaps with the projection of the first solder pad in the first direction; the first reference PCB layer includes: at least one PCB layer other than the first PCB layer in the PCB stack corresponding to the PCB design file, and the first PCB layer is the PCB layer where the first solder pad is located.

[0185] In an optional embodiment, the second acquisition module 120 is specifically used to iteratively adjust the size parameters of the first initial reference PCB layer and / or the first initial hollowed-out area based on the first initial reference PCB layer, and determine the layer identification of the first reference PCB layer and the size parameters of the first hollowed-out area.

[0186] In an optional embodiment, the second acquisition module 120 is specifically used to iteratively adjust the size parameters of the first initial hollowing area based on the first initial reference PCB layer and set the first initial hollowing area to determine whether the first impedance difference meets the preset requirements;

[0187] If not, the size parameters of the first initial reference PCB layer and the first initial hollowed-out area are iteratively adjusted to determine the size parameters of the first reference PCB layer and the first hollowed-out area.

[0188] In an optional embodiment, the determination module 130 is used to determine the level identifier of the second reference PCB layer corresponding to the second connector according to the level identifier of the first reference PCB layer, the second reference PCB layer is the level where the second hollowed-out area corresponding to the second connector is located, and the second hollowed-out area and the projection of the second pad corresponding to the second connector in the first direction at least partially overlap;

[0189] According to the layer identifier of the second reference PCB layer, the first impedance difference and the first simulation adjustment value, design parameters corresponding to each second connector in the PCB design file are determined.

[0190] In an optional implementation, the determination module 130 is specifically configured to iteratively obtain a plurality of second impedance difference values ​​at a second pad corresponding to a second connector in the PCB design file based on a level identifier of the second reference PCB layer and a size parameter of the second initial hollowed-out area;

[0191] If it is determined that a target impedance difference between a second target impedance difference and the first impedance difference among the multiple second impedance differences meets a preset impedance difference threshold, a second simulation adjustment value corresponding to the second target impedance difference is obtained, where the second simulation adjustment value is used to characterize a current adjustment amplitude corresponding to the second hollowed-out area;

[0192] According to the second simulation adjustment value and the first simulation adjustment value, the size parameters of the second initial hollowed-out area are adjusted to obtain target design parameters of the second hollowed-out area corresponding to the second connector.

[0193] In an optional implementation manner, the determination module 130 is specifically configured to calculate a simulation repair value corresponding to the second connector according to the first simulation adjustment value and the second simulation adjustment value;

[0194] If it is determined that the simulation repair value does not meet the preset repair requirement, adjusting the second simulation adjustment value to obtain the adjusted second simulation adjustment value;

[0195] According to the adjusted second simulation adjustment value, the size parameter of the second initial hollowed-out area is adjusted to obtain a target size of the second hollowed-out area corresponding to the second connector.

[0196] In an optional embodiment, the determination module 130 is specifically used to determine the second simulation input port and the second simulation output port of the second connector respectively according to a preset setting rule, wherein the second simulation input port and the second simulation output port are symmetrical about the center position of the second pad, and the second simulation input port is set on the input signal line of the second connector, and the second simulation output port is set on the output signal line of the second connector;

[0197] A second target simulation signal is input to the second simulation input port, and a second impedance difference at a second pad corresponding to the second connector is acquired through the second simulation output port.

[0198] In an optional embodiment, the first connector is any one of the following: a horizontal surface mount connector, a vertical surface mount connector, and a clamping board surface mount connector.

[0199] The above-mentioned device is used to execute the method provided by the aforementioned embodiment, and its implementation principle and technical effect are similar, which will not be repeated here.

[0200] The above modules may be one or more integrated circuits configured to implement the above methods, such as one or more application specific integrated circuits (ASICs), or one or more microprocessors, or one or more field programmable gate arrays (FPGAs). For another example, when a module is implemented in the form of a processing element scheduling program code, the processing element may be a general-purpose processor, such as a central processing unit (CPU) or other processor that can call program code. For another example, these modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).

[0201] Fig.11 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device can be integrated into the above-mentioned simulation design device. Fig.11 As shown, the electronic device may include: a processor 210, a storage medium 220 and a bus 230, the storage medium 220 stores machine-readable instructions executable by the processor 210, when the electronic device is running, the processor 210 and the storage medium 220 communicate through the bus 230, and the processor 210 executes the machine-readable instructions to perform the steps of the above method embodiment. The specific implementation method and technical effect are similar and will not be repeated here.

[0202] Optionally, the present application further provides a storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above method embodiment are executed. The specific implementation method and technical effect are similar and will not be repeated here.

[0203] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0204] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0205] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0206] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to perform some steps of the methods of each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (English: Read-Only Memory, abbreviated: ROM), random access memory (English: Random Access Memory, abbreviated: RAM), disk or optical disk and other media that can store program codes.

[0207] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0208] The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application. It should be noted that similar numbers and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A simulation design method for a PCB connector, characterized in that: The method comprises: Obtain a first impedance difference value at a first pad corresponding to a first connector in a PCB design file, where the first impedance difference value is an impedance difference between a maximum impedance value and a minimum impedance value corresponding to the first pad; If the first impedance difference meets the preset requirements, a first simulation adjustment value and a layer identifier of a first reference PCB layer are obtained, where the first reference PCB layer is a PCB layer where a first hollowed-out area corresponding to the first connector is located, and the first simulation adjustment value is used to characterize a target adjustment amplitude corresponding to the first hollowed-out area when the first impedance difference meets the preset requirements; According to the first impedance difference, the first simulation adjustment value and the layer identifier of the first reference PCB layer, the design parameters corresponding to each second connector in the PCB design file are determined, wherein the second connector and the first connector have the same crimping form but different types.

2. The method according to claim 1, characterized in that The obtaining of a first impedance difference at a first pad corresponding to a first connector in a PCB design file comprises: According to the input signal line of the first connector, setting a first simulation input port of the first connector; Adding a simulation model of the first connector on the first pad; A first target simulation signal is input to the first simulation input port, and a first impedance difference corresponding to the first pad is obtained through a first simulation output port of the simulation model.

3. The method according to claim 1, characterized in that The method further comprises: If the first impedance difference does not meet the preset requirement, iteratively determine the layer identifier of the first reference PCB layer and the size parameters of the first hollowed-out area set in the first reference PCB layer, so that the first impedance difference meets the preset requirement; Among them, the first hollowed-out area at least partially overlaps with the projection of the first solder pad in the first direction; the first reference PCB layer includes: at least one PCB layer other than the first PCB layer in the PCB stack corresponding to the PCB design file, and the first PCB layer is the PCB layer where the first solder pad is located.

4. The method according to claim 3, characterized in that The iterative determination of the level identifier of the first reference PCB layer and the size parameter of the first hollowed-out area set in the first reference PCB layer includes: Based on the first initial reference PCB layer and setting the first initial hollowed-out area, iteratively adjust the size parameters of the first initial reference PCB layer and / or the first initial hollowed-out area to determine the layer identifier of the first reference PCB layer and the size parameters of the first hollowed-out area.

5. The method according to claim 4, characterized in that The method of setting a first initial hollowed-out area based on a first initial reference PCB layer, iteratively adjusting size parameters of the first initial reference PCB layer and / or the first initial hollowed-out area, and determining a level identifier of the first reference PCB layer and size parameters of the first hollowed-out area includes: Based on the first initial reference PCB layer and setting a first initial hollowed-out area, iteratively adjusting size parameters of the first initial hollowed-out area, and determining whether the first impedance difference meets preset requirements; If not, the size parameters of the first initial reference PCB layer and the first initial hollowed-out area are iteratively adjusted to determine the size parameters of the first reference PCB layer and the first hollowed-out area.

6. The method according to claim 1, characterized in that Determining the design parameters corresponding to each second connector in the PCB design file according to the first impedance difference, the first simulation adjustment value, and the level identifier of the first reference PCB layer includes: Determine, according to the layer identifier of the first reference PCB layer, the layer identifier of the second reference PCB layer corresponding to the second connector, the second reference PCB layer being the layer where the second hollowed-out area corresponding to the second connector is located, and the second hollowed-out area at least partially overlaps with a projection of the second pad corresponding to the second connector in the first direction; According to the layer identifier of the second reference PCB layer, the first impedance difference and the first simulation adjustment value, design parameters corresponding to each second connector in the PCB design file are determined.

7. The method according to claim 6, characterized in that The acquiring, according to the level identifier of the second reference PCB layer, the first impedance difference and the first simulation adjustment value, the design parameters corresponding to each second connector in the PCB design file comprises: Iteratively acquiring a plurality of second impedance difference values ​​at a second pad corresponding to a second connector in the PCB design file based on a level identifier of the second reference PCB layer and a size parameter of the second initial hollowed-out area; If it is determined that a target impedance difference between a second target impedance difference and the first impedance difference among the multiple second impedance differences meets a preset impedance difference threshold, a second simulation adjustment value corresponding to the second target impedance difference is obtained, where the second simulation adjustment value is used to characterize a current adjustment amplitude corresponding to the second hollowed-out area; According to the second simulation adjustment value and the first simulation adjustment value, the size parameters of the second initial hollowed-out area are adjusted to obtain target design parameters of the second hollowed-out area corresponding to the second connector.

8. The method according to claim 7, characterized in that The adjusting the size parameters of the second initial hollowing-out area according to the second simulation adjustment value and the first simulation adjustment value to obtain the target design parameters of the second hollowing-out area corresponding to the second connector includes: Calculating a simulation repair value corresponding to the second connector according to the first simulation adjustment value and the second simulation adjustment value; If it is determined that the simulation repair value does not meet the preset repair requirement, adjusting the second simulation adjustment value to obtain the adjusted second simulation adjustment value; According to the adjusted second simulation adjustment value, the size parameter of the second initial hollowed-out area is adjusted to obtain a target size of the second hollowed-out area corresponding to the second connector.

9. The method according to claim 7, characterized in that: The obtaining of a second impedance difference at a second pad corresponding to a second connector in the PCB design file comprises: According to a preset setting rule, respectively determine a second simulation input port and a second simulation output port of the second connector, wherein the second simulation input port and the second simulation output port are symmetrical about the center position of the second pad, and the second simulation input port is set on the input signal line of the second connector, and the second simulation output port is set on the output signal line of the second connector; A second target simulation signal is input to the second simulation input port, and a second impedance difference at a second pad corresponding to the second connector is acquired through the second simulation output port.

10. The method according to any one of claims 1 to 9, characterized in that: The first connector is any one of the following: a horizontal surface mount connector, a vertical surface mount connector, and a plywood surface mount connector.

11. A PCB connector simulation design device, characterized in that: include: A first acquisition module is used to acquire a first impedance difference at a first pad corresponding to a first connector in a PCB design file, where the first impedance difference is an impedance difference between a maximum impedance value and a minimum impedance value corresponding to the first pad; a second acquisition module, configured to acquire a first simulation adjustment value and a layer identifier of a first reference PCB layer if the first impedance difference meets a preset requirement, the first reference PCB layer being a PCB layer where a first hollowed-out area corresponding to the first connector is located, and the first simulation adjustment value being used to characterize a target adjustment amplitude corresponding to the first hollowed-out area when the first impedance difference meets a preset requirement; A determination module is used to determine the design parameters corresponding to each second connector in the PCB design file according to the first impedance difference, the first simulation adjustment value and the layer identifier of the first reference PCB layer, wherein the second connector has the same crimping form as the first connector but a different type.

12. An electronic device, characterized in that: include: A processor, a storage medium and a bus, wherein the storage medium stores machine-readable instructions executable by the processor. When the electronic device is running, the processor and the storage medium communicate via the bus, and the processor executes the machine-readable instructions to perform the steps of the simulation design method of the PCB connector as described in any one of claims 1-10.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the simulation design method of the PCB connector as claimed in any one of claims 1 to 10 is executed.

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