Image transmission system and method, electronic equipment and medium

Abstract

The invention provides an image transmission system and method, an electronic device and a medium, and the system comprises an image sensor which is configured to operate in a periodic mode and outputs interlaced image data. And the upper computer is used for calculating and issuing descriptors corresponding to the interlaced images transmitted at a time. The data processing device comprises a receiving and analyzing module for receiving each row of interlaced image data output by the image sensor and analyzing to obtain each row of interlaced images; the storage module is used for sequentially writing each row of interlaced images according to the arrival sequence of each row of interlaced images; and the DMA transmission module is used for alternately transmitting the corresponding interlaced image to the positive sequence address corresponding to the memory buffer area of the upper computer every time based on the descriptor corresponding to the interlaced image transmitted for a single time. According to the invention, real-time transmission of image data is realized by using an alternate transmission method, an additional CPU (Central Processing Unit) does not need to be occupied, the stability and the real-time performance are relatively high, and the problem of frame loss does not exist. And meanwhile, the positive sequence splicing of the staggered images is automatically realized, and the image processing efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of data processing technology, and in particular to an image transmission system, method, electronic equipment and medium. Background Art

[0002] In image acquisition, in order to meet the acquisition requirements, an image with interlaced effective information is obtained in similar scenes with multiple angles or multiple light sources, or in application scenarios with changing exposure frequency, time, etc. The arrangement rule of effective information in the image is the same as the setting rule of the specific application scenario, such as the angle arrangement rule, light source arrangement rule, or delay time arrangement rule.

[0003] For an image with interlaced valid information, it is necessary to decompose it into multiple non-interlaced continuous images. If the interlaced image is interlaced in the first angle (light source) and the second angle (light source) in sequence, it is necessary to extract the odd and even rows of the image respectively and reassemble them into the sub-image of the first angle (light source) and the sub-image of the second angle (light source).

[0004] In response to the problem of reorganizing interlaced images in the above-mentioned application scenarios, Chinese patent CN 117372230 A proposes an image reorganization method, system, storage medium and device based on the original location. The patent allocates storage space for a buffer of the size of a single row of images, which consumes less memory. At the same time, by utilizing the arrangement rules of interlaced images and establishing a buffer, the CPU cache is used to reorganize interlaced images to maximize the efficiency of image processing. The image processing of this patent is carried out in the host computer throughout the process, which requires a high CPU occupancy rate and has low image processing efficiency. Once the operating system is bumpy and the CPU processing is not timely, image splicing errors or frame drops will occur.

[0005] Chinese patent CN115767212A proposes an image output method, device, camera and readable storage medium. This patent uses different image processing channels to process the original images collected under different lighting environments, which can effectively improve the image processing efficiency and the camera's image output frame rate, and can meet the fast response requirements of the terminal-side multimodal algorithm. This patent is different from the technical issues and technical means of this solution.

[0006] In addition, when the collected image data is transmitted to the central processing unit (CPU), the CPU resources will be excessively consumed, thereby occupying the CPU resources used for complex computing tasks, resulting in a waste of CPU resources and reducing image processing efficiency.

[0007] In view of the above technical problems, the present invention proposes an image transmission system, method, electronic device and medium, which can solve at least one of the above technical problems. Summary of the invention

[0008] The present invention provides an image transmission system, method, electronic device and medium, which can solve at least one of the above technical problems.

[0009] To achieve the above object, the present invention provides an image transmission system, comprising: The image sensor is configured to operate in a periodic mode and output a frame of interlaced image data of a configured size; the interlaced image data includes a frame of interlaced images composed of a plurality of rows of interlaced images; The host computer calculates the positive sequence address corresponding to each row of the interlaced image based on the periodic mode and configuration size of the image sensor, and sends the descriptor corresponding to the interlaced image of a single transmission to the data processing device; The data processing device includes: a receiving and analyzing module, a storage module, and a DMA transmission module; A receiving and analyzing module receives interlaced image data of each row output by the image sensor, and analyzes and obtains the interlaced image of each row; A storage module, which writes each row of interlaced images in sequence according to the arrival order of each row of interlaced images; The DMA transmission module, based on the descriptor corresponding to the interlaced image of a single transmission, alternately transmits the interlaced image to the positive sequence address corresponding to the memory buffer of the host computer each time to realize the positive sequence splicing of a frame of interlaced image.

[0010] Further, a frame of interlaced image data includes image data generated by each group of pixels in a plurality of groups of pixels; wherein each group of pixels is configured to receive one of a plurality of different exposures running in a periodic sequence and generate image data corresponding to one exposure.

[0011] Furthermore, configuring the size includes configuring the row height and row width of a frame of interlaced image, and the number of rows required for each exposure.

[0012] Furthermore, the descriptor corresponding to the interlaced image transmitted in a single time includes the write address of the storage module in the data processing device, the positive sequence address corresponding to the memory buffer of the host computer, and the length of the interlaced image transmitted in a single time.

[0013] Furthermore, the data processing device is an acquisition card.

[0014] Based on the same inventive concept, the present application also proposes an image transmission method, comprising: Acquire a frame of interlaced image data of a configured size, and parse and acquire a row interlaced image corresponding to each row of interlaced image data; the interlaced image data includes a frame of interlaced image composed of a plurality of rows of interlaced images; Write each row of interlaced images in sequence according to the arrival order of each row of interlaced images; Based on the descriptor corresponding to the interlaced image of a single transmission sent by the host computer, the interlaced image is transmitted alternately to the positive sequence address corresponding to the memory buffer of the host computer each time, so as to realize the positive sequence splicing of a frame of interlaced image; The descriptor corresponding to the interlaced image transmitted in a single time includes the write address of the storage module in the data processing device, the positive sequence address corresponding to the memory buffer of the host computer, and the length of the interlaced image transmitted in a single time.

[0015] Further, a frame of interlaced image data includes image data generated by each of a plurality of groups of pixels; wherein each of the plurality of groups of pixels operating periodically is configured to receive one of a plurality of different exposures.

[0016] Furthermore, configuring the size includes configuring the row height and row width of a frame of interlaced image, and the number of rows required for each exposure.

[0017] On the other hand, the present invention further proposes an electronic device, comprising a processor and a memory, wherein the memory is used to store a computer program, the computer program comprises program instructions, and the processor is configured to call the program instructions to execute the method as described above.

[0018] In yet another aspect, the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the image stitching method as described above is implemented.

[0019] The beneficial effects of the present invention are: The present invention uses the host computer to calculate the corresponding storage addresses (positive sequence addresses) in the host computer memory buffer corresponding to different rows of pixel data (interlaced images of each row) before starting to collect images, and sends corresponding descriptors to facilitate DMA transmission to achieve positive sequence splicing. In addition, the descriptor content is concise, only including the address information and length information of any interlaced image, its byte length is small, and less storage resources are occupied.

[0020] The data processing device of the present invention has built-in receiving and analyzing modules and storage modules, does not need to occupy an additional CPU, and processes all image data collected by the image sensor in real time to obtain an interlaced image of each row.

[0021] The DMA transmission module maps the write address of the storage module in the data processing device to the positive sequence address corresponding to the memory buffer of the host computer according to the descriptor corresponding to the interlaced image of a single transmission. When transmitting data through DMA, the DMA transmission module uses the method of alternating transmission to achieve real-time transmission of image data without occupying the CPU. It has high stability and real-time performance and no frame loss problem. At the same time, during the transmission process, the positive sequence splicing of the interlaced image is automatically achieved, which improves the efficiency of image processing.

[0022] In the transmission method proposed in the present invention, the host computer only needs to calculate the mapping between the write address of the storage module in the data processing device and the positive sequence address corresponding to the memory buffer of the host computer, and send down the descriptor corresponding to the interlaced image of a single transmission. It does not need to participate in the subsequent image processing and image transmission process, thereby simplifying the image transmission process and improving the image transmission efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a structural diagram of the image transmission system; Figure 2 is a flow chart of the image transmission method; Figure 3 is a schematic diagram of an implementation of the system of the present invention; Figure 4 It is a method flow diagram of an implementation method of the system in the present invention. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments.

[0025] like Figure 1 As shown, the present invention proposes an image transmission system, comprising: The image sensor is configured to operate in a periodic mode and output a frame of interlaced image data of a configured size; the interlaced image data includes a frame of interlaced images composed of a plurality of rows of interlaced images.

[0026] A frame of interlaced image data includes image data generated by each group of pixels in a plurality of groups of pixels; each group of pixels is configured to receive one of a plurality of different exposures running in a periodic sequence and generate image data corresponding to one exposure.

[0027] Configuration size includes configuring the row height and row width of an interlaced image, as well as the number of rows required for each exposure.

[0028] The host computer, based on the periodic pattern and configuration size of the image sensor, calculates the positive sequence address corresponding to each row of the interlaced image (each row of the interlaced image), and sends the descriptor corresponding to the interlaced image of a single transmission to the data processing device.

[0029] The descriptor corresponding to the interlaced image transmitted in a single time includes the write address of the storage module in the data processing device, the positive sequence address corresponding to the memory buffer of the host computer, and the length of the interlaced image transmitted in a single time.

[0030] The data processing device includes: a receiving and analyzing module, a storage module, and a DMA transmission module.

[0031] The receiving and analyzing module receives each line of interlaced image data output by the image sensor, and analyzes and obtains each line of interlaced image.

[0032] The storage module writes each row of interlaced images (each row of interlaced images) in sequence according to the arrival order of each row of interlaced images.

[0033] The DMA transmission module, based on the descriptor corresponding to the interlaced image of a single transmission, alternately transmits the interlaced image to the positive sequence address corresponding to the memory buffer of the host computer each time to realize the positive sequence splicing of a frame of interlaced image.

[0034] Furthermore, the data processing device is an acquisition card.

[0035] like Figure 2 As shown, based on the same inventive concept, the present invention also proposes an image stitching method to adapt to the above-mentioned image transmission system, and the specific method is as follows: Acquire a frame of interlaced image data of a configured size, and parse and acquire a row interlaced image corresponding to each row of interlaced image data; the interlaced image data includes a frame of interlaced image composed of a plurality of rows of interlaced images; Write each row of interlaced images in sequence according to the arrival order of each row of interlaced images; Based on the descriptor corresponding to the interlaced image of a single transmission sent by the host computer, the interlaced image is transmitted alternately to the positive sequence address corresponding to the memory buffer of the host computer each time, so as to realize the positive sequence splicing of a frame of interlaced image; The descriptor corresponding to the interlaced image transmitted in a single time includes the write address of the storage module in the data processing device, the positive sequence address corresponding to the memory buffer of the host computer, and the length of the interlaced image transmitted in a single time.

[0036] like Figure 3 As shown, in this embodiment, the operation method of the image transmission system is: The image sensor is configured to operate in a periodic mode and output a frame of interlaced image data of a configured size. The interlaced image data includes a frame of interlaced images composed of a plurality of rows of interlaced images.

[0037] Configuration size includes configuring the row height and row width of an interlaced image, as well as the number of rows required for each exposure.

[0038] A frame of interlaced image data includes image data generated by each group of pixels in multiple groups of pixels (e.g., two or more groups of pixels); wherein each group of pixels is configured to receive one of multiple different exposures running in a periodic sequence and generate image data corresponding to one exposure.

[0039] In image acquisition, in order to meet the acquisition requirements, an image with interlaced effective information is obtained in similar scenes with multiple angles or multiple light sources, or in application scenarios with changing exposure frequency, time, etc. The arrangement rule of effective information in the image is the same as the setting rule of the specific application scenario, such as the angle arrangement rule, light source arrangement rule, or delay time arrangement rule.

[0040] The arrangement rule of the above-mentioned effective information is based on the periodic mode in which the image sensor is configured. Taking any arrangement rule of effective information as an example, the periodic mode in which the image sensor is configured is explained.

[0041] When the image sensor collects a row of images, it switches the angle of the light source, that is, it collects the interlaced image data generated by the exposure of the first angle light source, the second angle light source, the third angle light source, ..., and the Nth angle light source. After completing a cycle, it collects the next row of images again in the same way to obtain a frame of interlaced image data. According to the acquisition rule of one frame of interlaced image data, the next frame of interlaced image data is obtained.

[0042] Furthermore, in addition to the switching of the light source angle, the type of light source can also be changed, such as light sources of different colors or light of different wavelengths, etc. Or the brightness of the light source can be changed so that the image sensor can sequentially collect each line of image of the first brightness, the second brightness, ..., the Nth brightness, and output a plurality of interlaced frames of image of the light source brightness.

[0043] Furthermore, in addition to changing the angle and type of the light source, the light source exposure can be set at equal time intervals, so that the image sensor can sequentially capture each row of images at the first time, the second time, ..., the Nth time, and output several frames of interlaced images at equal time intervals.

[0044] like Figure 4 As shown, in this embodiment, the arrangement period of the multi-angle light source is taken as an example, that is, the image sensor is configured with light sources of N angles to expose the scene, and the exposure of the N angle light sources is periodic.

[0045] In this embodiment, the image sensor includes N groups of pixels, and a group of pixels corresponds to the exposure response of a light source at one angle.

[0046] The image sensor operates in a periodic mode and outputs a frame of interlaced image data of a configured size; the interlaced image data includes a frame of interlaced images composed of a plurality of rows of interlaced images.

[0047] One frame of interlaced image data includes image data generated by each of N groups of pixels, and N groups of pixels are read from the frame of interlaced image data.

[0048] The image sensor is configured to capture the row height, row width, and number of rows required for each exposure of an interlaced image.

[0049] The host computer calculates the positive sequence address corresponding to each row of the interlaced image based on the periodic mode and configuration size of the image sensor, and sends the descriptor corresponding to the interlaced image of a single transmission to the data processing device.

[0050] In this embodiment, the specific process of calculating the descriptor by the host computer is as follows: Given the period N of the image sensor configuration and the number of rows M (M=2,3,4...) of the currently captured interlaced image, calculate the k+1th row of the current interlaced image belonging to the jth exposure. Where j is the modulo of M over N, and k is the quotient of M over N.

[0051] Based on the width and height of the interlaced image in the Mth row, the positive sequence address corresponding to the interlaced image in the Mth row in the host computer memory buffer is calculated as A L ×H×(j-1)+A L ×k+A0.

[0052] Among them, the row number M is the arrival order of any row of interlaced images, A L is the address width of the memory buffer occupied by each line of interlaced image data, H is the number of lines required to be collected for each exposure, and A0 is the cache start address set for the memory buffer.

[0053] In general, the first line of the interlaced image is the first line of the first exposure by default, and the first line of the interlaced image is directly transferred to the cache start address A0 set in the memory buffer. Therefore, the storage address of the first line of the interlaced image is not specifically calculated, but the above calculation formula is also applicable to the calculation of the storage address of the first line of the interlaced image.

[0054] After the above calculation, the descriptor corresponding to each row of the interlaced image can be obtained.

[0055] Generally, considering that the maximum transfer unit of a descriptor in a DMA transfer is less than a row of data, each row of data may correspond to multiple descriptors.

[0056] The descriptor of the interlaced image in this row obtained by the above calculation is used as the descriptor of the interlaced image transmitted for the first time in this row of interlaced images, specifically including the write address of the storage module in the data processing device, the positive sequence address corresponding to the memory buffer of the host computer, and the length of the interlaced image transmitted in a single time.

[0057] Then the descriptor corresponding to the first transmission of the interlaced image in each row of the interlaced image is "M,A L ×H×(j-1)+A L ×k+A0, the length of the interlaced image transmitted in a single time".

[0058] In the transmission of the same row of interlaced images, the positive sequence address of the next transmission of the interlaced image is updated according to the length of the last transmission of the interlaced image, and the transmission of the interlaced image of the row is completed in sequence.

[0059] The positive sequence address of each row of the interlaced image is calculated as the positive sequence address corresponding to the first transmission of the interlaced image; the positive sequence address of the first transmission of the interlaced image is updated according to the length of the first transmission of the interlaced image to obtain the positive sequence address of the interlaced image of the next transmission of the row of interlaced images.

[0060] If the length of a line of interlaced image is 16KB, the length of the descriptor is 4KB.

[0061] Then the positive sequence address of the first transmission interlaced image of the interlaced image of the row is calculated using the above calculation formula to obtain the descriptor corresponding to the first transmission interlaced image, "M,A L ×H×(j-1)+A L ×k+A0, the length of the interlaced image transmitted in a single time".

[0062] On the basis of the positive sequence address of the first transmitted interlaced image, the length of the first transmitted interlaced image is increased as the positive sequence address of the second transmitted interlaced image. Then the descriptor corresponding to the second transmitted interlaced image of the interlaced image row is “M,A L ×H×(j-1)+A L ×k+A0+4, the length of the interlaced image transmitted in a single time".

[0063] On the basis of the positive sequence address of the second transmission interlaced image, the length of the second transmission interlaced image is increased as the positive sequence address of the third transmission interlaced image. Then the descriptor corresponding to the third transmission interlaced image of the interlaced image of this row is “M,A L ×H×(j-1)+A L ×k+A0+8, the length of the interlaced image transmitted in a single time".

[0064] Similarly, the descriptor corresponding to the fourth transmission of the interlaced image in this row is “M,A L ×H×(j-1)+A L ×k+A0+12, the length of the interlaced image transmitted in a single time".

[0065] The row of interlaced images is transmitted in four times. Only the positive sequence address of the interlaced image transmitted for the first time needs to be calculated, and the positive sequence address of the interlaced image transmitted for the next time needs to be updated based on the length of the interlaced image transmitted each time, thereby completing the transmission of the row of interlaced images and realizing the splicing of interlaced images.

[0066] In this embodiment, the descriptor is concise and only includes the address information and length information of any interlaced image. Its byte length is small and occupies less storage resources.

[0067] In this embodiment, the host computer only participates in the calculation process of the descriptor, and does not participate in the image data analysis and image transmission processes. Therefore, the CPU occupancy rate is low and problems such as frame loss are not likely to occur.

[0068] The data processing device includes: a receiving and analyzing module and a storage module. In this embodiment, the data processing device is an acquisition card.

[0069] The receiving and analyzing module receives each row of interlaced image data output by the image sensor, and analyzes and obtains the row interlaced image and data information corresponding to each row of interlaced image data, wherein the data information includes: the row number of any row of interlaced image and the resolution of any row of interlaced image.

[0070] According to the order in which the image sensor outputs interlaced image data, each row of interlaced image data is received, and the row interlaced image corresponding to each row of interlaced image data is parsed and obtained; at the same time, data information is obtained, including row number M and width and height of the Mth row of interlaced image.

[0071] According to the arrival order of each row of interlaced images, each row of interlaced images is sorted in turn to obtain the row number M.

[0072] Each row of interlaced images obtained after analysis is written into the storage module in sequence according to the image arrival order. The write address of any row of interlaced images in the storage module is the image arrival order, row number M.

[0073] In this embodiment, the storage module is a RAM.

[0074] The DMA transmission module, based on the descriptor corresponding to the interlaced image of a single transmission, alternately transmits the interlaced image to the positive sequence address corresponding to the memory buffer of the host computer each time to realize the positive sequence splicing of a frame of interlaced image.

[0075] Generally, the first line of the interlaced image is the first line of the first exposure by default, and the first line of the interlaced image is directly transmitted to the cache start address A0 set in the memory buffer.

[0076] The interlaced images stored in the RAM are transferred to the corresponding positive sequence addresses in the host computer memory buffer through DMA in sequence according to the order in which the images arrive, thus completing the transmission and splicing process of a frame of interlaced images.

[0077] In this embodiment, the image data exposed at different angles are automatically spliced ​​during the alternating transmission process, and after the transmission of one frame of image data is completed, N spliced ​​images exposed at different angles are automatically obtained.

[0078] Repeat the above operation to complete the transmission of the next interlaced image frame in sequence until the image acquisition is completed, so that the host computer can receive several frames of positive sequence images to realize image display or subsequent image processing operations.

[0079] In this embodiment, the image transmission adopts a real-time processing method, and the acquisition card RAM only needs to store at least one line of interlaced image data. This method has low hardware requirements, which not only avoids the problem of image stitching errors caused by untimely CPU processing, but also improves the image processing efficiency and reduces the economic cost of image processing.

[0080] On the other hand, the present invention further proposes an electronic device, comprising a processor and a memory, wherein the memory is used to store a computer program, the computer program comprises program instructions, and the processor is configured to call the program instructions to execute the method as described above.

[0081] In yet another aspect, the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method as described above is implemented.

[0082] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0083] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An image transmission system, characterized in that: include: The image sensor is configured to operate in a periodic mode and output a frame of interlaced image data of a configured size; the interlaced image data includes a frame of interlaced images composed of a plurality of rows of interlaced images; The host computer calculates the positive sequence address corresponding to each row of the interlaced image based on the periodic mode and configuration size of the image sensor, and sends the descriptor corresponding to the interlaced image of a single transmission to the data processing device; The data processing device includes: a receiving and analyzing module, a storage module, and a DMA transmission module; A receiving and analyzing module receives interlaced image data of each row output by the image sensor, and analyzes and obtains the interlaced image of each row; A storage module, which writes each row of interlaced images in sequence according to the arrival order of each row of interlaced images; The DMA transmission module, based on the descriptor corresponding to the interlaced image of a single transmission, alternately transmits the interlaced image to the positive sequence address corresponding to the memory buffer of the host computer each time to realize the positive sequence splicing of a frame of interlaced image.

2. The image transmission system according to claim 1, characterized in that: A frame of interlaced image data includes image data generated by each group of pixels in a plurality of groups of pixels; wherein each group of pixels is configured to receive one of a plurality of different exposures running in a periodic sequence and generate image data corresponding to one exposure.

3. The image transmission system according to claim 2, characterized in that: Configuration size includes configuring the row height and row width of an interlaced image, as well as the number of rows required for each exposure.

4. The image transmission system according to claim 1, characterized in that: The descriptor corresponding to the interlaced image of a single transmission includes the write address of the storage module in the data processing device, the positive sequence address corresponding to the memory buffer of the host computer, and the length of the interlaced image of a single transmission.

5. The image transmission system according to claim 1, characterized in that: The data processing device is an acquisition card.

6. An image transmission method, characterized in that: include: Acquire a frame of interlaced image data of a configured size, and parse and acquire a row interlaced image corresponding to each row of the interlaced image data; the interlaced image data includes a frame of interlaced image composed of a plurality of rows of interlaced images; Write each row of interlaced images in sequence according to the arrival order of each row of interlaced images; Based on the descriptor corresponding to the interlaced image of a single transmission issued by the host computer, the interlaced image is transmitted alternately to the positive sequence address corresponding to the memory buffer of the host computer each time, so as to realize the positive sequence splicing of a frame of interlaced image; The descriptor corresponding to the interlaced image transmitted in a single time includes the write address of the storage module in the data processing device, the positive sequence address corresponding to the memory buffer of the host computer, and the length of the interlaced image transmitted in a single time.

7. The image transmission method according to claim 6, characterized in that: A frame of interlaced image data includes image data generated by each of a plurality of groups of pixels; wherein each of the plurality of groups of pixels operating periodically is configured to receive one of a plurality of different exposures.

8. The image transmission method according to claim 7, characterized in that: Configuration size includes configuring the row height and row width of an interlaced image, as well as the number of rows required for each exposure.

9. An electronic device, comprising a processor and a memory, characterized in that: The memory is used to store a computer program, the computer program includes program instructions, and the processor is configured to call the program instructions to execute the method according to any one of claims 6-8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 6 to 8 is implemented.

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