Method and device for realizing frequency domain PCI (Peripheral Component Interconnect) detection calculation processing based on GPS (Global Positioning System), processor and computer readable storage medium thereof

Abstract

The invention relates to a method for realizing frequency domain PCI (Peripheral Component Interconnect) detection calculation processing based on a GPS (Global Positioning System), which comprises the following steps of: receiving an analog signal, outputting the analog signal to an ADC (Analog to Digital Converter) conversion module, and converting the analog signal into a digital signal; performing signal synchronization on the PPS signal; carrying out AFC adaptive adjustment; aGC self-adaptive adjustment is carried out; digital signal processing is carried out; calculating main synchronization and a cell Nid2; and secondary synchronization and a cell Nid1 are calculated. The invention also relates to a device for realizing frequency domain PCI detection calculation processing based on the GPS, a processor and a computer readable storage medium thereof. By adopting the method and the device for realizing the frequency domain PCI detection calculation processing based on the GPS, the processor and the computer readable storage medium, the PCI can be detected more accurately and quickly; the hardware resource consumption is further reduced; compared with time domain PCI calculation, the method has the advantages of being small in frequency offset influence, low in algorithm operand in some complex environments, wide in application range, good in timing synchronization performance and the like.

Description

Technical Field

[0001] The present invention relates to the field of mobile communication systems, and in particular to the field of PCI detection, and specifically refers to a method, device, processor and computer-readable storage medium thereof for realizing frequency domain PCI detection calculation processing based on GPS. Background Art

[0002] With the popularization and development of 4G mobile communication systems, 5G mobile communication systems have also entered a rapid deployment stage. In 5G communication systems, PCI is an important parameter. In the cell identification process, accurate judgment of cell ID is the key to achieving efficient communication. Its role is to distinguish different base stations and realize cell reselection and switching functions. However, existing cell identification methods have problems such as high misjudgment rate and poor real-time performance.

[0003] The common method of calculating synchronization points is to calculate in the time domain. However, there are the following problems with calculating synchronization points in the time domain: 1) low accuracy and easy to be affected by noise and interference; 2) poor stability. Due to the influence of noise and interference, the main synchronization signal in the time domain may be unstable and prone to drift or jitter. The above problems can be improved in the frequency domain. Calculating synchronization points in the frequency domain can be applicable to power systems of various sizes, from small household photovoltaics to large power grids; in addition, calculating synchronization in the frequency domain can also improve the reliability of cell switching. Summary of the invention

[0004] The purpose of the present invention is to overcome the shortcomings of the above-mentioned prior art and provide a method, device, processor and computer-readable storage medium for frequency domain PCI detection calculation processing based on GPS, which has small frequency deviation influence, good timing synchronization performance and a wide range of applications.

[0005] In order to achieve the above-mentioned purpose, the method, device, processor and computer-readable storage medium thereof for realizing frequency domain PCI detection calculation processing based on GPS of the present invention are as follows:

[0006] The method for realizing frequency domain PCI detection calculation and processing based on GPS is mainly characterized in that the method comprises the following steps:

[0007] (1) Receive analog signals and output them to the ADC conversion module to convert them into digital signals;

[0008] (2) PPS signal for signal synchronization;

[0009] (3) Perform AFC adaptive adjustment;

[0010] (4) Perform AGC adaptive adjustment;

[0011] (5) Perform digital signal processing;

[0012] (6) Calculate primary synchronization and cell Nid2;

[0013] (7) Calculate secondary synchronization and cell Nid1.

[0014] Preferably, the step (2) is specifically as follows:

[0015] The PPS signal converts the precise time signal captured by the GPS receiver into a pulse and transmits it to the device that needs to be synchronized through a cable. After receiving the PPS pulse, the device adjusts its own time according to this signal.

[0016] Preferably, the step (3) is specifically as follows:

[0017] The PPS signal is used as the calibration basis. The counting starts from the rising edge of the PPS and is reset to zero at the next rising edge of the PPS. The frequency deviation is adjusted according to the maximum count value within one second.

[0018] Preferably, the step (4) is specifically as follows:

[0019] The rising edge of PPS is used as the marker for measuring the peak-to-peak value of the signal. The peak-to-peak value of the signal is detected once every 1 second. The average value of the peak-to-peak value of the signal every 8 times is used as the judgment standard, and the AGC is adjusted according to the judgment standard.

[0020] Preferably, the step (5) specifically comprises the following steps:

[0021] (5.1) Outputting the data after the adaptive AGC or AFC adjustment unit to the signal processing unit, and filtering the data by multiple half-band filter decimation;

[0022] (5.2) The signal after decimation and filtering is stored in a FIFO memory, and the data in the FIFO is stored in a group of registers, so that the latter register is one clock cycle slower than the former register, and the FFT calculation is performed on k points under the same clock.

[0023] Preferably, the step (6) is specifically as follows:

[0024] The PSS synchronization sequence and the SSS synchronization sequence are stored in the ROM. The PSS synchronization sequence is conjugated and multiplied and added with the frequency domain signal. The squares of the three groups of modules are compared to obtain the cell Nid2. The position of the maximum value PSS_count is saved.

[0025] Preferably, the step (7) specifically comprises the following steps:

[0026] (7.1) According to the relative position difference between SSS and PSS given by the protocol, SSS is calculated at the corresponding position of the signal;

[0027] (7.2) Compare multiple groups of SSS correlation results to get the maximum value, get the cell Nid1, and calculate the PCI.

[0028] The system for realizing frequency domain PCI detection calculation and processing based on GPS according to the method described in claim 1 is mainly characterized in that the system comprises:

[0029] The signal input unit is used to receive the input of the analog signal and the input of the GPS signal, and input the analog signal to the ADC conversion unit for analog-to-digital conversion;

[0030] An ADC conversion unit, connected to the signal input unit, for converting analog signals into digital signals;

[0031] An adaptive AGC or AFC adjustment unit, connected to the ADC conversion unit, is used to adjust the signal power and frequency to a correct range;

[0032] A signal processing unit, connected to the adaptive AGC or AFC adjustment unit, is used to make the signal pass through the FIR extraction filter multiple times, store the extracted results, and convert the time domain signal into a frequency domain signal;

[0033] The synchronous calculation unit is connected to the signal processing unit and is used to calculate PSS, SSS and PCI.

[0034] The device for realizing frequency domain PCI detection calculation and processing based on GPS has the following main features: the device comprises:

[0035] a processor configured to execute computer executable instructions;

[0036] The memory stores one or more computer executable instructions. When the computer executable instructions are executed by the processor, the various steps of the method for realizing frequency domain PCI detection calculation processing based on GPS are implemented.

[0037] The main feature of the processor for implementing frequency domain PCI detection calculation processing based on GPS is that the processor is configured to execute computer executable instructions. When the computer executable instructions are executed by the processor, the various steps of the above-mentioned method for implementing frequency domain PCI detection calculation processing based on GPS are implemented.

[0038] The main feature of the computer-readable storage medium is that a computer program is stored thereon, and the computer program can be executed by a processor to implement the various steps of the above-mentioned method for realizing frequency domain PCI detection calculation processing based on GPS.

[0039] The method, device, processor and computer-readable storage medium thereof for realizing frequency domain PCI detection and calculation processing based on GPS of the present invention are adopted. Adaptive AGC or AFC adjustment enables the present invention to be used in a mobile environment, and PCI can be detected more accurately and quickly. The present invention uses multiple half-band filters to perform 2x sampling operations instead of cascading multiple half-band filters, further reducing hardware resource consumption. Compared with calculating PCI in the time domain, the present invention has the advantages of less frequency deviation influence, low algorithm calculation amount in certain complex environments, wide application range and good timing synchronization performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 The present invention is a principle block diagram of a method for realizing frequency domain PCI detection calculation and processing based on GPS.

[0041] Figure 2 The present invention is a flowchart of the adaptive AGC or AFC adjustment unit of the method for realizing frequency domain PCI detection calculation processing based on GPS.

[0042] Figure 3 The present invention is a flowchart of the signal processing unit of the method for realizing frequency domain PCI detection calculation processing based on GPS. DETAILED DESCRIPTION

[0043] In order to more clearly describe the technical content of the present invention, further description is given below in conjunction with specific embodiments.

[0044] The method for realizing frequency domain PCI detection calculation and processing based on GPS of the present invention comprises the following steps:

[0045] (1) Receive analog signals and output them to the ADC conversion module to convert them into digital signals;

[0046] (2) PPS signal for signal synchronization;

[0047] (3) Perform AFC adaptive adjustment;

[0048] (4) Perform AGC adaptive adjustment;

[0049] (5) Perform digital signal processing;

[0050] (6) Calculate primary synchronization and cell Nid2;

[0051] (7) Calculate secondary synchronization and cell Nid1.

[0052] As a preferred embodiment of the present invention, the step (2) is specifically as follows:

[0053] The PPS signal converts the precise time signal captured by the GPS receiver into a pulse and transmits it to the device that needs to be synchronized through a cable. After receiving the PPS pulse, the device adjusts its own time according to this signal.

[0054] As a preferred embodiment of the present invention, the step (3) is specifically as follows:

[0055] The PPS signal is used as the calibration basis. The counting starts from the rising edge of the PPS and is reset to zero at the next rising edge of the PPS. The frequency deviation is adjusted according to the maximum count value within one second.

[0056] As a preferred embodiment of the present invention, the step (4) is specifically as follows:

[0057] The rising edge of PPS is used as the marker for measuring the peak-to-peak value of the signal. The peak-to-peak value of the signal is detected once every 1 second. The average value of the peak-to-peak value of the signal every 8 times is used as the judgment standard, and the AGC is adjusted according to the judgment standard.

[0058] As a preferred embodiment of the present invention, the step (5) specifically comprises the following steps:

[0059] (5.1) Outputting the data after the adaptive AGC or AFC adjustment unit to the signal processing unit, and filtering the data by multiple half-band filter decimation;

[0060] (5.2) The signal after decimation and filtering is stored in a FIFO memory, and the data in the FIFO is stored in a group of registers, so that the latter register is one clock cycle slower than the former register, and the FFT calculation is performed on k points under the same clock.

[0061] Preferably, the step (6) is specifically as follows:

[0062] The PSS synchronization sequence and the SSS synchronization sequence are stored in the ROM. The PSS synchronization sequence is conjugated and multiplied and added with the frequency domain signal. The squares of the three groups of modules are compared to obtain the cell Nid2. The position of the maximum value PSS_count is saved.

[0063] As a preferred embodiment of the present invention, the step (7) specifically comprises the following steps:

[0064] (7.1) According to the relative position difference between SSS and PSS given by the protocol, SSS is calculated at the corresponding position of the signal;

[0065] (7.2) Compare multiple groups of SSS correlation results to get the maximum value, get the cell Nid1, and calculate the PCI.

[0066] The system for realizing frequency domain PCI detection calculation and processing based on GPS of the method of claim 1 of the present invention, wherein the system comprises:

[0067] The signal input unit is used to receive the input of the analog signal and the input of the GPS signal, and input the analog signal to the ADC conversion unit for analog-to-digital conversion;

[0068] An ADC conversion unit, connected to the signal input unit, for converting analog signals into digital signals;

[0069] An adaptive AGC or AFC adjustment unit, connected to the ADC conversion unit, is used to adjust the signal power and frequency to a correct range;

[0070] A signal processing unit, connected to the adaptive AGC or AFC adjustment unit, is used to make the signal pass through the FIR extraction filter multiple times, store the extracted results, and convert the time domain signal into a frequency domain signal;

[0071] The synchronous calculation unit is connected to the signal processing unit and is used to calculate PSS, SSS and PCI.

[0072] The device for realizing frequency domain PCI detection calculation processing based on GPS of the present invention, wherein the device comprises:

[0073] a processor configured to execute computer executable instructions;

[0074] The memory stores one or more computer executable instructions. When the computer executable instructions are executed by the processor, the various steps of the method for realizing frequency domain PCI detection calculation processing based on GPS are implemented.

[0075] The processor of the present invention is used to implement frequency domain PCI detection calculation processing based on GPS, wherein the processor is configured to execute computer executable instructions, and when the computer executable instructions are executed by the processor, the various steps of the above-mentioned method for implementing frequency domain PCI detection calculation processing based on GPS are implemented.

[0076] The computer-readable storage medium of the present invention stores a computer program thereon, and the computer program can be executed by a processor to implement the various steps of the above-mentioned method for realizing frequency domain PCI detection calculation processing based on GPS.

[0077] In a specific embodiment of the present invention, Figures 1 to 3 , relates to a calculation method for frequency domain PCI detection based on GPS, and the implementation of the method includes the following steps:

[0078] Receive analog signals and output them to the ADC conversion module, which are converted into digital signals through quantization, sampling and other steps;

[0079] PPS performs signal synchronization. PPS converts the precise time signal captured by the GPS receiver into a pulse, which is then transmitted via a cable to the device that needs to be synchronized. When the device receives the PPS pulse, it can adjust its own time according to this signal.

[0080] Perform AFC adaptive adjustment. Use PPS as the calibration basis, start counting from the rising edge of PPS, and count until the next rising edge of PPS to reset the count, and adjust the frequency deviation based on the maximum count within one second;

[0081] Perform AGC adaptive adjustment. Use the rising edge of PPS as the marker for measuring the peak-to-peak value of the signal. The detection length is one frame of sampling signal. The peak-to-peak value of the signal is detected every 1s. The average value of the peak-to-peak value of the signal every 8 times is used as the judgment standard. AGC is adjusted according to this standard. When the signal strength of the environment changes, AGC will also make corresponding adjustments.

[0082] Perform digital signal processing. The data after AFC and AGC are output to the signal processing unit, and the data is filtered by half-band filters multiple times to reduce the occupation of hardware resources; the signal after decimation filtering is stored in the FIFO memory, and the data in the FIFO is stored in a group of registers, requiring the latter register to be one clock cycle slower than the previous register (Tclk = 2m / Fs), and the k points under the same clock are FFT calculated;

[0083] Perform the calculation of main synchronization and cell Nid2. Store the PSS synchronization sequence and SSS synchronization sequence in ROM, first perform the PSS process, multiply and add the PSS synchronization sequence and the frequency domain signal conjugate, compare the squares of the three groups of modules, obtain the cell Nid2, and save the position of the maximum value PSS_count to calculate the cell Nid1;

[0084] Perform secondary synchronization and calculation of cell Nid1. The position PSS_count of the maximum value of the PSS correlation result obtained in the previous step is used to calculate SSS at the corresponding position of the signal according to the difference between the SSS and PSS correlation positions given by the protocol. The calculation method is similar to that of PSS, except that SSS does not require complete signal data for calculation. Compare multiple groups of SSS correlation results to get the maximum value, and then you can get the cell Nid1, PCI = 3Nid1 + Nid2.

[0085] The computing system of the GPS-based frequency domain PCI detection of the present invention comprises a signal input unit, an ADC conversion unit, an adaptive AGC or AFC adjustment unit, a signal processing unit and a synchronous computing unit.

[0086] The signal input unit includes an analog signal input and a GPS signal input, and its purpose is to input the analog signal into the ADC conversion unit for analog-to-digital conversion. The GPS PPS signal is used as a synchronization mark, and the time difference between two PPS rising edges is the standard 1 second. The function of the PPS of this invention is mainly to perform clock synchronization and frequency deviation adjustment.

[0087] The ADC conversion unit is used to convert an analog signal into a digital signal. In this invention, the sampling frequency of the LTE signal is 30.72 MHz, and the sampling frequency of the NR signal is 122.88 MHz.

[0088] Adaptive AGC or AFC adjustment unit is used to adjust the signal power and frequency to the correct range for subsequent cell ID calculation.

[0089] The signal processing unit includes modules such as FIR extraction filter, FIFO memory, FFT calculation module, etc. The signal passes through the FIR extraction filter multiple times to achieve the effect of multiple filter cascades, so as to reduce the consumption of hardware resources and the amount of calculation. The FIFO memory is used to store the extracted results. The FFT calculation module is mainly used to convert the time domain signal into the frequency domain signal.

[0090] The synchronization calculation unit includes a plurality of adders and multipliers for calculating PSS, SSS and PCI.

[0091] The present invention adjusts the power and frequency of the sampled signal to the correct range through the AGC and AFC modules; reduces the sampling rate of the signal through the FIR decimation filter to achieve the purpose of reducing resource consumption. The FIR decimation filter used is a half-band decimation filter that is cascaded multiple times. Compared with other filters, the half-band filter has the characteristics of compact structure and easy implementation. In addition, the half-band filter is very suitable for the 2x decimation FIR filter, which can reduce the number of multiplications per second of the 2x decimation by nearly 1 / 2 compared with the general linear phase FIR filter; in addition, calculating PSS and SSS in the frequency domain can support multi-antenna operation, so that the network can better adapt to complex wireless environments and provide better coverage and performance.

[0092] The specific implementation scheme of this embodiment can refer to the relevant description in the above embodiment, which will not be repeated here.

[0093] It can be understood that the same or similar parts of the above embodiments can be referenced to each other, and the contents not described in detail in some embodiments can refer to the same or similar contents in other embodiments.

[0094] It should be noted that, in the description of the present invention, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, the meaning of "plurality" refers to at least two.

[0095] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention belong.

[0096] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution device. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0097] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the corresponding program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0098] In addition, each functional unit in each embodiment of the present invention may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0099] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.

[0100] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0101] The method, device, processor and computer-readable storage medium thereof for realizing frequency domain PCI detection and calculation processing based on GPS of the present invention are adopted. Adaptive AGC or AFC adjustment enables the present invention to be used in a mobile environment, and PCI can be detected more accurately and quickly. The present invention uses multiple half-band filters to perform 2x sampling operations instead of cascading multiple half-band filters, further reducing hardware resource consumption. Compared with calculating PCI in the time domain, the present invention has the advantages of less frequency deviation influence, low algorithm calculation amount in certain complex environments, wide application range and good timing synchronization performance.

[0102] In this specification, the present invention has been described with reference to specific embodiments thereof. However, it is apparent that various modifications and variations may be made without departing from the spirit and scope of the present invention. Therefore, the specification and drawings should be regarded as illustrative rather than restrictive.

Claims

1. A method for realizing frequency domain PCI detection calculation and processing based on GPS, characterized in that: The method comprises the following steps: (1) Receive analog signals and output them to the ADC conversion module to convert them into digital signals; (2) PPS signal for signal synchronization; (3) Perform AFC adaptive adjustment; (4) Perform AGC adaptive adjustment; (5) Perform digital signal processing; (6) Calculate primary synchronization and cell Nid2; (7) Calculate secondary synchronization and cell Nid1.

2. The method for realizing frequency domain PCI detection and calculation processing based on GPS according to claim 1, characterized in that: The step (2) is specifically as follows: The PPS signal converts the precise time signal captured by the GPS receiver into a pulse and transmits it to the device that needs to be synchronized through a cable. After receiving the PPS pulse, the device adjusts its own time according to this signal.

3. The method for realizing frequency domain PCI detection calculation and processing based on GPS according to claim 1, characterized in that: The step (3) is specifically as follows: The PPS signal is used as the calibration basis. The counting starts from the rising edge of the PPS and is reset to zero at the next rising edge of the PPS. The frequency deviation is adjusted according to the maximum count value within one second.

4. The method for realizing frequency domain PCI detection calculation and processing based on GPS according to claim 1, characterized in that: The step (4) is specifically as follows: The rising edge of PPS is used as the marker for measuring the peak-to-peak value of the signal. The peak-to-peak value of the signal is detected once every 1 second. The average value of the peak-to-peak value of the signal every 8 times is used as the judgment standard, and the AGC is adjusted according to the judgment standard.

5. The method for realizing frequency domain PCI detection and calculation processing based on GPS according to claim 1, characterized in that: The step (5) specifically comprises the following steps: (5.1) Outputting the data after the adaptive AGC or AFC adjustment unit to the signal processing unit, and filtering the data by multiple half-band filter decimation; (5.2) The signal after decimation and filtering is stored in a FIFO memory, and the data in the FIFO is stored in a group of registers, so that the latter register is one clock cycle slower than the former register, and the FFT calculation is performed on k points under the same clock.

6. The method for realizing frequency domain PCI detection calculation and processing based on GPS according to claim 1, characterized in that: The step (6) is specifically as follows: The PSS synchronization sequence and the SSS synchronization sequence are stored in the ROM. The PSS synchronization sequence is conjugated and multiplied and added with the frequency domain signal. The squares of the three groups of modules are compared to obtain the cell Nid2. The position of the maximum value PSS_count is saved.

7. The method for realizing frequency domain PCI detection and calculation processing based on GPS according to claim 1, characterized in that: The step (7) specifically comprises the following steps: (7.1) According to the relative position difference between SSS and PSS given by the protocol, SSS is calculated at the corresponding position of the signal; (7.2) Compare multiple groups of SSS correlation results to get the maximum value, get the cell Nid1, and calculate the PCI.

8. A system for realizing frequency domain PCI detection calculation and processing based on GPS to implement the method described in claim 1, characterized in that: The system comprises: The signal input unit is used to receive the input of the analog signal and the input of the GPS signal, and input the analog signal to the ADC conversion unit for analog-to-digital conversion; An ADC conversion unit, connected to the signal input unit, for converting analog signals into digital signals; An adaptive AGC or AFC adjustment unit, connected to the ADC conversion unit, is used to adjust the signal power and frequency to a correct range; A signal processing unit, connected to the adaptive AGC or AFC adjustment unit, is used to make the signal pass through the FIR extraction filter multiple times, store the extracted results, and convert the time domain signal into a frequency domain signal; The synchronous calculation unit is connected to the signal processing unit and is used to calculate PSS, SSS and PCI.

9. A device for realizing frequency domain PCI detection calculation processing based on GPS, characterized in that: The device comprises: a processor configured to execute computer executable instructions; A memory storing one or more computer executable instructions, wherein when the computer executable instructions are executed by the processor, each step of the method for realizing frequency domain PCI detection calculation processing based on GPS as described in any one of claims 1 to 8 is implemented.

10. A processor for implementing frequency domain PCI detection calculation processing based on GPS, characterized in that: The processor is configured to execute computer executable instructions. When the computer executable instructions are executed by the processor, the various steps of the method for implementing frequency domain PCI detection calculation processing based on GPS described in any one of claims 1 to 8 are implemented.

11. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and the computer program can be executed by a processor to implement the various steps of the method for realizing frequency domain PCI detection calculation processing based on GPS as described in any one of claims 1 to 8.

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