Display panel and display device

Abstract

The invention relates to a display panel, the display panel comprises a scanning line, a common electrode bus and a peripheral data line, the common electrode bus and the peripheral data line extend along a first direction, the scanning line extends along a second direction, and the distance between the end part of the scanning line and the common electrode bus is equal to the distance between the common electrode bus and the peripheral data line. Or the distance between the peripheral data wire and the common electrode bus is greater than the distance between the end part of the scanning wire and the peripheral data wire. The distance between the end part of the scanning wire and the peripheral data wire is increased, the possibility of electrostatic discharge between the end part of the scanning wire and the peripheral data wire is reduced, and the distance between the end part of the scanning wire or the peripheral data wire and the common electrode bus is reduced. Therefore, the static electricity accumulation on the end part of the scanning wire or the peripheral data wire can be released through the common electrode bus, the display effect of the display panel is not influenced, and the display panel is prevented from being damaged. The invention further provides a display device comprising the display panel.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] During the manufacturing process of the display panel, electrostatic discharge (ESD) is easily generated when the substrate contacts the device, which may cause sudden damage or potential damage, greatly reducing the quality of the display panel.

[0003] Electrostatic discharge is easily generated between the end of the scanning line and the peripheral data line at the edge of the display area, which affects the display effect of the display panel and even damages the display panel.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0005] The purpose of the present disclosure is to eliminate the influence of electrostatic discharge on the display effect of a display panel, and to provide a display panel and a display device.

[0006] According to one aspect of the present disclosure, a display panel is provided, comprising a display area and a non-display area located outside the display area, the display panel further comprising a substrate, a plurality of sub-pixels, a plurality of data routings, a plurality of scanning routings and a common electrode bus, wherein the plurality of sub-pixels are arranged on one side of the substrate, the plurality of sub-pixels comprise sub-pixel columns arranged along a first direction and sub-pixel rows arranged along a second direction, the second direction being perpendicular to the first direction; the plurality of data routings extend along the first direction and are located on both sides of the sub-pixel columns along the second direction, the plurality of data routings comprise peripheral data routings; the plurality of scanning routings extend along the second direction and are located on both sides of the sub-pixel rows along the first direction; the common electrode bus extends along the first direction and is located in the non-display area on both sides of the display area, the common electrode bus being arranged adjacent to the peripheral data routings; the distance between an end of the scanning routing and the common electrode bus, or the distance between the peripheral data routing and the common electrode bus, is smaller than the distance between an end of the peripheral data routing and an end of the scanning routing.

[0007] In one embodiment of the present disclosure, the scanning line includes a first scanning line segment, the first scanning line segment has a first end and a second end relative to each other along the second direction, the first end and the second end of the first scanning line segment are alternately arranged along the first direction, the display panel also includes a transfer line and an output electrode, the output electrode is located on a side of the common electrode bus away from the display area, the transfer line includes a first transfer section, one end of the first transfer section is connected to the first end of the first scanning line segment through a via hole, and the other end is connected to the output electrode through the via hole.

[0008] In one embodiment of the present disclosure, at least one of the first end and the second end of the first scan routing segment is connected to a second scan routing segment, and the second scan routing segment is located between the common electrode bus and the peripheral data routing.

[0009] In one embodiment of the present disclosure, the first end and the second end of the first scan line segment are respectively located between the peripheral data lines and the common electrode bus on both sides of the display area, and the second scan line segment is at least partially located between the first transfer segment and the common electrode bus.

[0010] In one embodiment of the present disclosure, the second scanning routing segment includes a first scanning routing branch and a second scanning routing branch, the first scanning routing branch is connected to the end of the first scanning routing segment and extends in a direction close to the common electrode bus, and the second scanning routing branch is connected to the first scanning routing branch and extends in a direction close to the common electrode bus.

[0011] In one embodiment of the present disclosure, the second scan routing segment includes a first scan routing branch extending along the second direction, and a cross-sectional area of ​​an end of the first scan routing branch away from the first scan routing segment gradually decreases in a direction away from the first scan routing segment.

[0012] In one embodiment of the present disclosure, the peripheral data routing includes a first data routing segment and a second data routing segment, the first data routing segment extends along a first direction, the second data routing segment extends along a second direction, and the second data routing segment is located between the first data routing segment and the common electrode bus.

[0013] In one embodiment of the present disclosure, the second data routing segment includes a first data routing branch and a second data routing branch, the first data routing branch is connected to the end of the first data routing segment and extends in a direction close to the common electrode bus, and the second data routing branch is connected to the first data routing branch and extends in a direction close to the common electrode bus.

[0014] In one embodiment of the present disclosure, the second data routing segment includes a first data routing branch extending along the second direction, and the cross-sectional area of ​​one end of the first data routing branch away from the first data routing segment gradually decreases in the direction away from the first data routing segment.

[0015] In one embodiment of the present disclosure, the adapter line also includes a second adapter section, which is connected to the first adapter section and located between the first adapter section and the common electrode bus, and the distance between the adapter line and the peripheral data routing is greater than the distance between the second adapter section and the common electrode bus.

[0016] In one embodiment of the present disclosure, the second adapter section includes a first adapter wire branch and a second adapter wire branch, the first adapter wire branch is connected to the end of the first adapter section and extends toward the direction close to the common electrode bus, and the second adapter wire branch is connected to the first adapter wire branch and extends toward the direction close to the common electrode bus.

[0017] In one embodiment of the present disclosure, the second transition section includes a first transition line branch extending along the second direction, and a cross-sectional area of ​​an end of the first transition line branch away from the first transition section gradually decreases in a direction away from the first transition section.

[0018] In one embodiment of the present disclosure, the display panel includes a gate layer and a first conductive layer, the scan lines and the common electrode bus are located in the gate layer, and the data lines, the switching lines and the output electrodes are located in the first conductive layer.

[0019] In one embodiment of the present disclosure, the distance between the end of the scan line and the common electrode bus, or the distance between the peripheral data line and the common electrode bus is greater than or equal to 10 micrometers.

[0020] According to another aspect of the present disclosure, a display device is provided, including the display panel provided according to any one aspect of the present disclosure.

[0021] The display panel disclosed in the present invention includes a scanning line, a common electrode bus and a peripheral data line, wherein the common electrode bus and the peripheral data line extend in a first direction, the scanning line extends in a second direction, and the distance between the end of the scanning line and the common electrode bus, or the distance between the peripheral data line and the common electrode bus, is greater than the distance between the end of the scanning line and the peripheral data line. The distance between the end of the scanning line and the peripheral data line is increased to reduce the possibility of electrostatic discharge between the end of the scanning line and the peripheral data line, and the distance between the end of the scanning line or the peripheral data line and the common electrode bus is reduced, so that the static electricity accumulated on the end of the scanning line or the peripheral data line can be released through the common electrode bus with a high probability, which will not affect the display effect of the display panel and avoid damage to the display panel.

[0022] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0024] Figure 1 It is a cross-sectional schematic diagram of a display area of ​​a display module involved in an embodiment of the present disclosure.

[0025] Figure 2 It is a schematic cross-sectional view of a non-display area of ​​a display module according to an embodiment of the present disclosure along an extension direction of a second test line.

[0026] Figure 3 The present invention is a layout of the local structure of a light shielding layer of a display module involved in an embodiment of the present disclosure.

[0027] Figure 4 The present invention is a layout of a local structure of an active layer of a display module involved in an embodiment of the present disclosure.

[0028] Figure 5 The present invention is a layout of a local structure of a gate layer of a display module involved in an embodiment of the present disclosure.

[0029] Figure 6 The present invention is a layout of a local structure of a first conductive layer of a display module involved in an embodiment of the present disclosure.

[0030] Figure 7 A layout of a local structure of a display module involved in an embodiment of the present disclosure.

[0031] In the figure: 1-substrate substrate, 2-driving circuit layer, 21-active layer, 22-gate insulating layer, 23-gate layer, 231-scanning line, 2311-first scanning line segment, 2312-second scanning line segment, 2313-first scanning line branch, 2314-second scanning line branch, 232-common electrode bus, 233-gate driving signal line, 234-first transfer structure, 24-interlayer dielectric layer, 25-first conductive layer, 251-data line, 2510-peripheral data line, 2511-first data line segment, 2512-second data line segment, 2513-first data line branch, 2514-second data line Branch, 2515-internal data routing, 252-conductive structure, 253-transfer wire, 2531-first transfer section, 2532-second transfer section, 2533-first transfer wire branch, 2534-second transfer wire branch, 254-output electrode, 255-transfer part, 26-planarization layer, 3-pixel layer, 31-second conductive layer, 311-pixel electrode, 312-second transfer structure, 3121-first transfer hole, 3122-second transfer hole, 3123-third transfer hole, 32-protective layer, 33-third conductive layer, 331-common electrode, 34-liquid crystal layer, 4-buffer layer, 100-display area, 200-non-display area. DETAILED DESCRIPTION

[0032] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in a variety of forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the present disclosure will be comprehensive and complete and fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their detailed description will be omitted. In addition, the drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale.

[0033] Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of the illustration to another component, these terms are used in this specification only for convenience, such as according to the orientation of the examples described in the drawings. It is understood that if the device of the illustration is turned upside down, the component described as "upper" will become the component "lower". When a structure is "on" other structures, it may mean that the structure is formed integrally on the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.

[0034] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express an open-ended inclusive meaning and mean that additional elements / components / etc. may exist in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used merely as labels and are not intended to limit the quantity of their objects.

[0035] During the manufacturing process of display panels, electrostatic discharge (ESD) is easily generated when the substrate contacts the equipment. ESD can cause sudden or potential damage to the display panel, greatly reducing the quality of the display panel and affecting the customer experience. If the display panel has a weak ability to resist electrostatic discharge, it may cause abnormal operation of the display panel, affect the display effect of the display panel, or even damage the display panel.

[0036] like Figure 1As shown, the display panel includes a scan line 231 and a data line 251. Both the scan line and the data line 251 are long strip structures, and the accumulated charges will be released. The orthographic projection of the scan line 231 on the substrate intersects with the orthographic projection of the data line 251 on the substrate, and the distance between the scan line 231 and the data line 251 in the thickness direction of the display panel is relatively close, wherein the peripheral data line 2510 and the end of the scan line 231 accumulate more static electricity, and the ends of the peripheral data line 2510 and the scan line 231 are prone to electrostatic discharge, which breaks through the interlayer dielectric layer, causing the peripheral data line 2510 and the scan line 231 to short-circuit, affecting the display effect.

[0037] Based on this, the present disclosure provides a display panel. Figures 2 to 7 As shown, the display panel has a display area 100 and a non-display area 200 located outside the display area 100. The display panel also includes a substrate 1, a plurality of sub-pixels, a plurality of data wirings 251, a plurality of scanning wirings and a common electrode bus 232. The plurality of sub-pixels are arranged on one side of the substrate 1. The plurality of sub-pixels include sub-pixel columns arranged along a first direction and sub-pixel rows arranged along a second direction, and the second direction is perpendicular to the first direction. The plurality of data wirings 251 extend along the first direction and are located on both sides of the sub-pixel columns along the second direction. The plurality of data wirings 251 extend along the first direction and are located on both sides of the sub-pixel columns along the second direction. 251 includes a peripheral data line 2510; a plurality of scan lines extend along the second direction and are located on both sides of the sub-pixel row along the first direction; a common electrode bus 232 extends along the first direction and is located in the non-display area 200 on both sides of the display area 100, and the common electrode bus 232 is adjacent to the peripheral data line 2510; the distance between the end of the scan line and the common electrode bus 232, or the distance between the peripheral data line 2510 and the common electrode bus 232, is smaller than the distance between the peripheral data line 2510 and the end of the scan line.

[0038] The display panel includes a scan line, a common electrode bus 232 and a peripheral data line 2510. The common electrode bus 232 and the peripheral data line 2510 extend in a first direction, and the scan line extends in a second direction. The distance between the end of the scan line and the common electrode bus 232, or the distance between the peripheral data line 2510 and the common electrode bus 232, is greater than the distance between the end of the scan line and the peripheral data line 2510. The distance between the end of the scan line and the peripheral data line 2510 is increased, the possibility of electrostatic discharge between the end of the scan line and the peripheral data line 2510 is reduced, and the distance between the end of the scan line or the peripheral data line 2510 and the common electrode bus 232 is reduced, so that the static electricity accumulated on the end of the scan line or the peripheral data line 2510 can be released through the common electrode bus 232 with a high probability, which will not affect the display effect of the display panel and avoid damage to the display panel.

[0039] The display panel involved in the implementation manner of the present disclosure is described in detail below with reference to specific embodiments.

[0040] like Figure 2 As shown, the display module includes a display panel, which may include a base substrate 1, a driving circuit layer 2 and a pixel layer 3 which are stacked in sequence, a buffer layer 4 is provided on one side of the base substrate 1, the driving circuit layer 2 is provided on the side of the buffer layer 4 away from the base substrate 1, and the pixel layer 3 is provided on the side of the driving circuit layer 2 away from the base substrate 1.

[0041] The substrate 1 may be an inorganic substrate 1 or an organic substrate 1. For example, in one embodiment of the present disclosure, the substrate 1 may be made of glass materials such as soda-lime glass, quartz glass, sapphire glass, or may be made of metal materials such as stainless steel, aluminum, and nickel.

[0042] In another embodiment of the present disclosure, the material of the substrate 1 can be polymethyl methacrylate (PMMA), polyvinyl alcohol (PVA), polyvinyl phenol (PVP), polyether sulfone (PES), polyimide, polyamide, polyacetal, polycarbonate (PC), polyethylene terephthalate (PEmmhylenemmerephmmhalamme), polyethylene naphthalate (PEN) or a combination thereof.

[0043] In another embodiment of the present disclosure, the substrate 1 may also be a flexible substrate, for example, the substrate 1 may be made of polyimide (PI). The substrate 1 may also be a composite of multiple layers of materials, for example, in one embodiment of the present disclosure, the substrate 1 may include a bottom film layer (BommmmomFilm), a pressure-sensitive adhesive layer, a first polyimide layer, and a second polyimide layer stacked in sequence.

[0044] The driving circuit layer 2 includes a plurality of driving circuit areas. Any driving circuit area may include a driving transistor, which may be a thin film transistor, which may be selected from a top-gate thin film transistor, a bottom-gate thin film transistor or a dual-gate thin film transistor. The material of the active layer 21 may be an amorphous silicon semiconductor material, a low-temperature polycrystalline silicon semiconductor material, a metal oxide semiconductor material, an organic semiconductor material or other types of semiconductor materials; the thin film transistor may be an N-type thin film transistor or a P-type thin film transistor.

[0045] The driving transistor may have a first terminal, a second terminal and a control terminal, one of the first terminal and the second terminal may be a source of the driving transistor, and the other may be a drain of the driving transistor, and the control terminal may be a gate of the driving transistor. It can be understood that the source and drain of the driving transistor are two relative and mutually convertible concepts; when the working state of the driving transistor changes, for example, when the current direction changes, the source and drain of the driving transistor may be interchangeable.

[0046] In the present disclosure, the driving circuit layer 2 may include a transistor layer, an interlayer dielectric layer 24 and a first conductive layer 25 sequentially stacked on the base substrate 1. The transistor layer is provided with an active portion and a gate of the transistor, and the first conductive layer 25 includes a data wiring 251 and a conductive structure 252, and the data wiring 251 and the conductive structure 252 are electrically connected to the source and drain of the transistor, respectively. Optionally, the transistor layer may include an active layer 21, a gate insulating layer 22, and a gate layer 23 stacked between the base substrate 1 and the interlayer dielectric layer 24. The positional relationship of each film layer can be determined according to the film layer structure of the thin film transistor.

[0047] In some embodiments, the active layer 21 can be used to form the active part of the transistor, and the active layer 21 includes a channel region and a source region 213 and a drain region 214 located on both sides of the channel region; wherein the channel region can maintain semiconductor characteristics, and the semiconductor materials of the source region 213 and the drain region 214 are partially or completely conductive. The gate layer 23 can be used to form a plurality of scanning lines, and the first conductive layer 25 can be used to form data lines 251, power lines, and other lines.

[0048] In the present disclosure, the driving circuit layer 2 may include an active layer 21, a gate insulating layer 22, a gate layer 23, an interlayer dielectric layer 24 and a first conductive layer 25 stacked sequentially on the base substrate 1, and the thin film transistor formed in this way is a top-gate thin film transistor. The driving circuit layer 2 may also include a planarization layer 26, and the planarization layer 26 may be provided as one layer or multiple layers according to different situations. The planarization layer 26 may be provided on the side of the first conductive layer 25 away from the base substrate 1, and the surface of the planarization layer 26 away from the base substrate 1 is a plane.

[0049] The display module further includes a pixel layer 3, which is disposed on a side of the driving circuit layer 2 away from the base substrate 1. The pixel layer 3 may include a second conductive layer 31, a protective layer 32, a third conductive layer 33 and a liquid crystal layer 34. The second conductive layer 31 is disposed on a side of the planarization layer 26 away from the base substrate 1. The second conductive layer 31 may include a pixel electrode 311. A protective layer 32 is disposed on a side of the second conductive layer 31 away from the base substrate 1. The protective layer 32 covers the second conductive layer 31 and the planarization layer 26. A third conductive layer 33 is disposed on a side of the protective layer 32 away from the base substrate 1. The third conductive layer 33 may include a common electrode 331. Both the pixel electrode 311 and the common electrode 331 have a driving surface, so it can be considered that the liquid crystal layer 34 is located between the pixel electrode 311 and the common electrode 331.

[0050] like Figure 3 As shown, the gate layer 23 includes a scan line 231, which extends along the second direction. The scan line 231 can overlap with the channel area of ​​the active part (not shown in the figure), and the overlapping part is reused as the gate of the driving transistor. The first conductive layer 25 includes a data line 251 and a conductive structure 252. The data line 251 extends along the first direction. The data line 251 is connected to the source area 213 of the active part through a via to form the source of the driving transistor. The conductive structure 252 is connected to the drain area 214 of the active part through a via to form the drain of the driving transistor. The second conductive layer 31 includes a pixel electrode 311, and the pixel electrode 311 is connected to the conductive structure 252 through a via. The third conductive layer includes a common electrode 331, and the pixel electrode 311, the corresponding part of the liquid crystal layer 34 and the corresponding part of the common electrode 331 form a sub-pixel.

[0051] The gate layer also includes a gate drive signal line 233, which extends along the first direction. The gate drive signal line 233 can be used to load the gate drive signal to the gate of the driving transistor. The data line 251 is used to load the data signal to the source of the driving transistor. The data signal can be transmitted from the source region of the driving transistor to the drain region of the driving transistor through the channel region of the driving transistor, and then transmitted to the pixel electrode 311 through the conductive structure 252. The gate layer 23 also includes a common electrode bus 232, which extends along the first direction and is located in the non-display area 200. The common electrode bus 232 is arranged adjacent to the peripheral data line 2510. The common electrode 331 can be connected to the common electrode bus 232 (not shown in the figure) to load the reference signal to the common electrode 331. The data signal and the reference signal form a voltage difference between the common electrode 331 and the pixel electrode 311, so that the pixel electrode 311 and the common electrode 331 form an electric field for driving the liquid crystal to rotate, and the transmittance of the liquid crystal molecules is changed by the electric field to realize the display of different images.

[0052] The first conductive layer 25 also includes an output electrode 254, a transfer line 253 and a transfer portion 255. One end of the transfer line 253 is transferred to one end of the row of scanning lines through a via, and the other end is connected to the output electrode 254. The transfer line 253 is connected across the common electrode bus 232, and the orthographic projection of the transfer line 253 on the substrate overlaps the orthographic projection of the common electrode bus 232 on the substrate. One end of the transfer portion 255 is connected to the output electrode 254, and the other end is transferred to the gate drive signal line 233 corresponding to the next row of scanning lines. After the scanning of the row of scanning lines is completed, the next gate drive signal is input through the gate drive signal line 233 corresponding to the next row of scanning lines.

[0053] The gate layer also includes a first transfer structure 234, and the second conductive layer 31 also includes a second transfer structure 312. The second transfer structure 312 is provided with a first transfer hole 3121 and a second transfer hole 3122 at both ends, and a third transfer hole 3123 is provided between the first transfer hole 3121 and the second transfer hole 3122. The second transfer structure 312 is transferred to the transfer line 253 through the first transfer hole 3121, and the second transfer structure 312 is transferred to the gate drive signal line 233 and the transfer part 255 through the second transfer hole 3122, and is transferred to the output electrode 254 through the transfer part 255. The second transfer structure 312 is transferred to the first transfer structure 234 through the third transfer hole 3123.

[0054] It should be noted that the first direction is Figure 7 The x direction is shown in Figure 7 The y direction is shown in FIG. 1 , and the second direction is perpendicular to the first direction.

[0055] The display panel includes sub-pixel columns arranged along a first direction and sub-pixel rows arranged along a second direction, the sub-pixel columns include multiple sub-pixels arranged along the first direction, and the sub-pixel rows include sub-pixels arranged along the second direction; a data line 251 is provided on both sides of each sub-pixel column, and the data line 251 extends along the first direction. The multiple data lines 251 include a peripheral data line 2510 and an internal data line 2515. The peripheral data line 2510 is located at the edge of the display area 100 and is adjacent to the common electrode bus 232 along the second direction. The internal data line 2515 is located on the side of the peripheral data line 2510 away from the non-display area 200.

[0056] A scanning line is provided on both sides of each sub-pixel row, and the scanning line extends along the second direction. The scanning line includes a first scanning line segment 2311, and the orthographic projection of the first scanning line segment 2311 on the substrate overlaps with the orthographic projection of the plurality of data lines 251 on the substrate. The first end of the first scanning line segment 2311 can be connected to the adapter line 253 through a via hole, and the second end of the first scanning line segment 2311 is retracted inward in a direction away from the non-display area 200, at least to ensure that the orthographic projection of the first scanning line segment 2311 on the substrate does not overlap with the orthographic projection of the peripheral data lines 2510 on the substrate.

[0057] The first end of the first scanning line segment 2311 is connected to the output electrode 254 through the adapter line 253, and the static electricity accumulated at the first end of the first scanning line segment 2311 can be released through the adapter line 253, reducing the possibility of electrostatic discharge. The distance between the second end of the first scanning line segment 2311 and the peripheral data line 2510 is increased, which reduces the electrostatic discharge between the two to a certain extent. At the same time, the distance between the scanning line and the common electrode bus 232 allows the end of the scanning line to discharge through the common electrode bus 232. It should be noted that the first end and the second end of the first scanning line segment 2311 are alternately arranged along the first direction.

[0058] like Figure 4 As shown, Figure 3 The difference is that the scan line includes a first scan line segment 2311, and the first scan line segment 2311 is located between the peripheral data line 2510 and the common electrode bus 232 near its two ends. The first end and the second end of the first scan line segment 2311 are provided with a second scan line segment 2312, and the second scan line segment 2312 is located between the common electrode bus 232 and the first end of the first scan line segment 2311, and between the common electrode bus 232 and the second end of the first scan line segment 2311. The distance between the second end of the first scan line segment 2311 and the peripheral data line 2510 is further enlarged, and the distance between the scan line and the common electrode bus 232 is shortened, so that the electrostatic discharge between the scan line and the peripheral data line 2510 is reduced, and the possibility of discharge through the common electrode bus 232 at the end of the scan line is increased.

[0059] The second scan routing segment 2312 includes a first scan routing branch 2313 and a second scan routing branch 2314, wherein the first scan routing branch 2313 extends along the second direction, and the first scan routing branch 2313 is connected to the first end and the second end of the first scan routing segment 2311, and the first scan routing branch 2313 extends along the second direction and is parallel to or located on the same straight line as the first scan routing segment 2311. The second scan routing branch 2314 may include a first scan branch segment and a second scan branch segment, wherein one end of the first scan branch segment is connected to the first end and the second end of the first scan routing segment 2311, and the first scan branch segment extends along the first direction, and the second scan branch segment is connected to the other end of the first branch segment and extends along the second direction. The second scan routing segment 2312 is provided with two scan branch segments, which can increase the channel for electrostatic discharge of the scan routing.

[0060] In addition, electrostatic discharge is easily generated between the adapter line 253 and the peripheral data line 2510. The second scanning line segment 2312 located at the first end of the first scanning line segment 2311 can release the static electricity accumulated on the adapter line 253 through the common electrode bus 232, thereby avoiding electrostatic discharge between the adapter line 253 and the peripheral data line 2510 and affecting the gate drive signal and the data signal.

[0061] like Figure 5 As shown, Figure 4 The difference is that the second scanning line segment 2312 only includes the first scanning line branch 2313, and the end of the first scanning line branch 2313 away from the first scanning line segment 2311 is set to be tapered, that is, the cross-sectional area of ​​the end of the first scanning line branch 2313 away from the first scanning line segment 2311 gradually decreases in the direction away from the first scanning line segment 2311. The induced charges generated and accumulated by the scanning line will be concentrated at the tip of the first scanning line branch 2313, which has a strong charge release capability and will quickly release the accumulated charges, thereby avoiding the potential electrostatic discharge risk of the scanning line.

[0062] like Figure 6 As shown, Figure 3The difference is that the peripheral data line 2510 includes a first data line segment 2511 and a second data line segment 2512, the orthographic projection of the first data line segment 2511 on the substrate overlaps with the orthographic projection of the scan line on the substrate, and the second data line segment 2512 is located between the first data line segment 2511 and the common electrode bus 232. The distance between the second end of the first scan line segment 2311 and the peripheral data line 2510 is increased, and the distance between the peripheral data line 2510 and the common electrode bus 232 is shortened, which reduces the electrostatic discharge between the scan line and the peripheral data line 2510, and increases the possibility of the peripheral data line 2510 discharging through the common electrode bus 232.

[0063] The second data routing segment 2512 includes a first data routing branch 2513 and a second data routing branch 2514, wherein the first data routing branch 2513 is connected to the first data routing segment 2511, and the first data routing branch 2513 extends along the second direction and is perpendicular to the first data routing segment 2511. The second data routing branch 2514 may include a first data branch segment and a second data branch segment, wherein one end of the first data branch segment is connected to the first data routing branch 2513, the first branch segment extends along the first direction, and the second data branch segment is connected to the other end of the first data branch segment and extends along the second direction. The second data routing segment 2512 is provided with two data branch segments, which can increase the channel for electrostatic discharge of the peripheral data routing 2510.

[0064] The adapter wire 253 also includes a second adapter section 2532, which includes a first adapter wire branch 2533 and a second adapter wire branch 2534. The first adapter wire branch 2533 is connected to the first adapter wire section 2531 and extends along the second direction. The second adapter wire branch 2534 may include a first adapter branch section and a second adapter branch section. One end of the first adapter branch section is connected to the first adapter wire branch 2533. The first adapter branch section extends along the first direction, and the second adapter branch section is connected to the other end of the first adapter branch section and extends along the second direction. The second adapter section 2532 is provided with two adapter branch sections, which can increase the channel for electrostatic discharge of the adapter wire 253.

[0065] like Figure 7 As shown, Figure 6The difference is that the second data routing segment 2512 only includes the first data routing branch 2513, and the end of the first data routing branch 2513 away from the first data routing segment 2511 is set to be tapered, that is, the cross-sectional area of ​​the end of the first data routing branch 2513 away from the first data routing segment 2511 gradually decreases in the direction away from the first data routing segment 2511. The induced charges generated and accumulated by the peripheral data routing 2510 will be concentrated and distributed at the tip of the first data routing branch 2513, which has a strong charge release capability and will quickly release the accumulated charges, thereby avoiding the potential electrostatic discharge risk of the peripheral data routing 2510.

[0066] Similarly, the second adapter section 2532 only includes the first adapter wire branch 2533, and the end of the first adapter wire branch 2533 away from the first adapter section 2531 is set to be tapered, that is, the cross-sectional area of ​​the end of the first adapter wire branch 2533 away from the first adapter section 2531 gradually decreases in the direction away from the first adapter section 2531. The induced charges generated and accumulated by the adapter wire 253 will be concentrated at the tip of the first adapter wire branch 2533, and the tip has a strong charge release capability, which will quickly release the accumulated charges, thereby avoiding the potential electrostatic discharge risk of the adapter wire 253.

[0067] It can be understood that, whether in FIG. 1 or FIG. 2 , the distance between the end of the scan line and the common electrode bus 232 is less than the distance between the end of the scan line and the peripheral data line 2510. Whether in FIG. 1 or FIG. 2 , the distance between the peripheral data line 2510 and the common electrode bus 232 is less than the distance between the peripheral data line 2510 and the end of the scan line. The distance between the adapter line 253 and the peripheral data line 2510 is greater than the distance between the adapter line 253 and the common electrode bus 232.

[0068] It should be noted that the distance between the end of the scanning line and the common electrode bus 232, or the distance between the peripheral data line 2510 and the common electrode bus 232 is greater than 10 microns, so as to ensure static discharge and prevent short circuits between the scanning line and the common electrode bus 232, and between the peripheral data line 2510 and the common electrode bus 232. Subject to the specifications of the display panel and the width of the non-display area 200, the distance is usually not too large and can be set to 10-30 microns.

[0069] The embodiment of the present disclosure also provides a display device. The display device may include any display module of the embodiment of the present disclosure. The specific structure and beneficial effects of the display module have been described in detail above, so they will not be repeated here.

[0070] It should be noted that, in addition to the display module, the display device also includes other necessary components and components, such as circuit boards, power cords, etc. Those skilled in the art may make corresponding supplements according to the specific usage requirements of the display device, which will not be elaborated here.

[0071] The display device can be a traditional electronic device, such as a mobile phone, a computer, a television, a projector, and a camcorder, or it can be an emerging wearable device, such as VR glasses, which are not listed here one by one.

[0072] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any modification, use or adaptation of the present disclosure, which follows the general principles of the present disclosure and includes common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present disclosure are indicated by the appended claims.

Claims

1. A display panel, comprising a display area and a non-display area located outside the display area, characterized in that: The display panel further includes: substrate substrate; A plurality of sub-pixels are disposed on one side of the base substrate, wherein the plurality of sub-pixels include sub-pixel columns arranged along a first direction and sub-pixel rows arranged along a second direction, wherein the second direction is perpendicular to the first direction; a plurality of data lines extending along the first direction and located on both sides of the sub-pixel column along the second direction, the plurality of data lines including peripheral data lines; a plurality of scanning lines extending along the second direction and located on both sides of the sub-pixel row along the first direction; A common electrode bus extending along the first direction and located in the non-display area on both sides of the display area, the common electrode bus being arranged adjacent to the peripheral data wiring; The distance between the end of the scanning line and the common electrode bus, or the distance between the peripheral data line and the common electrode bus, is smaller than the distance between the peripheral data line and the end of the scanning line.

2. The display panel according to claim 1, characterized in that: The scanning line includes a first scanning line segment, the first scanning line segment has a first end and a second end opposite to each other along the second direction, the first end and the second end of the first scanning line segment are alternately arranged along the first direction, the display panel also includes a switching line and an output electrode, the output electrode is located on a side of the common electrode bus away from the display area, the switching line includes a first switching section, one end of the first switching section is connected to the first end of the first scanning line segment through a via hole, and the other end is connected to the output electrode through a via hole.

3. The display panel according to claim 2, characterized in that: At least one of the first end and the second end of the first scanning wiring segment is connected to a second scanning wiring segment, and the second scanning wiring segment is located between the common electrode bus and the peripheral data wiring.

4. The display panel according to claim 3, characterized in that: The first end and the second end of the first scan line segment are respectively located between the peripheral data lines and the common electrode bus on both sides of the display area, and the second scan line segment is at least partially located between the first transfer segment and the common electrode bus.

5. The display panel according to claim 3, characterized in that: The second scanning routing segment includes a first scanning routing branch and a second scanning routing branch, the first scanning routing branch is connected to the end of the first scanning routing segment and extends toward the direction close to the common electrode bus, and the second scanning routing branch is connected to the first scanning routing branch and extends toward the direction close to the common electrode bus.

6. The display panel according to claim 3, characterized in that: The second scanning routing segment includes a first scanning routing branch extending along the second direction, and a cross-sectional area of ​​an end of the first scanning routing branch away from the first scanning routing segment gradually decreases along a direction away from the first scanning routing segment.

7. The display panel according to claim 1, characterized in that: The peripheral data routing includes a first data routing segment and a second data routing segment, the first data routing segment extends along the first direction, the second data routing segment extends along the second direction, and the second data routing segment is located between the first data routing segment and the common electrode bus.

8. The display panel according to claim 7, characterized in that: The second data routing segment includes a first data routing branch and a second data routing branch, the first data routing branch is connected to the end of the first data routing segment and extends in a direction close to the common electrode bus, and the second data routing branch is connected to the first data routing branch and extends in a direction close to the common electrode bus.

9. The display panel according to claim 7, characterized in that: The second data routing segment includes a first data routing branch extending along the second direction, and a cross-sectional area of ​​an end of the first data routing branch away from the first data routing segment gradually decreases along a direction away from the first data routing segment.

10. The display panel according to claim 2, characterized in that: The adapter line also includes a second adapter section, which is connected to the first adapter section and located between the first adapter section and the common electrode bus. The distance between the adapter line and the peripheral data wiring is greater than the distance between the second adapter section and the common electrode bus.

11. The display panel according to claim 10, characterized in that: The second adapter section includes a first adapter branch and a second adapter branch, the first adapter branch is connected to the end of the first adapter section and extends toward the direction close to the common electrode bus, and the second adapter branch is connected to the first adapter branch and extends toward the direction close to the common electrode bus.

12. The display panel according to claim 10, characterized in that: The second transition section includes a first transition line branch extending along the second direction, and a cross-sectional area of ​​an end of the first transition line branch away from the first transition section gradually decreases in a direction away from the first transition section.

13. The display panel according to claim 2, characterized in that: The display panel includes a gate layer and a first conductive layer, the scan line and the common electrode bus are located in the gate layer, and the data line, the switching line and the output electrode are located in the first conductive layer.

14. The display panel according to claim 1, characterized in that: The distance between the end of the scanning line and the common electrode bus, or the distance between the peripheral data line and the common electrode bus is greater than or equal to 10 micrometers.

15. A display device, characterized in that: A display panel comprising any one of claims 1 to 14.

Images