Method for preparing GaN power device based on magnetron sputtering deposition

Abstract

The invention relates to a method for preparing a GaN power device based on magnetron sputtering deposition, and belongs to the field of microelectronics, and the method comprises the steps: sequentially growing an AlN nucleating layer, a GaN buffer layer, an AlN insertion layer, an AlGaN barrier layer and a GaN cap layer on a substrate; etching the GaN cap layer, growing a source electrode and a drain electrode on an etching area, and annealing the source electrode and the drain electrode; putting the device into direct-current magnetron sputtering equipment, and growing a gate dielectric layer and a gate electrode metal material at the same time; and taking out the device, covering photoresist above a gate electrode region, etching a gate electrode metal material outside the gate electrode region to form a gate electrode, and growing a passivation layer in an etching region to obtain the GaN power device. According to the invention, the deposition of the combination of the gate dielectric layer and the gate electrode metal material is realized in the same chamber, the potential pollution risk in the process steps can be effectively reduced, the interface performance of the device is improved, the preparation efficiency can be improved, and the production cost is reduced.

Description

Technical Field

[0001] The invention relates to a method for preparing a GaN power device based on magnetron sputtering deposition, which aims to improve the interface characteristics of the gallium nitride GaN power device, improve production efficiency, and reduce manufacturing costs, and belongs to the field of microelectronic technology. Background Art

[0002] In recent years, third-generation semiconductor materials represented by GaN have attracted widespread attention due to their remarkable physical properties. These materials have wide bandgap, high electron saturation drift velocity, high breakdown electric field strength and excellent thermal conductivity, which makes them show great development potential in the fields of high temperature, high voltage, high power and microwave devices. Especially in the fields of wireless communication and radar, GaN high electron mobility transistors (HEMT) show broad application prospects due to their high efficiency and reliability.

[0003] Although GaN devices have significant performance advantages, their preparation process is relatively complex and involves multiple process steps. The complexity of these steps may lead to additional external contamination, which in turn affects the overall performance of the device. In the preparation process of GaN devices, after the growth of the gate dielectric layer is completed, the subsequent gate growth process may introduce contamination on the surface of the gate dielectric layer. This contamination will not only weaken the interface quality between the gate material and the gate dielectric layer, but also increase the interface state at the gate interface, resulting in a decrease in device performance.

[0004] In the application of power devices, the current collapse effect caused by interface state problems is crucial to the performance and reliability of the device. This effect not only limits the working efficiency of the device, but also determines its market scope and economic value in practical applications. Therefore, it is particularly important to ensure that other device properties are not significantly affected during the manufacturing process. Summary of the invention

[0005] In view of the shortcomings of the prior art, the present invention provides a method for preparing GaN power devices based on magnetron sputtering deposition, which realizes the deposition of a combination of a gate dielectric layer and a gate electrode metal material in the same chamber, which can not only effectively reduce the potential contamination risk in the process steps and improve the interface performance of the device, but also improve the preparation efficiency and reduce production costs. By optimizing the manufacturing process, it is expected to achieve a significant improvement in production efficiency without sacrificing device performance. This technical route will provide strong support for the widespread application and commercial development of GaN devices, and open up new possibilities for promoting the development of high-efficiency electronic devices.

[0006] Terminology explanation: Interface states: Interface states refer to special electronic states existing at the interface between semiconductors and insulating media. They are special electronic energy levels caused by lattice mismatch, material defects or impurities, which can capture or release electrons under certain conditions. The existence of interface states affects the electrical properties of semiconductor devices, especially in metal-insulator-semiconductor (MIS-HEMT) devices.

[0007] The present invention adopts the following technical solution: A method for preparing a GaN power device based on magnetron sputtering deposition is intended to improve the interface characteristics of the device, improve production efficiency, and reduce manufacturing costs, comprising the following steps: S1: growing an AlN nucleation layer, a GaN buffer layer, an AlN insertion layer, an AlGaN barrier layer and a GaN cap layer on the substrate in sequence; S2: Etching the GaN cap layer in the area where the source electrode and the drain electrode need to be grown; S3: growing a source electrode and a drain electrode on the etched area and performing annealing to form an ohmic contact; S4: placing the device after the ohmic contact is prepared into a DC magnetron sputtering device; using the DC magnetron sputtering device to simultaneously grow a gate dielectric layer and a gate electrode metal material; S5: Take the device out of the DC magnetron sputtering equipment, cover the gate electrode area with photoresist, etch the gate electrode metal material outside the gate electrode area, preferably use a metal dry etcher (LAM-9600) to etch, stop etching at the surface of the gate dielectric layer, form a gate electrode, and grow a passivation layer in the etched area to obtain a gallium nitride high electron mobility transistor.

[0008] After preparation, a gallium nitride HEMT device is obtained, which includes a SiC substrate, an AlN nucleation layer, a GaN buffer layer, an AlN insertion layer, an AlGaN barrier layer, a GaN cap layer and a gate dielectric layer from bottom to top, wherein the GaN buffer layer, the AlN insertion layer and the AlGaN barrier layer form a heterojunction; a source electrode and a drain electrode are arranged on the GaN cap layer; a gate electrode is arranged on the gate dielectric layer; and a passivation layer is arranged between the gate electrode and the source electrode, and between the gate electrode and the drain electrode.

[0009] Preferably, in step S4, the process of growing the gate dielectric layer and the gate electrode metal material is: S41: placing the device with the prepared source electrode and drain electrode in a DC magnetron sputtering device, setting a vacuuming program, and performing a vacuuming process on the chamber; S42: When the vacuum degree reaches the predetermined process requirement, setting the sputtering parameters required for preparing the gate dielectric layer, including sputtering power, gas flow, chamber pressure and temperature, etc., and performing sputtering deposition of the gate dielectric layer to form a uniform insulating layer; S43: After the sputtering deposition of the gate dielectric layer is completed, the chamber is evacuated again to remove residual gas and sputtering products to ensure the cleanliness and stability of the sputtering environment, the sputtering parameters are adjusted to match the deposition requirements of the gate electrode metal material, and the gate electrode metal material is sputtered. After the sputtering is completed, a composite structure including the gate dielectric layer and the gate electrode metal material is obtained.

[0010] Preferably, in step S42, the sputtering parameters required for preparing the gate dielectric layer are: sputtering power of 200-300 W, Ar2 gas flow of 10-50 sccm, chamber pressure of 10-50 mTorr, temperature of 10-40°C; and the ratio of N2 to Ar2 is 1:1.

[0011] The gate dielectric layer (AlN, AlScN, TiN, SiO2, etc.) has a high nitrogen and argon ratio requirement during the preparation process. A high nitrogen content can easily cause target poisoning and unstable film phase structure. If the nitrogen content is too low, the resistance of the film is low and a high resistance state cannot be achieved, thereby failing to realize the function of an insulating dielectric layer. The present invention adopts a 1:1 ratio of N2 to Ar2, which can ensure that the film phase structure is relatively stable and a high resistance state is achieved to realize the function of an insulating dielectric layer.

[0012] Further preferably, the sputtering parameters required for preparing the gate dielectric layer are: the DC sputtering power is set to 250 W, the Ar2 gas flow rate is 20 sccm, the chamber pressure is 30 mTorr, and the temperature is 20°C.

[0013] Preferably, in step S43, the sputtering parameters are adjusted to match the deposition requirements of the gate electrode metal material, and the adjusted sputtering parameters are: first deposit Ni, the sputtering power is 180~220 W, and the time is 290~320s; then deposit Au, the sputtering power is 180~220 W, and the time is 210~250s.

[0014] The present invention realizes the deposition of the combination of the gate dielectric layer and the gate electrode metal material in the same chamber. This improvement simplifies the process flow, reduces the experimental cost, and effectively reduces the influence of external factors on the device preparation process.

[0015] Preferably, the gate dielectric layer has a thickness of 2-100 nm, and the material is AlN, AlScN, TiN or SiO2; further preferably, the gate dielectric layer has a thickness of 20 nm.

[0016] The gate electrode material is a metal material such as Ta, Ni, Au, W or Cr.

[0017] Preferably, the thickness of the AlN nucleation layer is 1-2000 nm; further preferably, the thickness of the AlN nucleation layer is 100 nm; The thickness of the GaN buffer layer is 0.1-5 μm, and the GaN buffer layer is not doped; more preferably, the thickness of the GaN buffer layer is 1.5 μm.

[0018] Preferably, the thickness of the AlN insertion layer is 0.5 to 2 nm; further preferably, the thickness of the AlN insertion layer is 1 nm.

[0019] Preferably, the thickness of the AlGaN barrier layer is 10-30 nm, and the molar ratio of Al is 10-30%; further preferably, the thickness of the AlGaN barrier layer is 20 nm, and the molar ratio of Al is 20%.

[0020] Preferably, the distance L between the source electrode and the drain electrode is SD is 3 to 300 μm; further preferably, the distance L between the source electrode and the drain electrode is SD is 20 μm.

[0021] Preferably, the length L of the gate electrode is G The distance between the gate electrode and the source electrode is 1~100 μm. GS The distance between the gate electrode and the drain electrode is 1~100 μm. GD is 1-100 μm; further preferably, the length L of the gate electrode G , the distance between the gate electrode and the source electrode L GS , the distance between the gate electrode and the drain electrode L GD 2 μm, 5 μm and 13 μm respectively.

[0022] For any details not provided in the present invention, please refer to the prior art.

[0023] The beneficial effects of the present invention are: 1. Reduce off-state leakage and improve device performance The present invention uses the method of sputtering the gate dielectric layer and the gate electrode metal material in the same chamber to quickly prepare the MIS-HEMT device. The gate dielectric layer can effectively reduce the leakage current and enhance the isolation performance of the gate, thereby improving the breakdown voltage and working stability of the device. At the same time, the gate electrode metal material has excellent conductivity and stability, which helps to achieve low resistance and high-speed switching, thereby improving the switching frequency and overall performance of the device. The combination of the two further enhances the reliability of the device.

[0024] 2. Optimize interface quality The present invention completes the deposition of the gate dielectric layer and the gate electrode metal material in the same magnetron sputtering chamber, avoiding the chamber opening and closing and sample transfer process when depositing the dielectric layer and the gate metal, thereby significantly reducing the time of exposure to the air. In traditional methods, oxygen, moisture and other pollutants in the external environment will introduce interface defects (such as oxide layers or impurities), resulting in an increase in interface state density. Completing deposition in the same chamber can reduce these sources of contamination, thereby forming a purer interface and improving the quality of the interface between the gate and the dielectric layer, thereby reducing leakage and improving electron mobility.

[0025] Completing the deposition of the gate dielectric layer and the gate electrode metal material in the same magnetron sputtering chamber can effectively reduce the chemical bond mismatch and structural defects at the interface, thereby reducing the interface state density. During the magnetron sputtering process, the gate electrode metal material is deposited directly on the gate dielectric layer, reducing the surface damage caused by the exposure of the substrate surface. This process can effectively reduce the shallow energy level trap density at the interface and inhibit the capture of carriers by the interface state.

[0026] In high-power devices such as GaN HEMT, interface states can lead to current collapse, that is, under high electric fields, interface states capture charge, causing the channel current to drop. By reducing the density of interface states, the current collapse phenomenon can be effectively suppressed and the current switching ratio of the device can be enhanced. Deposition of the gate dielectric layer and gate electrode metal material in the same magnetron sputtering chamber can reduce the long-term impact of interface states on the device and increase the service life of the device.

[0027] 3. Simplify the process and improve preparation efficiency The present invention adopts unified deposition equipment and process flow, which is conducive to process optimization and consistency control, reduces process fluctuations caused by multiple equipment switching, and improves the repeatability and reliability of the preparation process; at the same time, multiple steps of the process are completed in the same chamber, shortening the preparation time, improving production efficiency, and reducing overall manufacturing costs; reducing equipment transfer and processing steps, and reducing time and material loss in production.

[0028] 4. Enhance device consistency and reliability, and promote integration and miniaturization The present invention completes the deposition of gate dielectric and gate electrode metal materials through the chamber of the same DC magnetron sputtering equipment, ensuring that the gate dielectric and gate electrode metal materials have consistent physical and electrical properties, improving the consistency and yield of the device; the high-quality interface and material combination help to improve the long-term stability and reliability of the device under high temperature and high voltage conditions. The optimized gate electrode structure and high-quality gate dielectric layer help to reduce the device size, improve the integration, and meet the needs of modern high-density electronic devices.

[0029] 5. Facilitate subsequent process integration and cost control The method of the present invention has good compatibility with other process steps (such as metallization of source electrode / drain electrode, passivation layer deposition, etc.), which is convenient for subsequent process integration and multi-layer structure design; by optimizing the process steps, reducing material waste and energy consumption, it helps to reduce production costs and achieve a more environmentally friendly manufacturing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The drawings in the specification, which constitute a part of the present application, are used to provide further understanding of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute improper limitations on the present application.

[0031] Figure 1 A schematic diagram of a gallium nitride HEMT device prepared by the method of the present invention; Figure 2 A schematic diagram of depositing materials in a chamber of a DC magnetron sputtering device in the method of the present invention; Figure 3 is a schematic diagram of a process of forming a gate electrode by etching in the present invention; In the figure, 1-SiC substrate, 2-AlN nucleation layer, 3-GaN buffer layer, 4-AlN insertion layer, 5-AlGaN barrier layer, 6-GaN cap layer, 7-gate dielectric layer, 8-source electrode, 9-drain electrode, 10-gate electrode, 11-passivation layer. DETAILED DESCRIPTION

[0032] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of the present invention are clearly and completely described below in conjunction with the drawings in the implementation of this specification, but are not limited to this. Anything not fully described in the present invention shall be based on the conventional technology in the art.

[0033] Example 1 A method for preparing GaN power devices based on magnetron sputtering deposition, such as Figure 1 As shown, the following steps are included: S1: growing an AlN nucleation layer 2, a GaN buffer layer 3, an AlN insertion layer 4, an AlGaN barrier layer 5 and a GaN cap layer 6 in sequence on a SiC substrate 1; S2: etching the GaN cap layer 6 in the area where the source electrode 8 and the drain electrode 9 need to be grown; S3: growing a source electrode 8 and a drain electrode 9 on the etched area and performing annealing to form an ohmic contact; S4: placing the device after the ohmic contact is prepared into a DC magnetron sputtering device; using the DC magnetron sputtering device to simultaneously grow the gate dielectric layer 7 and the gate electrode 10 metal material; S5: Take the device out of the DC magnetron sputtering device and cover the gate electrode 10 region with photoresist, such as Figure 3 As shown, the gate electrode metal material outside the gate electrode area is etched, preferably using a metal dry etcher (LAM-9600) to etch, and the etching stops at the surface of the gate dielectric layer to form a gate electrode, and a passivation layer 11 is grown in the etched area to obtain a gallium nitride high electron mobility transistor.

[0034] After preparation, a gallium nitride HEMT device is obtained, which includes a SiC substrate, an AlN nucleation layer, a GaN buffer layer, an AlN insertion layer, an AlGaN barrier layer, a GaN cap layer and a gate dielectric layer from bottom to top, wherein the GaN buffer layer, the AlN insertion layer and the AlGaN barrier layer form a heterojunction; a source electrode and a drain electrode are arranged on the GaN cap layer; a gate electrode is arranged on the gate dielectric layer; and a passivation layer is arranged between the gate electrode and the source electrode, and between the gate electrode and the drain electrode.

[0035] Example 2 A method for preparing a GaN power device based on magnetron sputtering deposition, as described in Example 1, except that in step S4, Figure 2 As shown, the process of growing the gate dielectric layer and the gate electrode metal material is: S41: placing the device with the prepared source electrode and drain electrode in a DC magnetron sputtering device, setting a vacuuming program, and performing a vacuuming process on the chamber; S42: When the vacuum degree reaches the predetermined process requirement, setting the sputtering parameters required for preparing the gate dielectric layer, including sputtering power, gas flow, chamber pressure and temperature, etc., and performing sputtering deposition of the gate dielectric layer to form a uniform insulating layer; The sputtering parameters were as follows: the DC sputtering power was set to 250 W, the Ar2 gas flow rate was 20 sccm, the chamber pressure was 30 mTorr, and the temperature was 20 °C; the ratio of N2 to Ar2 was 1:1.

[0036] The gate dielectric layer (AlN, AlScN, TiN, SiO2, etc.) has a high nitrogen and argon ratio requirement during the preparation process. A high nitrogen content can easily cause target poisoning and unstable film phase structure. If the nitrogen content is too low, the resistance of the film is low and a high resistance state cannot be achieved, thereby failing to realize the function of an insulating dielectric layer. The present invention adopts a 1:1 ratio of N2 to Ar2, which can ensure that the film phase structure is relatively stable and a high resistance state is achieved to realize the function of an insulating dielectric layer.

[0037] S43: After the sputtering deposition of the gate dielectric layer is completed, the sputtering deposition parameters of the gate dielectric layer are turned off, and the chamber is evacuated again to remove residual gas and sputtering products to ensure the cleanliness and stability of the sputtering environment. The sputtering parameters are adjusted to match the deposition requirements of the gate electrode metal material, and the gate electrode metal material is sputtered. After the sputtering is completed, a composite structure including the gate dielectric layer and the gate electrode metal material is obtained.

[0038] In step S43, the sputtering parameters are adjusted to match the deposition requirements of the gate electrode metal material. The adjusted sputtering parameters are: first deposit Ni with a sputtering power of 200 W for 309 s; then deposit Au with a sputtering power of 200 W for 231 s.

[0039] The present invention realizes the deposition of the combination of the gate dielectric layer and the gate electrode metal material in the same chamber. This improvement simplifies the process flow, reduces the experimental cost, and effectively reduces the influence of external factors on the device preparation process.

[0040] Example 3 A method for preparing a GaN power device based on magnetron sputtering deposition is as described in Example 2, except that the gate dielectric layer 7 has a thickness of 20 nm and is made of AlN.

[0041] The gate materials are Ni and Au.

[0042] The thickness of the AlN nucleation layer 2 is 100 nm; The thickness of the GaN buffer layer 3 is 1.5 μm and is not doped; the thickness of the AlN insertion layer 4 is 1 nm.

[0043] The thickness of the AlGaN barrier layer 5 is 20 nm, and the molar ratio of Al is 20%.

[0044] Example 4 A method for preparing a GaN power device based on magnetron sputtering deposition, as described in Example 3, except that the distance L between the source electrode 8 and the drain electrode 9 is SD is 20 μm.

[0045] The length L of the gate electrode 10 G , the distance L between the gate electrode 10 and the source electrode 8 GS , the distance L between the gate electrode 10 and the drain electrode 9 GD 2 μm, 5 μm and 13 μm respectively.

[0046] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for preparing GaN power devices based on magnetron sputtering deposition, characterized in that: The steps include: S1: growing an AlN nucleation layer, a GaN buffer layer, an AlN insertion layer, an AlGaN barrier layer and a GaN cap layer on the substrate in sequence; S2: Etching the GaN cap layer in the area where the source electrode and the drain electrode need to be grown; S3: growing a source electrode and a drain electrode on the etched area and performing annealing to form an ohmic contact; S4: placing the device after the ohmic contact is prepared into a DC magnetron sputtering device; using the DC magnetron sputtering device to simultaneously grow a gate dielectric layer and a gate electrode metal material; S5: Take the device out of the DC magnetron sputtering equipment, cover the gate electrode area with photoresist, etch the gate electrode metal material outside the gate electrode area, and stop etching when the gate dielectric layer is formed to form a gate electrode. A passivation layer is grown in the etched area to obtain a gallium nitride high electron mobility transistor.

2. The method for preparing a GaN power device based on magnetron sputtering deposition according to claim 1, characterized in that: In step S4, the process of growing the gate dielectric layer and the gate electrode metal material is as follows: S41: placing the device with the prepared source electrode and drain electrode in a DC magnetron sputtering device, setting a vacuuming program, and performing a vacuuming process on the chamber; S42: When the vacuum degree reaches the predetermined process requirement, setting the sputtering parameters required for preparing the gate dielectric layer, including sputtering power, gas flow, chamber pressure and temperature, and performing sputtering deposition of the gate dielectric layer; S43: After the sputtering deposition of the gate dielectric layer is completed, the chamber is evacuated again to remove residual gas and sputtering products to ensure the cleanliness and stability of the sputtering environment, the sputtering parameters are adjusted to match the deposition requirements of the gate electrode metal material, and the gate electrode metal material is sputtered. After the sputtering is completed, a composite structure including the gate dielectric layer and the gate electrode metal material is obtained.

3. The method for preparing a GaN power device based on magnetron sputtering deposition according to claim 2, characterized in that: In step S42, the sputtering parameters required for preparing the gate dielectric layer are: sputtering power of 200-300 W, Ar2 gas flow of 10-50 sccm, chamber pressure of 10-50 mTorr, temperature of 10-40°C; and the ratio of N2 to Ar2 is 1:

1.

4. The method for preparing a GaN power device based on magnetron sputtering deposition according to claim 3, characterized in that: In step S43, the sputtering parameters are adjusted to match the deposition requirements of the gate electrode metal material. The adjusted sputtering parameters are: first depositing Ni, with a sputtering power of 180-220 W and a time of 290-320 s; Au was then deposited with a sputtering power of 180-220 W and a time of 210-250 s.

5. The method for preparing GaN power devices based on magnetron sputtering deposition according to claim 4, characterized in that: The gate dielectric layer has a thickness of 2-100 nm and is made of AlN, AlScN, TiN or SiO2; The gate electrode material is Ni or Au metal material.

6. The method for preparing GaN power devices based on magnetron sputtering deposition according to claim 4, characterized in that: The thickness of the AlN nucleation layer is 1-2000 nm; The thickness of the GaN buffer layer is 0.1-5 μm, and the GaN buffer layer is not doped.

7. The method for preparing GaN power devices based on magnetron sputtering deposition according to claim 4, characterized in that: The thickness of the AlN insertion layer is 0.5 to 2 nm.

8. The method for preparing a GaN power device based on magnetron sputtering deposition according to claim 4, characterized in that: The thickness of the AlGaN barrier layer is 10-30 nm, and the molar ratio of Al is 10-30%.

9. The method for preparing GaN power devices based on magnetron sputtering deposition according to claim 4, characterized in that: The distance between the source electrode and the drain electrode is L SD 3~300 μm.

10. The method for preparing GaN power devices based on magnetron sputtering deposition according to claim 4, characterized in that: The length L of the gate electrode G The distance between the gate electrode and the source electrode is 1~100 μm. GS The distance between the gate electrode and the drain electrode is 1~100 μm. GD 1~100 μm.

Images