Image sensor and manufacturing method thereof
The masking layer and nitride layer in the image sensor are removed through the wet etching process, which solves the plasma damage caused by dry etching, reduces white pixels, and improves the imaging quality of the image sensor.
Patent Information
- Application Number
- CN202411341687.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-25
- Publication Date
- 2024-12-31
AI Technical Summary
In the manufacturing process, the plasma damage caused by dry etching leads to an increase in white pixels and affects the imaging quality.
The masking layer and nitride layer outside the through-silicon area are removed by using a wet etching process to avoid plasma damage and reduce white pixels. The specific steps include providing bonded logical wafers and pixel wafers, forming a nitride layer and a masking layer, forming a patterned photoresist layer, wet etching removes the uncovered masking layer and nitride layer, and thinning the oxide layer to Meet optical requirements.
It effectively reduces the number of white pixels, improves the imaging quality of the image sensor, and avoids plasma damage caused by dry etching.
Smart Images
Figure CN119230573A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of image sensors, and in particular relates to an image sensor and a manufacturing method thereof. Background Art
[0002] Image sensors are devices used to convert optical images into electrical signals. They are widely used in digital still cameras, cellular phones, surveillance cameras, as well as in the medical and automotive fields. In the image sensor process, a through silicon via is formed in the pixel wafer, and a metal layer is filled in the through silicon via to achieve the interconnection of the bonded pixel wafer and the logic wafer; the insulating layer covers the metal layer in the through silicon via and the substrate to prevent the metal layer in the through silicon via from oxidizing. Subsequently, the insulating layer outside the through silicon via area is removed by a dry etching process, leaving only the insulating layer covering the through silicon via. However, dry etching often causes severe plasma damage, which leads to an increase in the number of white pixels.
[0003] Theoretically, CMOS image sensors will not generate current without light, but in the manufacturing process, they will inevitably be affected by various factors such as raw material changes, process fluctuations, metal contamination, and plasma damage, which will cause the pixel itself to generate charge when no light is irradiated on the pixel unit. As the charges continue to increase and gather together, dark current is formed. For a pixel unit, when its dark current exceeds the photocurrent generated by the captured photons, the pixel will be controlled by the control circuit as a white pixel by default. If the dark current of the pixel is very large, it will cause it to appear as a bright spot in a completely dark field, that is, a white pixel, which will greatly affect the image quality. White pixels have always been a key factor affecting image quality. For image sensor chips, reducing the number of white pixels has always been a goal that the industry has been pursuing. Summary of the invention
[0004] The purpose of the present invention is to provide an image sensor and a method for manufacturing the same, which uses a wet etching process to successively remove a masking layer and a nitride layer outside a silicon through-hole via region, thereby effectively avoiding serious plasma damage to the wafer caused by dry etching, reducing white pixels, and improving the imaging quality of the image sensor.
[0005] The present invention provides a method for manufacturing an image sensor, comprising:
[0006] Step S1, providing a bonded logic wafer and a pixel wafer, wherein a first oxide layer is formed on a surface of the pixel wafer away from the logic wafer; a through silicon via penetrates the first oxide layer, the pixel wafer and a portion of the thickness of the logic wafer, and electrically connects the first metal layer in the logic wafer and the second metal layer in the pixel wafer through the interconnection metal layer in the through silicon via; forming a nitride layer, wherein the nitride layer covers the first oxide layer and the interconnection metal layer in the through silicon via;
[0007] Step S2, forming a masking layer, wherein the masking layer covers the nitride layer;
[0008] Step S3, forming a patterned photoresist layer, wherein the patterned photoresist layer is located on the surface of the masking layer and only covers the through silicon via region;
[0009] Step S4, removing the masking layer not covered by the patterned photoresist layer by wet etching to expose the nitride layer; removing the patterned photoresist layer;
[0010] Step S5, using the remaining masking layer as a mask, wet-etching to remove the exposed nitride layer.
[0011] Furthermore, after step S5, the method further includes: step S6, thinning the first oxide layer by wet etching, and determining the thickness of the first oxide layer finally retained by wet etching according to optical requirements.
[0012] Furthermore, in step S1, the nitride layer is formed by chemical vapor deposition or plasma enhanced chemical vapor deposition process.
[0013] Furthermore, the thickness of the nitride layer is 1800 angstroms to 2500 angstroms.
[0014] Furthermore, the material of the masking layer includes at least one of silicon oxide, amorphous carbon, silicon oxynitride and metal oxide.
[0015] Furthermore, in step S4, hydrofluoric acid is used to remove the masking layer not covered by the patterned photoresist layer, and the concentration of the hydrofluoric acid is between 3% and 20%. The time for removing the exposed masking layer by using the hydrofluoric acid is between 60s and 80s.
[0016] Furthermore, in step S4, the patterned photoresist layer is removed by wet etching, and the wet etching solution is a solvent formed by mixing propylene glycol isomethyl ether and propylene glycol acetate isomethyl ether in a predetermined ratio.
[0017] Furthermore, in step S5, wet etching is performed using a phosphoric acid mixed solution to remove the exposed nitride layer, wherein the phosphoric acid mixed solution is a mixture of phosphoric acid and ultrapure water; wherein the content of the phosphoric acid accounts for 50%-90% of the total weight of the phosphoric acid mixed solution; and the wet etching temperature is 120°C-180°C.
[0018] The present invention also provides an image sensor, comprising:
[0019] A bonded logic wafer and a pixel wafer, wherein a first oxide layer is formed on a surface of the pixel wafer away from the logic wafer; a through silicon via penetrates the first oxide layer, the pixel wafer and a portion of the thickness of the logic wafer, and the first metal layer in the logic wafer and the second metal layer in the pixel wafer are electrically connected through an interconnect metal layer in the through silicon via;
[0020] a nitride layer, wherein the nitride layer covers the interconnect metal layer in the through silicon via;
[0021] A masking layer covers the nitride layer.
[0022] Furthermore, the pixel wafer includes a stacked substrate and a dielectric layer, the second metal layer is formed in the dielectric layer, and the dielectric layer is bonded to the logic wafer; array-arranged photodiodes are formed in the substrate, and adjacent photodiodes are separated by deep trench isolation and / or shallow trench isolation.
[0023] Compared with the prior art, the present invention has the following beneficial effects:
[0024] The invention provides an image sensor and a manufacturing method thereof, the manufacturing method comprising: providing a bonded logic wafer and a pixel wafer, wherein a first oxide layer is formed on a surface of a side of the pixel wafer away from the logic wafer; a through silicon via penetrates the first oxide layer, the pixel wafer and a logic wafer of a part of its thickness, and electrically connects the first metal layer in the logic wafer and the second metal layer in the pixel wafer through the interconnection metal layer in the through silicon via; forming a nitride layer, wherein the nitride layer covers the first oxide layer and the interconnection metal layer in the through silicon via; forming a masking layer, wherein the masking layer covers the nitride layer; forming a patterned photoresist layer, wherein the patterned photoresist layer is located on the surface of the masking layer and only covers the through silicon via region; using wet etching to remove the masking layer not covered by the patterned photoresist layer to expose the nitride layer; removing the patterned photoresist layer; and using the remaining masking layer after etching as a mask, removing the exposed nitride layer by wet etching. The present invention adopts a wet etching process to successively remove the masking layer and the nitride layer outside the silicon through hole area, effectively avoiding the serious plasma damage to the wafer caused by dry etching, reducing white pixels, and improving the imaging quality of the image sensor. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] Figure 1 The figure is a flow chart of a method for manufacturing an image sensor according to an embodiment of the present invention.
[0026] Figures 2 to 7 Schematic diagram of each step of a method for manufacturing an image sensor according to an embodiment of the present invention.
[0027] The reference numerals are as follows:
[0028] 10 - logic wafer; 11 - first metal layer; 20 - pixel wafer; 21 - second metal layer; 22 - substrate; 23 - dielectric layer; 31 - interconnect metal layer; 32 - photodiode; 33 - first oxide layer; 34 - nitride layer; 35 - masking layer; 36 - patterned photoresist layer. DETAILED DESCRIPTION
[0029] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in a very simplified form and use an inaccurate scale, which is only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.
[0030] For ease of description, some embodiments of the present application may use spatially relative terms such as "above", "below", "top", "below", etc. to describe the relationship between one element or component and another (or other) elements or components as shown in the various figures of the embodiments. It should be understood that in addition to the orientations described in the drawings, the spatially relative terms are also intended to include different orientations of the device in use or operation. For example, if the device in the drawings is turned over, the elements or components described as being "below" or "below" other elements or components will subsequently be positioned as being "above" or "above" other elements or components. The terms "first", "second", etc. below are used to distinguish between similar elements and are not necessarily used to describe a specific order or time sequence. It is to be understood that these terms used in this way are interchangeable where appropriate.
[0031] The embodiment of the present invention provides a method for manufacturing an image sensor, such as Figure 1 As shown, including:
[0032] Step S1, providing a bonded logic wafer and a pixel wafer, wherein a first oxide layer is formed on a surface of the pixel wafer away from the logic wafer; a through silicon via penetrates the first oxide layer, the pixel wafer and a partial thickness of the logic wafer, and electrically connects the first metal layer in the logic wafer and the second metal layer in the pixel wafer through the interconnection metal layer in the through silicon via; forming a nitride layer, wherein the nitride layer covers the first oxide layer and the interconnection metal layer in the through silicon via;
[0033] Step S2, forming a masking layer, wherein the masking layer covers the nitride layer;
[0034] Step S3, forming a patterned photoresist layer, wherein the patterned photoresist layer is located on the surface of the masking layer and only covers the through silicon via region;
[0035] Step S4, removing the masking layer not covered by the patterned photoresist layer by wet etching to expose the nitride layer; removing the patterned photoresist layer;
[0036] Step S5, using the remaining masking layer as a mask, wet-etching to remove the exposed nitride layer.
[0037] Combine the following Figures 2 to 7 Each step of the method for manufacturing an image sensor according to an embodiment of the present invention is described in detail.
[0038] Step S1: Figure 2 As shown, a bonded logic wafer 10 and a pixel wafer 20 are provided, and the pixel wafer 20 includes a stacked substrate 22 and a dielectric layer 23, and a second metal layer 21 is formed in the dielectric layer 23. The substrate 22 may include a semiconductor material, and may be a single-layer structure or a multi-layer structure. The substrate 22 may be a semiconductor material such as Si, SiGe, SiGeC, SiC, GaAs, InAs, InP, and other III / V or II / VI compound semiconductors; it may also include a layered substrate such as, for example, Si / SiGe, Si / SiC, silicon on insulator (SOI) or silicon germanium on insulator. An array of photodiodes (PD) 32 is formed in the substrate 22, and adjacent photodiodes (PD) 32 may be spaced apart by deep trench isolation and / or shallow trench isolation.
[0039] A first oxide layer 33 is formed on the surface of the pixel wafer 20 away from the logic wafer 10. Through silicon vias (TSVs) penetrate the first oxide layer 33, the pixel wafer 20 and a portion of the thickness of the logic wafer 10, and the first metal layer 11 in the logic wafer 10 and the second metal layer 21 in the pixel wafer 20 are electrically connected through the interconnection metal layer 31 in the through silicon vias.
[0040] A nitride layer 34 and a second oxide layer (not shown) are sequentially deposited on the pixel wafer 20. The nitride layer 34 covers the first oxide layer 33 and the interconnect metal layer 31 in the through silicon via, and all the second oxide layer is removed by chemical mechanical polishing. The thickness of the nitride layer 34 is about 1800 angstroms to 2500 angstroms. The nitride layer 34 can be formed by chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD) process.
[0041] Step S2: Figure 3 As shown, a masking layer 35 is formed, and the masking layer 35 covers the nitride layer 34. The material of the masking layer 35 can be at least one of silicon oxide, amorphous carbon, silicon oxynitride and metal oxide, and the formation process of the masking layer 35 includes atomic layer deposition process and / or spin coating process.
[0042] Step S3: Figure 4 As shown, a patterned photoresist layer 36 is formed. The patterned photoresist layer 36 is located on the surface of the masking layer 35 and covers the through silicon via region. There is no patterned photoresist layer 36 outside the through silicon via region.
[0043] Step S4: Figure 4 and Figure 5 As shown, wet etching is used to remove the masking layer 35 not covered by the patterned photoresist layer 36 to expose the nitride layer 34. The wet etching can use hydrofluoric acid to remove the exposed masking layer 35. The concentration of hydrofluoric acid can be adjusted according to the actual process requirements. The concentration of hydrofluoric acid can be between 3% and 20%; and the time for using hydrofluoric acid to clean and remove the exposed masking layer 35 is between 60s and 80s. Then, as Figure 6 As shown, the patterned photoresist layer 36 can be removed by wet method, and a solvent formed by mixing propylene glycol isomethyl ether and propylene glycol acetate isomethyl ether in a predetermined ratio can be used to wet remove the patterned photoresist layer 36.
[0044] Step S5: Figure 6 and Figure 7 As shown, the masking layer 35 is used as a mask, and the nitride layer 34 exposed by the masking layer 35 is removed by wet etching; after the wet etching is completed, the nitride layer 34 and the masking layer 35 above the silicon through hole region are formed. The wet etching can use a phosphoric acid mixed solution to remove the nitride layer 34 exposed by the masking layer 35, and the phosphoric acid mixed solution is a mixture of phosphoric acid and ultrapure water, wherein the content of phosphoric acid accounts for 50%-90% of the total weight of the phosphoric acid mixed solution; the wet etching temperature is 120°C-180°C.
[0045] Step S6: Figure 7 As shown, wet etching thins the first oxide layer 33, and the thickness of the first oxide layer 33 retained by wet etching is determined according to optical requirements. Wet etching can use hydrofluoric acid to remove a certain thickness of the first oxide layer 33. The first oxide layer 33 covers the photodiode (PD) 32 in the pixel array.
[0046] The present invention uses a wet etching process to successively remove the masking layer 35 and the nitride layer 34 outside the silicon through hole region, effectively avoiding the serious plasma damage to the wafer caused by dry etching, reducing white pixels, and improving the imaging quality of the image sensor.
[0047] The present invention also provides an image sensor, such as Figure 2 and Figure 7 As shown, including:
[0048] The logic wafer 10 and the pixel wafer 20 are bonded, and a first oxide layer 33 is formed on a surface of the pixel wafer 20 away from the logic wafer 10; a through silicon via (TSV) penetrates the first oxide layer 33, the pixel wafer 20 and a part of the thickness of the logic wafer 10, and the first metal layer 11 in the logic wafer and the second metal layer 21 in the pixel wafer are electrically connected through the interconnection metal layer 31 in the through silicon via;
[0049] A nitride layer 34, wherein the nitride layer 34 covers the interconnection metal layer 31 in the through silicon via;
[0050] The masking layer 35 covers the nitride layer 34 .
[0051] The pixel wafer includes a stacked substrate 22 and a dielectric layer 23, the second metal layer 21 is formed in the dielectric layer 23, and the dielectric layer 23 is bonded to the logic wafer 10; array-arranged photodiodes 32 are formed in the substrate 22, and adjacent photodiodes 32 are spaced by deep trench isolation and / or shallow trench isolation.
[0052] In summary, the present invention provides an image sensor and a manufacturing method thereof, the manufacturing method comprising: providing a bonded logic wafer and a pixel wafer, wherein a first oxide layer is formed on a surface of the pixel wafer away from the logic wafer; a through silicon via penetrates the first oxide layer, the pixel wafer and a logic wafer of a partial thickness, and electrically connects the first metal layer in the logic wafer and the second metal layer in the pixel wafer through the interconnection metal layer in the through silicon via; forming a nitride layer, wherein the nitride layer covers the first oxide layer and the interconnection metal layer in the through silicon via; forming a masking layer, wherein the masking layer covers the nitride layer; forming a patterned photoresist layer, wherein the patterned photoresist layer is located on the surface of the masking layer and only covers the through silicon via area; using wet etching to remove the masking layer not covered by the patterned photoresist layer to expose the nitride layer; removing the patterned photoresist layer; and using the remaining masking layer as a mask, wet etching to remove the exposed nitride layer. The present invention adopts a wet etching process to successively remove the masking layer and the nitride layer outside the silicon through hole area, effectively avoiding the serious plasma damage to the wafer caused by dry etching, reducing white pixels, and improving the imaging quality of the image sensor.
[0053] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the method disclosed in the embodiment, since it corresponds to the device disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.
[0054] The above description is only a description of the preferred embodiment of the present invention, and is not any limitation on the scope of rights of the present invention. Any technical personnel in this field can make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.
Claims
1. A method for manufacturing an image sensor, characterized in that: include: Step S1, providing a bonded logic wafer and a pixel wafer, wherein a first oxide layer is formed on a surface of the pixel wafer away from the logic wafer; A through silicon via penetrates the first oxide layer, the pixel wafer and a part of the thickness of the logic wafer, and electrically connects the first metal layer in the logic wafer and the second metal layer in the pixel wafer through the interconnection metal layer in the through silicon via; a nitride layer is formed, and the nitride layer covers the first oxide layer and the interconnection metal layer in the through silicon via; Step S2, forming a masking layer, wherein the masking layer covers the nitride layer; Step S3, forming a patterned photoresist layer, wherein the patterned photoresist layer is located on the surface of the masking layer and only covers the through silicon via region; Step S4, removing the masking layer not covered by the patterned photoresist layer by wet etching to expose the nitride layer; removing the patterned photoresist layer; Step S5, using the remaining masking layer as a mask, wet-etching to remove the exposed nitride layer.
2. The method for manufacturing an image sensor according to claim 1, wherein: After step S5, the method further includes: step S6, thinning the first oxide layer by wet etching, and determining the thickness of the first oxide layer finally retained by wet etching according to optical requirements.
3. The method for manufacturing an image sensor according to claim 1, wherein: In step S1 , the nitride layer is formed by chemical vapor deposition or plasma enhanced chemical vapor deposition process.
4. The method for manufacturing an image sensor according to claim 1, wherein: The thickness of the nitride layer is 1800 angstroms to 2500 angstroms.
5. The method for manufacturing an image sensor according to claim 1, wherein: The material of the masking layer includes at least one of silicon oxide, amorphous carbon, silicon oxynitride and metal oxide.
6. The method for manufacturing an image sensor according to claim 1, wherein: In step S4, hydrofluoric acid is used to remove the masking layer not covered by the patterned photoresist layer, and the concentration of the hydrofluoric acid is between 3% and 20%. The time for removing the exposed masking layer by using the hydrofluoric acid is between 60s and 80s.
7. The method for manufacturing an image sensor according to claim 1, wherein: In step S4, the patterned photoresist layer is removed by wet etching, and the wet etching solution is a solvent formed by mixing propylene glycol isomethyl ether and propylene glycol acetate isomethyl ether in a predetermined ratio.
8. The method for manufacturing an image sensor according to claim 1, wherein: In step S5, wet etching is performed using a phosphoric acid mixed solution to remove the exposed nitride layer, wherein the phosphoric acid mixed solution is a mixture of phosphoric acid and ultrapure water; wherein the content of the phosphoric acid accounts for 50%-90% of the total weight of the phosphoric acid mixed solution; and the wet etching temperature is 120°C-180°C.
9. An image sensor, characterized in that: include: A bonded logic wafer and a pixel wafer, wherein a first oxide layer is formed on a surface of the pixel wafer away from the logic wafer; A through silicon via penetrates the first oxide layer, the pixel wafer and a portion of the thickness of the logic wafer, and electrically connects the first metal layer in the logic wafer and the second metal layer in the pixel wafer through the interconnection metal layer in the through silicon via; a nitride layer, wherein the nitride layer covers the interconnect metal layer in the through silicon via; A masking layer covers the nitride layer.
10. The image sensor according to claim 9, wherein: The pixel wafer includes a stacked substrate and a dielectric layer, the second metal layer is formed in the dielectric layer, and the dielectric layer is bonded to the logic wafer; array-arranged photodiodes are formed in the substrate, and adjacent photodiodes are spaced apart by deep trench isolation and / or shallow trench isolation.