Straight string type distributed static synchronous series compensator, parameter determination method thereof and computer readable storage medium

Abstract

The invention provides a straight string type distributed static synchronous series compensator, a parameter determination method thereof and a computer readable storage medium, the compensator comprises a plurality of compensator sub-modules, each compensator sub-module comprises a regulation and control converter, the first end of the regulation and control converter is coupled with the first connecting end of a controlled wire, and the second end of the regulation and control converter is coupled with the second connecting end of the controlled wire; the compensation module is used for performing power exchange with a controlled wire and generating compensation voltage according to a control target; and the first ends of the current-limiting rectifier and the current-limiting converter are coupled with the second connecting end of the controlled wire, the second end of the current-limiting converter is coupled with the second end of the regulation and control converter, and the current-limiting rectifier and the current-limiting converter are used for inhibiting short-circuit fault current and isolating the regulation and control converter from the controlled wire when the system has a short-circuit fault. The method comprises the step of determining the inductance value of the current-limiting inductor according to the maximum short-circuit current of a system. The computer readable storage medium stores a program for executing the method. According to the invention, the impact of fault current and voltage can be effectively handled, and the economical efficiency of the device is remarkably improved.

Description

Technical Field

[0001] The present invention relates to the technical field of alternating current power transmission, and in particular to a direct-series distributed static synchronous series compensator and a parameter determination method thereof and a computer-readable storage medium. Background Art

[0002] As a series-type flexible AC transmission equipment, the direct-series distributed static synchronous compensator (DSSC) has the functions of power flow control, harmonic suppression, transient stability control, etc., and is widely used in transmission and distribution networks. However, the existing direct-series distributed static synchronous compensator is mainly composed of power electronic devices such as IGBT and diode, and its voltage and current overload capacity is limited and expensive. It is obviously uneconomical and unrealistic to directly select the device level of the direct-series DSSC based on the short-circuit fault current and voltage level of the system. That is, the existing direct-series distributed static synchronous compensator has insufficient tolerance level for short-circuit current impact, and it is difficult to meet the safe and stable operation under system short-circuit fault. Therefore, in order to avoid the direct-series DSSC from being damaged by the impact of system fault current and voltage, a new direct-series DSSC topology that can cope with the impact of system short-circuit fault current should be designed. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art.

[0004] To this end, a first aspect of the present invention provides a direct series type distributed static synchronous series compensator.

[0005] A second aspect of the present invention provides a method for determining parameters of a direct-series distributed static synchronous series compensator.

[0006] A third aspect of the present invention provides a computer-readable storage medium.

[0007] A direct series type distributed static synchronous series compensator provided by the present invention comprises a plurality of compensator submodules, wherein the plurality of compensator submodules are connected one-to-one with each phase conductor in an AC power transmission system, wherein the single-phase conductor corresponding to the compensator submodule is defined as a controlled conductor, and each of the compensator submodules is coupled between a first connection terminal and a second connection terminal on the corresponding controlled conductor;

[0008] The compensator submodule comprises:

[0009] A regulating converter has a first end and a second end, the first end of the regulating converter is coupled to the first connection end, the regulating converter is used to exchange power with the controlled conductor and generate a compensation voltage according to a control target; when a short circuit fault occurs in the system, the regulating converter stops working;

[0010] A current limiting rectifier has a first end and a second end. The first end of the current limiting converter is coupled to the second connection end, and the second end of the current limiting converter is coupled to the second end of the regulating converter. The current limiting rectifier is at least used to suppress short-circuit fault current and isolate the regulating converter from the controlled conductor when a short-circuit fault occurs in the system.

[0011] The direct series type distributed static synchronous series compensator according to the above technical solution of the present invention may also have the following additional technical features:

[0012] In the above technical solution, the current limiting rectifier includes:

[0013] A current limiting inductor having a first end and a second end;

[0014] A first thyristor has a first end, a second end and a control end, the first end of the first thyristor is coupled to the first end of the current limiting inductor, and the control end of the first thyristor receives a first trigger pulse signal;

[0015] A second thyristor has a first end, a second end and a control end, the first end of the second thyristor is coupled to the first end of the current limiting inductor, and the control end of the second thyristor receives a first trigger pulse signal;

[0016] A third thyristor has a first end, a second end and a control end, the first end of the third thyristor is coupled to the second end of the first thyristor, the second end of the third thyristor is coupled to the second end of the current limiting inductor, and the control end of the third thyristor receives the first trigger pulse signal;

[0017] A fourth thyristor has a first end, a second end and a control end, the first end of the fourth thyristor is coupled to the second end of the second thyristor, the second end of the fourth thyristor is coupled to the second end of the current limiting inductor, and the control end of the fourth thyristor receives the first trigger pulse signal;

[0018] Wherein, a common end of the first thyristor and the third thyristor is coupled to a first end of the current limiting rectifier, and a common end of the second thyristor and the fourth thyristor is coupled to a second end of the current limiting rectifier;

[0019] The first trigger pulse signal is used to control the conduction sequence of the first thyristor, the second thyristor, the third thyristor and the fourth thyristor;

[0020] When a short circuit fault occurs in the system, the first trigger pulse signal fails, and the first thyristor, the second thyristor, the third thyristor and the fourth thyristor are in a locked state.

[0021] In the above technical solution, the current limiting inductor is used to limit the short-circuit current during the time from the occurrence of a short-circuit fault in the system to the thyristor locking, and the inductance value of the current limiting inductor is determined according to the maximum short-circuit current of the system.

[0022] In the above technical solution, the control converter includes:

[0023] A DC capacitor having a first end and a second end, wherein a voltage between the first end and the second end of the DC capacitor is the compensation voltage;

[0024] A first transistor having a first end, a second end and a control end, the first end of the first transistor being coupled to the first end of the DC capacitor, and the control end of the first transistor receiving a second trigger pulse signal;

[0025] A second transistor has a first end, a second end and a control end, the first end of the second transistor is coupled to the first end of the DC capacitor, and the control end of the second transistor receives a second trigger pulse signal;

[0026] A third transistor has a first end, a second end and a control end, the first end of the third transistor is coupled to the second end of the first transistor, the second end of the third transistor is coupled to the second end of the DC capacitor, and the control end of the third transistor receives a second trigger pulse signal;

[0027] a fourth transistor having a first end, a second end and a control end, the first end of the fourth transistor being coupled to the second end of the second transistor, the second end of the fourth transistor being coupled to the second end of the DC capacitor, and the control end of the fourth transistor receiving a second trigger pulse signal;

[0028] The common end of the first transistor and the fourth transistor is coupled to the first end of the regulating converter, and the common end of the second transistor and the third transistor is coupled to the second end of the regulating converter;

[0029] The second trigger pulse signal is used to control the on-off sequence of the first transistor, the second transistor, the third transistor and the fourth transistor;

[0030] When a short circuit fault occurs in the system, the second trigger pulse signal fails, and the first transistor, the second transistor, the third transistor and the fourth transistor are in a locked state.

[0031] In the above technical solution, the control converter further includes:

[0032] A first diode having a cathode and an anode, the cathode of the first diode being coupled to the first end of the first transistor, and the anode of the first diode being coupled to the second end of the first transistor;

[0033] a second diode having a cathode and an anode, the cathode of the second diode being coupled to the first end of the second transistor, and the anode of the second diode being coupled to the second end of the second transistor;

[0034] a third diode having a cathode and an anode, the cathode of the third diode being coupled to the first end of the third transistor, and the anode of the third diode being coupled to the second end of the third transistor;

[0035] The fourth diode has a cathode and an anode. The cathode of the fourth diode is coupled to the first end of the fourth transistor, and the anode of the fourth diode is coupled to the second end of the fourth transistor.

[0036] In the above technical solution, the control converter further includes:

[0037] The filter circuit is coupled between the first terminal and the second terminal of the regulating converter.

[0038] In the above technical solution, the control converter further includes:

[0039] The bypass switch is coupled between the first terminal and the second terminal of the regulating converter.

[0040] The present invention provides a method for determining parameters of a direct-series distributed static synchronous series compensator, comprising:

[0041] The inductance value of the current limiting inductor in the direct series type distributed static synchronous series compensator as described in the above technical solution is determined:

[0042] According to the equivalent circuit of the compensator submodule after a short-circuit fault occurs in the system, a mathematical model of a direct-series distributed static synchronous series compensator in the short-circuit current limiting dynamic process is established, including:

[0043]

[0044] Where, U represents the voltage value of the first terminal of the current limiting rectifier, U d Represents the current limiting inductor voltage, U dc Indicates the DC capacitor voltage, U dc0 Indicates the initial value of the DC capacitor voltage, U dcmax represents the peak value of the DC capacitor voltage, t0 represents the time when the system short-circuit occurs, t1 represents the peak value of the current-limiting inductor current after the short-circuit, t2 represents the time when the current-limiting inductor current crosses zero after the short-circuit, I d0 Indicates the current value of the current-limiting inductor before the short circuit occurs, I dmax Represents the peak current of the current-limiting inductor after a short circuit, I d2 It represents the current corresponding to the zero-crossing moment of the current-limiting inductor after short circuit, I d Represents the current-limiting inductor current, L d Indicates the inductance value of the current-limiting inductor, and C indicates the capacitance value of the DC capacitor;

[0045] The inductance value of the current limiting inductor is solved according to the mathematical model, including:

[0046]

[0047] Here, t represents time.

[0048] In the above technical solution, when solving the inductance value of the current-limiting inductor, the DC capacitor voltage is ignored and the approximate inductance value is obtained, including:

[0049]

[0050] The approximate inductance value is greater than the precise inductance value, and the difference between the approximate inductance value and the precise inductance value is set as a safety margin.

[0051] In the above technical solution, the inductance value of the current limiting inductor is calculated using the most severe short circuit situation, including:

[0052]

[0053] Among them, U m It represents the effective value of the maximum withstand voltage of the thyristor in the current limiting rectifier, and ω represents the system angular frequency.

[0054] The present invention provides a computer-readable storage medium storing a program, which, when loaded by a processor, implements the parameter determination method as described in any of the above technical solutions.

[0055] In summary, due to the adoption of the above technical features, the beneficial effects of the present invention are:

[0056] In view of the insufficient tolerance level of fault short-circuit current impact of current direct-series DSSC devices, the present invention provides a direct-series distributed static synchronous series compensator and a parameter determination method thereof for coping with system short-circuit fault current impact, which can effectively suppress system fault short-circuit current, avoid device damage caused by system short-circuit current impact, and improve device reliability. The regulating converter can maintain the stability of DC capacitor voltage and adjust the output voltage according to the control target; the current limiting rectifier can present high impedance characteristics to suppress short-circuit current when a system fault occurs; under normal system conditions, the current limiting rectifier presents zero impedance characteristics, and only the regulating converter exchanges power with the system. The present invention has all the functions of a conventional direct-series DSSC, and has more engineering application prospects than a conventional direct-series DSSC, can effectively cope with the impact of fault current and voltage, and significantly improve the economy of the device.

[0057] Additional aspects and advantages of the present invention will become apparent from the following description or may be learned by practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0059] Figure 1 This is a circuit topology diagram of a direct series type distributed static synchronous series compensator according to an embodiment of the present invention;

[0060] Figure 2 It is a circuit principle diagram of a current limiting rectifier in a direct series type distributed static synchronous series compensator according to an embodiment of the present invention;

[0061] Figure 3 It is a circuit schematic diagram of a control converter in a direct series type distributed static synchronous series compensator according to an embodiment of the present invention;

[0062] Figure 4 It is an equivalent circuit diagram of a direct series type distributed static synchronous series compensator according to an embodiment of the present invention after a short circuit fault occurs in the system;

[0063] Figure 5 It is a schematic diagram of the change of the current of the current-limiting inductor of a direct-series distributed static synchronous series compensator according to an embodiment of the present invention after a short-circuit fault occurs in the system;

[0064] Figure 6 The diagram is a schematic diagram of the change of current flowing into the direct series distributed static synchronous series compensator when a short circuit fault occurs in an embodiment of the present invention. DETAILED DESCRIPTION

[0065] In order to more clearly understand the above-mentioned purpose, features and advantages of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

[0066] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the protection scope of the present invention is not limited to the specific embodiments disclosed below.

[0067] Refer to the following Figures 1 to 6 The following describes a direct-series distributed static synchronous series compensator and a parameter determination method and a computer-readable storage medium provided according to some embodiments of the present invention.

[0068] Some embodiments of the present application provide a direct series distributed static synchronous series compensator.

[0069] like Figure 1As shown, the first embodiment of the present invention proposes a direct series distributed static synchronous series compensator, including a plurality of compensator sub-modules, and the plurality of compensator sub-modules are connected one-to-one with each phase conductor in the AC power transmission system, wherein the single-phase conductor corresponding to the compensator sub-module is defined as a controlled conductor, and each of the compensator sub-modules is coupled between a first connection terminal and a second connection terminal on the corresponding controlled conductor. It can be understood that the compensator sub-module is connected to the corresponding controlled conductor in series.

[0070] exist Figure 1 In the illustrated embodiment, a three-phase AC power transmission system is taken as an example, including three-phase conductors A, B, and C, and a compensator submodule is provided for each phase conductor, and the compensator submodule is used to regulate the corresponding single-phase conductor. It can be understood that the direct-series distributed static synchronous series compensator proposed in the present disclosure is also applicable to single-phase AC power transmission systems or other AC power transmission systems, as long as the number of compensator submodules is equal to the number of phases, and the circuit structure of each compensator submodule is the same. The present disclosure takes the compensator submodule provided in the A-phase conductor of the three-phase AC power transmission system as an example for explanation.

[0071] Continue reading Figure 1 ,The compensator submodule includes a regulating converter and a current limiting rectifier.

[0072] The regulating converter has a first terminal A1 and a second terminal A2. The first terminal A1 of the regulating converter is coupled to the first connection terminal. The regulating converter is the core part of the direct series DSSC device, and is mainly used to exchange power with the controlled conductor, maintain the DC capacitor voltage stability through PI control (closed-loop control strategy), and generate the required compensation voltage according to the control target for storage; when a short circuit fault occurs in the system, the regulating converter stops working;

[0073] The current limiting rectifier has a first end a1 and a second end a2. The first end a1 of the current limiting converter is coupled to the second connection end, and the second end a2 of the current limiting converter is coupled to the second end A2 of the regulating converter. The current limiting rectifier is at least used to suppress the short-circuit fault current and isolate the regulating converter from the controlled wire when a short-circuit fault occurs in the system to prevent the short-circuit current from impacting the regulating converter and causing damage to the device.

[0074] The present disclosure utilizes the suppression and isolation functions of the current limiting rectifier to achieve protection of the regulating converter. In some embodiments, such as Figure 2 As shown, the current limiting rectifier includes: a current limiting inductor L d , a first thyristor T1 , a second thyristor T2 , a third thyristor T3 and a fourth thyristor T4 .

[0075] Current limiting inductor L dThe first thyristor T1 has a first end, a second end and a control end, the first end of the first thyristor T1 is coupled to the first end of the current limiting inductor L, and the control end of the first thyristor T1 receives a first trigger pulse signal; the second thyristor T2 has a first end, a second end and a control end, the first end of the second thyristor T2 is coupled to the first end of the current limiting inductor L d The first end of the third thyristor T3 is coupled to the second end of the first thyristor T1, and the control end of the second thyristor T2 receives the first trigger pulse signal; the third thyristor T3 has a first end, a second end and a control end, the first end of the third thyristor T3 is coupled to the second end of the first thyristor T1, and the second end of the third thyristor T3 is coupled to the current limiting inductor L d The control end of the third thyristor T3 receives the first trigger pulse signal; the fourth thyristor T4 has a first end, a second end and a control end, the first end of the fourth thyristor T4 is coupled to the second end of the second thyristor T2, and the second end of the fourth thyristor T4 is coupled to the current limiting inductor L d The first thyristor T1 and the second thyristor T2 are coupled to the second end of the current limiting rectifier, and the control end of the fourth thyristor T4 receives the first trigger pulse signal; wherein, the common end of the first thyristor T1 and the third thyristor T3 is coupled to the first end of the current limiting rectifier, and the common end of the second thyristor T2 and the fourth thyristor T4 is coupled to the second end of the current limiting rectifier; the first trigger pulse signal is used to control the conduction sequence of the first thyristor T1, the second thyristor T2, the third thyristor T3 and the fourth thyristor T4.

[0076] The first trigger pulse signal usually adopts a PWM wave signal to realize the on-off control of the first thyristor T1, the second thyristor T2, the third thyristor T3 and the fourth thyristor T4. It can be understood that the first thyristor T1, the second thyristor T2, the third thyristor T3 and the fourth thyristor T4 do not all receive the original signal of the first trigger pulse signal, but receive the signal generated by the first trigger pulse signal after the inverse transformation or timing adjustment. In a specific embodiment, under normal operating conditions, when the voltage is positive, the first trigger pulse signal controls the first thyristor T1 and the fourth thyristor T4 to turn on, and the second thyristor T2 and the third thyristor T3 to turn off; when the voltage is reversed, the first trigger pulse signal controls the second thyristor T2 and the third thyristor T3 to turn on, and the first thyristor T1 and the fourth thyristor T4 to turn off.

[0077] exist Figure 2In the illustrated embodiment, the first thyristor T1, the second thyristor T2, the third thyristor T3 and the fourth thyristor T4 are all shown as unidirectional thyristors, the first ends of the first thyristor T1, the second thyristor T2, the third thyristor T3 and the fourth thyristor T4 correspond to the cathode of the unidirectional thyristor, the second ends of the first thyristor T1, the second thyristor T2, the third thyristor T3 and the fourth thyristor T4 correspond to the anode of the unidirectional thyristor, and the control ends of the first thyristor T1, the second thyristor T2, the third thyristor T3 and the fourth thyristor T4 correspond to the gate of the unidirectional thyristor. It can be understood that the first thyristor T1, the second thyristor T2, the third thyristor T3 and the fourth thyristor T4 can also use other suitable types of semiconductor devices.

[0078] In the above current limiting rectifier, when a short circuit occurs in the system, the first trigger pulse signal fails, and the first thyristor T1, the second thyristor T2, the third thyristor T3 and the fourth thyristor T4 are in a locked state. d Immediately connect to limit the fault current rise rate. At the same time, due to the characteristics of the thyristor, the turned-on thyristor will not be turned off immediately. The current limiting inductor L d Withstand forward voltage, current limiting inductor L d The current continues to increase, when the current limiting inductor L d After the two ends are subjected to reverse voltage drop, the current limiting inductor L d The current quickly decreases to 0, showing a high impedance characteristic. The current limiting rectifier isolates the regulating converter from the wire and also cuts off the short-circuit current.

[0079] Furthermore, the current limiting inductor L d It is used to limit the short-circuit current from the time when a short-circuit fault occurs in the system to the time when the thyristor is locked. Therefore, the current limiting inductor L can be determined according to the maximum short-circuit current of the system. d The inductance value is determined, and the specific parameter determination method will be described in detail in the subsequent embodiments.

[0080] In some embodiments, Figure 3 As shown, the control converter includes: a DC capacitor, a first transistor S1, a second transistor S2, a third transistor S3 and a fourth transistor S4.

[0081] The DC capacitor has a first end and a second end, and the voltage between the first end and the second end of the DC capacitor is the compensation voltage; the first transistor S1 has a first end, a second end and a control end, the first end of the first transistor S1 is coupled to the first end of the DC capacitor, and the control end of the first transistor S1 receives a second trigger pulse signal; the second transistor S2 has a first end, a second end and a control end, the first end of the second transistor S2 is coupled to the first end of the DC capacitor, and the control end of the second transistor S2 receives the second trigger pulse signal; the third transistor S3 has a first end, a second end and a control end, the first end of the third transistor S3 is coupled to the second end of the first transistor S1, and the second end of the third transistor S3 is coupled to the second end of the DC capacitor The fourth transistor S4 has a first end, a second end and a control end, the first end of the fourth transistor S4 is coupled to the second end of the second transistor S2, the second end of the fourth transistor S4 is coupled to the second end of the DC capacitor, and the control end of the fourth transistor S4 receives the second trigger pulse signal; wherein, the common end of the first transistor S1 and the fourth transistor S4 is coupled to the first end of the regulating converter, and the common end of the second transistor S2 and the third transistor S3 is coupled to the second end of the regulating converter; the second trigger pulse signal is used to control the on-off sequence of the first transistor S1, the second transistor S2, the third transistor S3 and the fourth transistor S4.

[0082] The second trigger pulse signal usually adopts a PWM wave signal to realize the on-off control of the first transistor S1, the second transistor S2, the third transistor S3 and the fourth transistor S4. It can be understood that the first transistor S1, the second transistor S2, the third transistor S3 and the fourth transistor S4 do not all receive the original signal of the second trigger pulse signal, but receive the signal generated by the second trigger pulse signal after inversion or timing adjustment. In a specific embodiment, under normal operating conditions, under the control of the second trigger pulse signal, the first transistor S1 and the third transistor S3 are complementary turned on, and the second transistor S2 and the fourth transistor S4 are complementary turned on, wherein the first transistor S1 and the third transistor S3 work in a high-frequency state, and the second transistor S2 and the fourth transistor S4 work in a low-frequency state. It can be understood that in addition to the above control method, the conduction sequence of the transistors can also be controlled by selecting a suitable second trigger pulse signal according to different modulation methods.

[0083] In the above control converter, when a short circuit occurs in the system, the second trigger pulse signal fails, and the first transistor S1, the second transistor S2, the third transistor S3 and the fourth transistor S4 are in a locked state. At this time, the short circuit current forms a loop through the devices in the compensator.

[0084] In some embodiments, the control converter further includes: a first diode D1, a second diode D2, a third diode D3 and a fourth diode D4. The cathode of the first diode D1 is coupled to the first end of the first transistor S1, and the anode of the first diode D1 is coupled to the second end of the first transistor S1. The cathode of the second diode D2 is coupled to the first end of the second transistor S2, and the anode of the second diode D2 is coupled to the second end of the second transistor S2; the cathode of the third diode D3 is coupled to the first end of the third transistor S3, and the anode of the third diode D3 is coupled to the second end of the third transistor S3; the cathode of the fourth diode D4 is coupled to the first end of the fourth transistor S4, and the anode of the fourth diode D4 is coupled to the second end of the fourth transistor S4.

[0085] Through the connection mode of the above-mentioned diodes, it is ensured that each transistor can reliably shut down the branch in which it is located. It should be noted that the first diode D1, the second diode D2, the third diode D3 and the fourth diode D4 can be the body diodes of the first transistor S1, the second transistor S2, the third transistor S3 and the fourth transistor S4 respectively, or can be independent devices set separately.

[0086] Continue reading Figure 3 , the regulating converter also includes: a filter circuit and a bypass switch S5.

[0087] The filter circuit is coupled between the first terminal and the second terminal of the control converter. Figure 3 In the illustrated embodiment, the filter circuit is illustrated as an LC filter circuit, including a filter capacitor CL and a filter resistor R. It should be noted that other types of filter circuits may also be used.

[0088] The bypass switch S5 is coupled between the first terminal and the second terminal of the regulating converter. The bypass switch S5 is a controllable device, and different working modes of the regulating converter are realized by on-off control of the bypass switch S5.

[0089] Some other embodiments of the present invention provide a method for determining parameters of a direct series distributed static synchronous series compensator, comprising:

[0090] The current limiting inductor L in the direct series type distributed static synchronous series compensator as described in the above embodiment d The inductance value is determined by:

[0091] According to the equivalent circuit of the compensator submodule after a short-circuit fault occurs in the system, a mathematical model of a direct-series distributed static synchronous series compensator in the short-circuit current limiting dynamic process is established.

[0092] Specifically, when a short-circuit fault occurs in the AC power transmission system, the pulse of the regulating converter, i.e., the second trigger pulse signal, is immediately blocked, so that the regulating converter is shut down; at the same time, all trigger pulses of the current-limiting rectifier, i.e., the first trigger pulse signal, are also blocked. At this time, the short-circuit current forms a loop through the devices in the compensator submodule. The equivalent circuit of the loop is as follows: Figure 4 shown.

[0093] The control action of the compensator submodule and the dynamic change relationship of each physical quantity in the circuit during the entire current limiting process are as follows: Figure 5 As shown, it can be expressed as follows:

[0094] At time t0: a short circuit occurs and the control system blocks the trigger pulses of the control converter and the current limiting rectifier.

[0095] Time period t0~t1: the current limiting inductor voltage is positive, the current limiting inductor current I d From the steady-state initial value I d0 It starts to rise continuously, the current limiting inductor absorbs active power from the line, and the thyristor in the current limiting rectifier is not completely turned off and is in the rectification working state.

[0096] At t1: current limiting inductor voltage U d At the zero-crossing moment, the current-limiting inductor current I d Reach peak I dmax .

[0097] Time period t1~t2: the current limiting inductor voltage is negative, the current limiting inductor current I d It starts to decay from the peak value, the current limiting inductor releases active power, and the current limiting rectifier is in the inverter working state, returning energy to the line.

[0098] At t2, the current in the current-limiting inductor passes through zero, after which all thyristors are automatically turned off to cut off the short-circuit current.

[0099] According to the above analysis, the biggest advantage of the current limiting rectifier is automatic current limiting, that is, the current limiting inductor is automatically inserted into the line to limit the short-circuit current and its rising rate immediately when a short-circuit fault occurs, which has nothing to do with whether the controller is in action. The subsequent controller can further adopt corresponding strategies to ultimately achieve the purpose of current limiting and fault removal.

[0100] During short-circuit current limiting, the addition of the current limiting rectifier makes the dynamic behavior of the entire compensator different from that of the conventional compensator. The key element in the current limiting dynamic process is the current limiting inductor of the current limiting rectifier. Therefore, the focus is on the determination of the value of the current limiting inductor in the current limiting rectifier.

[0101] exist Figure 4 In the equivalent circuit shown, L seL is the part of the current limiting inductor that plays a filtering role. Since the inductor that plays a current limiting role is much larger than the inductor that plays a filtering role, L is ignored. se , the established mathematical model is:

[0102]

[0103] Where, U represents the voltage value of the first terminal of the current limiting rectifier, U d Represents the current limiting inductor voltage, U dc Indicates the DC capacitor voltage, U dc0 Indicates the initial value of the DC capacitor voltage, U dcmax represents the peak value of the DC capacitor voltage, t0 represents the time when the system short-circuit occurs, t1 represents the peak value of the current-limiting inductor current after the short-circuit, t2 represents the time when the current-limiting inductor current crosses zero after the short-circuit, I d0 Indicates the current value of the current-limiting inductor before the short circuit occurs, I dmax Represents the peak current of the current-limiting inductor after a short circuit, I d2 It represents the current corresponding to the zero-crossing moment of the current-limiting inductor after short circuit, I d Represents the current-limiting inductor current, L d Indicates the inductance value of the current-limiting inductor, and C indicates the capacitance value of the DC capacitor;

[0104] The inductance value of the current limiting inductor is solved according to the mathematical model, including:

[0105]

[0106] Here, t represents time.

[0107] In some embodiments, when solving the inductance value of the current-limiting inductor, the DC capacitor voltage is ignored and an approximate inductance value is obtained, including:

[0108]

[0109] Among them, since the DC capacitor voltage is a value greater than zero, the approximate inductance value is greater than the precise inductance value, and the difference between the approximate inductance value and the precise inductance value can be regarded as a safety margin.

[0110] In some embodiments, the inductance value of the current limiting inductor is calculated using the most severe short circuit situation, including:

[0111]

[0112] Among them, U m It represents the effective value of the maximum withstand voltage of the thyristor in the current limiting rectifier, and ω represents the system angular frequency.

[0113] The direct-series distributed static synchronous series compensator formed according to the above parameter determination method can effectively suppress the fault short-circuit current when a short-circuit fault occurs in the system, avoid the direct-series DSSC device from being damaged by the large short-circuit current of the system, and improve the reliability of the device. In a specific embodiment, a three-phase short-circuit fault is set to occur in the controlled line at 2.0s, and the fault is removed after 0.1s. The short-circuit current flowing into the compensator is as follows: Figure 6 It can be seen that the new direct series DSSC topology proposed in the present disclosure can prevent large short-circuit current from flowing into the device, thereby improving the reliability of the device.

[0114] Still other embodiments of the present invention provide a computer-readable storage medium storing a program, which, when loaded by a processor, implements the parameter determination method as described in any of the above embodiments.

[0115] In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0116] Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A direct series type distributed static synchronous series compensator, characterized in that: The invention comprises a plurality of compensator submodules, wherein the plurality of compensator submodules are connected to each phase conductor in the AC power transmission system in a one-to-one correspondence, wherein the single-phase conductor corresponding to the compensator submodule is defined as a controlled conductor, and each of the compensator submodules is coupled between a first connection terminal and a second connection terminal on the corresponding controlled conductor; The compensator submodule comprises: A regulating converter has a first end and a second end, the first end of the regulating converter is coupled to the first connection end, the regulating converter is used to exchange power with the controlled conductor and generate a compensation voltage according to a control target; when a short circuit fault occurs in the system, the regulating converter stops working; A current limiting rectifier has a first end and a second end. The first end of the current limiting converter is coupled to the second connection end, and the second end of the current limiting converter is coupled to the second end of the regulating converter. The current limiting rectifier is at least used to suppress short-circuit fault current and isolate the regulating converter from the controlled conductor when a short-circuit fault occurs in the system.

2. The direct series type distributed static synchronous series compensator according to claim 1, characterized in that: The current limiting rectifier comprises: a current limiting inductor having a first end and a second end; A first thyristor has a first end, a second end and a control end, the first end of the first thyristor is coupled to the first end of the current limiting inductor, and the control end of the first thyristor receives a first trigger pulse signal; A second thyristor has a first end, a second end and a control end, the first end of the second thyristor is coupled to the first end of the current limiting inductor, and the control end of the second thyristor receives a first trigger pulse signal; A third thyristor has a first end, a second end and a control end, the first end of the third thyristor is coupled to the second end of the first thyristor, the second end of the third thyristor is coupled to the second end of the current limiting inductor, and the control end of the third thyristor receives the first trigger pulse signal; A fourth thyristor has a first end, a second end and a control end, the first end of the fourth thyristor is coupled to the second end of the second thyristor, the second end of the fourth thyristor is coupled to the second end of the current limiting inductor, and the control end of the fourth thyristor receives the first trigger pulse signal; Wherein, a common end of the first thyristor and the third thyristor is coupled to a first end of the current limiting rectifier, and a common end of the second thyristor and the fourth thyristor is coupled to a second end of the current limiting rectifier; The first trigger pulse signal is used to control the conduction sequence of the first thyristor, the second thyristor, the third thyristor and the fourth thyristor; When a short circuit fault occurs in the system, the first trigger pulse signal fails, and the first thyristor, the second thyristor, the third thyristor and the fourth thyristor are in a locked state.

3. The direct series type distributed static synchronous series compensator according to claim 2, characterized in that: The current limiting inductor is used to limit the short-circuit current during the time from the occurrence of a short-circuit fault in the system to the thyristor locking, and the inductance value of the current limiting inductor is determined according to the maximum short-circuit current of the system.

4. The direct series type distributed static synchronous series compensator according to claim 2, characterized in that: The control converter comprises: A DC capacitor having a first end and a second end, wherein a voltage between the first end and the second end of the DC capacitor is the compensation voltage; A first transistor having a first end, a second end and a control end, the first end of the first transistor being coupled to the first end of the DC capacitor, and the control end of the first transistor receiving a second trigger pulse signal; A second transistor has a first end, a second end and a control end, the first end of the second transistor is coupled to the first end of the DC capacitor, and the control end of the second transistor receives a second trigger pulse signal; A third transistor has a first end, a second end and a control end, the first end of the third transistor is coupled to the second end of the first transistor, the second end of the third transistor is coupled to the second end of the DC capacitor, and the control end of the third transistor receives a second trigger pulse signal; a fourth transistor having a first end, a second end and a control end, the first end of the fourth transistor being coupled to the second end of the second transistor, the second end of the fourth transistor being coupled to the second end of the DC capacitor, and the control end of the fourth transistor receiving a second trigger pulse signal; The common end of the first transistor and the fourth transistor is coupled to the first end of the regulating converter, and the common end of the second transistor and the third transistor is coupled to the second end of the regulating converter; The second trigger pulse signal is used to control the on-off sequence of the first transistor, the second transistor, the third transistor and the fourth transistor; When a short circuit fault occurs in the system, the second trigger pulse signal fails, and the first transistor, the second transistor, the third transistor and the fourth transistor are in a locked state.

5. The direct series type distributed static synchronous series compensator according to claim 4, characterized in that: The control converter also includes: A first diode having a cathode and an anode, the cathode of the first diode being coupled to the first end of the first transistor, and the anode of the first diode being coupled to the second end of the first transistor; a second diode having a cathode and an anode, the cathode of the second diode being coupled to the first end of the second transistor, and the anode of the second diode being coupled to the second end of the second transistor; a third diode having a cathode and an anode, the cathode of the third diode being coupled to the first end of the third transistor, and the anode of the third diode being coupled to the second end of the third transistor; The fourth diode has a cathode and an anode. The cathode of the fourth diode is coupled to the first end of the fourth transistor, and the anode of the fourth diode is coupled to the second end of the fourth transistor.

6. The direct series type distributed static synchronous series compensator according to claim 4, characterized in that: The control converter also includes: The filter circuit is coupled between the first terminal and the second terminal of the regulating converter.

7. The direct series type distributed static synchronous series compensator according to claim 4, characterized in that: The control converter also includes: The bypass switch is coupled between the first terminal and the second terminal of the regulating converter.

8. A method for determining parameters of a direct-series distributed static synchronous series compensator according to any one of claims 4 to 7, characterized in that: include: According to the equivalent circuit of the compensator submodule after a short-circuit fault occurs in the system, a mathematical model of a direct-series distributed static synchronous series compensator in the short-circuit current limiting dynamic process is established, including: Where, U represents the voltage value of the first terminal of the current limiting rectifier, U d Represents the current limiting inductor voltage, U dc Indicates the DC capacitor voltage, U dc0 Indicates the initial value of the DC capacitor voltage, U dcmax represents the peak value of the DC capacitor voltage, t0 represents the time when the system short-circuit occurs, t1 represents the peak value of the current-limiting inductor current after the short-circuit, t2 represents the time when the current-limiting inductor current crosses zero after the short-circuit, I d0 Indicates the current value of the current-limiting inductor before the short circuit occurs, I dmax Represents the peak current of the current-limiting inductor after a short circuit, I d Represents the current-limiting inductor current, L d Indicates the inductance value of the current-limiting inductor, and C indicates the capacitance value of the DC capacitor; The inductance value of the current limiting inductor is solved according to the mathematical model, including: Here, t represents time.

9. The parameter determination method according to claim 8, characterized in that: When solving the inductance value of the current-limiting inductor, ignore the DC capacitor voltage and obtain the approximate inductance value, including: The approximate inductance value is greater than the precise inductance value, and the difference between the approximate inductance value and the precise inductance value is set as a safety margin.

10. The parameter determination method according to claim 9, characterized in that: The inductance value of the current limiting inductor is calculated using the worst short-circuit situation, including: Among them, U m It represents the effective value of the maximum withstand voltage of the thyristor in the current limiting rectifier, and ω represents the system angular frequency.

11. A computer-readable storage medium, characterized in that: A program is stored, and when the program is loaded by a processor, the parameter determination method according to any one of claims 8 to 10 is implemented.

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