Power supply system, power supply device, and method for monitoring power timing of power supply system

Abstract

The invention relates to a power supply system, a power supply device and a method for monitoring power timing of the power supply system. In some aspects, a power supply system includes a plurality of power supply devices configured to be connected to an integrated circuit, where a power supply device of the plurality of power supply devices includes a voltage regulator configured to generate a rail voltage and an internal diagnostic circuit. The internal diagnostic circuit is configured to detect activation of an enable signal to activate the plurality of power supply devices according to an activation power timing, detect a rail violation of the activation power timing in response to a value of the rail voltage that does not satisfy a first condition defined by a voltage threshold at a first time, or a second condition defined by the voltage threshold is not satisfied at a second time. In response to detecting the rail violation, the internal diagnostic circuit is configured to activate an interrupt signal.

Description

Technical Field

[0001] The present application relates to a power supply system, a power supply device, and a method for monitoring the power timing of the power supply system. Background Art

[0002] An integrated circuit (e.g., a system on a chip) may use multiple voltage supply rails that supply power to the integrated circuit. The voltage supply rails may be powered up and powered down at a predefined timing. Deviations from the predefined timing may affect the reliability and functional safety of the integrated circuit. Summary of the invention

[0003] In some aspects, the technology described herein relates to a power supply system, comprising: a plurality of power supply devices configured to be connected to an integrated circuit, a power supply device among the plurality of power supply devices comprising: a voltage regulator configured to generate a rail voltage; and an internal diagnostic circuit configured to: detect activation of an enable signal to activate the plurality of power supply devices according to an activation power timing; detect a rail violation of the activation power timing in response to the following situation of the value of the rail voltage: a first condition defined by a voltage threshold is not satisfied at a first time, or a second condition defined by the voltage threshold is not satisfied at a second time; and in response to detecting the rail violation, activate an interrupt signal.

[0004] In some aspects, the technology described herein relates to a power supply device comprising: a voltage regulator configured to generate a rail voltage; and an internal diagnostic circuit configured to: detect activation of an enable signal to activate multiple power supply devices according to an activation power timing; detect a rail violation of the activation power timing in response to the following situation of the value of the rail voltage: a first condition defined by a voltage threshold is not satisfied at a first time, or a second condition defined by the voltage threshold is not satisfied at a second time; and in response to the rail violation, activate an interrupt signal.

[0005] In some aspects, the technology described herein relates to a method for monitoring a power sequence of a power supply system, the method comprising: in response to activation of an enable signal that activates the power supply system according to an activation power sequence, activating a power supply device to generate a rail voltage; detecting a rail violation of the activation power sequence in response to the following situation of the value of the rail voltage: a first condition defined by a voltage threshold is not satisfied at a first time, or a second condition defined by the voltage threshold is not satisfied at a second time; and in response to detecting the rail violation, activating an interrupt signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1A A power supply system for detecting rail violations for power sequencing of a plurality of power supply devices is shown.

[0007] Figure 1B An example of a power supply system is shown.

[0008] Figure 1C An example of a power supply device having internal diagnostic circuitry is shown.

[0009] Figure 1D An example of internal diagnostic circuitry is shown.

[0010] Figure 1E A diagram depicting exemplary signals for detecting a rail violation by a power supply device is shown.

[0011] Figure 1F A diagram depicting exemplary signals for detecting rail violations by a plurality of power supply devices is shown.

[0012] Figure 2 An example of a power supply device for detecting rail violations is shown.

[0013] Figure 3 Another example of a power supply device for detecting rail violations is shown.

[0014] Figure 4 A flow chart depicting example operations of a power supply device for detecting rail violations is shown. DETAILED DESCRIPTION

[0015] The present specification relates to a power supply system configured to detect rail violations of power timing of multiple power supply devices connected to an integrated circuit (e.g., a system on chip (SoC)) by a single power supply device. For example, the power supply system may include multiple power supply devices (e.g., point of load (POL) regulators), each of which is configured to generate a separate rail voltage used by the integrated circuit. In response to an enable signal, the power supply device can be activated (e.g., powered on) and deactivated (e.g., powered off) by a power timing (e.g., a predefined timing) that defines when the power supply device is activated. For example, the power timing may include activating a first rail voltage, followed by a second rail voltage, and then followed by a third rail voltage. Deviations from the power timing may be referred to as rail violations (e.g., the second rail voltage is powered on before the first rail voltage reaches its target value). In some systems, rail violations may affect the reliability and / or functional safety of the integrated circuit.

[0016] The power supply device may include a timing delay counter and a voltage regulator configured to generate a rail voltage. The timing delay counter may trigger the voltage regulator to activate or deactivate according to a programmable counter value (such as a power-on delay value and / or a power-off delay value). The timing delay counter may receive an enable signal, and in response to activation of the enable signal, the timing delay counter may trigger the voltage regulator to activate (e.g., power on) at a time corresponding to the power-on delay value (starting from the receipt of the activation of the enable signal), which causes the rail voltage to increase to its target value. In response to deactivation of the enable signal, the timing delay counter may trigger the voltage regulator to deactivate (e.g., power off) at a time corresponding to the power-off delay value (starting from the receipt of the deactivation of the enable signal), which causes the rail voltage to decrease.

[0017] The power system discussed herein uses the power supply device itself to monitor, control and / or diagnose power timing, thereby providing a more flexible and easier to implement power system that can avoid the use of a central management unit (e.g., a power management integrated circuit (PMIC)) to monitor and control power timing. In some examples, the central management unit can be customized according to a specific integrated circuit, and if the central management unit controls and monitors the power timing of the power system, it may be relatively difficult to implement changes to the power system (e.g., replace the power supply device, etc.).

[0018] Instead of using a central management unit, in some implementations, each power device includes an internal diagnostic circuit configured to detect a rail violation of its corresponding rail voltage (e.g., during activation and deactivation of the power system, and in some examples, when the rail voltage is in an activated state), and upon detection, the internal diagnostic circuit can generate an interrupt signal (e.g., a safe state signal) that can cause the integrated circuit to operate in a safe state. For example, the internal diagnostic circuit can detect whether its corresponding rail voltage has been activated too early or too late in the power timing by monitoring the rail voltage during a specified monitoring window and / or at a specific time.

[0019] In response to activation of the enable signal, the internal diagnostic circuit may detect whether the value of the rail voltage satisfies a first condition defined by a first voltage threshold (e.g., an undervoltage threshold) at a first time (e.g., the beginning of a monitoring window) to ensure that the power supply device is not started too early. In some examples, a value of the rail voltage equal to or greater than the first voltage threshold may indicate a rail violation (e.g., power-up starts too early). Additionally, during activation, the internal diagnostic circuit may detect whether the value of the rail voltage satisfies a second condition defined by the first voltage threshold at a second time (e.g., the end of the monitoring window) to ensure that the power supply device is not started too late. A value of the rail voltage equal to or less than the first voltage threshold at the second time may indicate a rail violation (e.g., power-up starts too late).

[0020] In response to the deactivation of the enable signal, the internal diagnostic circuit may detect whether the value of the rail voltage satisfies a first condition defined by a second voltage threshold (e.g., a disable threshold) at a first time (e.g., the beginning of a monitoring window) to ensure that the power supply device is not powered off prematurely. At the first time, the value of the rail voltage being equal to or less than the second voltage threshold may indicate a rail violation (e.g., powering off prematurely). During deactivation, the internal diagnostic circuit may detect whether the value of the rail voltage satisfies a second condition defined by the second voltage threshold at a second time (e.g., the end of the monitoring window) to ensure that the power supply device is not powered off too late. At the second time, the value of the rail voltage being equal to or greater than the second voltage threshold may indicate a rail violation (e.g., powering off too late). These and other features are further described with reference to the accompanying drawings.

[0021] Figures 1A to 1F A power system 100 is shown that is configured to provide a rail voltage 106 to an integrated circuit 104. In some examples, the integrated circuit 104 includes a system on a chip (SoC). At least one (e.g., each) power device 102 can monitor its corresponding rail voltage 106 to detect a rail violation 134 of the power timing of the power system 100. In response to detecting the rail violation 134, the power device 102 can activate an interrupt signal 110, which causes the integrated circuit 104 to operate in a safe state.

[0022] The power sequence is the order in which the power supply devices 102 are activated (e.g., powered on) or deactivated (e.g., powered off). The rail violation 134 may indicate an abnormality in the power sequence (e.g., a particular rail voltage 106 is powered on (or powered off) too early or too late in the power sequence). Each of the power supply devices 102 may be configured to detect whether its corresponding rail voltage 106 is powered on (or powered off) at a time that is too early or too late in the power sequence. The power supply system 100 may not include or use a central management unit (e.g., a power management integrated circuit (PMIC)) to monitor and control the power sequence, which may provide a more flexible and easier to implement power supply device 102.

[0023] The power supply system 100 includes a plurality of power supply devices 102 configured to generate a plurality of rail voltages 106. The rail voltage 106 may be a supply voltage used by an integrated circuit 104. In some examples, each power supply device 102 has a voltage output terminal connected to the integrated circuit 104. The power supply device 102 may be any type of electrical device that generates the rail voltage 106 from a supply voltage 116. In some examples, the power supply devices 102 share a supply voltage 116 (e.g., a common supply voltage). Each power supply device 102 may receive a supply voltage 116 and, when activated, may generate a separate (and in some examples, different) rail voltage 106. During activation of the power supply device 102, the rail voltage 106 increases from a minimum voltage (e.g., zero volts, a standby voltage, etc.) to a target voltage. During deactivation of one of the power supply devices 102, the rail voltage decreases from its target voltage to its minimum voltage. In some examples, the power supply device 102 includes a voltage regulator (e.g., a voltage converter). In some examples, the power supply device 102 includes a direct current (DC)-DC converter. In some examples, power supply device 102 includes a point-of-load (PoL) voltage regulator.

[0024] like Figure 1B As shown, the power supply system 100 may include power supply devices 102-1, 102-2, and 102-3 to 102-N. It should be noted that the power supply system 100 may include any number of power supply devices 102, such as two, three, four, or any number greater than four. The power supply device 102 may refer to any one of the power supply devices 102-1 to 102-N. Each power supply device 102 has an output (e.g., a terminal, a pin, etc.) configured to provide a corresponding rail voltage 106 to a connected device (e.g., an integrated circuit 104). As shown in FIG. Figure 1B As shown, power supply device 102-1 generates rail voltage 106-1, power supply device 102-2 generates rail voltage 106-2, power supply device 102-3 generates rail voltage 106-3, and power supply device 102-N generates rail voltage 106-N.

[0025] Each power supply device 102 may receive an enable signal 112 as an input. The enable signal 112 may be a common enable signal between the power supply devices 102. For example, each power supply device 102 may receive an enable signal 112 (e.g., the same enable signal). Activation of the enable signal 112 causes the power supply device 102 to activate according to an activation power sequence. Activation of the enable signal 112 may include a transition (e.g., a rising edge) from a first voltage level to a second voltage level. The activation power sequence may indicate that the power supply device 102-1 is activated first, and after the rail voltage 106-1 has reached its target value, the power supply device 102-2 is activated, followed by activation of the power supply device 102-3, and so on. Deactivation of the enable signal 112 causes the power supply device 102 to deactivate according to a deactivation power sequence. Deactivation of the enable signal 112 may include a transition (e.g., a falling edge) from a second voltage level to a first voltage level. The deactivation power sequence may indicate that power supply device 102-1 is deactivated first, and after rail voltage 106-1 has reached its minimum value, power supply device 102-2 is deactivated, followed by deactivation of power supply device 102-3, and so on. In some examples, the deactivation power sequence has the same time order as the activation power sequence. In some examples, the deactivation power sequence has a different time order than the activation power sequence.

[0026] When the enable signal 112 is activated, the power supply device 102 detects a transition (e.g., a rising edge) of the enable signal 112, and a timing delay counter 120 included in each power supply device 102 controls when the corresponding rail voltage 106 is activated (e.g., starts to increase to its target voltage level). When the enable signal 112 is deactivated, the power supply device 102 detects a transition (e.g., a falling edge) of the enable signal 112, and a timing delay counter 120 included in each power supply device 102 controls when the corresponding rail voltage 106 is deactivated (e.g., starts to decrease to a minimum voltage).

[0027] Each power supply device 102 is configured to receive a clock signal 114 as an input. The clock signal 114 may be a common clock signal for the power supply devices 102. Each power supply device 102 may include an interrupt output (e.g., a terminal, a pin, etc.) that provides an interrupt signal 110. The integrated circuit 104 may receive the interrupt signal 110. In some examples, the interrupt signal 110 is a signal shared with the power supply devices 102. For example, activation of the interrupt signal 110 by any of the power supply devices 102 may cause the integrated circuit 104 to operate in a safe state. Activation of the interrupt signal 110 may include a transition (e.g., a rising edge) from a first voltage level to a second voltage level. The safe state may be an operating state of the integrated circuit 104. When the integrated circuit 104 operates normally, the integrated circuit 104 may operate in a normal operating state. Activation of the interrupt signal 110 may cause the integrated circuit 104 to change the operating state from a first operating state (e.g., a normal operating state) to a second operating state (e.g., a safe operating state). The integrated circuit 104 in the second operating state may operate differently from the integrated circuit 104 in the first operating state.

[0028] Each power device 102 may activate an interrupt signal 110 in response to detecting a rail violation 134. Power system 100 may include a communication bus 108 connected to integrated circuits 104 and power devices 102. In some examples, communication bus 108 includes an inter-integrated circuit (I2C) bus.

[0029] Figure 1C An example of a power supply device 102 is shown, which may be any power supply device in the power supply device 102 in the power supply system 100. Figure 1C As shown, the power supply device 102 includes a timing delay counter 120 and a voltage regulator 122. The voltage regulator 122 is configured to generate the rail voltage 106 from the supply voltage 116. The timing delay counter 120 can receive the enable signal 112 and the clock signal 114, and control the timing of when the voltage regulator 122 is activated according to the activation power timing and when it is deactivated according to the deactivation power timing.

[0030] The timing delay counter 120 may trigger activation (or deactivation) of the voltage regulator 122 based on the counter value 124. The counter value may include a power-on delay value 126 and a power-off delay value 128. The power-on delay value 126 may be used during an activation power sequence. The power-off delay value 128 may be used during a deactivation power sequence. The power-on delay value 126 may represent the length of time that the voltage regulator 122 is delayed until the voltage regulator 122 is activated. When the voltage regulator 122 is activated, the rail voltage 106 begins to increase. The power-on delay value 126 may indicate a time period starting from the detection of activation of the enable signal 112. In other words, instead of activating the voltage regulator 122 when the activation of the enable signal 112 is detected, the activation of the voltage regulator 122 is delayed by the power-on delay value 126. In response to detecting that the enable signal 112 is activated, the timing delay counter 120 may delay the activation of the voltage regulator 122 according to the power-on delay value 126. When the timing delay counter 120 triggers activation of the voltage regulator 122 , the rail voltage 106 increases to its target value (eg, will be powered up).

[0031] The power-off delay value 128 may represent the length of time that the voltage regulator 122 is delayed until the voltage regulator 122 is disabled. When the voltage regulator 122 is disabled, the rail voltage 106 begins to decrease. The power-off delay value 128 may indicate a time period starting from the detection of the deactivation of the enable signal 112. In other words, instead of deactivating the voltage regulator 122 when the deactivation of the enable signal 112 is detected, the deactivation of the voltage regulator 122 is delayed by the power-off delay value 128. In response to detecting that the enable signal 112 is disabled, the timing delay counter 120 may delay the deactivation of the voltage regulator 122 according to the power-off delay value 128. For example, the timing delay counter 120 may trigger the deactivation of the voltage regulator 122 in response to the time period (starting from the detection of the deactivation of the enable signal 112) being equal to (or greater than) the power-off delay value 128, which causes the rail voltage 106 to decrease from its target value (e.g., to be powered off).

[0032] In some examples, the power supply device 102 includes a memory device 160 configured to store the counter value 124. In some examples, the memory device 160 includes a field programmable memory device. In some examples, the memory device 160 includes a one-time programmable (OTP) memory device. In some examples, the power supply device 102 does not include a separate memory device, and the counter value 124 is stored at the timing delay counter 120.

[0033] refer to Figure 1C and Figure 1D, the power supply device 102 includes an internal diagnostic circuit 130 that is configured to detect a rail violation 134 relative to its rail voltage 106 during a power sequence (e.g., an activation power sequence, a deactivation power sequence), and upon detection, may activate an interrupt signal 110, which enables the integrated circuit 104 to operate in a safe state. For example, when the enable signal 112 is activated (or deactivated), the internal diagnostic circuit 130 may detect whether its corresponding rail voltage 106 has been started too early or too late in the power sequence by monitoring the rail voltage 106 at one or more times during the monitoring window 142.

[0034] In response to activation of the enable signal 112, the internal diagnostic circuit 130 may detect whether the value of the rail voltage 106 satisfies a first condition defined by a voltage threshold 150-1 at a first time 141-1 (e.g., the beginning of the monitoring window 142) to ensure that the power supply device 102 is not powered up prematurely. The voltage threshold 150-1 may be an undervoltage threshold, and the first condition defined by the voltage threshold 150-1 may be that the value of the rail voltage 106 is less than the voltage threshold 150-1 at the first time 141-1. The value of the rail voltage 106 being equal to or greater than the voltage threshold 150-1 at the first time 141-1 may indicate a rail violation 134 (e.g., premature power-up).

[0035] During activation, the internal diagnostic circuit 130 may detect whether the value of the rail voltage 106 satisfies a second condition defined by the voltage threshold 150-1 at a second time 141-2 (e.g., the end of the monitoring window 142) to ensure that the power supply device 102 is not powered on too late. The second condition of the voltage threshold 150-1 may be that the value of the rail voltage 106 is greater than the voltage threshold 150-1 at the second time 141-2. The value of the rail voltage 106 being equal to or less than the voltage threshold 150-1 at the second time 141-2 may indicate a rail violation 134 (e.g., powered on too late). In some examples, after the power supply device 102 has been activated (e.g., powered on), the internal diagnostic circuit 130 may monitor the rail voltage 106 to ensure that the rail voltage 106 is greater than the voltage threshold 150-1. For example, after the power supply device 102 has been activated, the internal diagnostic circuit 130 may detect whether the rail voltage 106 is greater than the voltage threshold 150-1, and if not, the interrupt signal 110 may be activated.

[0036] In response to the deactivation of the enable signal 112, the internal diagnostic circuit 130 may detect whether the value of the rail voltage 106 satisfies the first condition defined by the voltage threshold 150-2 at the first time 141-1 (e.g., the beginning of the monitoring window 142) to ensure that the power supply device 102 is not powered off prematurely. In some examples, the voltage threshold 150-2 is a lower threshold (e.g., a disable threshold). The first condition defined by the voltage threshold 150-2 may be that the value of the rail voltage 106 is greater than the voltage threshold 150-2. The value of the rail voltage 106 being equal to or less than the voltage threshold 150-2 at the first time 141-1 may indicate a rail violation 134 (e.g., premature power off).

[0037] During deactivation, the internal diagnostic circuit 130 may detect whether the value of the rail voltage 106 satisfies a second condition defined by the voltage threshold 150-2 at a second time 141-2 (e.g., the end of the monitoring window 142) to ensure that the power supply device 102 is not powered off too late. The second condition defined by the voltage threshold 150-2 may be that the value of the rail voltage 106 is less than or equal to the voltage threshold 150-2 at the second time 141-2. The value of the rail voltage 106 being equal to or greater than the voltage threshold 150-2 at the second time 141-2 may indicate a rail violation 134 (e.g., powered off too late).

[0038] The internal diagnostic circuit 130 includes a timing delay check counter 132 and a voltage threshold detector 146. The timing delay check counter 132 may determine when to check for a rail violation 134 (e.g., at a first time 141-1, a second time 141-2) based on a counter value 135 associated with the timing delay check counter 132. The voltage threshold detector 146 may detect whether the value of the rail voltage 106 satisfies a condition (e.g., a first condition, a second condition) defined by one or more voltage thresholds 150 (e.g., voltage threshold 150-1 or voltage threshold 150-1) (e.g., greater than, less than, and / or equal to the one or more voltage thresholds). In some examples, the voltage threshold detector 146 may activate or deactivate the voltage threshold signal 170 and / or the voltage threshold signal 172 based on a comparison of the value of the rail voltage 106 with the voltage threshold 150-1 and the voltage threshold 150-2.

[0039] In more detail, the voltage threshold detector 146 may detect whether the value of the rail voltage 106 is less than the voltage threshold 150-1, and if so, the voltage threshold signal 170 may be activated. In some examples, the voltage threshold 150-1 is an undervoltage threshold. In some examples, the voltage threshold 150-1 is used during activation of the power supply device 102. If the voltage threshold detector 146 detects that the value of the rail voltage 106 is equal to or greater than the voltage threshold 150-1, the voltage threshold detector 146 may deactivate the voltage threshold signal 170. The voltage threshold detector 146 may detect whether the value of the rail voltage 106 is less than the voltage threshold 150-2, and if so, the voltage threshold signal 172 may be activated. In some examples, the voltage threshold 150-2 is used during deactivation of the power supply device 102. In some examples, the voltage threshold 150-2 is less than the voltage threshold 150-1. If the voltage threshold detector 146 detects that the rail voltage 106 is equal to or greater than the voltage threshold 150 - 2 , the voltage threshold detector 146 may disable the voltage threshold signal 172 .

[0040] The timing delay check counter 132 may receive the enable signal 112, the clock signal 114, and in some examples, the voltage threshold signals 170, 172 from the voltage threshold detector 146. The timing delay check counter 132 may detect a rail violation 134 defined by a counter value 135 at a first time 141-1 and a second time 141-2 using the voltage threshold signal 170 and the voltage threshold signal 172. The counter value 135 may include a power-up check value 136, a power-down check value 138, and an error window value 140. The power-up check value 136 may indicate a first time (e.g., first time 141-1) from activation of the enable signal 112 to check for a rail violation 134. During activation, the error window value 140 may indicate a second time (e.g., second time 141-2) from the power-up check value 136 to check for a rail violation 134. The power-off check value 138 may indicate a first time (e.g., first time 141-1) from the deactivation of the enable signal 112 to the check for rail violation 134. During the deactivation period, the error window value 140 may also indicate a second time (e.g., second time 141-2) from the power-off check value 138 to the check for rail violation 134. In some examples, the error window value 140 includes a first error window value indicating a time length during the activation period and a second error window value indicating a time length during the deactivation period. In some examples, the second error window value is different from the first error window value. In some examples, the second error window value is the same as the first error window value.

[0041] refer to Figure 1E In response to activation of the enable signal 112, the timing delay counter 120 delays activation of the voltage regulator 122 according to the power-up delay value 126. When the voltage regulator 122 is activated, the rail voltage 106 begins to increase.

[0042] In response to the activation of the enable signal 112, the timing delay check counter 132 detects whether the voltage threshold signal 170 is activated at a time (e.g., the first time 141-1) indicated by the power-up check value 136. In other words, when the time period from the receipt of the enable signal 112 has reached the power-up check value 136, the timing delay check counter 132 may detect whether the voltage threshold signal 170 is activated. If the voltage threshold signal 170 is activated (e.g., it indicates that the value of the rail voltage 106 is less than the voltage threshold 150-1), the timing delay check counter 132 may determine that the activation power timing is operating normally (e.g., no rail violation 134 is detected). If the voltage threshold signal 170 is deactivated (e.g., it indicates that the value of the rail voltage 106 is equal to or greater than the voltage threshold 150-1), the timing delay check counter 132 may detect the rail violation 134 and activate the interrupt signal 110.

[0043] The timing delay check counter 132 may detect whether the voltage threshold signal 170 is activated at a time (e.g., the second time 141-2) defined by the error window value 140. In other words, when the time period from the time indicated by the power-on check value 136 has reached the error window value 140, the timing delay check counter 132 may detect whether the voltage threshold signal 170 is activated. If the voltage threshold signal 170 is deactivated (e.g., it indicates that the value of the rail voltage 106 is equal to or greater than the voltage threshold 150-1), the timing delay check counter 132 may determine that the activation power timing is operating normally (e.g., no rail violation 134 is detected). If the voltage threshold signal 170 is activated (e.g., it indicates that the value of the rail voltage 106 is less than the voltage threshold 150-1), the timing delay check counter 132 may detect the rail violation 134 and activate the interrupt signal 110.

[0044] In response to the deactivation of the enable signal 112, the timing delay counter 120 delays the deactivation of the voltage regulator 122 according to the power-off delay value 128. When the voltage regulator 122 is disabled, the rail voltage 106 begins to decrease.

[0045] In response to the deactivation of the enable signal 112, the timing delay check counter 132 detects whether the voltage threshold signal 172 is activated at a time (e.g., the first time 141-1) defined by the power-off check value 138. In other words, when the time period from the receipt of the deactivation of the enable signal 112 has reached the power-off check value 138, the timing delay check counter 132 may detect whether the voltage threshold signal 172 is activated. If the voltage threshold signal 172 is deactivated (e.g., the value of the rail voltage 106 is equal to or greater than the voltage threshold 150-2), the timing delay check counter 132 may determine that the disabled power sequence is operating normally (e.g., no rail violation 134 is detected). If the voltage threshold signal 172 is activated (e.g., the value of the rail voltage 106 is less than the voltage threshold 150-2), the timing delay check counter 132 may detect the rail violation 134 and activate the interrupt signal 110.

[0046] During deactivation, the timing delay check counter 132 may detect whether the voltage threshold signal 172 is activated at a time (e.g., the second time 141-2) defined by the error window value 140. In other words, when the time period from the time indicated by the power-off check value 138 has reached the error window value 140, the timing delay check counter 132 may detect whether the voltage threshold signal 172 is activated. If the voltage threshold signal 172 is activated (e.g., it indicates that the value of the rail voltage 106 is less than the voltage threshold 150-2), the timing delay check counter 132 may determine that the deactivation power timing is operating normally (e.g., no rail violation 134 is detected). If the voltage threshold signal 172 is deactivated (e.g., it indicates that the value of the rail voltage 106 is greater than or equal to the voltage threshold 150-2), the timing delay check counter 132 may detect the rail violation 134 and activate the interrupt signal 110.

[0047] In some examples, the counter value 124 used by the timing delay counter 120 and / or the counter value 135 used by the timing delay check counter 132 are field programmable. For example, the timing delay counter 120 and the timing delay check counter 132 may be programmed after the power supply device 102 has been manufactured. The memory device 160 may receive programming data 182, wherein the programming data 182 includes the counter value 124 and / or the counter value 135. In some examples, the programming data 182 may include other configuration data, such as a target voltage level, a power-off voltage level, a voltage threshold 150-1, and / or a voltage threshold 150-2. The counter value 124 and / or the counter value 135 from the programming data 182 may be stored in the memory device 160 and / or in the timing delay counter 120, the timing delay check counter 132, and / or the voltage regulator 122. In some examples, the integrated circuit 104 may transmit the programming data 182 to the power supply device 102. In some examples, integrated circuit 104 transmits programming data 182 via communication bus 108. In some examples, controller 180, which is separate from integrated circuit 104, can provide programming data 182 to power supply device 102.

[0048] In some examples, each power device 102 is associated with an identifier that can uniquely identify the respective power device 102, and the programming data 182 can include an identifier for the power device 102 to be programmed with the counter value 124. In some examples, the identifier is an address that identifies the power device 102. In some examples, the programming data 182 includes digital data. In some examples, the programming data 182 includes analog data. In some examples, addressing is performed via a resistor and an analog-to-digital converter.

[0049] refer to Figure 1FIn response to activation of the enable signal 112, the rail voltage 106-1 is activated at a time indicated by the power-up delay value 126-1. The power supply device 102-1 checks for a rail violation 134 on the rail voltage 106-1 during the monitoring window 142a-1 (e.g., at the first time 141-1 and the second time 141-2). Then, the rail voltage 106-2 is activated at a time indicated by the power-up delay value 126-2. The power supply device 102-2 checks for a rail violation 134 on the rail voltage 106-2 during the monitoring window 142a-2 (e.g., at the first time 141-1 and the second time 141-2). Then, the rail voltage 106-3 is activated at a time indicated by the power-up delay value 126-3. The power supply device 102-3 detects a rail violation 134 on the rail voltage 106-3 during the monitoring window 142a-3 (e.g., at the first time 141-1 and the second time 141-2), and activates the interrupt signal 110. In some examples, after the power supply device 102 has been activated (e.g., powered on), the internal diagnostic circuit 130 may monitor its corresponding rail voltage 106 (e.g., 106-1, 106-2, or 106-3) to ensure that the rail voltage 106 is greater than the voltage threshold 150-1. For example, after the power supply device 102-1 has been activated, the internal diagnostic circuit 130 may detect during the period 139 whether the rail voltage 106-1 is greater than the voltage threshold 150-1 (e.g., at one or more times during the period 139 between the monitoring window 142a-1 and the monitoring window 142b-1 (or continuously monitoring)), and if not, the interrupt signal 110 may be activated. In some examples, time period 139 may be between second time 141 - 2 associated with monitoring window 142 a - 1 and first time 141 - 1 associated with monitoring window 142 b - 1 .

[0050] In response to the deactivation of the enable signal 112, the rail voltage 106-1 is deactivated at a time indicated by the power-down delay value 128-1. The power supply device 102-1 checks for a rail violation 134 on the rail voltage 106-1 during the monitoring window 142b-1 (e.g., at the first time 141-1 and the second time 141-2). Then, the rail voltage 106-3 is deactivated at a time indicated by the power-down delay value 128-3. The power supply device 102-3 checks for a rail violation 134 on the rail voltage 106-3 during the monitoring window 142b-3 (e.g., at the first time 141-1 and the second time 141-2). Then, the rail voltage 106-2 is deactivated at a time indicated by the power-up delay value 128-2. The power supply device 102-2 checks for a rail violation 134 on the rail voltage 106-2 during the monitoring window 142b-2 (e.g., at the first time 141-1 and the second time 141-2). In some examples, the monitoring window 142b-1, 142b-2, or 142b-3 has a different length than the corresponding monitoring window 142a-1, 142a-2, or 142a-3. In some examples, the monitoring window 142b-1, 142b-2, or 142b-3 has the same length as the corresponding monitoring window 142a-1, 142a-2, or 142a-3.

[0051] Figure 2 An example of a power supply device 202 according to one aspect is shown. The power supply device 202 may be Figures 1A to 1F 102, and may include any details discussed with reference to those figures. The power supply device 202 includes a timing delay counter 220, a voltage regulator 222, an internal diagnostic circuit 230, and a memory device 260. The timing delay counter 220 may receive a clock signal 214 and an enable signal 212, and delay activation (or deactivation) of the voltage regulator 222 according to its counter value. In some examples, the power supply device 202 includes a communication bus 208. The voltage regulator 222 is configured to generate a rail voltage 206. The internal diagnostic circuit 230 may receive the enable signal 212 (and the clock signal 214) and the rail voltage 206, and detect a rail violation. If a rail violation is detected, the internal diagnostic circuit 230 may activate the interrupt signal 210. The internal diagnostic circuit 230 includes a timing delay check counter 232, which is configured to receive the enable signal 212, the voltage threshold signal 270, and the voltage threshold signal 272.

[0052] The memory device 260 may receive programming data 282, wherein the programming data 282 includes a counter value 224 used by the timing delay counter 220 and / or a counter value 235 used by the timing delay check counter 232. In some examples, the programming data 282 may include other configuration data, such as a target voltage level, a power-off voltage level, a voltage threshold (e.g., voltage threshold 150-1, voltage threshold 150-2). In some examples, the integrated circuit may transmit the programming data 282 to the power supply device 202. In some examples, the integrated circuit 104 transmits the programming data 282 via the communication bus 208. In some examples, the communication bus 208 is an I2C bus. In some examples, the integrated circuit 104 transmits the programming data 282 via the communication bus 208. In some examples, the power supply device 202 is associated with an address 292 that can uniquely identify the power supply device 202, and the programming data 282 may include the address 292 and the counter value 224 and / or the counter value 235.

[0053] Figure 3 An example of a power supply device 302 according to one aspect is shown. The power supply device 302 may be Figures 1A to 1F 302 , and may include any details discussed with reference to those figures. The power supply device 302 includes a timing delay counter 320, a voltage regulator 322, an internal diagnostic circuit 330, and a memory device 360. The timing delay counter 320 may receive a clock signal 314 and an enable signal 312, and delay activation (or deactivation) of the voltage regulator 322 according to its counter value. In some examples, the power supply device 302 includes a communication bus 308. The voltage regulator 322 is configured to generate a rail voltage 306. The internal diagnostic circuit 330 may receive the enable signal 312 (and the clock signal 314) and the rail voltage 306, and detect a rail violation. If a rail violation is detected, the internal diagnostic circuit 330 may activate an interrupt signal 310. The internal diagnostic circuit 330 includes a timing delay check counter 332, which is configured to receive the enable signal 312, the voltage threshold signal 370, and the voltage threshold signal 372.

[0054] The memory device 360 ​​may receive programming data 382, ​​wherein the programming data 382 includes a counter value 324 used by the timing delay counter 320 and / or a counter value 335 used by the timing delay check counter 332. In some examples, the programming data 382 may include other configuration data, such as a target voltage level, a power-off voltage level, a voltage threshold (e.g., voltage threshold 150-1, voltage threshold 150-2). In some examples, the power supply device 302 is associated with an address 392 that can uniquely identify the power supply device 302. In some examples, the power supply device 302 includes an analog-to-digital converter 362 and a resistor 364. In some examples, the address 392 is defined by the analog-to-digital converter 362 and the resistor 364. The power supply device 302 may drive a current into the resistor 364, which generates a voltage monitored by the analog-to-digital converter 362. The analog-to-digital converter 362 may obtain a digital code and compare the digital code with a hard-coded code to define the address 392 of the power supply device 302. In some examples, changing the resistance value of resistor 364 may change the voltage, the digital code, and therefore the address 392 of the power supply device 302 .

[0055] Figure 4 A flowchart 400 depicting an example operation of a power supply system according to one aspect is shown. Figures 1A to 1F Flowchart 400 is explained with reference to power supply system 100 of the present invention, but the operations may be implemented by any of the examples discussed herein. Figure 4 The flowchart 400 shows the operations in an ordered sequence, but it should be understood that this is merely an example and may include additional or alternative operations. Figure 4 The operations and related operations may be performed in a different order than shown, or in a parallel or overlapping manner.

[0056] Operation 402 includes activating a power supply device to generate a rail voltage in response to activation of an enable signal to activate a power system according to an activation power sequence. Operation 404 includes detecting a rail violation of the activation power sequence in response to a value of the rail voltage not satisfying a first condition defined by a voltage threshold at a first time, or a value of the rail voltage not satisfying a second condition defined by the voltage threshold at a second time. Operation 406 includes activating an interrupt signal in response to detecting the rail violation, the interrupt signal being configured to cause the integrated circuit to operate in a safe state.

[0057] In some aspects, the technology described herein relates to a power supply system, comprising: a plurality of power supply devices configured to be connected to an integrated circuit, a power supply device among the plurality of power supply devices comprising: a voltage regulator configured to generate a rail voltage; and an internal diagnostic circuit configured to: detect activation of an enable signal to activate the plurality of power supply devices according to an activation power timing; detect a rail violation of the activation power timing in response to the following situation of the value of the rail voltage: a first condition defined by a voltage threshold is not satisfied at a first time, or a second condition defined by the voltage threshold is not satisfied at a second time; and in response to detecting the rail violation, activate an interrupt signal.

[0058] In some aspects, the technology described herein relates to a power supply system, wherein the first condition defined by the voltage threshold includes the value of the rail voltage being less than the voltage threshold. In some aspects, the technology described herein relates to a power supply system, wherein the second condition defined by the voltage threshold includes the value of the rail voltage being equal to or greater than the voltage threshold.

[0059] In some aspects, the technology described herein relates to a power supply system, wherein the voltage threshold is a first voltage threshold, the internal diagnostic circuit is configured to: detect deactivation of the enable signal to disable the multiple power supply devices according to a deactivation power timing; and detect a rail violation of the deactivation power timing in response to the following situation of the value of the rail voltage: a first condition defined by a second voltage threshold is not satisfied at a third time, or a second condition defined by the second voltage threshold is not satisfied at a fourth time.

[0060] In some aspects, the technology described herein relates to a power supply system, wherein the first condition defined by the second voltage threshold includes the value of the rail voltage being equal to or greater than the second voltage threshold. In some aspects, the technology described herein relates to a power supply system, wherein the second condition defined by the second voltage threshold includes the rail voltage being less than the second voltage threshold.

[0061] In some aspects, the technology described herein relates to a power supply system wherein the internal diagnostic circuit includes a timing delay check counter associated with a plurality of counter values ​​including a first counter value corresponding to the first time and a second counter value corresponding to the second time.

[0062] In some aspects, the technology described herein relates to a power supply system, wherein the internal diagnostic circuit includes a voltage threshold detector configured to activate or deactivate a voltage threshold signal based on a comparison of the value of the rail voltage with the voltage threshold, wherein the timing delay check counter is configured to detect the rail violation based on whether the voltage threshold signal is activated or deactivated at the first time or the second time.

[0063] In some aspects, the technology described herein relates to a power supply system, wherein the internal diagnostic circuit is configured to receive programming data to configure the timing delay check counter, the programming data including the multiple counter values. In some aspects, the technology described herein relates to a power supply system, wherein the internal diagnostic circuit includes a memory device configured to store the multiple counter values. In some aspects, the technology described herein relates to a power supply system, wherein the power supply device is associated with an address, the internal diagnostic circuit includes an analog-to-digital converter and a resistor, the analog-to-digital converter and the resistor are configured to define the address.

[0064] In some aspects, the technology described herein relates to a power supply device, the power supply device including: a voltage regulator configured to generate a rail voltage; and an internal diagnostic circuit configured to: detect activation of an enable signal to activate multiple power supply devices according to an activation power timing sequence; detect a rail violation of the activation power timing sequence in response to the following situation of the value of the rail voltage: a first condition defined by a voltage threshold is not satisfied at a first time, or a second condition defined by the voltage threshold is not satisfied at a second time; and in response to the rail violation, activate an interrupt signal. In some aspects, the technology described herein relates to a power supply device, wherein the first condition defined by the voltage threshold includes the value of the rail voltage being less than the voltage threshold, and wherein the second condition defined by the voltage threshold includes the value of the rail voltage being equal to or greater than the voltage threshold.

[0065] In some aspects, the technology described herein relates to a power supply device, wherein the voltage threshold is a first voltage threshold, the internal diagnostic circuit is configured to: detect deactivation of the enable signal to disable the multiple power supply devices according to a deactivation power timing; and detect a rail violation of the deactivation power timing in response to the following situation of the value of the rail voltage: a first condition defined by a second voltage threshold is not satisfied at a third time, or a second condition defined by the second voltage threshold is not satisfied at a fourth time.

[0066] In some aspects, the technology described herein relates to a power supply device, wherein the internal diagnostic circuit includes: a timing delay check counter, the timing delay check counter being associated with a plurality of counter values ​​corresponding to the first time to the fourth time. In some aspects, the technology described herein relates to a power supply device, wherein the first condition defined by the second voltage threshold includes the value of the rail voltage being equal to or greater than the second voltage threshold, wherein the second condition defined by the second voltage threshold includes the rail voltage being less than the second voltage threshold.

[0067] In some aspects, the technology described herein relates to a method for monitoring a power sequence of a power supply system, the method comprising: in response to activation of an enable signal that activates the power supply system according to an activation power sequence, activating a power supply device to generate a rail voltage; detecting a rail violation of the activation power sequence in response to the following situation of the value of the rail voltage: a first condition defined by a voltage threshold is not satisfied at a first time, or a second condition defined by the voltage threshold is not satisfied at a second time; and in response to detecting the rail violation, activating an interrupt signal.

[0068] In some aspects, the technology described herein relates to a method wherein the first condition defined by the voltage threshold includes the value of the rail voltage being less than the voltage threshold, wherein the second condition defined by the voltage threshold includes the rail voltage being greater than or equal to the voltage threshold.

[0069] In some aspects, the technology described herein relates to a method wherein the voltage threshold is a first voltage threshold, the method further comprising: detecting deactivation of the enable signal to disable the power system according to a deactivation power sequence; and detecting a rail violation of the deactivation power sequence in response to the value of the rail voltage not satisfying a first condition defined by a second voltage threshold at a third time, or not satisfying a second condition defined by the second voltage threshold at a fourth time.

[0070] In some aspects, the technology described herein relates to a method, further comprising: detecting activation of the enable signal by a timing delay check counter; triggering a rail check by the timing delay check counter in response to a time period satisfying the counter value representing the first time; and detecting, in response to the rail check, whether the value of the rail voltage satisfies the first condition defined by the voltage threshold.

[0071] Various specific implementations of the systems and techniques described herein may be implemented in digital electronic circuits, integrated circuits, specially designed ASICs (application specific integrated circuits), computer hardware, firmware, software, and / or combinations thereof. These various specific implementations may include specific implementations in one or more computer programs that may be executed and / or interpreted on a programmable system including at least one programmable processor, which may be dedicated or general purpose, coupled to receive data and instructions from and transmit data and instructions to a storage system, at least one input device, and at least one output device. Various specific implementations of the systems and techniques described herein may be implemented as and / or may be generally referred to herein as circuits, modules, blocks, or systems that may be combined in software and hardware. For example, a module may include functions / actions / computer program instructions executed on a processor (e.g., a processor formed on a silicon substrate, a GaAs substrate, etc.) or some other programmable data processing device.

[0072] Some of the examples above are described as processes or methods, which are depicted as flow charts. Although the flow charts describe the operations as sequential processes, many of these operations can be performed in parallel, concurrently, or simultaneously. In addition, the order of operations can be rearranged. These processes can terminate when their operations are completed, but can also have additional steps not included in the drawings. These processes can correspond to methods, functions, procedures, subroutines, subprograms, etc.

[0073] The methods discussed above (some of which are represented by flow charts) may be implemented by hardware, software, firmware, middleware, microcode, hardware description language, or any combination thereof. When implemented in software, firmware, middleware, or microcode, the program code or code segments for performing the necessary tasks may be stored in a machine or computer readable medium, such as a storage medium. A processor may perform the necessary tasks.

[0074] It should be understood that although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, a first element may be named as a second element, and similarly, a second element may be named as a first element without departing from the scope of the examples discussed herein. As used herein, the term "and / or" includes any and all combinations of one or more associated items listed.

[0075] It will be understood that in the foregoing description, when an element is referred to as being on another element, connected to another element, electrically connected to another element, coupled to another element, or electrically coupled to another element, the element may be directly on another element, connected or coupled to another element, or one or more intermediate elements may be present. On the contrary, when an element is referred to as being directly on another element, directly connected to another element, or directly coupled to another element, there is no intermediate element. Although the term directly on, directly connected to, or directly coupled to may not be used throughout the specific embodiments, an element that is shown as being directly on an element, directly connected, or directly coupled can be referred to in this manner. The claims of the present application, if present, may be revised to narrate the example relationships described in the specification or shown in the accompanying drawings.

[0076] As used in this specification, singular forms may include plural forms unless the context clearly indicates a particular case. Spatially relative terms (e.g., above, above, above, below, below, below, below, etc.) are intended to cover different orientations of the device in use or operation, in addition to the orientations shown in the drawings. In some implementations, the relative terms above and below may include vertically above and vertically below, respectively. In some implementations, the term adjacent can include lateral adjacent or horizontal adjacent.

[0077] Although certain features of the described implementations have been described as described herein, many modifications, alternatives, variations, and equivalents will now occur to those skilled in the art. Therefore, it should be understood that the appended claims are intended to cover all such modifications and variations that fall within the scope of the implementations. It should be understood that these modifications and variations are presented only by way of example and not limitation, and that various changes in form and detail may be made. In addition to mutually exclusive combinations, any portion of the apparatus and / or method described herein may be combined in any combination. The implementations described herein may include various combinations and / or sub-combinations of the functions, components, and / or features of the different implementations described.

[0078] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiments belong. It should also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and will not be interpreted as an idealized or overly formal meaning unless explicitly defined herein.

[0079] The various parts and corresponding detailed descriptions of the above exemplary embodiments are presented in terms of software or algorithms and symbolic representations of the operations of the data bits in the computer memory. These descriptions and representations are descriptions and representations that are used by those of ordinary skill in the art to effectively convey the essence of their work to other persons of ordinary skill in the art. The terms used herein and commonly used, i.e., algorithms, are considered to be self-consistent sequences of steps that obtain desired results. These steps are steps that require physical manipulation of physical quantities. Usually, although not necessarily, these quantities take the form of optical signals, electrical signals, or magnetic signals that can be stored, transferred, combined, compared, and otherwise manipulated. It has been shown that sometimes, mainly for general purposes, it is convenient to refer to these signals as positions, values, elements, symbols, characters, items, numbers, etc.

[0080] In the above exemplary embodiments, references to actions and symbolic representations (e.g., in the form of flowcharts) of operations that can be implemented as program modules or functional processes include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types and can be described and / or implemented using existing hardware at existing structural elements. Such existing hardware may include one or more central processing units (CPUs), digital signal processors (DSPs), application specific integrated circuits, field programmable gate arrays (FPGAs), computers, etc.

[0081] It should be remembered, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise or apparent from the discussion, terms such as processing or computing or calculating or determining display refer to the actions and processes of a computer system or similar electronic computing device that manipulates and transforms data represented as physical quantities, electronic quantities within the computer system's registers or memories and converts it into other data similarly represented as physical quantities within the computer system's memories or registers or other such information storage devices, transmission devices or display devices.

[0082] Finally, it should also be noted that although the attached claims list specific combinations of features described herein, the scope of the present disclosure is not limited to the specific combinations claimed thereafter, but extends to cover any combination of features or embodiments disclosed herein, regardless of whether the specific combination is specifically listed in the attached claims at this time.

Claims

1. A power supply system, comprising: A plurality of power supply devices configured to be connected to an integrated circuit, one of the plurality of power supply devices comprising: a voltage regulator and an internal diagnostic circuit, The voltage regulator is configured to generate a rail voltage; and The internal diagnostic circuit is configured to: detecting activation of an enable signal to activate the plurality of power supply devices according to an activation power sequence; detecting a rail violation of the active power sequence in response to a value of the rail voltage failing to satisfy a first condition defined by a voltage threshold at a first time or failing to satisfy a second condition defined by the voltage threshold at a second time; and In response to detecting the rail violation, an interrupt signal is activated. 2 . The power supply system of claim 1 , wherein the first condition defined by the voltage threshold comprises a value of the rail voltage being less than the voltage threshold. 3 . The power supply system of claim 1 , wherein the second condition defined by the voltage threshold comprises a value of the rail voltage being equal to or greater than the voltage threshold.

4. The power supply system of claim 1 , wherein the voltage threshold is a first voltage threshold, and wherein the internal diagnostic circuit is configured to: detecting deactivation of the enable signal to deactivate the plurality of power supply devices according to a deactivation power sequence; and A rail violation of the disable power sequence is detected in response to the value of the rail voltage failing to satisfy a first condition defined by a second voltage threshold at a third time or failing to satisfy a second condition defined by the second voltage threshold at a fourth time. 5 . The power supply system of claim 4 , wherein the first condition defined by the second voltage threshold comprises a value of the rail voltage being equal to or greater than the second voltage threshold. 6 . The power system of claim 4 , wherein the second condition defined by the second voltage threshold comprises the rail voltage being less than the second voltage threshold.

7. The power system of claim 1, wherein the internal diagnostic circuit includes a timing delay check counter associated with a plurality of counter values, the plurality of counter values ​​including a first counter value corresponding to the first time and a second counter value corresponding to the second time.

8. The power supply system of claim 7 , wherein the internal diagnostic circuit comprises a voltage threshold detector configured to activate or deactivate a voltage threshold signal based on a comparison of a value of the rail voltage with the voltage threshold, and wherein the timing delay check counter is configured to detect the rail violation based on whether the voltage threshold signal is activated or deactivated at the first time or the second time. 9 . The power supply system of claim 7 , wherein the internal diagnostic circuit is configured to receive programming data to configure the timing delay check counter, the programming data including the plurality of counter values. 10 . The power supply system of claim 9 , wherein the internal diagnostic circuit comprises a memory device configured to store the plurality of counter values.

11. The power supply system of claim 9, wherein the power supply device is associated with an address, the internal diagnostic circuit comprising an analog-to-digital converter and a resistor, the analog-to-digital converter and the resistor configured to define the address.

12. A power supply device, comprising: voltage regulator and internal diagnostic circuitry, The voltage regulator is configured to generate a rail voltage; The internal diagnostic circuit is configured to: detecting activation of an enable signal to activate a plurality of power devices according to an activation power sequence; detecting a rail violation of the activation power sequence in response to a value of the rail voltage: failing to satisfy a first condition defined by a voltage threshold at a first time, or failing to satisfy a second condition defined by the voltage threshold at a second time; as well as In response to the rail violation, an interrupt signal is activated.

13. The power supply device of claim 12, wherein the first condition defined by the voltage threshold comprises a value of the rail voltage being less than the voltage threshold, and wherein the second condition defined by the voltage threshold comprises a value of the rail voltage being equal to or greater than the voltage threshold.

14. The power supply device according to claim 12, wherein the voltage threshold is a first voltage threshold, and the internal diagnostic circuit is configured to: detecting deactivation of the enable signal to deactivate the plurality of power supply devices according to a deactivation power sequence; and A rail violation of the disable power sequence is detected in response to a value of the rail voltage failing to satisfy a first condition defined by a second voltage threshold at a third time or failing to satisfy a second condition defined by the second voltage threshold at a fourth time.

15. The power supply device of claim 14, wherein the internal diagnostic circuit comprises: A timing delay check counter is associated with a plurality of counter values ​​corresponding to the first time to the fourth time.

16. The power supply device of claim 14, wherein the first condition defined by the second voltage threshold comprises a value of the rail voltage being equal to or greater than the second voltage threshold, and wherein the second condition defined by the second voltage threshold comprises the rail voltage being less than the second voltage threshold.

17. A method for monitoring power timing of a power supply system, the method comprising: activating a power supply device to generate a rail voltage in response to activation of an enable signal activating the power system according to an activation power sequence; detecting a rail violation of the activation power sequence in response to a value of the rail voltage: failing to satisfy a first condition defined by a voltage threshold at a first time, or failing to satisfy a second condition defined by the voltage threshold at a second time; as well as In response to detecting the rail violation, an interrupt signal is activated.

18. The method of claim 17, wherein the first condition defined by the voltage threshold comprises a value of the rail voltage being less than the voltage threshold, and wherein the second condition defined by the voltage threshold comprises the rail voltage being greater than or equal to the voltage threshold.

19. The method according to claim 17, wherein the voltage threshold is a first voltage threshold, the method further comprising: detecting deactivation of the enable signal to deactivate the power system according to a deactivation power sequence; as well as A rail violation of the disable power sequence is detected in response to the value of the rail voltage failing to satisfy a first condition defined by a second voltage threshold at a third time or failing to satisfy a second condition defined by the second voltage threshold at a fourth time.

20. The method according to claim 17, further comprising: detecting activation of the enable signal by a timing delay check counter; triggering a rail check by the timing delay check counter in response to a time period satisfying a counter value representing the first time; as well as In response to the rail check, it is detected whether the value of the rail voltage satisfies the first condition defined by the voltage threshold.

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