Method for automatically generating chip memory component based on mixed language

Abstract

The invention discloses an automatic chip memory component generation method based on a mixed language. The method comprises the following steps: step 1, filling in a memory specification file; step 2, running a corresponding command to generate a packaging file, specifically comprising the following steps: step 21, calling a memory specification file through a makefile computer language, and executing an instruction for generating the packaging file; step 22, calling a shell language script for running the generated packaging file to run the python language file; step 23, applying a python language to sequentially analyze the information of each row of the memory specification file to generate a corresponding packaging file; step 3, generating a memory file; and 4, generating a simulation environment related file. According to the method, the memory design related file is automatically generated through the configuration file and based on the mixed language, and the method has the characteristics of low cost and autonomous controllability; and meanwhile, the project development efficiency is also improved.

Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuits, relates to memory design, and in particular to a method for automatically generating chip memory components based on a mixed language. Background Art

[0002] Memory is used to store data in the circuit. In integrated circuit design, memory includes three types: SRAM (Static Random-Access Memory), RF (Register File), and ROM (Read-Only Memory). With the increase in the scale of SoC (System on Chip), the size and types of memory in the chip are also constantly increasing and enriching. Generally, increasing the memory capacity is conducive to improving the performance of SoC. At the same time, the memory capacity is also an important distinguishing indicator of different levels of SoC. Reasonable memory design is of great significance to the performance, power consumption, and cost of SoC.

[0003] In the conventional integrated circuit design process, designers first need to configure the memory generation software provided by the manufacturer according to the design requirements to generate a memory of specified specifications. At the same time, in order to meet the power consumption and area indicators and the size limit of the memory generated by the generation tool, it may also be necessary to complete the memory splicing, input and output data storage and other operations through the wrapper (packaging). Finally, it is necessary to build a simulation environment to add incentives to verify the correctness of the use of the memory and wrapper files. When performing FPGA (Field Programmable Gate Array, programmable logic array) prototype verification, it is also necessary to manually instantiate the IP (Intellectual Property, intellectual property) module interface of the corresponding specifications. According to the evaluation results, designers need to continuously modify and optimize the memory specifications and designs, and re-perform the above process until a suitable design strategy is found. When changing the process or memory supplier, designers also need to re-learn and familiarize themselves with the use of new tools. Therefore, the traditional memory design method takes a long time and is inefficient.

[0004] In the process of using scripts to accelerate design, there are two main ways to achieve the automatic generation of relevant files in memory design. Method 1 is to use high-level language to generate wrapper code according to the parsed configuration information and required functions, such as Figure 1It represents a process of automatically generating wrappers. This method can effectively speed up the generation of wrapper codes and avoid manually repeating the implementation of related functions. Method 2 uses shell scripts to automatically run the memory generation software provided by the manufacturer to generate the required memory files. This method can generate memory files without operating the graphical user (GUI) interface, which speeds up the process of batch generating memory files. However, the above method requires designers to be familiar with the use of multiple script tools. At the same time, when generating memory-related files of the same characteristics, it is still necessary to configure and run script files multiple times, and the process is relatively cumbersome. And finally, you still need to build the corresponding simulation environment yourself to verify the correctness of the generated memory-related files and how to use the files. Therefore, the above method still has certain limitations and the improvement of work efficiency is limited. Summary of the invention

[0005] In view of the defects of the above-mentioned prior art, the present invention discloses a method for automatically generating chip memory components based on mixed language.

[0006] The mixed language-based chip memory component automatic generation method of the present invention comprises the following steps: Step 1. Fill in the storage specification document; Step 2. Generate the wrapper file, specifically: Step 21. Call the memory specification file through the makefile (generate file) computer language and execute the instruction of generating the wrapper file; Step 22. Call and run a shell language script for generating a wrapper file, transfer the memory specification file in the shell language script and run a python language file for generating a wrapper file; Step 23. Use the Python language file to parse the information of each line of the memory specification file in turn to generate a corresponding wrapper file; Step 3. Generate storage files Step 31. Call the memory specification file through the makefile computer language and execute the instruction to generate the memory file; Step 32: Call and run a shell language script for generating a memory file, pass the memory specification file in the shell language script and run the python language file; Step 33. Generate a corresponding memory file by using Python language to parse the information of each line of the memory specification file in sequence; Finally, the wrapper file generated in step 2 and the memory file generated in step 3 are directly combined to complete the memory circuit design.

[0007] Preferably, the memory specification file in step 1 is a memory specification characteristic filled in through an Excel spreadsheet, and the memory specification characteristics include whether the process condition type is a typical process or all processes, the memory initialization data file name, the depth and width of the encapsulation file wrapper, the number of beat registers, the type of memory, whether it supports DFT (Design For Test) function, whether it supports bit-by-bit write operation, whether it supports power consumption control, the depth and width of the memory, and the number of rows and columns of the memory splicing.

[0008] Preferably, in step 23, the specific method of generating the corresponding encapsulation file wrapper is: In the python file, the openpyxl function in the python language is used to parse the configuration information related to the encapsulation function wrapper filled in the storage specification file. The jinja2 engine module in the python language is used to call different jinja templates according to the storage type configuration information stored in the storage specification file. The storage information parsed by the Python language is passed to the called jinja template in the form of variables. In the template, it is decided whether to generate the corresponding code according to the variables to generate the encapsulation file wrapper.

[0009] Preferably, the method further comprises step 4. generating a simulation environment file, specifically: Step 41. Call the memory specification file through the makefile computer language and execute the instruction to generate the simulation environment file; Step 42: Call and run a shell language script for generating a simulation environment file, pass the memory specification file in the shell language script, and run a python language file for generating a simulation environment file; Step 43. Use Python language to create a standard simulation structure directory for each memory of different specifications in the simulation subdirectory; store each file in different subdirectories of the simulation structure directory; Step 44. Generate a simulation stimulus file and a component path file according to the memory specification file information using Python language; The corresponding encapsulation file wrapper instantiated in the simulation stimulus file realizes traversal reading and writing of the memory, and operates to generate a simulation waveform file; the simulation environment file contains the absolute path of the memory simulation model, encapsulation file, and simulation stimulus file testbench; finally, a shell language simulation script for simulating all memories is generated; The memory is simulated by automatically running the shell language simulation script.

[0010] Preferably, in step 2, the parameters of the configuration package file must satisfy the following formula: Wnw = NW*R Wnb = NB*C Where Wnw represents the depth of the package file, Wnb represents the bit width of the package file, NW represents the depth of the memory, NB represents the bit width of the memory, and R and C represent the number of rows and columns of the package file splicing.

[0011] Preferably, in step 33, the specific method for generating the corresponding memory file is that the python language script generates a shell language script for passing parameters and a shell language script for running the memory software with fixed content, and the two shell language scripts are combined to generate the memory file.

[0012] The present invention automatically generates memory design-related files based on a mixed language through a configuration file, so that the implemented functions are rich and easy to use. Since it is implemented based on an open source tool, it has the characteristics of low cost and autonomous control.

[0013] The present invention generates all files by directly modifying the configuration table during the iteration of memory design, thereby avoiding manual modification of multiple files and speeding up the design iteration. It also avoids the learning time cost incurred by designers when changing memory manufacturers in the project, thereby improving project development efficiency. Finally, automatic code generation based on the tool also ensures the correctness of the design code and the uniformity of the code style. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A schematic diagram of a specific implementation flow of generating the package file of the present invention; Figure 2 A schematic diagram of a specific implementation method of calling different computer languages ​​in different paths to generate corresponding modules in the generation method of the present invention; Figure 3 A schematic flow chart of a specific implementation of the generation method of the present invention; Figure 4 A schematic diagram of a specific implementation flow of the memory file generation of the present invention; Figure 5 A schematic diagram of a specific implementation flow of the simulation environment file generation of the present invention. DETAILED DESCRIPTION

[0015] In order to more intuitively and clearly describe the specific details of the technical solution of the present invention, a detailed description will be given below in conjunction with specific embodiments and example drawings.

[0016] The hybrid language of the present invention includes a high-level programming language and a scripting language, and the files that can be generated include relevant files, wrappers, simulation environments and simulation stimulus files provided by memory manufacturers. High-level programming languages ​​are rich in functions but are not closely related to integrated circuit design and development environments and tools and require designers to have a background in using related languages. Scripting languages ​​are closely combined with development environments and are simple to use, but it is difficult to achieve more complex functions.

[0017] The method for automatically generating chip memory components based on mixed languages ​​of the present invention is as follows: Figure 3 As shown, the following steps are included: Step 1. Generate a memory specification file; Excel is a file format commonly used in the office field for statistics and presentation of data. In the Linux operating system, open source software such as LibreOffice can be used to edit and view tables. In the present invention, the relevant characteristic information of the memory component is saved in an Excel table file.

[0018] The memory characteristic information includes the memory type. For example, SRAM memory includes DPSRAM (Dual Port SRAM) and SPSRAM (Single Port SRAM), and RF memory includes RF1P (RF 1Port, single-port RF) and RF2P (RF 2 Port, dual-port RF); ROM memory characteristic information also includes the file name of the ROM memory initialization data, the manufacturer provided by the memory generation software, the bit width and depth information of the wrapper, the bit width and depth information of the memory, whether bit-by-bit writing is supported, whether the generation of DFT circuits is supported, whether the memory power control characteristics are generated, whether ECC checking is supported, and the number of rows and columns spliced ​​by the wrapper.

[0019] Step 2. Generate the wrapper file, specifically: Step 21. Call the memory specification file through the makefile computer language and execute the instruction of generating the wrapper file; Step 22. Call and run a shell language script for generating a wrapper file, pass the memory specification file in the shell language script, and call a python language file for generating a wrapper file; When configuring the package file, the parameters must satisfy the following formula: Wnw = NW*R Wnb = NB*C Where Wnw represents the depth of the package file, Wnb represents the bit width of the package file, NW represents the depth of the memory, NB represents the bit width of the memory, and R and C represent the number of rows and columns of the package file splicing.

[0020] The memory depth NW and memory bit width NB are subject to the specific memory type and the memory manufacturer's design limits, and need to be filled in according to the memory data sheet and requirements. However, the values ​​of R, C, Wnw, and Wnb are not restricted and only need to be set according to design requirements.

[0021] By reading each memory configuration information in the Excel file, the encapsulation files are generated step by step. After traversing all the memory configuration information, all the encapsulation files are generated.

[0022] Makefile script files are script files written in the makefile computer language, which can complete a series of setting operations through simple external input instructions. Makefile scripts are often used to manage the development environment in embedded and chip design and development, which can greatly improve development efficiency.

[0023] There are two makefiles in the chip memory component automatic generation system, namely the memory component automatic generation system and the memory component simulation environment system, which are used to manage the memory component automatic generation system environment and the memory component simulation environment respectively. The makefile script commands provided by the memory component automatic generation system include the instructions for displaying the tool, generating only memory files, generating only wrapper files, generating only simulation environment files and running simulations, generating memory files and wrapper files, generating memory files, wrapper files and simulation environment files and running simulations; these commands are interactive commands with users, and users only need to understand the use of these commands and combine them with configuration files to generate the required files. Each command will output a successful log when it is successfully completed, and will also output a prompt message when it fails to facilitate users to make changes. The files in the memory component simulation environment system are used to manage the simulation environment to control the operation of simulation and debugging related software in memory design.

[0024] The generated wrapper file contains two files, the bottom wrapper file and the top wrapper file, and has a fixed naming format. Both file names contain information such as memory type, memory depth and bit width, number of splicing rows and columns, whether DFT is supported, and bit-by-bit write operations, so as to prevent conflicts caused by the same type and size but different characteristics in the project.

[0025] The underlying wrapper file ends with wp0. The underlying wrapper file instantiates the simulation model generated by the memory software according to the configuration information. Since the read and write control signals of the memory of different manufacturers may be different, the wrapper also processes the control signals of the simulation model to ensure that the memory of different manufacturers presents consistent signal names and behaviors to the outside. At the same time, the memory interfaces of mainstream FPGA manufacturers used in FPGA prototype verification are also instantiated. Among the instantiated FPGA memory manufacturer types, Xilinx's memory uniformly adopts the BRAM type interface. Since the memory in the FPGA only supports byte operations, if bit operations need to be supported, write operation control signal processing is also required. Finally, a custom memory model is instantiated to verify the memory behavior of special characteristics. The above different instantiation files determine the effective modules through macro definitions in different usage scenarios.

[0026] The top-level wrapper file ends with wp1. The top-level wrapper file instantiates different numbers of wp0 files according to the splicing characteristics R and C values ​​and generates corresponding control signals. If the ECC (Error Correcting Code) feature is required, the relevant ECC check code will also be generated. At the same time, according to the configuration of the table, the input and output of the memory can be registered and beat to improve the timing and increase the system operating frequency. Whether the input and output are beat and the number of beats can be configured separately, and the maximum number of beats is 2.

[0027] Step 23. Use Python language to parse the information of each line of the memory specification file in turn to generate a corresponding wrapper file; As a high-level language, Python is widely used in deep learning and chip design due to its ease of use and rich functional packages. In the automatic generation system of memory components, Python is used as the core language to implement system functions and the open source library provided by the Python community is used to complete the core operations. Python mainly completes the extraction of memory information to be generated in the Excel table and the generation of various files. After the Python script extracts the information, it can generate a wrapper file, a script file for running the memory manufacturer's software, a simulation stimulus file, and a simulation environment file. The system calls different Python scripts according to the makefile command to parse the Excel information and generate the corresponding files.

[0028] As the scale of SoC chips grows, digital chip design has higher requirements on the computing performance and stability of computers. In chip design, Linux servers are mainly used as development environments, and shell scripts in Linux systems are often used to automatically execute multiple tasks continuously to improve work efficiency. In this method, shell scripts are selected to control the automatic operation of other software and scripts. Shell scripts have fixed content types and generated content types, where the generated content type is generated by a python script based on the extracted information. Scripts of fixed content types include those called by instructions in the makefile to perform directory initialization preparations to run different python scripts and pass configuration file parameters. Scripts of fixed content types also include underlying scripts for running memory generation software and running simulation environments. The generated content type includes shell scripts for passing operating parameters to memory software and simulation environments. A specific implementation of step 2 is as follows Figure 1 shown.

[0029] Step 3. Generate storage files Step 31. Call the memory specification file through the makefile computer language and execute the instruction to generate the memory file; Step 32: Call and run a shell language script for generating a memory file, pass the memory specification file in the shell language script, and call a python file for generating a memory file; Step 33: Use Python language to parse the information of each line of the memory specification file in turn to generate a corresponding shell script for generating the memory file; The shell language scripts for generating memory include shell language scripts for passing parameters generated by python files and shell language scripts for running memory software with fixed content. The scripts for running software vary according to the selected memory manufacturer, which implements the isolation of the tool from the user and the specific memory manufacturer's method of using the software.

[0030] The shell language script generated by Python is used to pass parameters, including information such as memory size, whether to support DFT circuit generation, whether to support bit-by-bit writing, and power consumption control. Similar to the wrapper file, the memory file name will also contain relevant information to prevent conflicts. Since different shapes of memories with the same specifications will affect the area and timing of the memory, the tool can automatically generate all supported shapes for designers to evaluate and select the appropriate memory shape during circuit synthesis. The generated working conditions can be configured as typical and all conditions. The typical condition only generates a memory file under one working condition, and the generation speed is fast for verification functions in the early design stage. The all working conditions option generates all supported temperature and voltage working conditions, which takes a long time to generate. It is often used to verify the establishment of hold time checks in the design timing closure in the later stage of design. The path and file names of the generated memory files are also named according to unified specifications to facilitate the generation of other automated scripts in the later stage. The generated memory files usually contain simulation model files and library files for different design stages. The shell script generated according to its classification will organize the files by type and place them in the corresponding project folder for easy calling of other software in different process stages.

[0031] Finally, the package file wrapper generated in step 2 and the memory file generated in step 3 are combined. The package file wrapper and the generated memory file are directly combined with the design files. After being processed by the software tools in the IC design process, a layout file will be generated. The layout file can be directly used to generate the final chip and complete the memory design.

[0032] It is usually necessary to generate the simulation environment file synchronously, that is, including step 4. Generate the simulation environment file, and the generated memory simulation environment file includes the path list file rtl.lst that specifies the wrapper file, simulation model file, and simulation stimulus file path. It also includes the makefile file for running the simulation and waveform viewing tool to manage the simulation environment, and the shell script file that runs the makefile command and specifies the top-level module to realize automatic simulation. And it includes the simulation stimulus file testbench, in which a top-level file of a memory encapsulation file wrapper is instantiated in each simulation stimulus file testbench. The simulation stimulus file testbench performs an incremental write operation on the memory address from 0 according to the depth information of the memory. After all addresses complete a write operation, a read operation is performed and the difference between the read data and the written data is compared. If they are the same, the log information of the comparison success is printed, otherwise the information of the comparison failure is printed to verify whether the memory control is consistent with expectations. The cause of the failure can be analyzed later based on the printed information and the waveform.

[0033] Step 4 is as follows: Step 41. Call the memory specification file through the makefile computer language and execute the instruction to generate the simulation environment file; Step 42: Call and run a shell language script for generating a simulation environment file, transfer and store a storage specification file in the shell language script, and call a python file for generating a simulation environment file; Step 43: Generate a corresponding simulation environment file by using Python language to parse the information of each line of the memory specification file in sequence; Step 44. Use Python language to create a standard simulation structure directory for each memory of different specifications in the simulation subdirectory; store each file in different subdirectories of the simulation structure directory; Step 45. Generate a simulation stimulus file and a component path file according to the memory specification file; The corresponding encapsulation file wrapper instantiated in the simulation stimulus file realizes traversal reading and writing of the memory, and operates to generate a simulation waveform file; the simulation environment file contains the absolute path of the memory simulation model, encapsulation file, and simulation stimulus file testbench; finally, a shell language simulation script for simulating all memories is generated; The memory is simulated by running the shell language simulation script.

[0034] Chip designers use the chip memory component generation system based on a hybrid scripting language to fill in the configuration Excel file according to the design requirements and generate the memory specification file. They can generate the required chip memory components by running a command. Figure 2 As shown, it includes generating only the wrapper file, generating only the memory file, generating the memory and wrapper file, and generating all components. There are three types of generated files, the wrapper file of the memory, the memory file, and the files related to the memory simulation environment.

[0035] The overall structure of the method and the calling relationship of various computer languages ​​in various mixed languages ​​are as follows Figure 2 shown. Figure 2 The middle arrow indicates the information input relationship, the solid rectangular box indicates that the file content is fixed, and the solid arrow indicates that the files are in a call relationship. The dotted rectangular box indicates the file with changing content, and the dotted arrow indicates that the files are in a generation relationship.

[0036] The makefile script in the memory component simulation environment file uses the wrapper file, the simulation stimulus file testbench, the path list file rtl.lst, and the memory file model to generate the final log waveform file. The files used in the method include an excel file for managing memory configuration information, a makefile script for managing the system and simulation environment, a python high-level language for parsing configuration information to generate the final file, and a shell script for running the required commands.

[0037] like Figure 2 As shown, firstly, a memory specification file is generated by editing Excel, and then the memory specification file is called through the Makefile computer language to execute instructions to call the corresponding shell script file. According to steps 2, 3, and 4 described in the present invention, they correspond to path 1, path 2, and path 3, respectively; the shell script file calls the Python file to generate the corresponding file by parsing the information of each line of the memory specification file in turn.

[0038] In path 1, the Python language script only generates the encapsulation file; in path 2, the Python language script generates the shell language script that passes the parameters ( Figure 2 The dotted box Shell in path 2) and the shell language script that runs the storage software with fixed content ( Figure 2 The solid-line box Shell in path 2 represents the memory configuration information shell script generated by the present invention. The solid-line box Shell usually represents the script for running the generation software of the memory supplier. The two are combined to generate the memory file.

[0039] In path 3, the python language script generates simulation stimulus files, path list files, and shell language simulation scripts. When performing simulation operations, the makefile language is called to execute simulation commands and output log waveform files to display simulation results. Specific embodiments

[0040] Step 1. Generate a memory specification file, specifically: Fill in the memory specifications and characteristics through the Excel spreadsheet, including whether the process condition type is a typical process or all processes, the memory initialization data file name, the depth and width of the package file wrapper, the number of beat registers, the memory type, whether it supports DFT function, whether it supports bit-by-bit write operation, whether it supports power consumption control, the depth and width of the memory, the number of rows and columns of the memory splicing, and other related basic configurations; in practice, the configuration can be increased according to the features supported by the memory manufacturer. The file filled in with the memory specifications and characteristics is the memory specification file in Excel format.

[0041] Most of the information stored in the Excel table is required when generating the package file wrapper and memory, and a small number of files are needed separately. For example, the depth and width of the package file wrapper, the number of beat registers, and the number of rows and columns of the memory splicing are only required when generating the package file wrapper, while the process condition type, memory initialization data file, etc. are only used when generating the memory.

[0042] Step 2. Generate the wrapper file, which is as follows: Place the configured memory specification file in the folder where the makefile script is located, and specify the configuration file name in the makefile.

[0043] In the directory where the makefile file is located, the instructions for generating the wrapper file are executed through the makefile computer language.

[0044] After the command is executed, the shell script that generates the wrapper file will be called. In the shell script, the configuration file name parameter will be passed and the python language file that generates the wrapper file will be called.

[0045] The Python language generates the corresponding wrapper file by parsing the information of each line of the memory specification file in turn. In the Python script, the openpyxl function in the Python language is used to parse the configuration information related to the wrapper function filled in the memory specification file, and the Jinja2 engine module in the Python language is used to call different Jinja templates according to the memory type configuration information stored in the memory specification file.

[0046] The memory information parsed by Python language is passed to the Jinja template in the form of variables. In the template, it is decided whether to generate the corresponding code based on the variables, and finally all the generated encapsulation files are saved in the subfolder mem_wp of the build file.

[0047] Step 3. Generate storage files Process the memory specification file in the same way as in step 2.

[0048] Execute the command to generate memory in the directory where the makefile script file is located. This command executes the shell script that generates the memory file. In this script, the memory specification file is first passed and the corresponding python file is called. The specific process is as follows: Figure 4 shown.

[0049] In the python file, parse the memory-related parameters stored in the memory specification file in a similar manner to step 2 and pass these parameters to generate a shell script for the memory software to run. Then execute the shell scripts in sequence to run the memory generation software and generate memory-related files. Finally, organize the generated memory-related files and place them in the specified directory.

[0050] Generally speaking, the generated memory needs to be simulated and tested, and the present invention can generate a simulation environment file in a similar manner.

[0051] Step 4. Generate simulation environment files The memory specification file is processed in a similar manner as in steps 2 and 3. In the directory where the makefile is located, execute the command to generate simulation-related files. This command will execute the shell script that generates simulation-related files. The specific process is as follows Figure 5 shown.

[0052] Step 41. Call the memory specification file through the makefile computer language and execute the instruction to generate the simulation environment file; Step 42: Call and run a shell language script for generating a simulation environment file, pass the memory specification file in the shell language script, and call a python language file for generating a simulation environment file; Step 43: Generate a corresponding simulation environment file by using Python language to parse the information of each line of the memory specification file in sequence; Step 44. Use Python language to create a standard simulation structure directory for each memory of different specifications in the simulation subdirectory; store each file in different subdirectories of the simulation structure directory; For example, in the standard simulation structure directory, the makefile file is stored in the subdirectory script, the simulation stimulus testbench file is in the subdirectory tb folder, and the path list file rtl.lst is in the subdirectory rtl folder.

[0053] Step 45. Generate simulation stimulus files and component path files according to the memory specification file.

[0054] The corresponding encapsulation file wrapper instantiated in the simulation stimulus file implements traversal reading and writing of the memory, and operates to generate a simulation waveform file; the simulation environment file file contains the absolute path of the memory simulation model, encapsulation file, and simulation stimulus file testbench; Finally, a shell language simulation script is generated for simulating all memories. The information and commands that need to be specified when running the simulation are implemented in the script to complete the automatic simulation process. When performing simulation operations, the shell language simulation script enters the sub-directory script of each memory simulation in turn according to the path specified in the component path file, executes the simulation commands for simulation, and outputs logs and waveform files representing the simulation results.

[0055] Combine the wrapper file generated in step 2 and the memory file generated in step 3 to complete the memory design, and call the simulation environment file generated in step 4 to perform simulation. During simulation, the simulation is performed by running the shell language simulation script. Finally, the simulation results are displayed through the log information printed by the terminal and the waveform is automatically opened.

[0056] Steps 2, 3, and 4 are used to generate the required memory-related files. In addition to the above commands, a makefile command to generate all files is also provided. This command will call the scripts in steps 2, 3, and 4 in sequence to generate all files for memory generation and simulation; finally, a help command can be provided to show the meaning and usage of each command to help designers use the tool.

[0057] The present invention automatically generates memory design-related files based on a mixed language through a configuration file. The mixed language includes a high-level programming language and a scripting language. The files that can be generated include related files provided by the memory manufacturer, a wrapper file, a simulation environment, and a simulation incentive file. The high-level programming language is rich in functions but is not closely related to the integrated circuit design development environment and tools and requires designers to have a background in using related languages. The scripting language is closely combined with the development environment and is simple to use, but it is difficult to achieve more complex functions. The mixed language-based approach makes the functions that can be achieved rich and easy to use. Since it is implemented based on open source tools, it has the characteristics of low cost and autonomous control.

[0058] The present invention generates all files by directly modifying the configuration table during the iteration of memory design, thereby avoiding manual modification of multiple files and speeding up the design iteration. It also avoids the learning time cost incurred by designers when changing memory manufacturers in the project, thereby improving project development efficiency. Finally, automatic code generation based on the tool also ensures the correctness of the design code and the uniformity of the code style.

[0059] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0060] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0061] The foregoing describes various preferred embodiments of the present invention. Unless the preferred implementation modes in various preferred embodiments are obviously self-contradictory or based on a certain preferred implementation mode, various preferred implementation modes can be arbitrarily superimposed and used in combination. The embodiments and specific parameters in the embodiments are only for clearly describing the invention verification process of the inventor, and are not used to limit the patent protection scope of the present invention. The patent protection scope of the present invention shall still be based on its claims. All equivalent structural changes made using the contents of the description and drawings of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for automatically generating chip memory components based on mixed languages, characterized in that , The steps include: Step 1. Fill in the storage specification document; Step 2. Generate the wrapper file, specifically: Step 21. Call the memory specification file through the makefile computer language and execute the instruction of generating the wrapper file; Step 22. Call and run a shell language script for generating a wrapper file, transfer the memory specification file in the shell language script and run a python language file for generating a wrapper file; Step 23. Use the Python language file to parse the information of each line of the memory specification file in turn to generate a corresponding wrapper file; Step 3. Generate memory file; Step 31. Call the memory specification file through the makefile computer language and execute the instruction to generate the memory file; Step 32: Call and run a shell language script for generating a memory file, pass the memory specification file in the shell language script and run the python language file; Step 33. Generate a corresponding memory file by using Python language to parse the information of each line of the memory specification file in sequence; Finally, the wrapper file generated in step 2 and the memory file generated in step 3 are directly combined to complete the memory circuit design.

2. The method for automatically generating chip memory components based on mixed languages ​​as claimed in claim 1, characterized in that: The memory specification file in step 1 is the memory specification characteristics filled in through an Excel spreadsheet, and the memory specification characteristics include whether the process condition type is a typical process or all processes, the name of the memory initialization data file, the depth and width of the encapsulation file wrapper, the number of beat registers, the type of memory, whether it supports DFT function, whether it supports bit-by-bit write operation, whether it supports power consumption control, the depth and width of the memory, and the number of rows and columns of the memory splicing.

3. The method for automatically generating chip memory components based on mixed languages ​​as claimed in claim 1, characterized in that: In step 23, the specific method of generating the corresponding encapsulation file wrapper is: In the python file, the openpyxl function in the python language is used to parse the configuration information related to the encapsulation function wrapper filled in the storage specification file. The jinja2 engine module in the python language is used to call different jinja templates according to the storage type configuration information stored in the storage specification file. The storage information parsed by the Python language is passed to the called jinja template in the form of variables. In the template, it is decided whether to generate the corresponding code according to the variables to generate the encapsulation file wrapper.

4. The method for automatically generating chip memory components based on mixed languages ​​as claimed in claim 1, characterized in that: It also includes step 4. generating simulation environment files, specifically: Step 41. Call the memory specification file through the makefile computer language and execute the instruction to generate the simulation environment file; Step 42: Call and run a shell language script for generating a simulation environment file, pass the memory specification file in the shell language script, and run a python language file for generating a simulation environment file; Step 43. Use Python language to create a standard simulation structure directory for each memory of different specifications in the simulation subdirectory; store each file in different subdirectories of the simulation structure directory; Step 44. Generate a simulation stimulus file and a component path file according to the memory specification file information using Python language; The corresponding encapsulation file wrapper instantiated in the simulation stimulus file implements traversal reading and writing of the memory, and operates to generate a simulation waveform file; The simulation environment file includes the absolute path of the memory simulation model, the encapsulation file, and the simulation stimulus file testbench; finally, a shell language simulation script for simulating all memories is generated; The memory is simulated by automatically running the shell language simulation script.

5. The method for automatically generating chip memory components based on mixed languages ​​as claimed in claim 1, characterized in that: In step 2, the parameters of the configuration package file must satisfy the following formula Wnw = NW*R Wnb = NB*C Where Wnw represents the depth of the package file, Wnb represents the bit width of the package file, NW represents the depth of the memory, NB represents the bit width of the memory, and R and C represent the number of rows and columns of the package file splicing.

6. The method for automatically generating chip memory components based on mixed languages ​​as claimed in claim 1, characterized in that: In step 33, the specific method of generating the corresponding memory file is that the python language script generates a shell language script for transferring parameters and a shell language script with fixed content for running the memory software, and the two shell language scripts are combined to generate the memory file.

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