Arrangement method and device for ball pin definition, program product, electronic equipment and storage medium
Through the weighted relationship between greedy algorithms and preset signals, the ball pin definition of the automatic arrangement chip solves the problems of time-consuming and quality differences in manual arrangement, and achieves efficient and unified signal arrangement.
Patent Information
- Application Number
- CN202411345945.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-25
- Publication Date
- 2025-01-03
AI Technical Summary
In chip design, when manually defining ball pins, it takes a long time to make mistakes and omissions easy when defining manual ball pins, and the arrangement quality of different engineers varies greatly, making it difficult to ensure consistency and efficiency.
Using a method based on greedy algorithm and preset weighted relationship between signals, the signal units on the chip are gradually arranged, and the secondary signals and classified signal groups in the target primary signal are obtained, and the signal units are optimized and arranged in sequence to determine the final position. , ensure that the weighted values between signals meet preset thresholds and realize automated arrangements.
The arrangement time of ball pin definition is shortened, human errors are reduced, and the arrangement quality is improved, and the quality differences caused by engineer differences are avoided, achieving more efficient and consistent arrangement results.
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Figure CN119250008A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of chip packaging, and in particular to a method and device for arranging ball pin definitions, a computer program product, an electronic device and a computer-readable storage medium. Background Art
[0002] The ball pin definition (ball map) mainly refers to the layout of the ball pins on the chip. The ball pins are the key part of the connection between the chip and the external circuit or package. They are fixed to the circuit board by welding or other means to achieve the transmission of electrical signals and the stable operation of the equipment.
[0003] When designing a chip, electrical performance, signal interference, signal crosstalk, signal shielding, routing convenience, etc. are required. All signals of the chip are arranged into an array to complete the arrangement of the ball pin definition. At present, the arrangement process is manually arranged by engineers based on experience. When the number of chip pins is large (for example, the chip has hundreds or thousands of pins), it will take a long time to arrange manually, and a large number of pins are arranged manually, which is inevitable. In addition, due to the different abilities of different engineers, there will be obvious quality differences in the array after the ball pin definition arrangement.
[0004] Therefore, how to solve the above technical problems should be the key focus of the technology in this field. Summary of the invention
[0005] The purpose of the present invention is to provide a method, device, program product, electronic device and computer-readable storage medium for arranging ball pin definitions, so as to shorten the arrangement time and reduce errors and omissions caused by human arrangement, while also avoiding differences in ball pin definition arrangement caused by differences between different engineers.
[0006] In order to solve the above technical problems, the present invention provides a method for arranging ball pin definitions, comprising:
[0007] Based on the target primary signals of all pins on the chip, acquiring all secondary signals in the target primary signals;
[0008] Acquire at least one classified signal group corresponding to a target secondary signal in the secondary signals, each of the classified signal groups including at least one signal unit;
[0009] Arranging the signal units in all the classified signal groups in sequence, and determining the final position of the signal unit after each arrangement based on the weighted relationship between the first preset signals corresponding to the target secondary signal, to obtain a first arrangement array corresponding to the target secondary signal;
[0010] Arrange other secondary signals beside the first arrangement array, and determine the final positions of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal, until a second arrangement array corresponding to all the target primary signals is obtained;
[0011] Other primary signals are arranged beside the second arrangement array, and after each arrangement, the final positions of the other primary signals are determined based on the weighted relationship between the third preset signals corresponding to the primary signals to obtain the ball pin definitions corresponding to the chip.
[0012] As an implementation method, the signal units in all the classified signal groups are arranged in sequence, and after each arrangement, the final position of the signal unit is determined based on the weighted relationship between the first preset signals corresponding to the target secondary signal, and the first arrangement array corresponding to the target secondary signal is obtained, including:
[0013] Step S11: arranging the target signal units in the current classification signal group based on the arrangement array units obtained by arranging the previous classification signal group;
[0014] Step S12: determining the sum of weighted values of the target signal unit and the adjacent signal units based on the first preset weighted relationship between the signals;
[0015] Step S13: determining whether the sum of the weighted values is less than a preset weighted threshold;
[0016] Step S14: if the sum of the weighted values is less than the preset weighted threshold, the next signal unit in the current classified signal group is used as a new target signal unit, and the process proceeds to step S11 until all signal units in the current classified signal group are arranged;
[0017] Step S15: If the sum of the weighted values is not less than the preset weighted threshold, the target signal unit is swapped with other signal units in the current classified signal group, so that the sum of the weighted values of all signal units in the current classified signal group and adjacent signal units is less than the preset weighted threshold, and all signal units in the current classified signal group are arranged;
[0018] Step S16: The arrangement array obtained by arranging all signal units in the current classification signal group is used as a new arrangement array unit, the next classification signal group is used as the new current classification signal group, and the process goes to step S11 until the arrangement of the signal units in all the classification signal groups is completed to obtain the first arrangement array.
[0019] As an implementation method, when the target signal unit is swapped with other signal units in the current classified signal group so that the sum of the weighted values of all signal units in the current classified signal group and the adjacent signal units is less than the preset weighted threshold, and there are at least two arrangements of the signal units in the current classified signal group, it also includes:
[0020] Determine the total weight value corresponding to each arrangement;
[0021] It is determined that the arrangement mode corresponding to the minimum value in the total weighted values is the final arrangement mode of all signal units in the current classified signal group.
[0022] As an implementation method, before arranging other primary signals next to the second arrangement array, the method further includes:
[0023] Determine whether there is a signal whose transmission speed is greater than or equal to a preset transmission speed threshold value among other primary signals and the target primary signal;
[0024] If there is no signal whose transmission speed is greater than or equal to the preset transmission speed threshold, performing the step of arranging other primary signals next to the second arrangement array, and determining the final position of the other primary signals based on the weighted relationship between the third preset signals corresponding to the primary signals after each arrangement;
[0025] If there is a signal whose transmission speed is greater than or equal to the preset transmission speed threshold, a ground signal is arranged between the second arrangement array and other primary signals.
[0026] As an implementation method, other secondary signals are arranged next to the first arrangement array, and after each arrangement, the final positions of the other secondary signals are determined based on the weighted relationship between the second preset signals corresponding to the target primary signal, so as to obtain a second arrangement array corresponding to the target primary signal, including:
[0027] Step S21: arranging a target other secondary signal next to the first arrangement array;
[0028] Step S22: determining the sum of the weighted values of the target other secondary signals and the adjacent signal units in the first arrangement array based on the weighted relationship between the second preset signals;
[0029] Step S23: determining whether the sum of the weighted values is less than a preset weighted threshold;
[0030] Step S24: if the sum of the weighted values is less than the preset weighted threshold, the next other secondary signal is used as a new target other secondary signal, and the process proceeds to step S21 until all other secondary signals are arranged;
[0031] Step S25: If the sum of the weighted values is not less than the preset weighted threshold, the positions of the target other secondary signals and other secondary signals are swapped so that the sum of the weighted values of the target other secondary signals and the adjacent signal units in the first arrangement array is less than the preset weighted threshold, thereby obtaining the second arrangement array.
[0032] As an implementation method, other primary signals are arranged next to the second arrangement array, and after each arrangement, the final positions of the other primary signals are determined based on the weighted relationship between the third preset signals corresponding to the primary signals, and the ball pin definitions corresponding to the chip are obtained, including:
[0033] Step S31: arranging a target other primary signal next to the second arrangement array;
[0034] Step S32: determining the sum of the weighted values of the target other primary signals and the adjacent signal units in the second arrangement array based on the weighted relationship between the third preset signals;
[0035] Step S33: determining whether the sum of the weighted values is less than a preset weighted threshold;
[0036] Step S34: if the sum of the weighted values is less than the preset weighted threshold, the next other primary signal is used as a new target other primary signal, and the process proceeds to step S31 until all other primary signals are arranged;
[0037] Step S35: If the sum of the weighted values is not less than the preset weighted threshold, the target other primary signals are swapped with other primary signals so that the sum of the weighted values of the target other primary signals and the adjacent signal units in the second arrangement array is less than the preset weighted threshold, thereby obtaining the ball pin definition.
[0038] As an implementation method, other primary signals are arranged next to the second arrangement array, and after each arrangement, the final positions of the other primary signals are determined based on the weighted relationship between the third preset signals corresponding to the primary signals, and after obtaining the ball pin definitions corresponding to the chip, the method further includes:
[0039] Determine whether to add arrangement position constraints;
[0040] If the arrangement position constraint condition is added, the position of the signal unit corresponding to the arrangement position constraint condition is fixed;
[0041] The remaining signal units in all the classified signal groups are arranged, and after each arrangement, the final positions of the remaining signal units are determined based on the weighted relationship between the first preset signals to obtain a first arrangement array corresponding to the target secondary signal; and other secondary signals are arranged next to the first arrangement array, and after each arrangement, the final positions of the other secondary signals are determined based on the weighted relationship between the second preset signals corresponding to the target primary signal to obtain a second arrangement array corresponding to the target primary signal.
[0042] As an implementable embodiment, it also includes:
[0043] Get design input information for ball pin definitions on the chip;
[0044] Based on the design input information and the classified signal group corresponding to the target secondary signal, a weighted relationship between the first preset signals is established.
[0045] As an implementable embodiment, the weighted relationship between the second preset signals includes: in one of the secondary signals under one of the target primary signals, the weighted value between adjacent target secondary signals and the interface power signal is 1.
[0046] As an implementable embodiment, the weighted relationship between the third preset signals includes: in the primary signal, the weighted value between two adjacent target primary signals is 30, the weighted value between the adjacent target primary signal and the power supply signal is 1, the weighted value between the adjacent target primary signal and the ground signal is 0.1, and the weighted value between the adjacent ground signal and the power supply signal is 0.1.
[0047] As an implementable embodiment, the target primary signal includes a double rate signal and an open gate NOT gate memory flash memory interface signal.
[0048] As an implementation method, based on the target primary signals of all pins on the chip, before acquiring all secondary signals in the target primary signals, the method further includes:
[0049] The power signal and the ground signal are removed from the primary signal to obtain the target primary signal.
[0050] As an implementation method, before removing the power signal and the ground signal from the primary signal to obtain the target primary signal, the method further includes:
[0051] According to the functional division conditions, the primary signals with different functions are obtained based on all the pins on the chip.
[0052] As an implementable method, obtaining all secondary signals in the target primary signal includes:
[0053] The target primary signal is divided according to the interface type division condition to obtain the secondary signal.
[0054] As an implementable method, obtaining at least one classified signal group corresponding to a target secondary signal in the secondary signal includes:
[0055] Removing the interface power supply signal from the secondary signal to obtain a target secondary signal;
[0056] Dividing the target second primary signal according to the signal function division condition to obtain a third-level signal;
[0057] The three-level signals are divided according to the correlation division conditions of the signals on the circuit to obtain the classified signal group.
[0058] As an implementation method, before arranging the signal units in all the classified signal groups in sequence, the method further includes:
[0059] Get arrangement constraints;
[0060] Accordingly, arranging the signal units in all the classified signal groups includes:
[0061] The signal units in all the classified signal groups are arranged according to the arrangement restriction condition.
[0062] The present invention also provides a device for arranging ball pin definitions, comprising:
[0063] A first acquisition module, configured to acquire all secondary signals in the target primary signal based on the target primary signal of all pins on the chip;
[0064] A second acquisition module, used to acquire at least one classified signal group corresponding to a target secondary signal in the secondary signal, each of the classified signal groups including at least one signal unit;
[0065] A first arrangement module, used to arrange the signal units in all the classified signal groups in sequence, and determine the final position of the signal unit after each arrangement based on the weighted relationship between the first preset signals corresponding to the target secondary signal, to obtain a first arrangement array corresponding to the target secondary signal;
[0066] A second arrangement module is used to arrange other secondary signals beside the first arrangement array, and determine the final position of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal, until a second arrangement array corresponding to all the target primary signals is obtained;
[0067] The third arrangement module is used to arrange other primary signals beside the second arrangement array, and determine the final position of the other primary signals after each arrangement based on the weighted relationship between the third preset signals corresponding to the primary signals to obtain the ball pin definition corresponding to the chip.
[0068] The present invention also provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements the steps of the method for arranging ball pin definitions described in any of the above embodiments.
[0069] The present invention also provides an electronic device, comprising:
[0070] Memory for storing computer programs;
[0071] A processor is used to implement the steps of any of the above-mentioned ball pin definition arrangement methods when executing the computer program.
[0072] The present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned ball pin definition arrangement methods are implemented.
[0073] The present invention provides a method for arranging ball pin definitions, including obtaining all secondary signals in the target primary signals of all pins on a chip based on the target primary signals; obtaining at least one classified signal group corresponding to the target secondary signal in the secondary signals, each of the classified signal groups including at least one signal unit; arranging the signal units in all the classified signal groups in sequence, and determining the final positions of the signal units based on the weighted relationship between the first preset signals corresponding to the target secondary signals after each arrangement, to obtain a first arrangement array corresponding to the target secondary signals; arranging other secondary signals next to the first arrangement array, and determining the final positions of the other secondary signals based on the weighted relationship between the second preset signals corresponding to the target primary signals after each arrangement, to obtain a second arrangement array corresponding to the target primary signals, until a second arrangement array corresponding to all the target primary signals is obtained; arranging other primary signals next to the second arrangement array, and determining the final positions of the other primary signals based on the weighted relationship between the third preset signals corresponding to the primary signals after each arrangement, to obtain a ball pin definition corresponding to the chip.
[0074] It can be seen that the arrangement method of the ball pin definition in the present invention obtains the secondary signal included in the target primary signal through the target primary signal of the pin on the chip, and then obtains the classified signal group according to the target secondary signal in the secondary signal. The signal units in the classified signal group are arranged, and the optimized arrangement of each signal unit is realized based on the weighted relationship between the first preset signals, that is, the ball pin definition arrangement corresponding to the target secondary signal is completed; then other secondary signals are arranged, and the optimized arrangement of all secondary signals is realized based on the weighted relationship between the second preset signals, that is, the ball pin definition arrangement corresponding to the target primary signal is completed; then other primary signals are arranged, and the optimized arrangement of all primary signals is realized based on the weighted relationship between the third preset signals, that is, the ball pin definition arrangement with the chip is completed. Therefore, the automatic arrangement of the ball pin definition in the present invention can shorten the arrangement time and reduce the errors and omissions caused by manual arrangement. The arrangement quality of the ball pin definition based on the greedy algorithm and the preset weighted relationship between signals in the present invention can be improved, and differences in the arrangement of the ball pin definition can be avoided.
[0075] In addition, the present invention also provides a device, a computer program product, an electronic device and a computer-readable storage medium having the above advantages. BRIEF DESCRIPTION OF THE DRAWINGS
[0076] In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0077] Figure 1 A process of arranging a ball pin definition provided by the present invention Figure 1 ;
[0078] Figure 2 A process for arranging signal units in all classified signal groups provided by the present invention Figure 1 ;
[0079] Figure 3 A process of arranging a ball pin definition provided by the present invention Figure 2 ;
[0080] Figure 4 A flow chart of arranging primary signals provided by the present invention;
[0081] Figure 5 A process of arranging a ball pin definition provided by the present invention Figure 3 ;
[0082] Figure 6 A process of arranging a ball pin definition provided by the present invention Figure 4 ;
[0083] Figure 7 A process of arranging a ball pin definition provided by the present invention Figure 5 ;
[0084] Figure 8 A schematic diagram of a weighted relationship between adjacent signals provided by the present invention;
[0085] Fig. 9 A schematic diagram of the arrangement of ball pins provided by the present invention;
[0086] Fig.10 for Fig. 9 Schematic diagram of adjacent weighted values of each signal in the ball pin definition;
[0087] Fig.11 A schematic diagram of signal tree structure classification provided by the present invention;
[0088] Fig.12 A schematic diagram of the arrangement of signals provided by the present invention from bottom to top logic;
[0089] Fig.13 A flow chart of arranging signals in a signal group provided by the present invention;
[0090] Fig.14 A ball map arrangement work flow chart provided by the present invention;
[0091] Fig.15 A structural block diagram of a device for arranging ball pins provided by the present invention;
[0092] Fig.16 This is a structural block diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION
[0093] In order to enable those skilled in the art to better understand the scheme of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0094] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.
[0095] As mentioned in the background technology section, currently, engineers manually arrange the ball pin definitions of chips. When the number of chip pins is large, the arrangement takes a long time, and a large number of pins are arranged manually, which inevitably leads to errors and omissions. In addition, due to the different abilities of different engineers, there will be obvious quality differences in the arrays after the ball pin definitions are arranged.
[0096] The ball pins are defined as a planar array where each signal has an adjacent signal.
[0097] In view of this, the present invention provides a method for arranging ball pin definitions, please refer to Figure 1 ,include:
[0098] Step S101: based on the target primary signals of all pins on the chip, all secondary signals in the target primary signals are acquired.
[0099] The pins are used to connect the internal circuits of the chip to the peripheral circuits, and all the pins constitute the interface of the chip.
[0100] It should be pointed out that in this embodiment, there is no limitation on the number of pins on the chip, which is determined according to actual conditions.
[0101] One pin or one ball pin corresponds to one signal. Primary signals can be obtained by dividing according to different functions of the pins. The target primary signal includes signals other than the power signal and the ground signal in the primary signal.
[0102] It should be noted that in this embodiment, there is no limitation on the type of the target primary signal, which depends on the circumstances.
[0103] As an implementable embodiment, the target primary signal may include a double data rate (DDR) signal and an open NAND Flash Interface (ONFI) signal.
[0104] The secondary signal can be obtained by dividing the target primary signal. The specific division method is not limited in this embodiment and can be set by oneself.
[0105] Step S102: acquiring at least one classified signal group corresponding to a target secondary signal in the secondary signals, each classified signal group including at least one signal unit.
[0106] The target secondary signal is the signal in the secondary signal obtained in the previous step, and the target secondary signal is the signal to be further divided.
[0107] The target secondary signal may include signals other than the interface power signal among the secondary signals.
[0108] The signal units in each classified signal group are related in circuit, that is, the signal units in each classified signal group are obtained by dividing primary signals into granularities (the size of the basic unit of data operation or processing) with the same functions as the same category.
[0109] The number of signal units in each classification signal group is not limited in this embodiment and depends on the circumstances.
[0110] As an implementable embodiment, the number of signal units in a classification signal group may be 10.
[0111] Step S103: Arrange the signal units in all classified signal groups in sequence, and determine the final position of the signal unit after each arrangement based on the weighted relationship between the first preset signals corresponding to the target secondary signal, to obtain a first arrangement array corresponding to the target secondary signal.
[0112] The arrangement of signal units in this step can be implemented based on a greedy algorithm. A greedy algorithm is triggered from an initial solution to a problem. According to a defined optimization measure, each subsequent step adopts an algorithm that can obtain the optimal solution under the current state.
[0113] The final position of the signal unit is the position when the optimal solution is obtained under the current arrangement each time the signal unit is arranged.
[0114] When the classified signal group includes more than two signal units, the arrangement can be started from the initial position of any signal unit specified manually, and the next signal unit can be arranged one by one next to the previous signal unit.
[0115] The first preset inter-signal weighted relationship represents the weighted value between any two signal units.
[0116] It should be pointed out that, in this embodiment, the specific weighted value between any two signal units in the first preset weighted relationship between signals is not limited and can be set at will.
[0117] It should also be noted that the present embodiment does not limit the form of the weighted relationship between the first preset signals. For example, the weighted relationship between the first preset signals may be in a table or other forms.
[0118] Obtaining the first arrangement array means realizing the arrangement from the signal unit upward to the target secondary signal.
[0119] Step S104: Arrange other secondary signals next to the first arrangement array, and determine the final positions of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal, until a second arrangement array corresponding to all target primary signals is obtained.
[0120] In this step, the arrangement of other secondary signals can be realized based on a greedy algorithm. The final position of other secondary signals is the position when the optimal solution is obtained under the current arrangement when arranging other secondary signals.
[0121] Other secondary signals may be interface power signals.
[0122] The second preset inter-signal weighted relationship represents the weighted value between the secondary signal and the signal unit, that is, the weighted value between other secondary signals and the target secondary signal.
[0123] It should be noted that, in this embodiment, there is no specific limitation on the weighted value between the secondary signal and the signal unit, which can be determined according to the circumstances.
[0124] As an implementable embodiment, the second preset weighted relationship between signals includes: in a secondary signal under a target primary signal, a weighted value between adjacent target secondary signals and the interface power signal is 1.
[0125] It should be pointed out that in this embodiment, the specific weighted value between any two secondary signals in the weighted relationship between the second preset signals is not limited and can be set at will.
[0126] It should also be noted that the present embodiment does not limit the form of the weighted relationship between the second preset signals. For example, the weighted relationship between the second preset signals may be in a table or other forms.
[0127] Obtaining the second arrangement array means realizing the arrangement from the secondary signal upward to the primary signal.
[0128] When the number of target secondary signals is more than two, each target secondary signal performs the process of steps S102 to S104 .
[0129] Step S105: Arrange other primary signals beside the second arrangement array, and determine the final positions of other primary signals based on the weighted relationship between third preset signals corresponding to the primary signals after each arrangement to obtain ball pin definitions corresponding to the chip.
[0130] The arrangement of other primary signals in this step can be implemented based on a greedy algorithm. The final position of other primary signals is the position when the optimal solution is obtained under the current arrangement when arranging other primary signals.
[0131] The third preset inter-signal weighted relationship represents the weighted value between any two primary signals.
[0132] It should be pointed out that, in this embodiment, the specific weighted value between any two primary signals in the third preset weighted relationship between signals is not limited and can be set at will.
[0133] As an implementable embodiment, when two target primary signals are high-speed signals (the transmission speed of the target primary signal is greater than or equal to a preset transmission speed threshold, that is, it can be called a high-speed signal, otherwise it becomes a low-speed signal), the third preset signal weighted relationship includes: in the primary signal, the weighted value between two adjacent target primary signals is 30, the weighted value between the adjacent target primary signal and the power supply signal is 1, the weighted value between the adjacent target primary signal and the ground signal is 0.1, and the weighted value between the adjacent ground signal and the power supply signal is 0.1.
[0134] When both target primary signals are high-speed signals, the disturbance between the signals is relatively large, so the weight value between the two target primary signals can be set relatively large to separate the two target primary signals during arrangement.
[0135] The high speed signal may be a double rate signal and an open gate NOT gate memory flash memory interface signal. The low speed signal may be a data line signal.
[0136] It should also be noted that the present embodiment does not limit the form of the weighted relationship between the third preset signals. For example, the weighted relationship between the third preset signals may be in a table or other forms.
[0137] The primary signal is obtained by the first division according to the pins, so after all the primary signals are arranged, the ball pin definition of the chip is obtained.
[0138] Other primary signals may be power supply signals and ground signals, etc.
[0139] After getting the ball pin definition, the layout engineer can perform routing.
[0140] In the arrangement method of the ball pin definition in this embodiment, the secondary signal included in the target primary signal is obtained through the target primary signal of the pin on the chip, and then the classification signal group is obtained according to the target secondary signal in the secondary signal. The signal units in the classification signal group are arranged, and the optimized arrangement of each signal unit is realized based on the weighted relationship between the first preset signals, that is, the ball pin definition arrangement corresponding to the target secondary signal is completed; then other secondary signals are arranged, and the optimized arrangement of all secondary signals is realized based on the weighted relationship between the second preset signals, that is, the ball pin definition arrangement corresponding to the target primary signal is completed; then other primary signals are arranged, and the optimized arrangement of all primary signals is realized based on the weighted relationship between the third preset signals, that is, the ball pin definition arrangement with the chip is completed. Therefore, the automatic arrangement of the ball pin definition in the present invention can shorten the arrangement time and reduce the errors and omissions caused by manual arrangement. In this embodiment, the arrangement quality of the ball pin definition can be improved based on the greedy algorithm and the preset weighted relationship between signals, and the differences in the arrangement of the ball pin definition can be avoided.
[0141] Based on the above embodiments, in one embodiment of the present invention, please refer to Figure 2 , arranging the signal units in all the classified signal groups in sequence, and determining the final position of the signal unit based on the weighted relationship between the first preset signals corresponding to the target secondary signal after each arrangement, and obtaining the first arrangement array corresponding to the target secondary signal may include:
[0142] Step S11: Arrange the target signal units in the current classified signal group based on the arrangement array unit obtained by arranging the previous classified signal group.
[0143] The target signal unit may be any designated signal unit in the current classification signal group.
[0144] When the previous classification signal group is the first classification signal group, the signal units are arranged based on a greedy algorithm. Since the signal units in the same classification signal group are circuit-correlated, the weighted value between any two signal units is relatively small, and the arrangement is relatively simple.
[0145] Step S12: Based on the first preset inter-signal weighted relationship, determine the sum of the weighted values of the target signal unit and the adjacent signal units.
[0146] Step S13: Determine whether the sum of the weighted values is less than a preset weighted threshold.
[0147] It should be noted that the preset weighted threshold is not limited in this embodiment and can be set at will. For example, the preset weighted threshold can be 8, 10, 15, 17, etc.
[0148] Step S14: If the sum of the weighted values is less than the preset weighted threshold, the next signal unit in the current classified signal group is taken as a new target signal unit, and the process proceeds to step S11 until all signal units in the current classified signal group are arranged.
[0149] The smaller the sum of weighted values, the better the arrangement of the signal unit. When the sum of weighted values is less than the preset weighted threshold, it indicates that the arrangement position of the target signal unit is relatively good, and then the next signal unit is arranged until all signal units in the current classification signal group are arranged.
[0150] Step S15: If the sum of the weighted values is not less than the preset weighted threshold, the target signal unit is swapped with other signal units in the current classified signal group so that the sum of the weighted values of all signal units in the current classified signal group and the adjacent signal units is less than the preset weighted threshold, and all signal units in the current classified signal group are arranged.
[0151] When the sum of the weighted values is greater than or equal to the preset weighted threshold, it indicates that the arrangement position of the target signal unit is not good and needs to be adjusted. When adjusting the position of the target signal unit, the target signal unit is swapped with the signal units in the same classification signal group, and the disturbance between the signal units in the same group is not large, so as to more quickly determine the position of the signal unit.
[0152] Step S16: The arrangement array obtained by arranging all signal units in the current classification signal group is used as a new arrangement array unit, the next classification signal group is used as the new current classification signal group, and step S11 is entered until the arrangement of signal units in all classification signal groups is completed to obtain the first arrangement array.
[0153] When the signal units in one classified signal group are arranged, the signal units in the next classified signal group are arranged until all the classified signal groups are arranged.
[0154] Based on any of the above embodiments, in one embodiment of the present invention, please refer to Figure 3 , the process of arranging the signal units in the classified signal group may include:
[0155] Step S701: based on the target primary signals of all pins on the chip, all secondary signals in the target primary signals are acquired.
[0156] Step S702: Acquire at least one classified signal group corresponding to the target secondary signal in the secondary signals, each classified signal group including at least one signal unit.
[0157] Step S703: Arrange the signal units in all classified signal groups in sequence, and determine the final position of the signal unit after each arrangement based on the weighted relationship between the first preset signals corresponding to the target secondary signal, to obtain a first arrangement array corresponding to the target secondary signal.
[0158] Step S704: Arrange other secondary signals next to the first arrangement array, and determine the final positions of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal, until a second arrangement array corresponding to all target primary signals is obtained.
[0159] Step S705: Determine whether there is a signal with a transmission speed greater than or equal to a preset transmission speed threshold among other primary signals and the target primary signal; if there is no signal with a transmission speed greater than or equal to the preset transmission speed threshold, execute step S707; if there is a signal with a transmission speed greater than or equal to the preset transmission speed threshold, execute step S706.
[0160] For a signal whose transmission speed is greater than or equal to a preset transmission speed threshold, the corresponding primary signal is considered to be a high-speed signal.
[0161] At least one of the target primary signal and the other primary signals is a high-speed signal, that is, a high-speed signal exists.
[0162] The disturbance between high-speed signals and other signals is relatively large, so a ground signal is arranged between the target primary signal and other primary signals to reduce the disturbance.
[0163] Step S706: Arrange the ground signal between the second arrangement array and other primary signals.
[0164] Step S707: Arrange other primary signals beside the second arrangement array, and determine the final positions of other primary signals based on the weighted relationship between the third preset signals corresponding to the primary signals after each arrangement to obtain the ball pin definitions corresponding to the chip.
[0165] On the basis of any of the above embodiments, in one embodiment of the present invention, when the target signal unit is swapped with other signal units in the current classified signal group so that the sum of the weighted values of all signal units in the current classified signal group and the adjacent signal units is less than a preset weighted threshold, and there are at least two arrangements of the signal units in the current classified signal group, it also includes:
[0166] Determine the total weight value corresponding to each arrangement;
[0167] It is determined that the arrangement mode corresponding to the minimum value in the total weighted values is the final arrangement mode of all signal units in the current classified signal group.
[0168] The total weighted value corresponding to one arrangement is the sum of the weighted values of each signal unit and the adjacent signal units in the arrangement.
[0169] The smaller the total weighted value, the better the arrangement. In this embodiment, the arrangement corresponding to the smallest total weighted value is determined as the final arrangement mode, that is, the optimal arrangement mode is obtained.
[0170] It can be understood that in other embodiments of the present invention, when the target signal unit is swapped with other signal units in the current classification signal group so that the sum of the weighted values of all signal units in the current classification signal group and the adjacent signal units is less than a preset weighted threshold, and there is only one arrangement method of the signal units in the current classification signal group, then this arrangement method is the optimal method.
[0171] On the basis of any of the above embodiments, in one embodiment of the present invention, other secondary signals are arranged next to the first arrangement array, and after each arrangement, the final positions of the other secondary signals are determined based on the weighted relationship between the second preset signals corresponding to the target primary signal, and the second arrangement array corresponding to the target primary signal is obtained, including:
[0172] Step S21: Arrange a target other secondary signal next to the first arrangement array.
[0173] The target other secondary signal may be an artificially designated other secondary signal among other secondary signals.
[0174] Step S22: Based on the weighted relationship between the second preset signals, determine the sum of the weighted values of the target other secondary signals and the adjacent signal units in the first arrangement array.
[0175] Step S23: Determine whether the sum of the weighted values is less than a preset weighted threshold.
[0176] It should be noted that the preset weighted threshold is not limited in this embodiment and can be set at will. For example, the preset weighted threshold can be 8, 10, 15, 17, etc.
[0177] Step S24: If the sum of the weighted values is less than the preset weighted threshold, the next other secondary signal is used as a new target other secondary signal, and the process proceeds to step S21 until all other secondary signals are arranged.
[0178] The smaller the sum of weighted values, the better the signal arrangement. When the sum of weighted values is less than the preset weighted threshold, it indicates that the arrangement position of other secondary signals of the target is relatively good, and then the next other secondary signal is arranged, until all other secondary signals are arranged.
[0179] Step S25: If the sum of the weighted values is not less than the preset weighted threshold, the target other secondary signals are swapped with other secondary signals so that the sum of the weighted values of the target other secondary signals and the adjacent signal units in the first arrangement array is less than the preset weighted threshold, thereby obtaining a second arrangement array.
[0180] When the sum of the weighted values is greater than or equal to the preset weighted threshold, it indicates that the arrangement positions of other secondary signals of the target are not good and need to be adjusted.
[0181] When all other secondary signals are arranged, the signals under the target primary signal are arranged. When the number of target primary signals is more than two, they are arranged in the above manner.
[0182] Based on any of the above embodiments, in one embodiment of the present invention, please refer to Figure 4 , arranging other primary signals beside the second arrangement array, and determining the final positions of other primary signals based on the weighted relationship between the third preset signals corresponding to the primary signals after each arrangement, and obtaining the ball pin definitions corresponding to the chip include:
[0183] Step S31: Arrange a target other primary signal next to the second arrangement array.
[0184] The side of the second arrangement array may be any side of the second arrangement array, top, bottom, left, or right.
[0185] The target other primary signal is another primary signal that can be manually designated among other primary signals.
[0186] For example, the other primary signals may include a power signal and a ground signal, and the target other primary signal may be a power signal or a ground signal.
[0187] Step S32: Based on the third preset weighted relationship between signals, determine the sum of the weighted values of the target other primary signals and the adjacent signal units in the second arrangement array.
[0188] Step S33: Determine whether the sum of the weighted values is less than a preset weighted threshold.
[0189] It should be noted that the preset weighted threshold is not limited in this embodiment and can be set at will. For example, the preset weighted threshold can be 8, 10, 15, 17, etc.
[0190] Step S34: If the sum of the weighted values is less than the preset weighted threshold, the next other primary signal is taken as a new target other primary signal, and the process goes to step S31 until all other primary signals are arranged.
[0191] The smaller the sum of weighted values, the better the arrangement of other primary signals of the target. When the sum of weighted values is less than the preset weighted threshold, it indicates that the arrangement position of other primary signals of the target is relatively good, and then the next other primary signal is arranged, until all other primary signals are arranged.
[0192] Step S35: If the sum of the weighted values is not less than the preset weighted threshold, the target other primary signals are swapped with other primary signals so that the sum of the weighted values of the target other primary signals and adjacent signal units in the second arrangement array is less than the preset weighted threshold, and the ball pin definition is obtained.
[0193] When the sum of the weighted values is greater than or equal to the preset weighted threshold, it indicates that the arrangement position of the target signal unit is not good and needs to be adjusted.
[0194] When all primary signals are arranged, it means that all signals on the chip are arranged and the ball pin definition is obtained.
[0195] Based on any of the above embodiments, in one embodiment of the present invention, please refer to Figure 5 , the arrangement methods of ball pin definition include:
[0196] Step S201: based on the target primary signals of all pins on the chip, all secondary signals in the target primary signals are acquired.
[0197] Step S202: Acquire at least one classified signal group corresponding to the target secondary signal in the secondary signals, each classified signal group including at least one signal unit.
[0198] Step S203: Arrange the signal units in all classified signal groups in sequence, and determine the final position of the signal unit after each arrangement based on the weighted relationship between the first preset signals corresponding to the target secondary signal, to obtain a first arrangement array corresponding to the target secondary signal.
[0199] Step S204: Arrange other secondary signals next to the first arrangement array, and determine the final positions of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal, until a second arrangement array corresponding to all target primary signals is obtained.
[0200] Step S205: Arrange other primary signals beside the second arrangement array, and determine the final positions of other primary signals based on the weighted relationship between third preset signals corresponding to the primary signals after each arrangement to obtain ball pin definitions corresponding to the chip.
[0201] Step S206: Determine whether to add arrangement position constraints.
[0202] The above-mentioned arrangement of ball pin definitions is an ideal situation, without considering the signal arrangement position requirements or restrictions. In actual work, there may be situations in the ball pin definition arrangement design where some signals must be placed in certain positions or some signals cannot be placed in certain positions due to some physical routing restrictions or other reasons. In this case, the signals at these positions can be fixed first during the arrangement, and then the ball pin definition can be arranged using the arrangement method of the present invention. At this time, the ball pin definition arranged is the ideal situation under the constraint conditions.
[0203] The arrangement position constraint means that one or some signals must be arranged at a fixed position or cannot be arranged at a certain position.
[0204] Step S207: if an arrangement position constraint condition is added, the position of the signal unit corresponding to the arrangement position constraint condition is fixed.
[0205] Step S208: Arrange the remaining signal units in all classified signal groups, and determine the final positions of the remaining signal units based on the weighted relationship between the first preset signals after each arrangement to obtain a first arrangement array corresponding to the target secondary signal; and return to step S204.
[0206] This step may arrange the remaining signal units based on a greedy algorithm.
[0207] Step S209: If no arrangement position constraint is added, stop.
[0208] When no arrangement position constraint condition is added, the ball pin definition obtained in step S205 is the final pin definition.
[0209] Based on any of the above embodiments, in one embodiment of the present invention, the arrangement method of the ball pin definition may further include a process of determining the weighted relationship between the first preset signals. As an implementable method, the process of determining the weighted relationship between the first preset signals may include:
[0210] Get design input information for ball pin definitions on the chip;
[0211] Based on the design input information and the classified signal group corresponding to the target secondary signal, a first preset inter-signal weighted relationship is established.
[0212] It should be noted that the design input information is not limited in this embodiment. For example, the design input information includes but is not limited to the package array form, the number of solder balls, the number of signals, the functional description of each signal, the module distribution in the chip and other information.
[0213] The package array format refers to the arrangement of signals, for example, it can be arranged in the form of M×N, where M and N are integers and can be equal or unequal.
[0214] Generally, the number of solder balls is the number of sub-packaging array forms. When there are vacant positions in the middle, the number of vacant positions is subtracted from the number of sub-packaging array forms.
[0215] The functional description of each signal refers to the function of the signal unit, for example, there may be a data signal, a clock signal, an address signal, a control signal, etc.
[0216] The module distribution within the chip refers to the location of the signal on the chip. For example, when PCIE (peripheral component interconnect express, a high-speed serial computer expansion bus standard) is located in the upper left corner of the chip, the PCIE signal also needs to be located in the upper left corner.
[0217] The size of the weighted value between any two signal units in the first preset inter-signal weighted relationship can be set arbitrarily and is not limited in this embodiment.
[0218] After a first preset weighted relationship between signals is determined, the ball map can be manually checked, and then the weighted relationship between the first preset signals can be corrected. This cycle can be repeated multiple times to obtain a more mature weighted relationship between the first preset signals.
[0219] Please refer to Figure 6 Based on the above embodiments, in one embodiment of the present invention, the arrangement method of the ball pin definition may include:
[0220] Step S301: removing the power signal and the ground signal from the primary signal to obtain a target primary signal.
[0221] For example, when the primary signals obtained by dividing all the pins include DDR, ONFI, a power signal, and a ground signal, the target primary signals are DDR and ONFI.
[0222] Step S302: based on the target primary signals of all pins on the chip, all secondary signals in the target primary signals are acquired.
[0223] Step S303: acquiring at least one classified signal group corresponding to the target secondary signal in the secondary signals, each classified signal group including at least one signal unit.
[0224] Step S304: Arrange the signal units in all classified signal groups in sequence, and determine the final position of the signal unit after each arrangement based on the weighted relationship between the first preset signals corresponding to the target secondary signal, to obtain a first arrangement array corresponding to the target secondary signal.
[0225] Step S305: Arrange other secondary signals next to the first arrangement array, and determine the final positions of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal, until a second arrangement array corresponding to all target primary signals is obtained.
[0226] Step S306: Arrange other primary signals beside the second arrangement array, and determine the final positions of other primary signals based on the weighted relationship between the third preset signals corresponding to the primary signals after each arrangement to obtain the ball pin definitions corresponding to the chip.
[0227] Based on any of the above embodiments, in one embodiment of the present invention, before removing the power signal and the ground signal from the primary signal to obtain the target primary signal, the method may further include:
[0228] According to the functional division conditions, primary signals with different functions are obtained based on all pins on the chip.
[0229] First, the signals on the pins are divided according to the functional division conditions. For example, the primary signals obtained by division may include DDR, ONFI, power supply signals and ground signals.
[0230] Please refer to Figure 7 Based on the above embodiments, in one embodiment of the present invention, the arrangement method of the ball pin definition may include:
[0231] Step S401: Based on the target primary signals of all pins on the chip, the target primary signals are divided according to the interface type division condition to obtain secondary signals.
[0232] The secondary signals may include target secondary signals (interface signals) and interface power signals.
[0233] For example, when the target primary signal is DDR, the interface signal may be a DDR signal, and the interface power signal may be a DDR power signal.
[0234] Step S402: acquiring at least one classified signal group corresponding to a target secondary signal in the secondary signals, each classified signal group including at least one signal unit.
[0235] Step S403: Arrange the signal units in all classified signal groups in sequence, and determine the final position of the signal unit after each arrangement based on the weighted relationship between the first preset signals corresponding to the target secondary signal, to obtain a first arrangement array corresponding to the target secondary signal.
[0236] Step S404: Arrange other secondary signals next to the first arrangement array, and determine the final positions of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal, until a second arrangement array corresponding to all target primary signals is obtained.
[0237] Step S405: Arrange other primary signals beside the second arrangement array, and determine the final positions of other primary signals based on the weighted relationship between third preset signals corresponding to the primary signals after each arrangement to obtain ball pin definitions corresponding to the chip.
[0238] Based on any of the above embodiments, in one embodiment of the present invention, the method for arranging ball pin definitions may further include a process of dividing and obtaining classified signal groups. The process of dividing and obtaining classified signal groups may include:
[0239] Step S501: remove the interface power signal from the secondary signal to obtain a target secondary signal.
[0240] Step S502: Divide the target second primary signal according to the signal function division condition to obtain a third-level signal.
[0241] As an implementable embodiment, the three-level signal includes any one or any combination of a data signal, a clock signal, an address signal, and a control signal.
[0242] For example, when the target secondary signal is DDR, the tertiary signal may include a data signal, a clock signal, an address signal, and a control signal. When the target signal is ONFI, the tertiary signal may include a data signal, a clock signal, and a ground control signal.
[0243] Step S503: Divide the three-level signals according to the correlation division conditions of the signals on the circuit to obtain classified signal groups.
[0244] For example, when the target secondary signal is a DDR interface signal, the 8 DQ (Data Bus) signals and their corresponding reference DQS (Data Strobe Signal, also known as synchronous timing reference signal) are divided into the same group. The signal and its reference clock need to be grouped together to form a classified signal group. The P end and N end of the differential signal are a total of 2 signals, which are processed as one signal. The P end and N end of the same group of differentials need to be placed adjacent to each other in the ball pin definition. Through the above classification relationship, all signals can be divided into several small groups, and then the weighted relationship between signals can be established based on the small groups.
[0245] Based on any of the above embodiments, in one embodiment of the present invention, the arrangement method of the ball pin definition may include:
[0246] Step S601: based on the target primary signals of all pins on the chip, all secondary signals in the target primary signals are acquired.
[0247] Step S602: Acquire at least one classified signal group corresponding to the target secondary signal in the secondary signals, each classified signal group including at least one signal unit.
[0248] Step S603: Obtain arrangement restriction conditions.
[0249] In this embodiment, the arrangement restriction conditions are not limited and depend on the situation. For example, the arrangement restriction conditions may include any one of the following or any combination: 1. Signal units of the same classification signal group must be adjacent; 2. Important sensitive signals should be placed as close to the outside of the chip as possible. Sensitive signals may be DQS, clock signals, etc.; 3. Data signals should be placed as close to the outer ring of the chip as possible; 4. Signal depth cannot exceed the depth threshold. The depth threshold can be determined according to the actual project; 5. Arrange key clock signals and data signals first, and then arrange control signals and address signals; 6. One classification signal group is adjacent to at most the other two classification signal groups.
[0250] The first arrangement constraint is to facilitate PCB (Printed Circuit Board) routing; the second arrangement constraint is to facilitate the output of sensitive signals and to reduce contact with other sensitive signals; the third arrangement constraint is to facilitate the routing of data signals; the fifth arrangement constraint is that since the speed of clock signals and data signals is greater than that of control signals and address signals, clock signals and data signals are easily interfered with, so they can be arranged in a better position by arranging them first.
[0251] Adding arrangement constraints will reduce the amount of combination data for defining the arrangement of ball pins and shorten the arrangement time.
[0252] As more and more layout constraints are added, the number of signals for automatic layout becomes smaller and smaller, and the optimal ball pin definition that can be physically realized can be completed after several working cycles.
[0253] Step S604: Arrange the signal units in all classified signal groups in sequence according to the arrangement restriction conditions, and determine the final position of the signal unit after each arrangement based on the weighted relationship between the first preset signals corresponding to the target secondary signal, to obtain the first arrangement array corresponding to the target secondary signal.
[0254] Step S605: Arrange other secondary signals next to the first arrangement array, and determine the final positions of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal, until a second arrangement array corresponding to all target primary signals is obtained.
[0255] Step S606: Arrange other primary signals beside the second arrangement array, and determine the final positions of other primary signals based on the weighted relationship between third preset signals corresponding to the primary signals after each arrangement to obtain ball pin definitions corresponding to the chip.
[0256] The arrangement process of the ball pin definition in the present invention is introduced below using a specific case.
[0257] Let's take the 4×4 ball pin definition as an example. There are 16 signal positions in total. Assuming the signals are A1~A5, B1~B5, 4 grounds (GND), and 2 power supplies (POWER), there are 16 signals in total. The weighted relationship between the adjacent signals is as follows: Figure 8 shown.
[0258] The intersection data of the x-axis and y-axis signals are the adjacent weighted values of the two signals. Figure 8 It can be seen from the above that the adjacent weighted values of GND and other signals are all 0.1, among which the adjacent weighted values of group A signals and group A signals are 2, the adjacent weighted values of group A and group B are 5, and the adjacent weighted value of group A and POWER is 1. Please refer to the figure for the weighted values between other signals.
[0259] When the ball pin is defined as Fig. 9 As shown, by checking the attached Figure 8 The weighted table in the table can be obtained as shown in the attached Fig.10 The weighted value of each signal position in the ball map can be obtained by adding up the weighted values of all signals, or the total weighted value of a single group of signals can be obtained, for example, the weighted value of all signals in group A. Signals with larger weighted values can also be analyzed separately.
[0260] The specific DDR and ONFI are used as examples for the introduction. The process of establishing the first preset weighted relationship between signals is as follows.
[0261] First, the signal on the chip is Fig.11Classification is performed. The primary signals include double data rate (DDR), open gate non-gate memory flash interface (ONFI), power signal and ground signal. The secondary signals under double rate include double rate interface signal and double rate interface power signal. The secondary signals under open gate non-gate memory flash interface include channel 0 interface signal, channel 1 interface signal and open gate non-gate memory flash interface power signal. The tertiary signals under double rate interface signal include data signal, clock signal, control signal and address signal. The tertiary signals under channel 0 interface signal and channel 1 interface signal include data signal, clock signal and control signal respectively. The data signal under double rate interface signal is further divided into 8 data signals in the same group and their corresponding reference DQS (data strobe signal). The signal and its reference clock need to be grouped together. The P end and N end of the differential signal have a total of 2 signals, which are processed as one signal. The P and N ends of the same group of differential signals need to be placed adjacent to each other on the ball map. All signals are divided into several small groups through the above classification relationship, and then a signal adjacent weighted table is established based on the small groups.
[0262] Fig.11 In the double rate interface signal, there are nine groups of data signals, DDR_DQ_0~7 and DDR_DQS_P / N_0 are one group, and so on. The reference clock signal DDR_CLK0_P / N and all control signals and address signals are one group.
[0263] The weighted relationship table of the double rate signal is shown in Table 1, and the weighted relationship table of the open gate NOT gate memory flash memory interface signal is shown in Table 2.
[0264] According to Table 1 and Table 2, it can be seen that the adjacent weighted values of some signals are relatively large, which mainly occurs when the signals between different groups are adjacent. Therefore, when arranging the signals between the groups, try to avoid large adjacent weighted values.
[0265] Create Table 1 and Table 2 to complete Fig.11 The signal adjacent weighted table of each interface from the second layer to the fourth layer is completed. Fig.11 The adjacent weighted table of signals between the first layer DDR and ONFI interfaces. In actual operation, according to the characteristics of the signal interface circuit, two main interface signals are generally added with a fixed weight value when they are adjacent. In this embodiment, both DDR and ONFI are high-speed interfaces, and the adjacent weights of the two interfaces are set to 30. For example, DDR DQ_0 is adjacent to CH0_IO_0 of ONFI, and the adjacent weight is assigned to 30. The adjacent weights of the power supply are set to 1, and the adjacent weights of the ground and all signals are set to 0.1. At this point, the adjacent weights of all signals are set.
[0266] Table 1
[0267]
[0268] Table 2
[0269]
[0270] Secondly, arrange the signals. According to the classified signal groups divided above, arrange them logically from the bottom up. Fig.12 As shown. First arrange a signal group, and then arrange the next signal group after shooting. When one secondary interface signal is arranged, arrange the next secondary interface signal, and finally arrange the signals on the entire chip to get a ball map.
[0271] Specifically, when arranging the signals in the signal group, such as Fig.13 shown.
[0272] Step S1, selecting a signal in the first signal group as an initial solution and arranging the positions;
[0273] Step S2, using a greedy algorithm to arrange the signals in the first signal group;
[0274] Step S3, arranging the signals in a signal group one by one;
[0275] Step S4, arrange and simultaneously detect the adjacent weighted values of each signal, and determine whether the adjacent weighted values are ≥ 10; if so, proceed to step S5, if not, proceed to step S8;
[0276] Step S5, returning the group with adjacent weighted value ≥ 10;
[0277] Step S6, swap the position of the signal with adjacent weighted value ≥ 10 with other signals in the group; find a combination in which the adjacent weighted values of all signals are less than 10. When there are many combinations in such a group, find the combination with the smallest total weight among these combinations;
[0278] Step S7, using a group of signal arrangements with the smallest total weight to update the existing signal arrangement, and proceeding to step 8;
[0279] Step S8, continue to arrange the signals and detect the adjacent weighted values of each signal, and determine whether the adjacent weighted values are ≥ 10; if so, proceed to step S5, if not, proceed to step S8;
[0280] Step S9, determining whether all signals under the currently arranged interface signal have been arranged; if so, proceeding to step S10, if not, proceeding to step S3;
[0281] Step S10, determining whether at least one of the currently arranged interface signals and the next arranged interface signals is a high-speed interface signal; if so, proceeding to step S12, if not, proceeding to step S11;
[0282] Step S11, arranging the next interface signal;
[0283] Step S12, arranging a ground signal between the currently arranged interface signal and the next arranged interface signal;
[0284] Step S13: If all interfaces have been queued, exit; otherwise, queue the next interface signal.
[0285] The entire ball map layout process flow chart is as follows Fig.14 shown.
[0286] Step S01, preparing the ball pin definition arrangement information entry;
[0287] Step S02, arranging various signals;
[0288] Step S03: The layout engineer performs routing according to the latest ball pin definition;
[0289] Step S04: determine whether to add arrangement restriction conditions, if yes, return to step S02; if no, go to step S05;
[0290] Step S05, exit.
[0291] The following is an introduction to an arrangement device for ball pin definitions provided in an embodiment of the present invention. The arrangement device for ball pin definitions described below and the arrangement method for ball pin definitions described above can be referenced to each other.
[0292] Fig.15 The structural block diagram of the arrangement device of ball pin definitions provided in the embodiment of the present invention may include:
[0293] A first acquisition module 100 is used to acquire all secondary signals in a target primary signal based on target primary signals of all pins on the chip;
[0294] A second acquisition module 200 is used to acquire at least one classified signal group corresponding to a target secondary signal in the secondary signal, each classified signal group including at least one signal unit;
[0295] A first arrangement module 300 is used to arrange the signal units in all the classified signal groups in sequence, and determine the final position of the signal unit after each arrangement based on the weighted relationship between the first preset signals corresponding to the target secondary signal, to obtain a first arrangement array corresponding to the target secondary signal;
[0296] A second arrangement module 400 is used to arrange other secondary signals beside the first arrangement array, and determine the final positions of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal, until a second arrangement array corresponding to all target primary signals is obtained;
[0297] The third arrangement module 500 is used to arrange other primary signals beside the second arrangement array, and determine the final position of other primary signals based on the weighted relationship between the third preset signals corresponding to the primary signals after each arrangement to obtain the ball pin definition corresponding to the chip.
[0298] The ball pin definition arrangement device of the present embodiment is used to implement the aforementioned ball pin definition arrangement method. Therefore, the specific implementation method of the ball pin definition arrangement device can be seen in the embodiment part of the ball pin definition arrangement method in the previous text. For example, the first acquisition module 100, the second acquisition module 200, the first arrangement module 300, the second arrangement module 400, and the third arrangement module 500 are respectively used to implement steps S101, S102, S103, S104 and S105 in the aforementioned ball pin definition arrangement method. Therefore, its specific implementation method can refer to the description of the corresponding each part of the embodiment, which will not be repeated here.
[0299] As an implementable embodiment, the first arrangement module 300 includes:
[0300] The first arrangement unit is used to execute step S11: arranging the target signal units in the current classification signal group based on the arrangement array unit obtained after the previous classification signal group is arranged;
[0301] A first determining unit, configured to execute step S12: determining a sum of weighted values of a target signal unit and adjacent signal units based on a first preset weighted relationship between signals;
[0302] A first judging unit, configured to execute step S13: judging whether the sum of the weighted values is less than a preset weighted threshold;
[0303] The first repetition unit is used to execute step S14: if the sum of the weighted values is less than a preset weighted threshold, the next signal unit in the current classified signal group is used as a new target signal unit, and the process proceeds to step S11 until all signal units in the current classified signal group are arranged;
[0304] A first swapping unit is used to execute step S15: if the sum of the weighted values is not less than a preset weighted threshold, the target signal unit is swapped with other signal units in the current classified signal group, so that the sum of the weighted values of all signal units in the current classified signal group and adjacent signal units is less than the preset weighted threshold, and all signal units in the current classified signal group are arranged;
[0305] The second repeating unit is used to execute step S16: the arrangement array obtained by arranging all the signal units in the current classification signal group is used as a new arrangement array unit, the next classification signal group is used as the new current classification signal group, and the step S11 is entered until the arrangement of the signal units in all classification signal groups is completed to obtain the first arrangement array.
[0306] As an implementable embodiment, when the target signal unit is swapped with other signal units in the current classified signal group so that the sum of the weighted values of all signal units in the current classified signal group and the adjacent signal units is less than a preset weighted threshold, and there are at least two arrangements of the signal units in the current classified signal group, the first arrangement module 300 may further include:
[0307] A second determining unit, used for determining a total weighted value corresponding to each arrangement mode;
[0308] The third determining unit is used to determine that the arrangement mode corresponding to the minimum value in the total weighted values is the final arrangement mode of all signal units in the current classified signal group.
[0309] As an implementable embodiment, the arrangement device for ball pin definitions may further include:
[0310] A first judgment module is used to judge whether there is a signal with a transmission speed greater than or equal to a preset transmission speed threshold value among other primary signals and the target primary signal; if there is no signal with a transmission speed greater than or equal to the preset transmission speed threshold value, triggering a third arrangement module;
[0311] The second arranging unit is configured to arrange the ground signal between the second arranging array and other primary signals if there is a signal whose transmission speed is greater than or equal to a preset transmission speed threshold.
[0312] As an implementable embodiment, the second arrangement module 400 may include:
[0313] The third arrangement unit is used to execute step S21: arranging a target other secondary signal next to the first arrangement array;
[0314] A fourth determination unit, configured to execute step S22: determining the sum of weighted values of other target secondary signals and adjacent signal units in the first arrangement array based on the weighted relationship between the second preset signals;
[0315] The second judgment unit is used to execute step S23: judging whether the sum of the weighted values is less than a preset weighted threshold;
[0316] The third repetition unit is used to execute step S24: if the sum of the weighted values is less than the preset weighted threshold, the next other secondary signal is used as a new target other secondary signal, and the process goes to step S21 until all other secondary signals are arranged;
[0317] The second interchange unit is used to execute step S25: if the sum of the weighted values is not less than the preset weighted threshold, the position of the target other secondary signals is interchanged with the other secondary signals so that the sum of the weighted values of the target other secondary signals and the adjacent signal units in the first arrangement array is less than the preset weighted threshold, thereby obtaining a second arrangement array.
[0318] As an implementable embodiment, the third arrangement module 500 may include:
[0319] The fourth arrangement unit is used to execute step S31: arranging a target other primary signal beside the second arrangement array;
[0320] A fifth determining unit, configured to execute step S32: determining the sum of weighted values of the target other primary signals and adjacent signal units in the second arrangement array based on the third preset weighted relationship between the signals;
[0321] A third judgment unit is used to execute step S33: judging whether the sum of the weighted values is less than a preset weighted threshold;
[0322] The fourth repetition unit is used in step S34: if the sum of the weighted values is less than the preset weighted threshold, the next other primary signal is used as a new target other primary signal, and the process proceeds to step S31 until all other primary signals are arranged;
[0323] The third interchange unit is used to execute step S35: if the sum of the weighted values is not less than the preset weighted threshold, the target other primary signals are interchanged with the other primary signals so that the sum of the weighted values of the target other primary signals and the adjacent signal units in the second arrangement array is less than the preset weighted threshold, thereby obtaining the ball pin definition.
[0324] As an implementable embodiment, the arrangement device for ball pin definitions may further include:
[0325] The second judgment module is used to judge whether to add arrangement position constraint conditions;
[0326] A fixing module, used for fixing the position of the signal unit corresponding to the arrangement position constraint condition if an arrangement position constraint condition is added;
[0327] The fourth arrangement module is used to arrange the remaining signal units in all classified signal groups, and determine the final positions of the remaining signal units after each arrangement based on the weighted relationship between the first preset signals to obtain a first arrangement array corresponding to the target secondary signal; and execute the steps of arranging other secondary signals next to the first arrangement array, and determining the final positions of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal to obtain a second arrangement array corresponding to the target primary signal.
[0328] As an implementable embodiment, the arrangement device for ball pin definitions may further include:
[0329] The third acquisition module is used to obtain the design input information of the ball pin definition on the chip;
[0330] An establishing module is used to establish a first preset weighted relationship between signals based on the design input information and a classified signal group corresponding to the target secondary signal.
[0331] As an implementable embodiment, the arrangement device for ball pin definitions may further include:
[0332] The removal module is used for removing the power signal and the ground signal from the primary signal to obtain the target primary signal.
[0333] As an implementable embodiment, the arrangement device for ball pin definitions may further include:
[0334] The first division module is used to obtain primary signals with different functions based on all pins on the chip according to the functional division conditions.
[0335] As an implementable embodiment, the arrangement device for ball pin definitions may further include:
[0336] The second division module is used to divide the target primary signal according to the interface type division condition to obtain the secondary signal.
[0337] As an implementable method, the second acquisition module 200 includes:
[0338] A removal unit, used for removing the interface power supply signal from the secondary signal to obtain a target secondary signal;
[0339] A first division unit is used to divide the target second primary signal according to the signal function division condition to obtain a third-level signal;
[0340] The second division unit is used to divide the three-level signal according to the correlation division condition of the signal on the circuit to obtain a classified signal group.
[0341] As an implementable embodiment, the arrangement of the ball pin definition may also include:
[0342] A fourth acquisition module is used to acquire arrangement restriction conditions;
[0343] Correspondingly, the first arrangement module 300 is specifically used to arrange the signal units in all classified signal groups according to the arrangement restriction condition.
[0344] The computer program product provided by the embodiment of the present invention is introduced below. The computer program product described below and the method for arranging ball pin definitions described above can be referred to each other.
[0345] A computer program product includes a computer program / instruction, which, when executed by a processor, implements the steps of the method for arranging ball pin definitions in any of the above-mentioned embodiments.
[0346] The electronic device provided by the embodiment of the present invention is introduced below. The electronic device described below and the arrangement method of the ball pin definition described above can be referred to each other.
[0347] Fig.16 The structural block diagram of the electronic device provided by the embodiment of the present invention may include:
[0348] A memory 11, used for storing computer programs;
[0349] The processor 12 is used to implement the steps of the ball pin arrangement method defined in any of the above embodiments when executing a computer program.
[0350] The computer-readable storage medium provided by the embodiment of the present invention is introduced below. The computer-readable storage medium described below and the arrangement method of the ball pin definition described above can be referred to each other.
[0351] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the method for arranging ball pin definitions in any of the above-mentioned embodiments.
[0352] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.
[0353] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.
[0354] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
[0355] The above is a detailed introduction to the arrangement method, device, program product, electronic device and computer-readable storage medium for the ball pin definitions provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the scheme of the present invention and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the present invention.
Claims
1. A method for arranging ball pin definitions, characterized in that: include: Based on the target primary signals of all pins on the chip, acquiring all secondary signals in the target primary signals; Acquire at least one classified signal group corresponding to a target secondary signal in the secondary signals, each of the classified signal groups including at least one signal unit; Arranging the signal units in all the classified signal groups in sequence, and determining the final position of the signal unit after each arrangement based on the weighted relationship between the first preset signals corresponding to the target secondary signal, to obtain a first arrangement array corresponding to the target secondary signal; Arrange other secondary signals beside the first arrangement array, and determine the final positions of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal, until a second arrangement array corresponding to all the target primary signals is obtained; Other primary signals are arranged beside the second arrangement array, and after each arrangement, the final positions of the other primary signals are determined based on the weighted relationship between the third preset signals corresponding to the primary signals to obtain the ball pin definitions corresponding to the chip.
2. The method for arranging ball pin definitions according to claim 1, characterized in that: The signal units in all the classified signal groups are arranged in sequence, and after each arrangement, the final positions of the signal units are determined based on the weighted relationship between the first preset signals corresponding to the target secondary signal, and the first arrangement array corresponding to the target secondary signal is obtained, including: Step S11: arranging the target signal units in the current classification signal group based on the arrangement array units obtained by arranging the previous classification signal group; Step S12: determining the sum of weighted values of the target signal unit and the adjacent signal units based on the first preset weighted relationship between the signals; Step S13: determining whether the sum of the weighted values is less than a preset weighted threshold; Step S14: if the sum of the weighted values is less than the preset weighted threshold, the next signal unit in the current classified signal group is used as a new target signal unit, and the process proceeds to step S11 until all signal units in the current classified signal group are arranged; Step S15: If the sum of the weighted values is not less than the preset weighted threshold, the target signal unit is swapped with other signal units in the current classified signal group, so that the sum of the weighted values of all signal units in the current classified signal group and adjacent signal units is less than the preset weighted threshold, and all signal units in the current classified signal group are arranged; Step S16: The arrangement array obtained by arranging all signal units in the current classification signal group is used as a new arrangement array unit, the next classification signal group is used as the new current classification signal group, and the process goes to step S11 until the arrangement of the signal units in all the classification signal groups is completed to obtain the first arrangement array.
3. The method for arranging ball pin definitions according to claim 2, characterized in that: When the target signal unit is swapped with other signal units in the current classified signal group so that the sum of the weighted values of all signal units in the current classified signal group and adjacent signal units is less than the preset weighted threshold, and there are at least two arrangements of the signal units in the current classified signal group, the method further includes: Determine the total weight value corresponding to each arrangement; It is determined that the arrangement mode corresponding to the minimum value in the total weighted values is the final arrangement mode of all signal units in the current classified signal group.
4. The method for arranging ball pin definitions according to claim 1, characterized in that: Before arranging other primary signals next to the second arrangement array, the method further includes: Determine whether there is a signal whose transmission speed is greater than or equal to a preset transmission speed threshold value among other primary signals and the target primary signal; If there is no signal whose transmission speed is greater than or equal to the preset transmission speed threshold, performing the step of arranging other primary signals next to the second arrangement array, and determining the final position of the other primary signals based on the weighted relationship between the third preset signals corresponding to the primary signals after each arrangement; If there is a signal whose transmission speed is greater than or equal to the preset transmission speed threshold, a ground signal is arranged between the second arrangement array and other primary signals.
5. The method for arranging ball pin definitions according to claim 1, characterized in that: Arranging other secondary signals beside the first arrangement array, and determining the final positions of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal includes: Step S21: arranging a target other secondary signal next to the first arrangement array; Step S22: determining the sum of the weighted values of the target other secondary signals and the adjacent signal units in the first arrangement array based on the weighted relationship between the second preset signals; Step S23: determining whether the sum of the weighted values is less than a preset weighted threshold; Step S24: if the sum of the weighted values is less than the preset weighted threshold, the next other secondary signal is used as a new target other secondary signal, and the process proceeds to step S21 until all other secondary signals are arranged; Step S25: If the sum of the weighted values is not less than the preset weighted threshold, the positions of the target other secondary signals and other secondary signals are swapped so that the sum of the weighted values of the target other secondary signals and the adjacent signal units in the first arrangement array is less than the preset weighted threshold, thereby obtaining the second arrangement array.
6. The method for arranging ball pin definitions according to claim 1, characterized in that: Arranging other primary signals beside the second arrangement array, and determining the final positions of the other primary signals after each arrangement based on the weighted relationship between the third preset signals corresponding to the primary signals, and obtaining the ball pin definition corresponding to the chip includes: Step S31: arranging a target other primary signal next to the second arrangement array; Step S32: determining the sum of the weighted values of the target other primary signals and the adjacent signal units in the second arrangement array based on the weighted relationship between the third preset signals; Step S33: determining whether the sum of the weighted values is less than a preset weighted threshold; Step S34: if the sum of the weighted values is less than the preset weighted threshold, the next other primary signal is used as a new target other primary signal, and the process proceeds to step S31 until all other primary signals are arranged; Step S35: If the sum of the weighted values is not less than the preset weighted threshold, the target other primary signals are swapped with other primary signals so that the sum of the weighted values of the target other primary signals and the adjacent signal units in the second arrangement array is less than the preset weighted threshold, thereby obtaining the ball pin definition.
7. The method for arranging ball pin definitions according to claim 1, characterized in that: Arranging other primary signals beside the second arrangement array, and determining the final positions of the other primary signals based on the weighted relationship between the third preset signals corresponding to the primary signals after each arrangement, and obtaining the ball pin definitions corresponding to the chip, further comprising: Determine whether to add arrangement position constraints; If the arrangement position constraint condition is added, the position of the signal unit corresponding to the arrangement position constraint condition is fixed; The remaining signal units in all the classified signal groups are arranged, and after each arrangement, the final positions of the remaining signal units are determined based on the weighted relationship between the first preset signals to obtain a first arrangement array corresponding to the target secondary signal; and other secondary signals are arranged next to the first arrangement array, and after each arrangement, the final positions of the other secondary signals are determined based on the weighted relationship between the second preset signals corresponding to the target primary signal to obtain a second arrangement array corresponding to the target primary signal.
8. The method for arranging ball pin definitions according to claim 1, characterized in that: Also includes: Get design input information for ball pin definitions on the chip; Based on the design input information and the classified signal group corresponding to the target secondary signal, a weighted relationship between the first preset signals is established.
9. The method for arranging ball pin definitions according to claim 1, characterized in that: The second preset weighted relationship between signals includes: in one of the secondary signals under one of the target primary signals, the weighted value between adjacent target secondary signals and the interface power signal is 1.
10. The method for arranging ball pin definitions according to claim 1, characterized in that: The weighted relationship between the third preset signals includes: in the primary signal, the weighted value between two adjacent target primary signals is 30, the weighted value between the adjacent target primary signal and the power supply signal is 1, the weighted value between the adjacent target primary signal and the ground signal is 0.1, and the weighted value between the adjacent ground signal and the power supply signal is 0.
1.
11. The method for arranging ball pin definitions according to claim 1, characterized in that: The target primary signal includes a double rate signal and an open gate NOT memory flash memory interface signal.
12. The method for arranging ball pin definitions according to claim 1, characterized in that: Based on the target primary signals of all pins on the chip, before acquiring all secondary signals in the target primary signals, the method further includes: The power signal and the ground signal are removed from the primary signal to obtain the target primary signal.
13. The method for arranging ball pin definitions according to claim 12, characterized in that: Before removing the power signal and the ground signal from the primary signal to obtain the target primary signal, the method further includes: According to the functional division conditions, the primary signals with different functions are obtained based on all the pins on the chip.
14. The method for arranging ball pin definitions according to claim 1, characterized in that: Acquiring all secondary signals in the target primary signal includes: The target primary signal is divided according to the interface type division condition to obtain the secondary signal.
15. The method for arranging ball pin definitions according to claim 1, characterized in that: Acquiring at least one classified signal group corresponding to a target secondary signal in the secondary signals includes: Removing the interface power supply signal from the secondary signal to obtain a target secondary signal; Dividing the target second primary signal according to the signal function division condition to obtain a third-level signal; The three-level signals are divided according to the correlation division conditions of the signals on the circuit to obtain the classified signal group.
16. The method for arranging ball pin definitions according to any one of claims 1 to 15, characterized in that: Before arranging the signal units in all the classified signal groups in sequence, the method further includes: Get arrangement constraints; Accordingly, arranging the signal units in all the classified signal groups includes: The signal units in all the classified signal groups are arranged according to the arrangement restriction condition.
17. A device for arranging ball pins, characterized in that: include: A first acquisition module, configured to acquire all secondary signals in the target primary signal based on the target primary signal of all pins on the chip; A second acquisition module, used to acquire at least one classified signal group corresponding to a target secondary signal in the secondary signal, each of the classified signal groups including at least one signal unit; A first arrangement module, used to arrange the signal units in all the classified signal groups in sequence, and determine the final position of the signal unit after each arrangement based on the weighted relationship between the first preset signals corresponding to the target secondary signal, to obtain a first arrangement array corresponding to the target secondary signal; A second arrangement module is used to arrange other secondary signals beside the first arrangement array, and determine the final position of the other secondary signals after each arrangement based on the weighted relationship between the second preset signals corresponding to the target primary signal, to obtain a second arrangement array corresponding to the target primary signal, until a second arrangement array corresponding to all the target primary signals is obtained; The third arrangement module is used to arrange other primary signals beside the second arrangement array, and determine the final position of the other primary signals after each arrangement based on the weighted relationship between the third preset signals corresponding to the primary signals to obtain the ball pin definition corresponding to the chip.
18. A computer program product, comprising a computer program / instruction, which, when executed by a processor, implements the steps of the method for arranging ball pin definitions as claimed in any one of claims 1 to 16.
19. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the method for arranging ball pin definitions as defined in any one of claims 1 to 16 when executing the computer program.
20. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the method for arranging ball pin definitions as claimed in any one of claims 1 to 16.