Demonstration system for core device and chip of nonvolatile magnetic random access memory

Abstract

The invention discloses a demonstration system for a core device and a chip of a nonvolatile magnetic random access memory, and relates to the technical field of teaching demonstration, and the system comprises a main control demonstration unit which inputs initial information, and reads and displays the initial information on a nonvolatile memory unit; the nonvolatile storage unit is used for storing initial information input by the main control demonstration unit; the main control demonstration unit is further used for acquiring the initial information stored in the nonvolatile storage unit, processing the initial information to obtain target data and drawing a time sequence diagram based on the target data so as to demonstrate the read-write state of the nonvolatile storage unit. The core device excitation unit is used for exciting the core device unit so as to change the magnetic moment direction of the core device unit and generate signal change, a generated signal of the core device unit is obtained, and the generated signal is fed back to the main control demonstration unit so as to realize demonstration of the core device storage principle of the nonvolatile storage unit. According to the invention, the working principle of the MRAM chip is demonstrated.

Description

Technical Field

[0001] The present application relates to the field of teaching demonstration technology, and in particular to a demonstration system for a non-volatile magnetic random access memory core device and chip. Background Art

[0002] Chip technology is a major demand of the country. Research on non-volatile magnetic random access memory (Magnetoresistive Random Access Memory, MRAM) and related spin devices belongs to the international frontier research field. Most of the research is carried out in high-level laboratories and well-known chip companies. There is a big gap with the innovation training and course learning of undergraduate students. It is not easy for students to master the latest knowledge and scientific frontier dynamics, and they do not understand the working principles of chips and systems. Therefore, in order to fill the gap in domestic spin electronic chip education in colleges and universities; at the same time, to cultivate undergraduates and postgraduates, increase students' understanding of MRAM related knowledge, improve the popularity of MRAM, and for the sustainable and good development of MRAM companies and the MRAM industry, a demonstration system for non-volatile magnetic random access memory core devices and chips is urgently needed. Summary of the invention

[0003] The purpose of this application is to provide a demonstration system of a non-volatile magnetic random access memory core device and chip, which can demonstrate the working principle of the MRAM chip.

[0004] To achieve the above objectives, this application provides the following solutions:

[0005] The present application provides a demonstration system for a non-volatile magnetic random access memory core device and chip, comprising a non-volatile storage unit, a main control demonstration unit, a core device excitation unit and a core device unit; the non-volatile storage unit is composed of the core device unit.

[0006] Wherein, the non-volatile storage unit is used to store the initial information input by the main control demonstration unit;

[0007] The main control demonstration unit is used to input initial information; the main control demonstration unit is also used to read the initial information on the non-volatile storage unit and display the initial information;

[0008] The main control demonstration unit is further used to: obtain the initial information stored in the non-volatile storage unit; process the initial information to obtain target data; draw a timing diagram based on the target data to demonstrate the read and write status of the non-volatile storage unit;

[0009] The core device excitation unit is communicatively connected with the main control demonstration unit, and is used to receive control instructions from the main control demonstration unit, generate an excitation signal, and excite the core device unit through the excitation signal to change the magnetic moment direction of the core device unit and generate a signal change, thereby obtaining a generated signal of the core device unit, and feeding the generated signal back to the main control demonstration unit to realize a demonstration of the core device storage principle of the non-volatile storage unit.

[0010] Optionally, the demonstration system of the non-volatile magnetic random access memory core device and chip also includes a storage control unit; the storage control unit is connected to the non-volatile storage unit and the master control demonstration unit through a serial port; the storage control unit is used to: write the initial information input by the master control demonstration unit into the non-volatile storage unit; the storage control unit is also used to: receive a read instruction from the master control demonstration unit, read the initial information stored in the non-volatile storage unit, and send it to the master control demonstration unit.

[0011] Optionally, the demonstration system of the non-volatile magnetic random access memory core device and chip further includes an external power supply; the external power supply is connected to the hardware drive mainboard and is used to provide a voltage signal to the hardware drive mainboard.

[0012] Optionally, the core device excitation unit is formed by connecting a hardware driver mainboard and a single-chip microcomputer control board;

[0013] The hardware driving mainboard is used to: convert the voltage signal provided by the external power supply into a pulse current signal, and apply the pulse current signal and the measuring current to the core device unit to drive the magnetic moment of the core device unit to flip, and collect the generated signals generated at both ends of the core device unit;

[0014] The hardware drive mainboard is integrated with a magnet, and the magnet is used to assist the core device unit in realizing magnetic moment reversal;

[0015] The single chip control board is used to feed back the generated signal to the main control demonstration unit.

[0016] Optionally, the external power supply has a voltage range of 0.1V to 100V.

[0017] Optionally, the pulse current signal has a value range of -100mA to 100mA.

[0018] Optionally, the measurement current has a value range of 0.001 mA to 10 mA.

[0019] Optionally, the hardware driver mainboard and the single-chip microcomputer control board are connected using a double-row pin with a pitch of 2.54 mm.

[0020] Optionally, in processing the initial information to obtain target data, the main control demonstration unit is further used to:

[0021] Performing base conversion on the initial information to obtain binary data;

[0022] Each bit of the binary data is encoded and copied to obtain target data.

[0023] Optionally, the core device unit and the core device excitation unit are connected to the ground.

[0024] According to the specific embodiments provided in this application, this application discloses the following technical effects:

[0025] The present application provides a demonstration system for a non-volatile magnetic random access memory core device and chip, which includes a non-volatile storage unit, a main control demonstration unit, a core device excitation unit, and a core device unit. The main control demonstration unit is used to input initial information; the main control demonstration unit is also used to read the initial information on the non-volatile storage unit and display the initial information; the non-volatile storage unit is used to store the initial information input by the main control demonstration unit; the main control demonstration unit is also used to: obtain the initial information stored in the non-volatile storage unit; process the initial information to obtain target data; draw a timing diagram based on the target data to demonstrate the read and write status of the non-volatile storage unit. The core device excitation unit is connected to the main control demonstration unit for communication, and is used to receive the control instruction of the main control demonstration unit, generate an excitation signal, and excite the core device unit through the excitation signal to change the magnetic moment direction of the core device unit and generate a signal change, obtain the generated signal of the core device unit, and feed the generated signal back to the main control demonstration unit to realize the demonstration of the core device storage principle of the non-volatile storage unit. Based on the above content, this application provides an educational and display tool that demonstrates the physical mechanism of non-volatile memory core devices in an intuitive and interactive way, and shows the writing and reading of non-volatile memory and the timing logic, so as to facilitate students to understand the working principle of MRAM chips (i.e., non-volatile storage units). BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0027] Figure 1 A schematic diagram of the structure of a demonstration system of a non-volatile magnetic random access memory core device and chip provided in one embodiment of the present application;

[0028] Figure 2 A schematic diagram of the structure of an abnormal Hall device provided in one embodiment of the present application; wherein: Figure 2 (a) is a top view of the anomalous Hall device; Figure 2 (b) is a front view of the anomalous Hall device;

[0029] Figure 3 A schematic diagram of the resistance change of an abnormal Hall device in the process of a pulse current from -12mA to 12mA provided in an embodiment of the present application;

[0030] Figure 4 A schematic diagram of the resistance change of an abnormal Hall device in the process of a pulse current from -16mA to 16mA provided in an embodiment of the present application.

[0031] Reference numerals:

[0032] Main control demonstration unit—110, non-volatile storage unit—120, core device excitation unit—130, core device unit—140, storage control unit—150. DETAILED DESCRIPTION

[0033] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0034] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0035] In an exemplary embodiment, Figure 1 As shown, a demonstration system of a non-volatile magnetic random access memory core device and chip is provided, including a non-volatile storage unit 120, a main control demonstration unit 110, a core device excitation unit 130 and a core device unit 140. The non-volatile storage unit 120 is composed of the core device unit 140. The core device unit 140 and the core device excitation unit 130 are connected to the ground to protect the core device unit 140 and the core device excitation unit 130. Each unit is detachably spliced ​​through a wiring terminal and a data line.

[0036] The non-volatile storage unit 120 is used to store the initial information input by the main control demonstration unit 110 .

[0037] The master control demonstration unit 110 is used to input initial information; the master control demonstration unit 110 is also used to read the initial information on the non-volatile storage unit 120 and display the initial information.

[0038] The main control demonstration unit 110 is also used to: obtain the initial information stored in the non-volatile storage unit 120; process the initial information to obtain target data; and draw a timing diagram based on the target data to demonstrate the read and write status of the non-volatile storage unit 120.

[0039] In terms of processing the initial information to obtain target data, the main control demonstration unit 110 is also used to: perform base conversion on the initial information to obtain binary data; and copy each bit of the binary data to obtain target data.

[0040] The demonstration system of the non-volatile magnetic random access memory core device and chip also includes a storage control unit 150; the storage control unit 150 is connected to the non-volatile storage unit 120 and the main control demonstration unit 110 through a serial port; the storage control unit 150 is used to: write the initial information input by the main control demonstration unit 110 into the non-volatile storage unit 120; the storage control unit 150 is also used to: receive a read instruction from the main control demonstration unit 110, read the initial information stored in the non-volatile storage unit 120, and send it to the main control demonstration unit 110.

[0041] When writing information, the storage control unit 150 first inputs a piece of initial information to the main control demonstration unit 110, and the main control demonstration unit 110 sends the initial information to the storage control unit 150 through the serial port, and the storage control unit 150 transmits the digital signal corresponding to the initial information to the non-volatile storage unit 120 to realize the writing of information; when reading information, the main control demonstration unit 110 sends a read instruction to the storage control unit 150, and the storage control unit 150 reads the initial information content in the non-volatile storage unit 120 and sends it to the main control demonstration unit 110 through the serial port, and demonstrates the read and write functions of the non-volatile storage unit 120 on the main control demonstration unit 110.

[0042] In this embodiment, an STM32F103 microcontroller is used as a storage control unit, and an MRAM chip is integrated as a non-volatile storage unit 120. The MRAM chip and its pins use an SPI communication interface of the STM32F103 microcontroller to communicate with the non-volatile storage unit 120, and use a serial port to communicate with the main control demonstration unit 110. The non-volatile storage unit 120 is connected to the STM32F103 microcontroller through four data pins of the non-volatile storage unit 120 to realize the control of the MRAM function. The four pins are:

[0043] (1) CLK: clock line;

[0044] (2) SI / SIO[0] (Serial Input): Output from the master control demonstration unit 110 and input from the non-volatile storage unit 120, which is a one-way transmission;

[0045] (3) SO / SIO[1] (Serial Output): Input from the master control presentation unit 110 and output from the non-volatile storage unit 120, which is a one-way transmission;

[0046] (4) CE (chip select signal): chip select signal, used by the master chip to select the slave chip.

[0047] According to a specific embodiment of the present application, the function of drawing the timing diagram in the present application can be realized by the following steps: when the non-volatile storage unit 120 is written with information, the initial information will be stored in the non-volatile storage unit 120. When drawing the timing diagram, the initial information stored in the non-volatile storage unit 120 is transmitted from the non-volatile storage unit 120 to the main control demonstration unit 110 through the communication interface between the non-volatile storage unit 120 and the storage control unit 150, and the serial port connecting the storage control unit 150 and the main control demonstration unit 110.

[0048] At this time, the main control demonstration unit 110 obtains the data stored in the non-volatile storage unit 120, and after obtaining the initial information, analyzes and extracts the initial information, and then performs base conversion on the initial information, that is, converts the initial information from hexadecimal to binary, and doubles each bit of the converted binary data (for example, 01101001 becomes 0011110011000011), and converts it into the target data required for drawing the timing of the four pins when the MRAM is stored, and finally realizes the drawing of the timing diagram of each of the four pins when the MRAM is in the read and write state.

[0049] The core device excitation unit 130 is communicatively connected with the main control demonstration unit 110, and is used for receiving control instructions of the main control demonstration unit 110, generating an excitation signal, and stimulating the core device unit 140 through the excitation signal to change the magnetic moment direction of the core device unit 140 and generate a signal change, thereby obtaining a generated signal of the core device unit 140, and feeding back the generated signal to the main control demonstration unit 110, so as to realize the demonstration of the core device storage principle of the non-volatile storage unit 120.

[0050] The core device excitation unit 130 is formed by connecting a hardware drive mainboard and a single-chip control board. The hardware drive mainboard and the single-chip control board are connected using a 2.54mm pitch double-row pin. The hardware drive mainboard itself is powered by a 9V power supply, and the demonstration system of the non-volatile magnetic random access memory core device and chip also includes an external power supply; the external power supply is connected to the hardware drive mainboard to provide a voltage signal to the hardware drive mainboard. The high voltage of the drive part is powered by an independent positive and negative power supply, and the external power supply range is 0.1V~100V, preferably 50V.

[0051] The hardware drive mainboard is used to: convert the voltage signal provided by the external power supply into a pulse current signal, and apply the pulse current signal and the measurement current to the core device unit 140 to drive the magnetic moment of the core device unit 140 to flip, and collect the generated signal generated at both ends of the core device unit 140; the pulse current signal has a value range of -100mA to 100mA, preferably -40mA to 40mA, the pulse current is adjustable, the pulse width range is 1μs to 1ms, and the measurement current has a value range of 0.001mA to 10mA.

[0052] The hardware driver mainboard is integrated with a magnet that can apply a magnetic field of about 100 Oe, and the magnet is used to assist the core device unit 140 to achieve magnetic moment reversal. The single-chip control board is used to feed back the generated signal to the main control demonstration unit 110.

[0053] The core device unit 140 may be an anomalous Hall device or a magnetoresistive device. The magnetoresistive device includes a magnetic tunnel junction (MTJ) device or a giant magnetoresistance (GMR) device.

[0054] (1) Abnormal Hall Device

[0055] like Figure 2As shown, the anomalous Hall device includes a substrate, a spin current generating source layer, a metal layer, a magnetic layer, a non-magnetic layer and a covering layer from bottom to top. The substrate is in a square shape, and the spin current generating source layer, the metal layer, the magnetic layer, the non-magnetic layer and the covering layer are in a cross shape.

[0056] The material of the substrate includes, but is not limited to, thermally oxidized Si substrate (SiO2), sapphire substrate (Al2O3), flexible materials, two-dimensional materials, etc.

[0057] The function of the spin current generating layer is to generate a driving torque for driving the magnetic moment above to flip. The material of the spin current generating layer can be W, and the thickness is 6nm.

[0058] The non-magnetic layer uses non-magnetic thin film materials, including but not limited to oxide insulators such as MgO, Al2O3, AlN, NiO, MgAl2O4 and metals and alloy materials such as Cu, Al, Ag. The thickness of the non-magnetic layer along the z-axis direction is 0.7nm to 10nm, and the two materials can be the same or different.

[0059] The magnetic layer is a magnetic thin film material, including but not limited to metals or alloys such as Fe, Co, Ni, CoFeB, NiFe, CoFe, CoPt, CoNi, and multilayer films thereof. The thickness of the magnetic layer along the Z-axis direction is 0.3nm to 10nm, wherein the preferred range is 0.5 to 2nm, in order to produce better perpendicular magnetic anisotropy. The magnetic layer can have in-plane magnetic anisotropy, perpendicular magnetic anisotropy, or anisotropy between the two.

[0060] The metal layer and the magnetic layer form an interlayer exchange coupling, and the material used for the metal layer includes but is not limited to heavy metals such as Ta, Ru, W, Pt, etc., and can also be light metal materials such as Ti, Mo, Zr, Cr, etc. The thickness of the metal layer along the z-axis direction is 0.1nm to 5nm.

[0061] The covering layer protects the Hall device from oxidation. The materials that can be used include but are not limited to oxides such as SiO2 and Al2O3 that do not react easily with air, and can also be metal materials such as Ta, Pt, W that are not easily oxidized. The thickness along the z direction is 2nm to 20nm.

[0062] In an exemplary embodiment, the structure of the Hall device used in the present application is, from bottom to top, substrate / W ​​(6 nm) / Ti (2 nm) / CoFeB (1 nm) / MgO (2 nm) / SiO2.

[0063] (2) Magnetic Tunnel Junction Devices

[0064] The structure of MTJ is a sandwich structure of ferromagnetic metal / insulator / ferromagnetic metal, which is called an inhomogeneous magnetic system.

[0065] In a specific embodiment, the MTJ device includes two ferromagnetic metal films and a non-magnetic insulating layer. The non-magnetic insulating layer is arranged between the two ferromagnetic metal films. The two ferromagnetic metal films are usually made of materials such as chromium, cobalt, nickel or iron-nickel, and the non-magnetic insulating layer in the middle is a metal oxide, commonly aluminum oxide. This structure allows the two ferromagnetic layers to exchange information through the tunneling effect.

[0066] (3) Giant magnetoresistance devices

[0067] The structure of the GMR device is mainly composed of four parts: the upper magnetic layer, the non-magnetic layer, the lower magnetic layer and the substrate. Among them, the upper magnetic layer and the lower magnetic layer will be affected by the external magnetic field to produce different magnetic moment directions. The non-magnetic layer is set between the upper magnetic layer and the lower magnetic layer, which determines the relative position of the magnetic moments of the magnetic layers on both sides, thereby controlling the resistivity of the entire device.

[0068] In this embodiment, the main control demonstration unit 110 sends instructions to the single-chip control board through the serial port, so that it controls the hardware drive mainboard to convert the high voltage provided by the external power supply from 50V into a pulse current signal of -100mA to 100mA, and applies it to the core device unit 140, driving the magnetic moment of the core device unit 140 to flip, at which time the resistance of the core device unit 140 will also change; the hardware drive mainboard will also apply a measurement current to the core device unit 140, and the hardware drive mainboard receives the voltage signal generated at both ends of the core device unit 140, and feeds it back to the main control demonstration unit 110 through the single-chip control board, thereby demonstrating the principle of MRAM storage.

[0069] Figure 3 The evaluation board curve in the middle is the final data image. A pulse current signal from 16mA to -16mA is applied. During this process, when the applied pulse current reaches about -6mA, it can be seen that the resistance of the Hall device has changed. The reason for the resistance change is that the pulse current at this time drives the magnetic moment of the Hall device to flip, causing the resistance of the Hall device to change.

[0070] Because the writing of the non-volatile memory unit 120 is realized by writing 0 and 1 according to the resistance, how to change the resistance of the Hall device is demonstrated through the core device unit 140 and the core device excitation unit 130.

[0071] Figure 3 This is only half of the entire change process. The entire change process is that the pulse current signal is first added from -16mA to 16mA, and then the pulse current is applied from 16mA to -16mA. The image of the entire change process is as follows Figure 4 As shown, Figure 4The evaluation board curve is an ideal curve, with a standard rectangle in the middle.

[0072] Compared with the prior art, the advantages of this application are:

[0073] 1. This application utilizes the information storage and reading functions of non-volatile memory. Through program design and circuit board connection, the demonstration system intuitively demonstrates the non-volatile memory information writing and reading functions, showing the advantages of high-speed writing and reading of non-volatile memory information and non-volatile data performance, and increasing the audience's understanding of the functions and related knowledge of non-volatile memory.

[0074] 2. By capturing the timing of non-volatile memory when writing and reading information, a timing demonstration of the integrated non-volatile memory was conducted. The timing diagram was used to more intuitively show the audience the internal operation process and mechanism of the non-volatile memory, which can enable college students to truly understand the advantages and operation mechanism of MRAM chips and strengthen the talent training of MRAM professionals.

[0075] 3. Based on the characteristic of MRAM that it uses the magnetic moment direction of magnetic materials to store data, this application uses core components, PCB circuit boards and single-chip microcomputers to demonstrate the physical mechanism of MRAM storage units, and demonstrates the storage mechanism of MRAM from the bottom layer, which can deepen the audience's impression and make the audience understand more deeply.

[0076] 4. The core device excitation unit of the present application is designed and manufactured by ourselves. The core device excitation unit can apply a pulse current with an amplitude range of 0-60mA to excite the core device with only one DC power supply. The accuracy of the detected voltage signal can reach 0.1mV.

[0077] 5. The present application integrates the demonstration part of the non-volatile memory device function, the drawing part of the timing diagram, and the demonstration part of the core device storage principle on one interface, constructing a complete machine, sharing a microprocessor and a display (the microprocessor and the display constitute the main control demonstration unit), making the entire operation process simpler and more convenient, and the demonstration more logical and intuitive.

[0078] This application proposes a teaching demonstration system based on MRAM chip to demonstrate the working principle of MRAM. The development of the teaching demonstration system will play an important role:

[0079] (1) As a new type of non-volatile memory technology, MRAM still needs to be improved in terms of market awareness and acceptance. By popularizing MRAM knowledge in colleges and universities, students can understand the advantages and application prospects of this technology, which is conducive to cultivating more comprehensive talents in colleges and universities, filling the gap in talent training in MRAM-related fields in colleges and universities, cultivating reserve talents for MRAM chip companies, and helping MRAM companies attract more outstanding talents with relevant knowledge and skills, injecting fresh blood and innovative power into the company's development.

[0080] (2) Current university undergraduates and postgraduates will be the entrepreneurs, managers, technical leaders and backbones of the future science and technology industry. By popularizing MRAM knowledge in colleges and universities, students can understand and master MRAM technology and advantages. When they enter their respective fields in the future, it will help them promote and apply MRAM technology in their respective fields, which will further broaden the potential market of MRAM, including but not limited to high-performance computing, embedded systems, data centers, the Internet of Things and other fields. It will significantly increase the output value and revenue of MRAM companies and promote the sustainable development of MRAM companies.

[0081] (3) By popularizing the relevant knowledge of MRAM in colleges and universities, the whole society can be encouraged to pay attention to and recognize MRAM technology. For MRAM companies, this is undoubtedly an effective means of market expansion and brand promotion to increase brand awareness and influence. It is also an important development opportunity that will promote the company's in-depth integration and technical cooperation with more colleges and universities, enhance the company's innovation capabilities, and promote the rapid development and commercial application of MRAM technology.

[0082] In summary, proposing an MRAM demonstration system and popularizing MRAM-related knowledge is of strategic significance to the development of the MRAM industry and will lay a solid foundation for the overall layout of MRAM companies.

[0083] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0084] This article uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for those skilled in the art, according to the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A demonstration system for non-volatile magnetic random access memory core devices and chips, characterized in that: The demonstration system of the non-volatile magnetic random access memory core device and chip comprises a non-volatile storage unit, a main control demonstration unit, a core device excitation unit and a core device unit; the non-volatile storage unit is composed of the core device unit; Wherein, the non-volatile storage unit is used to store the initial information input by the main control demonstration unit; The main control demonstration unit is used to input initial information; the main control demonstration unit is also used to read the initial information on the non-volatile storage unit and display the initial information; The main control demonstration unit is further used to: obtain the initial information stored in the non-volatile storage unit; process the initial information to obtain target data; draw a timing diagram based on the target data to demonstrate the read and write status of the non-volatile storage unit; The core device excitation unit is communicatively connected with the main control demonstration unit, and is used to receive control instructions from the main control demonstration unit, generate an excitation signal, and excite the core device unit through the excitation signal to change the magnetic moment direction of the core device unit and generate a signal change, thereby obtaining a generated signal of the core device unit, and feeding the generated signal back to the main control demonstration unit to realize a demonstration of the core device storage principle of the non-volatile storage unit.

2. The demonstration system of the non-volatile magnetic random access memory core device and chip according to claim 1, characterized in that: The demonstration system of the non-volatile magnetic random access memory core device and chip also includes a storage control unit; the storage control unit is connected to the non-volatile storage unit and the main control demonstration unit through a serial port; the storage control unit is used to: write the initial information input by the main control demonstration unit into the non-volatile storage unit; the storage control unit is also used to: receive a read instruction from the main control demonstration unit, read the initial information stored in the non-volatile storage unit, and send it to the main control demonstration unit.

3. The demonstration system of the non-volatile magnetic random access memory core device and chip according to claim 1, characterized in that: The demonstration system of the non-volatile magnetic random access memory core device and chip also includes an external power supply; the external power supply is connected to the hardware drive mainboard and is used to provide a voltage signal for the hardware drive mainboard.

4. The demonstration system of the non-volatile magnetic random access memory core device and chip according to claim 3, characterized in that: The core device excitation unit is formed by connecting a hardware drive mainboard and a single-chip microcomputer control board; The hardware driving mainboard is used to: convert the voltage signal provided by the external power supply into a pulse current signal, and apply the pulse current signal and the measuring current to the core device unit to drive the magnetic moment of the core device unit to flip, and collect the generated signals generated at both ends of the core device unit; The hardware drive mainboard is integrated with a magnet, and the magnet is used to assist the core device unit in realizing magnetic moment reversal; The single chip control board is used to feed back the generated signal to the main control demonstration unit.

5. The demonstration system of the non-volatile magnetic random access memory core device and chip according to claim 3, characterized in that: The external power supply has a voltage range of 0.1V to 100V.

6. The demonstration system of the non-volatile magnetic random access memory core device and chip according to claim 4, characterized in that: The pulse current signal has a value range of -100mA to 100mA.

7. The demonstration system of the non-volatile magnetic random access memory core device and chip according to claim 4, characterized in that: The measurement current has a value range of 0.001 mA to 10 mA.

8. The demonstration system of the non-volatile magnetic random access memory core device and chip according to claim 4, characterized in that: The hardware drive mainboard and the single-chip microcomputer control board are connected using a 2.54mm pitch double-row pin.

9. The demonstration system of non-volatile magnetic random access memory core device and chip according to claim 1, characterized in that: In processing the initial information to obtain target data, the main control demonstration unit is also used to: Performing base conversion on the initial information to obtain binary data; Each bit of the binary data is encoded and copied to obtain target data.

10. The demonstration system of non-volatile magnetic random access memory core device and chip according to claim 1, characterized in that: The core device unit and the core device excitation unit are connected to the ground.

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