Method and system for realizing miniature intelligent power distribution module based on FPGA (Field Programmable Gate Array)

Abstract

The invention relates to the technical field of intelligent power distribution, in particular to a method and a system for realizing a micro intelligent power distribution module based on an FPGA (Field Programmable Gate Array). The system comprises a first digital isolation type modulator, a second digital isolation type modulator, a first isolation driving circuit, a second isolation driving circuit, a power circuit and an FPGA processor, and the power circuit is used for receiving a bus connection instruction and outputting current and voltage; the second isolation driving circuit is used for triggering a connection instruction and transmitting an mos contact signal; the FPGA processor is used for receiving mos contact signals and outputting the signals; the first isolation driving circuit is used for transmitting mos control and contact connection states of the FPGA processor; according to the method, the system optimization electrical architecture of the miniature intelligent power distribution module is realized based on the FPGA, intelligent power distribution is carried out, through the mode, the interference capability, the real-time performance and the reliability are improved, and the requirements of a miniature high-integration electrical system can be met.

Description

Technical Field

[0001] The present invention relates to the field of intelligent power distribution technology, and in particular to a method and system for realizing a micro-sized intelligent power distribution module based on FPGA. Background Art

[0002] A multi-electric aircraft is an aircraft in which most of the secondary energy sources such as air pressure energy, hydraulic energy and mechanical energy are replaced by electric energy; a fully electric aircraft is an aircraft in which all the secondary energy in the aircraft is unified into electric energy; and an electrified aircraft is an aircraft in which both the primary energy and secondary energy are replaced by electric energy. Due to the advantages of electric energy in terms of conversion efficiency, control robustness and reliability, aircraft use electric energy as the basic energy source, and through the transmission, conversion and control of electric energy, it is converted into various forms of energy required by the aircraft and acts on various systems, which can achieve a comprehensive improvement in the overall performance of the aircraft.

[0003] With the development of microelectronics, materials, computer control and other technologies, multi-electrification, full electrification and even electrification have become the main development trends of the secondary energy system of the new generation of aircraft. The energy density of its distributed power distribution system management is increasing day by day, and the requirements for high integration, miniaturization, intelligence and anti-interference of the power distribution module are constantly improving. The power distribution module SSPC implemented by the traditional microcontroller has large size, heavy weight, program failure, sarADC for analog acquisition, poor interference ability, a large number of digital and circuit filtering, long short-circuit protection detection time, and weak real-time control. The demand can no longer meet the requirements of miniaturized and highly integrated electrical systems.

[0004] In summary, it is very necessary to propose a method and system for realizing a micro-intelligent power distribution module based on FPGA, which has strong interference capability, real-time performance, and reliability and meets the requirements of miniaturized and highly integrated electrical systems. Summary of the invention

[0005] The purpose of the present invention is to provide a method and system for realizing a micro-intelligent power distribution module based on FPGA, aiming to solve the technical problem that the power distribution module realized by the traditional microcontroller in the prior art cannot meet the requirements of miniaturized highly integrated electrical systems.

[0006] To achieve the above-mentioned purpose, the present invention adopts a system for implementing a micro-sized intelligent power distribution module based on FPGA, comprising a first digital isolated modulator, a second digital isolated modulator, a first isolated drive circuit, a second isolated drive circuit, a power circuit and an FPGA processor, wherein the first digital isolated modulator and the second digital isolated modulator are respectively connected to the FPGA processor, the power circuit is respectively connected to the first digital isolated modulator and the second digital isolated modulator, the first isolated drive circuit is respectively connected to the FPGA processor and the power circuit, and the second isolated drive circuit is respectively connected to the FPGA processor and the power circuit;

[0007] The power circuit is used to receive a bus connection instruction and output current and voltage;

[0008] The second isolation drive circuit is used to trigger the switch-on instruction and transmit the MOS contact signal;

[0009] The first digital isolated modulator is used to modulate the voltage analog signal into a voltage digital signal;

[0010] The second digital isolated modulator is used to modulate the current analog signal into a current digital signal;

[0011] The FPGA processor is used to receive MOS contact signals and output connection, overcurrent trip, and short circuit trip signals;

[0012] The first isolation driving circuit is used to transmit the MOS control and contact connection status of the FPGA processor.

[0013] The FPGA processor includes a digital filter module, a communication management module, a parameter management module, an SSPC algorithm module, a short circuit protection module, a bus driver module, a control state module, a switch quantity detection module and an IO output module;

[0014] The digital filtering module is used to perform analog modulation conversion on the first digital isolated modulator and the second digital isolated modulator respectively;

[0015] The communication management module is used to receive and analyze communication data and upload status data according to external communication protocol rules;

[0016] The SSPC algorithm module is used to implement the I2T inverse time protection curve logic in the form of a digital circuit and output an overcurrent protection flag;

[0017] The parameter management module is used to maintain the operating parameters of the SSPC algorithm module;

[0018] The short-circuit protection module is used to compare and detect the input power current, use digital hysteresis logic, output a short-circuit protection signal, and shut down the control;

[0019] The bus driver module is used to perform communication bus control logic;

[0020] The control state module is used to receive overcurrent and short-circuit protection signals, bus instructions, and discrete input instructions, control the on and off functions of the MOS drive signal, and collect MOS contact signals at the same time, and upload the power circuit MOS control and contact on state through the bus;

[0021] The switch detection module is used for external input discrete instructions, signal filtering detection, and controlling the on and off of the SSPC algorithm module;

[0022] The IO output module is used to output connection, overcurrent tripping and short circuit tripping signals according to the signal indication of the current working status of the parameter management module.

[0023] Wherein, the system for realizing a micro-sized intelligent power distribution module based on FPGA further comprises a bus isolation interface, and the bus isolation interface is connected to the FPGA processor;

[0024] The bus isolation interface is used for conversion and isolation with FPGA digital signals.

[0025] Wherein, the system for realizing a micro-sized intelligent power distribution module based on FPGA further comprises a power isolation circuit, and the power isolation circuit is connected to the FPGA processor;

[0026] The power isolation circuit is used to input external power and isolate and convert it into power supply inside the FPGA processor.

[0027] Wherein, the system for implementing a micro-sized intelligent power distribution module based on FPGA further comprises a first conditioning circuit, and the first conditioning circuit is connected to the switch quantity detection module;

[0028] The system for implementing a micro-sized intelligent power distribution module based on FPGA also includes a second conditioning circuit, which is connected to the IO output module.

[0029] Wherein, the first conditioning circuit is used to convert the external input discrete signal into a digital signal and transmit it to the switch quantity detection module;

[0030] The second conditioning circuit is used to convert the digital signal output by the IO output module into a discrete signal and output it.

[0031] The present invention also provides a method for implementing a micro-sized intelligent power distribution module based on FPGA, and uses the method for implementing a micro-sized intelligent power distribution module based on FPGA to optimize the electrical architecture of the system and perform intelligent power distribution.

[0032] The present invention provides a method and system for implementing a micro-intelligent power distribution module based on FPGA, wherein the power circuit is used to receive a bus connection instruction and output current and voltage; the second isolation drive circuit is used to trigger the connection instruction and transmit a MOS contact signal; the first digital isolation modulator is used to modulate a voltage analog signal into a voltage digital signal; the second digital isolation modulator is used to modulate a current analog signal into a current digital signal; the FPGA processor is used to receive a MOS contact signal and output a connection, overcurrent trip, and short-circuit trip signal; the first isolation drive circuit is used to transmit the MOS control and contact connection status of the FPGA processor; the system for implementing a micro-intelligent power distribution module based on FPGA is used to optimize the electrical architecture and perform intelligent power distribution, thereby obtaining the effects of improving interference capability, real-time performance, and reliability, and being able to meet the requirements of a miniaturized and highly integrated electrical system. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0034] Figure 1 It is a schematic diagram of the principle of a system for realizing a micro-intelligent power distribution module based on FPGA of the present invention.

[0035] 110-first digital isolated modulator, 120-second digital isolated modulator, 130-first isolation drive circuit, 140-second isolation drive circuit, 150-power circuit, 160-FPGA processor, 161-digital filter module, 162-communication management module, 163-parameter management module, 164-SSPC algorithm module, 165-short circuit protection module, 166-bus drive module, 167-control state module, 168-switch quantity detection module, 169-IO output module, 170-bus isolation interface, 180-power isolation circuit, 190-first conditioning circuit, 200-second conditioning circuit. DETAILED DESCRIPTION

[0036] See also Figure 1 ,in Figure 1 It is a schematic diagram of the principle of a system for realizing a micro-intelligent power distribution module based on FPGA.

[0037] The present invention provides a system for implementing a micro-sized intelligent power distribution module based on FPGA, comprising a first digital isolated modulator 110, a second digital isolated modulator 120, a first isolated drive circuit 130, a second isolated drive circuit 140, a power circuit 150 and an FPGA processor 160, wherein the first digital isolated modulator 110 and the second digital isolated modulator 120 are respectively connected to the FPGA processor 160, the power circuit 150 is respectively connected to the first digital isolated modulator 110 and the second digital isolated modulator 120, the first isolated drive circuit 130 is respectively connected to the FPGA processor 160 and the power circuit 150, and the second isolated drive circuit 140 is respectively connected to the FPGA processor 160 and the power circuit 150;

[0038] The power circuit 150 is used to receive a bus connection instruction and output current and voltage;

[0039] The second isolation driving circuit 140 is used to trigger the switch-on instruction and transmit the MOS contact signal;

[0040] The first digital isolated modulator 110 is used to modulate the voltage analog signal into a voltage digital signal;

[0041] The second digital isolated modulator 120 is used to modulate the current analog signal into a current digital signal;

[0042] The FPGA processor 160 is used to receive MOS contact signals and output connection, over-current trip, and short-circuit trip signals;

[0043] The first isolation driving circuit 130 is used to transmit the MOS control and contact connection status of the FPGA processor 160.

[0044] In this embodiment, the power circuit 150 is used to receive the bus connection instruction and output current and voltage; the second isolation drive circuit 140 triggers the connection instruction and transmits the MOS contact signal; the first digital isolation modulator 110 modulates the voltage analog signal into a voltage digital signal; the second digital isolation modulator 120 modulates the current analog signal into a current digital signal; the FPGA processor 160 receives the MOS contact signal and outputs the connection, overcurrent tripping, and short circuit tripping signals; the first isolation drive circuit 130 transmits the MOS control and contact connection state of the FPGA processor 160; the micro-sized FPGA processor 160 is used as the main control chip, and the first digital isolation modulator 110 and the second digital isolation modulator 120 use the sinc digital filtering technology based on the isolated Δ-Σ modulator to achieve high signal-to-noise ratio, high bandwidth, and power circuit 150 analog signal voltage and current detection; the effect of improving interference capability, real-time performance, and reliability is obtained, which can meet the requirements of miniaturized high-integration electrical systems. The above structure can also be expanded to large-scale FPGA and large SSPC architectures.

[0045] Further, the FPGA processor 160 includes a digital filtering module 161, a communication management module 162, a parameter management module 163, an SSPC algorithm module 164, a short circuit protection module 165, a bus driver module 166, a control state module 167, a switch detection module 168 and an IO output module 169;

[0046] The digital filtering module 161 is used to perform analog modulation conversion on the first digital isolated modulator 110 and the second digital isolated modulator 120 respectively;

[0047] The communication management module 162 is used to receive and analyze communication data and upload status data according to external communication protocol rules;

[0048] The SSPC algorithm module 164 is used to implement the I2T inverse time protection curve logic in the form of a digital circuit and output an overcurrent protection flag;

[0049] The parameter management module 163 is used to maintain the operating parameters of the SSPC algorithm module 164;

[0050] The short-circuit protection module 165 is used to compare and detect the input power current, use digital hysteresis logic, output a short-circuit protection signal, and shut down the control;

[0051] The bus driver module 166 is used to perform communication bus control logic;

[0052] The control state module 167 is used to receive overcurrent and short-circuit protection signals, bus instructions, and discrete input instructions, control the on and off functions of the MOS drive signal, and collect MOS contact signals at the same time, and upload the power circuit 150 MOS control and contact on state through the bus;

[0053] The switch detection module 168 is used for external input discrete instructions, signal filtering detection, and controlling the on and off of the SSPC algorithm module 164;

[0054] The IO output module 169 is used to output a connection, overcurrent trip, or short circuit trip signal according to the signal indication of the current working state of the parameter management module 163 .

[0055] In this embodiment, the digital filtering module 161 is used to perform analog modulation conversion on the first digital isolated modulator 110 and the second digital isolated modulator 120 respectively; the communication management module 162 receives and analyzes the communication data and uploads the status data according to the external communication protocol rules; the SSPC algorithm module 164 implements the I2T inverse time protection curve logic in the form of a digital circuit, and outputs an overcurrent protection flag, which can be expanded to other capacity FPGA implementations; the parameter management module 163 maintains the operating parameters of the SSPC algorithm module 164; the short-circuit protection module 165 compares and detects the input power current, and uses digital hysteresis logic to perform The short-circuit protection signal is output and the shutdown control is performed; the bus driver module 166 performs the communication bus control logic; the control state module 167 receives the overcurrent and short-circuit protection signals, bus instructions, and discrete input instructions, controls the on and off functions of the MOS drive signal, and collects the MOS contact signal at the same time, and uploads the power circuit 150MOS control and the contact on state through the bus; the switch quantity detection module 168 receives the discrete instructions input to the outside, performs signal filtering detection, and controls the on and off of the SSPC algorithm module 164; the IO output module 169 outputs the on, overcurrent trip, and short-circuit trip signals according to the signal indication of the current working status of the parameter management module 163.

[0056] Furthermore, the system for implementing a micro-sized intelligent power distribution module based on FPGA further includes a bus isolation interface 170, and the bus isolation interface 170 is connected to the FPGA processor 160;

[0057] The bus isolation interface 170 is used for conversion and isolation with FPGA digital signals.

[0058] In this implementation, the bus isolation interface 170 is used to perform conversion isolation with the FPGA digital signal.

[0059] Furthermore, the system for implementing a micro-sized intelligent power distribution module based on FPGA further includes a power isolation circuit 180, and the power isolation circuit 180 is connected to the FPGA processor 160;

[0060] The power isolation circuit 180 is used to input an external power supply and isolate and convert it into a power supply inside the FPGA processor 160 .

[0061] In this embodiment, the power isolation circuit 180 is used to input an external power supply, and isolate and convert it into a power supply inside the FPGA processor 160 .

[0062] Furthermore, the system for implementing a micro-sized intelligent power distribution module based on FPGA further includes a first conditioning circuit 190, and the first conditioning circuit 190 is connected to the switch quantity detection module 168;

[0063] The system for implementing a micro-intelligent power distribution module based on FPGA also includes a second conditioning circuit 200 , and the second conditioning circuit 200 is connected to the IO output module 169 .

[0064] Furthermore, the first conditioning circuit 190 is used to convert the external input discrete signal into a digital signal and transmit it to the switch value detection module 168;

[0065] The second conditioning circuit 200 is used to convert the digital signal output by the IO output module 169 into a discrete signal and output it.

[0066] In this embodiment, the first conditioning circuit 190 is used to convert the external discrete signal into a digital signal and transmit it to the switch quantity detection module 168; the second conditioning circuit 200 converts the digital signal output by the IO output module 169 into a discrete signal and outputs it.

[0067] The present invention also provides a method for implementing a micro-sized intelligent power distribution module based on FPGA, and uses the system for implementing a micro-sized intelligent power distribution module based on FPGA to optimize the electrical architecture and perform intelligent power distribution.

[0068] In this embodiment, the power circuit 150 is used to receive the bus connection instruction and output current and voltage; the second isolation drive circuit 140 is used to trigger the connection instruction and transmit the MOS contact signal; the first digital isolation modulator 110 is used to modulate the voltage analog signal into a voltage digital signal; the second digital isolation modulator 120 is used to modulate the current analog signal into a current digital signal; the FPGA processor 160 is used to receive the MOS contact signal and output the connection, overcurrent tripping and short circuit tripping signals; the first isolation drive circuit 130 is used to transmit the MOS control and contact connection status of the FPGA processor 160; the system based on FPGA to implement micro-intelligent power distribution module is used to optimize the electrical architecture and perform intelligent power distribution, so as to improve the interference capability, real-time performance and reliability, and meet the requirements of miniaturized highly integrated electrical systems.

[0069] What is disclosed above is only a preferred embodiment of the present invention, and it certainly cannot be used to limit the scope of rights of the present invention. Ordinary technicians in this field can understand that all or part of the processes of the above embodiment and equivalent changes made according to the claims of the present invention still fall within the scope of the invention.

Claims

1. A system for realizing a micro-sized intelligent power distribution module based on FPGA, characterized in that: The invention comprises a first digital isolated modulator, a second digital isolated modulator, a first isolated driving circuit, a second isolated driving circuit, a power circuit and an FPGA processor, wherein the first digital isolated modulator and the second digital isolated modulator are respectively connected to the FPGA processor, the power circuit is respectively connected to the first digital isolated modulator and the second digital isolated modulator, the first isolated driving circuit is respectively connected to the FPGA processor and the power circuit, and the second isolated driving circuit is respectively connected to the FPGA processor and the power circuit; The power circuit is used to receive a bus connection instruction and output current and voltage; The second isolation drive circuit is used to trigger the switch-on instruction and transmit the MOS contact signal; The first digital isolated modulator is used to modulate the voltage analog signal into a voltage digital signal; The second digital isolated modulator is used to modulate the current analog signal into a current digital signal; The FPGA processor is used to receive MOS contact signals and output connection, overcurrent trip, and short circuit trip signals; The first isolation driving circuit is used to transmit the MOS control and contact connection status of the FPGA processor.

2. The system for realizing a micro-sized intelligent power distribution module based on FPGA as claimed in claim 1, characterized in that: The FPGA processor includes a digital filtering module, a communication management module, a parameter management module, an SSPC algorithm module, a short circuit protection module, a bus drive module, a control state module, a switch quantity detection module and an IO output module; The digital filtering module is used to perform analog modulation conversion on the first digital isolated modulator and the second digital isolated modulator respectively; The communication management module is used to receive and analyze communication data and upload status data according to external communication protocol rules; The SSPC algorithm module is used to implement the I2T inverse time protection curve logic in the form of a digital circuit and output an overcurrent protection flag; The parameter management module is used to maintain the operating parameters of the SSPC algorithm module; The short-circuit protection module is used to compare and detect the input power current, use digital hysteresis logic, output a short-circuit protection signal, and shut down the control; The bus driver module is used to perform communication bus control logic; The control state module is used to receive overcurrent and short-circuit protection signals, bus instructions, and discrete input instructions, control the on and off functions of the MOS drive signal, and collect MOS contact signals at the same time, and upload the power circuit MOS control and contact on state through the bus; The switch detection module is used for external input discrete instructions, signal filtering detection, and controlling the on and off of the SSPC algorithm module; The IO output module is used to output connection, overcurrent tripping and short circuit tripping signals according to the signal indication of the current working status of the parameter management module.

3. The system for implementing a micro-sized intelligent power distribution module based on FPGA as claimed in claim 1, characterized in that: The system for implementing a micro-sized intelligent power distribution module based on FPGA also includes a bus isolation interface, which is connected to the FPGA processor; The bus isolation interface is used for conversion and isolation with FPGA digital signals.

4. The system for realizing a micro-sized intelligent power distribution module based on FPGA as claimed in claim 1, characterized in that: The system for implementing a micro-sized intelligent power distribution module based on FPGA also includes a power isolation circuit, which is connected to the FPGA processor; The power isolation circuit is used to input external power and isolate and convert it into power supply inside the FPGA processor.

5. The system for implementing a micro-sized intelligent power distribution module based on FPGA as claimed in claim 2, characterized in that: The system for implementing a micro-sized intelligent power distribution module based on FPGA further includes a first conditioning circuit, which is connected to the switch quantity detection module; The system for implementing a micro-sized intelligent power distribution module based on FPGA also includes a second conditioning circuit, which is connected to the IO output module.

6. The system for implementing a micro-sized intelligent power distribution module based on FPGA as claimed in claim 5, characterized in that: The first conditioning circuit is used to convert the external input discrete signal into a digital signal and transmit it to the switch quantity detection module; The second conditioning circuit is used to convert the digital signal output by the IO output module into a discrete signal and output it.

7. A method for realizing a micro-sized intelligent power distribution module based on FPGA, using the system for realizing a micro-sized intelligent power distribution module based on FPGA as claimed in claim 1, characterized in that: The system optimization electrical architecture of the micro-intelligent power distribution module based on FPGA is applied to perform intelligent power distribution.

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