22-74GHz low noise amplifier chip applied to 5G NR

Abstract

The invention discloses a 22-74GHz low noise amplifier chip applied to 5G NR, which comprises four modules, namely an input matching network, a broadband input amplification stage, a broadband output amplification stage and an output matching network, the four modules are connected in sequence, and a signal enters from the input end of the input matching network and is output from the output end of the output matching network. A shunt feedback technology is introduced into the circuit, and low-frequency bandwidth expansion is enhanced by adding a feedback resistor and a capacitor; a double-induction peak value technology is introduced, and inductors are added to a base electrode and a collector electrode of a transistor, so that gain is increased, and noise performance is improved; a resonant feedback compensation equalization technology is introduced, and a resonant feedback inductor and a capacitor are added to compensate high-frequency gain, so that the bandwidth is further expanded. According to the technology, the complexity of the circuit is reduced, the bandwidth is expanded, the chip area is reduced, and great practical significance is achieved.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency integrated circuit technology, and in particular to a 22-74 GHz low noise amplifier chip applied to 5G NR (new radio). Background Art

[0002] In order to meet the exponentially growing data traffic between a large number of devices, millimeter wave communication has become an indispensable part of the next generation network. At present, 24.25GHz-27.5GHz, 37GHz-43.5GHz, and 66GHz-71 GHz are used for the future development of 5G and international mobile communication systems worldwide. In order to achieve global applications and cross-standard communications, user equipment in 5G millimeter wave communication networks needs to have multi-band compatibility. Therefore, ultra-wideband low-noise amplifiers have broad application prospects as key circuit modules in the receiving link of 5G communication systems.

[0003] Traditional low-noise amplifiers are subject to various factors such as the high-frequency characteristics of silicon-based transistors, parasitic effects of passive devices, eddy current effects, and skin effects. In the millimeter-wave domain with high leakage, high loss, and strong mutual coupling, it is challenging to achieve broadband coverage of tens of gigahertz, and there are problems such as narrow bandwidth and large area. Therefore, the performance of low-noise amplifiers based on silicon-based processes needs to be further improved to meet the needs of the new generation of millimeter-wave communication networks. Summary of the invention

[0004] The purpose of the present invention is to overcome the defects of the above-mentioned prior art and propose a 22-74 GHz low noise amplifier chip for 5G NR.

[0005] To achieve the purpose of the present invention, the technical solution provided by the present invention is specifically as follows:

[0006] A 22-74 GHz low noise amplifier chip applied to 5G NR, comprising four modules: an input matching network, a broadband input amplifier stage, a broadband output amplifier stage and an output matching network, wherein the four modules are connected in sequence, a signal enters from an input end of the input matching network, and is output from an output end of the output matching network;

[0007] The input matching network includes capacitors C1, C2 and inductor L1; one end of the capacitor C1 is grounded, and the other end is connected to the signal input port; one end of the inductor L1 is connected to the input stage of the broadband input amplifier and connected in parallel with the resistor R1 connected to the bias voltage Vbias, and the other end is connected to the capacitor C2; the capacitor C2 is connected in series between the capacitor C1 and the inductor L1;

[0008] The broadband input amplifier stage includes a transistor Q1 and inductors L2, L3, L4, a feedback resistor R2, and a capacitor C3; the emitter of the transistor Q1 is grounded, the base is connected to the inductor L2, and the collector is connected to the inductor L3; the resistor R2 and the capacitor C3 are connected in series, one end of which is connected to the inductor L2, and the other end is connected to the inductor L3 to form a feedback loop; one end of the inductor L4 is connected to the connection between the capacitor C3 and the inductor L3, and the other end is connected to the power supply VDD;

[0009] The broadband output amplifier stage includes a cascode structure composed of two transistors Q2 and Q3; the base of the transistor Q2 is connected to the bias voltage Vbias through the resistor R3, the emitter is grounded, and the collector is connected to the emitter of the transistor Q3; the base of the transistor Q3 receives the amplified signal, the collector is connected to the inductor L6 and connected to the power supply VDD through the inductor L7; the inductor L5 is connected in series with the capacitor C4, and one end is connected to the emitter of the transistor Q3, and the other end is grounded;

[0010] The output matching network includes a capacitor C5; one end of the capacitor C5 is connected to the connection point of the inductors L6 and L7, and the other end is connected to the signal output port.

[0011] Compared with the prior art, the present invention has the following beneficial effects:

[0012] Based on the above technical solutions, it can be seen that compared with the prior art, the present invention provides a 22-74 GHz low noise amplifier chip for 5G NR, which has a scientific structural design.

[0013] The shunt feedback technology is introduced into the circuit to enhance the low-frequency bandwidth expansion by adding feedback resistors and capacitors; the dual induction peak technology is introduced to increase the gain and improve the noise performance by adding inductors to the base and collector of the transistor; the resonant feedback compensation equalization technology is introduced to compensate the high-frequency gain by adding resonant feedback inductors and capacitors to further expand the bandwidth. The above technologies reduce the complexity of the circuit, expand the bandwidth, and reduce the chip area, which has great practical significance. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A circuit schematic diagram of a 22-74 GHz low noise amplifier chip for 5G NR provided in an embodiment of the present invention;

[0015] Figure 2 This is a graph showing the S-parameter test results of a 22-74 GHz low-noise amplifier chip for 5G NR provided in an embodiment of the present invention;

[0016] Figure 3 A noise simulation result diagram of a 22-74 GHz low noise amplifier chip applied to 5G NR provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0017] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0018] like Figure 1 As shown, the present embodiment provides a 22-74 GHz low noise amplifier chip for 5G NR, including four modules: an input matching network, a broadband input amplifier stage, a broadband output amplifier stage, and an output matching network, and the four modules are connected in sequence, and the signal enters from the input end of the input matching network and is output from the output end of the output matching network;

[0019] The input matching network includes capacitors C1, C2 and inductor L1; one end of the capacitor C1 is grounded, and the other end is connected to the signal input port; one end of the inductor L1 is connected to the input stage of the broadband input amplifier and connected in parallel with the resistor R1 connected to the bias voltage Vbias, and the other end is connected to the capacitor C2; the capacitor C2 is connected in series between the capacitor C1 and the inductor L1;

[0020] The broadband input amplifier stage includes a transistor Q1 and inductors L2, L3, L4, a feedback resistor R2, and a capacitor C3; the emitter of the transistor Q1 is grounded, the base is connected to the inductor L2, and the collector is connected to the inductor L3; the resistor R2 and the capacitor C3 are connected in series, one end of which is connected to the inductor L2, and the other end is connected to the inductor L3 to form a feedback loop; one end of the inductor L4 is connected to the connection between the capacitor C3 and the inductor L3, and the other end is connected to the power supply VDD;

[0021] The broadband output amplifier stage includes a cascode structure composed of two transistors Q2 and Q3; the base of the transistor Q2 is connected to the bias voltage Vbias through the resistor R3, the emitter is grounded, and the collector is connected to the emitter of the transistor Q3; the base of the transistor Q3 receives the amplified signal, the collector is connected to the inductor L6 and connected to the power supply VDD through the inductor L7; the inductor L5 is connected in series with the capacitor C4, and one end is connected to the emitter of the transistor Q3, and the other end is grounded;

[0022] The output matching network includes a capacitor C5; one end of the capacitor C5 is connected to the connection point of the inductors L6 and L7, and the other end is connected to the signal output port.

[0023] like Figure 2 As shown, the gain characteristics of this embodiment are demonstrated, from which it can be seen that the amplifier achieves a 3-dB gain bandwidth of 22 to 74 GHz and a maximum gain of 15.2 dB, covering multiple 5G millimeter wave frequency bands, which proves the feasibility of the matching network proposed in the present invention.

[0024] like Figure 3 As shown, the post-simulation noise figure of the circuit is shown. In the range of 22 to 74 GHz, the noise figure is less than 4.4 dB.

[0025] It can be seen that the present invention can realize the design of an ultra-wideband low-noise amplifier chip applied to 5G NR. Compared with the traditional broadband millimeter-wave low-noise amplifier, the low-noise amplifier provided by the present invention has a wider operating bandwidth, a lower noise figure, and a smaller layout area.

[0026] The optional implementation modes of the embodiments of the present invention are described in detail above in conjunction with the accompanying drawings. However, the embodiments of the present invention are not limited to the specific details in the above implementation modes. Within the technical concept of the embodiments of the present invention, various simple modifications can be made to the technical scheme of the embodiments of the present invention, and these simple modifications all belong to the protection scope of the embodiments of the present invention.

Claims

1. A 22-74 GHz low noise amplifier chip for 5G NR, characterized in that: It includes four modules: an input matching network, a broadband input amplifier stage, a broadband output amplifier stage and an output matching network, and the four modules are connected in sequence, and the signal enters from the input end of the input matching network and is output from the output end of the output matching network; The input matching network includes capacitors C1, C2 and inductor L1; one end of the capacitor C1 is grounded, and the other end is connected to the signal input port; one end of the inductor L1 is connected to the input stage of the broadband input amplifier and connected in parallel with the resistor R1 connected to the bias voltage Vbias, and the other end is connected to the capacitor C2; the capacitor C2 is connected in series between the capacitor C1 and the inductor L1; The broadband input amplifier stage includes a transistor Q1 and inductors L2, L3, L4, a feedback resistor R2, and a capacitor C3; the emitter of the transistor Q1 is grounded, the base is connected to the inductor L2, and the collector is connected to the inductor L3; the resistor R2 and the capacitor C3 are connected in series, one end of which is connected to the inductor L2, and the other end is connected to the inductor L3 to form a feedback loop; one end of the inductor L4 is connected to the connection between the capacitor C3 and the inductor L3, and the other end is connected to the power supply VDD; The broadband output amplifier stage includes a cascode structure composed of two transistors Q2 and Q3; the base of the transistor Q2 is connected to the bias voltage Vbias through the resistor R3, the emitter is grounded, and the collector is connected to the emitter of the transistor Q3; the base of the transistor Q3 receives the amplified signal, the collector is connected to the inductor L6 and connected to the power supply VDD through the inductor L7; the inductor L5 is connected in series with the capacitor C4, and one end is connected to the emitter of the transistor Q3, and the other end is grounded; The output matching network includes a capacitor C5; one end of the capacitor C5 is connected to the connection point of the inductors L6 and L7, and the other end is connected to the signal output port.

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