Intelligent electronic switch, integrated circuit chip, chip product and electromechanical equipment

Abstract

The present application provides an intelligent electronic switch, comprising: a power supply terminal, a power ground terminal, a load output terminal, and a switch control unit; a power switch, wherein the switch control unit is configured to control the power switch to turn on and conduct or turn off and cut off; a capacitor terminal, which is used to connect to the first end of a first capacitor; a current sampling unit, which is connected to the capacitor terminal and is used to be connected in series with the first capacitor, the current sampling unit samples the current flowing through the power switch, and the current flowing through the current sampling unit is proportional to the current flowing through the power switch; an abnormality detection unit, which is connected to the load output terminal and the capacitor terminal, and when the voltages of the capacitor terminal and the load output terminal satisfy preset conditions after the power switch is turned on, the abnormality detection unit outputs an abnormality signal, and the abnormality signal is used to indicate that the capacitive load is abnormal. The embodiments of the present application also provide an integrated circuit chip, a chip product, and an electromechanical device.

Description

Technical Field

[0001] This application relates to the field of intelligent semiconductor switches, and particularly to an intelligent electronic switch, an integrated circuit chip, a chip product, and an electromechanical device. Background Art

[0002] In recent years, with the booming development of the automotive market, especially the development of the electric vehicle market, such as the electric passenger vehicle market and the electric commercial vehicle market, the demand for automotive electronic components has been increasing. Among the electronic components in automobiles, relays are in relatively high demand and are used to conduct or disconnect a certain load line. However, relays themselves have some drawbacks, such as relatively long on and off delay times, high cost, and large volume.

[0003] With the development of semiconductor technology, intelligent electronic switches have been successfully developed to replace traditional relays. Intelligent electronic switches are usually used to couple a load to a battery and are electronic components that control the on and off of a load line. Intelligent electronic switches also have one or more diagnostic capabilities and protection features, such as against over-temperature, over-load, over-current, and short-circuit events. For example, a power switch is provided in the intelligent electronic switch, and in the case of over-temperature, over-load, over-current, or short-circuit events, the power switch disconnects, causing the path between the battery and the load to be disconnected.

[0004] The types of loads connected to existing intelligent electronic switches include capacitive loads. When the power switch is just turned on, the capacitive load will cause a large current to flow through the power switch, which may cause over-current events or over-temperature events. After an over-current event or an over-temperature event occurs, the power switch will be controlled to disconnect. After a certain period of time or when the temperature returns to normal, the power switch will be turned on and conducted again. When the number of over-current events or over-temperature events is relatively large, it may be determined as abnormal. However, there are many types of over-current events or over-temperature events caused by existing intelligent electronic switches, not limited to over-current events or over-temperature events caused by abnormal capacitive loads. There may be many other factors that cause over-current events or over-temperature events. The prior art does not make a distinction, so existing intelligent electronic switches lack effective monitoring of whether the capacitive load is abnormal. Summary of the Invention

[0005] The technical problem to be solved by the embodiments of this application is to provide an intelligent electronic switch, an integrated circuit chip, a chip product, and an electromechanical device in view of the deficiencies of the prior art, which can effectively monitor whether the capacitive load is abnormal.

[0006] To solve the above technical problem, a first aspect of the embodiments of this application provides an intelligent electronic switch, including:

[0007] A power supply terminal, a power ground terminal, a load output terminal, and a switch control unit. Among them, the power supply terminal is used to connect to the positive electrode of the battery, the power ground terminal is used to connect to the negative electrode of the battery, and the load output terminal is used to connect to the first end of the capacitive load;

[0008] A power switch, whose first end is connected to the power supply terminal or the power ground terminal, whose second end is connected to the load output terminal for being connected in series with the capacitive load, and whose control end is connected to the switch control unit. The switch control unit is used to control the power switch to turn on and conduct or turn off and cut off;

[0009] A capacitor terminal, which is used to connect to the first end of the first capacitor. The second end of the first capacitor is connected to the second end of the capacitive load. The capacitance value of the first capacitor is proportional to the capacitance value of the capacitive load;

[0010] A current sampling unit, which is connected to the capacitor terminal for being connected in series with the first capacitor. The current sampling unit samples the current flowing through the power switch, and the current flowing through the current sampling unit is proportional to the current flowing through the power switch;

[0011] An abnormality detection unit, which is connected to the load output terminal and the capacitor terminal. When the voltage at the capacitor terminal and the voltage at the load output terminal satisfy a preset condition after the power switch is turned on, the abnormality detection unit outputs an abnormality signal, and the abnormality signal is used to indicate that the capacitive load is abnormal.

[0012] Optionally, the abnormality detection unit is also connected to a first reference voltage and a second reference voltage; the preset condition is that the time required for the voltage at the capacitor terminal to reach the first reference voltage and the time required for the voltage at the load output terminal to reach the second reference voltage differ by greater than or equal to a first preset time period.

[0013] Optionally, the first reference voltage is equal to the second reference voltage; or,

[0014] The abnormality detection unit includes a first voltage comparator, a second voltage comparator, and a timing comparison unit. Among them, the first input terminal of the first voltage comparator is connected to the load output terminal, its second input terminal is connected to the first reference voltage, and its output terminal is connected to the timing comparison unit. The first input terminal of the second voltage comparator is connected to the capacitor terminal, its second input terminal is connected to the second reference voltage, and its output terminal is connected to the timing comparison unit. When the signal at one of the output terminals of the first voltage comparator and the second voltage comparator changes, the timing comparison unit starts timing. The timing comparison unit is connected to the first preset time period. When the signal at the output terminal of the other voltage comparator changes, the timing comparison unit compares the current timing duration with the first preset time period. When the current timing duration is greater than or equal to the first preset time period, the timing comparison unit outputs an abnormality signal; or,

[0015] The anomaly detection unit includes a first voltage comparator, a second voltage comparator, a first timing unit, a second timing unit, a duration subtractor, and a duration comparator. Among them, the first input terminal of the first voltage comparator is connected to the load output terminal, its second input terminal is connected to a first reference voltage, and its load output terminal is connected to the first timing unit. The first input terminal of the second voltage comparator is connected to the capacitor terminal, its second input terminal is connected to a second reference voltage, and its load output terminal is connected to the second timing unit. The duration subtractor is connected to the first timing unit and the second timing unit, and the duration comparator is connected to the duration subtractor. The duration comparator is also connected to a first preset duration. Among them, when the power switch starts to conduct, the first timing unit and the second timing unit start timing. When the signal at the output terminal of the first voltage comparator changes, the first timing unit outputs a first timing duration. When the signal at the load output terminal of the second voltage comparator changes, the second timing unit outputs a second timing duration. The duration subtractor subtracts the second timing duration from the first timing duration to obtain a duration difference. The duration comparator compares the duration difference with the first preset duration. When the duration difference is greater than or equal to the first preset duration, the duration comparator outputs an anomaly signal.

[0016] Optionally, the anomaly detection unit is also connected to a first reference duration and a second reference duration. The preset condition is that the difference between the voltage of the capacitor terminal charged for the first reference duration and the voltage of the load output terminal charged for the second reference duration is greater than or equal to a third preset voltage.

[0017] Optionally, the first reference duration is equal to the second reference duration; or,

[0018] The anomaly detection unit includes a timer, a voltage subtractor, and a third voltage comparator. Among them, the timer is connected to the first reference duration and the second reference duration. The voltage subtractor is connected to the timer, the load output terminal, and the capacitor terminal. The output terminal of the voltage subtractor is connected to the third voltage comparator. The third voltage comparator is also connected to a third preset voltage. Among them, when the power switch starts to conduct, the timer starts timing. When the timer counts up to the first reference duration, the voltage subtractor obtains the voltage of the load output terminal. When the timer counts up to the second reference voltage, the voltage subtractor obtains the voltage of the capacitor terminal. The voltage subtractor subtracts the obtained voltage of the capacitor terminal from the voltage of the load output terminal to obtain a voltage difference. The voltage subtractor outputs the voltage difference to the third voltage comparator. The third voltage comparator compares the voltage difference with the third preset voltage. When the voltage difference is greater than or equal to the third preset voltage, the third voltage comparator outputs an anomaly signal.

[0019] Optionally, the ratio of the capacitance value of the first capacitor to the capacitance value of the capacitive load is a first ratio, and the ratio of the current generated by the current sampling unit to the current flowing through the power switch is a second ratio, and the first ratio is equal to the second ratio.

[0020] Optionally, the current sampling unit includes a first semiconductor switch, the first semiconductor switch has the same type as the power switch, a first end of the first semiconductor switch is connected to a first end of the power switch, a second end thereof is connected to a capacitor terminal, and a control end thereof is connected to a control end of the power switch, wherein the current flowing through the first semiconductor switch is less than the current flowing through the power switch.

[0021] Optionally, the current sampling unit further includes an operational amplifier and a third semiconductor switch, wherein a first input terminal of the operational amplifier is connected to a second end of the power switch, a second input terminal of the operational amplifier is connected to a second end of the first semiconductor switch, a load output terminal of the operational amplifier is connected to a control end of the third semiconductor switch, a first end of the third semiconductor switch is connected to the second end of the first semiconductor switch, and a second end of the third semiconductor switch is connected to the capacitor terminal.

[0022] Optionally, the intelligent electronic switch further includes a second semiconductor switch, a first end of the second semiconductor switch is connected to the capacitor terminal, a second end thereof is connected to a power supply ground terminal or a power supply terminal, and the second semiconductor switch is used to release the charge on the first capacitor.

[0023] Optionally, the capacitor terminal is further used to be connected to a first end of a first resistor, a second end of the first resistor is connected to a second end of the capacitive load, wherein the resistance value of the first resistor is proportional to the resistance value of the capacitive load, and the ratio of the capacitance value of the first capacitor to the capacitance value of the capacitive load is equal to the ratio of the resistance value of the first resistor to the resistance value of the capacitive load.

[0024] A second aspect of the embodiments of the present application provides an integrated circuit chip, including the above-mentioned intelligent electronic switch, wherein the power supply terminal is a power supply pin, the power supply ground terminal is a power supply ground pin, the load output terminal is a load output pin, and the capacitor terminal is a capacitor pin.

[0025] A third aspect of the embodiments of the present application provides a chip product, including the above-mentioned intelligent electronic switch, wherein the components of the intelligent electronic switch except the power switch are located on a first integrated circuit chip, and the power switch is located on a second integrated circuit chip;

[0026] Among them, the power supply terminal is a power supply pin, the power ground terminal is a power ground pin, the load output terminal is a load output pin, and the capacitor terminal is a capacitor pin. The power supply pin, the power ground pin, and the capacitor pin are located on the first integrated circuit chip, and the load output pin is located on the second integrated circuit chip.

[0027] In the fourth aspect of the embodiments of the present application, an electromechanical device is provided, including the above-mentioned intelligent electronic switch, the above-mentioned integrated circuit chip, or the above-mentioned chip product.

[0028] It further includes a battery, a capacitive load, and a microprocessor. Among them, the positive electrode of the battery is connected to the power supply terminal, the negative electrode of the battery is connected to the power ground terminal, the first end of the capacitive load is connected to the load output terminal, the second end of the capacitive load is connected to the power ground terminal or the power supply terminal, and the microprocessor is connected to the intelligent electronic switch.

[0029] Optionally, the electromechanical device includes an automobile.

[0030] In this embodiment, the intelligent electronic switch includes a capacitor terminal, a current sampling unit, and an anomaly detection unit. The capacitor terminal is used to connect to the first end of the first capacitor, and the capacitance value of the first capacitor is proportional to the capacitance value of the capacitive load. By setting it like this, when the intelligent electronic switch is connected to different capacitive loads, a first capacitor that matches can be selected according to the capacitive load, so that the preset conditions inside the intelligent electronic switch do not need to be changed, and there is no need to change the internal circuit and logic of the intelligent electronic switch. The load output terminal of the intelligent electronic switch can be connected to capacitive loads of various specifications, which is beneficial to expanding the application scope of the intelligent electronic switch. Moreover, the current flowing through the current sampling unit is proportional to the current flowing through the power switch, so the current flowing into the first capacitor is proportional to the current flowing into the capacitive load. Therefore, the charging process of the first capacitor is similar to the charging process of the capacitive load. The charging of the first capacitor will cause a change in the voltage at the capacitor terminal, and the charging of the capacitive load will cause a change in the voltage at the load output terminal. When the voltages at the capacitor terminal and the load output terminal meet the preset conditions, the anomaly detection unit outputs an anomaly signal. That is, when the charging processes of the first capacitor and the capacitive load differ greatly, at this time, the voltages at the capacitor terminal and the load output terminal will differ greatly, resulting in the capacitor terminal and the load output terminal meeting the preset conditions. Therefore, the present application can effectively monitor whether the capacitive load has an anomaly. Description of the Drawings

[0031] To more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0032] Figure 1a is the circuit module diagram of the electromechanical device in the first embodiment of the present application;

[0033] Figure 1b is the circuit module diagram of the electromechanical device in another embodiment of the present application;

[0034] Figure 2 is the circuit module diagram of the intelligent electronic switch in the first embodiment of the present application;

[0035] Figure 3a is the detailed circuit module diagram of the intelligent electronic switch in the first embodiment of the present application;

[0036] Figure 3b is the detailed circuit module diagram of the intelligent electronic switch in another embodiment of the present application;

[0037] Figure 4 is the detailed circuit module diagram of the intelligent electronic switch in yet another embodiment of the present application;

[0038] Figure 5 is the circuit module diagram of the electromechanical device in still another embodiment of the present application;

[0039] Figure 6 is the detailed circuit module diagram of the intelligent electronic switch in the second embodiment of the present application;

[0040] Figure 7 is the detailed circuit module diagram of the intelligent electronic switch in the third embodiment of the present application. Detailed implementation manners

[0041] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all embodiments. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0042] As used in the description, claims, and drawings of this application, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or modules is not limited to the listed steps or units, but may optionally further include steps or units not listed, or may optionally further include other steps or units inherent to these processes, methods, products, or devices. In addition, terms such as "first", "second", and "third" are used to distinguish different objects, rather than to describe a specific order. The connections in this application include direct connections and indirect connections. An indirect connection means that there may be other electronic components, pins, etc. between the two connected components. The XX pins mentioned in this application may or may not be actual pins. For example, it may be just a pin of a component or a pin of a wire. The "and / or" mentioned in this application includes three cases. For example, A and / or B includes three cases: A, B, and A and B.

[0043] The first embodiment

[0044] The embodiments of this application provide a mechanical and electrical device, such as an automobile, a medical device, an industrial automation device, an aerospace device, etc. Please refer to Figure 1a , the mechanical and electrical device includes a battery 100, a load, a microprocessor, and an intelligent electronic switch 200. Among them, the battery 100 is generally a storage battery, which provides voltages such as 12V, 24V, 48V, 60V, etc. Of course, it can also be other types of batteries. The load includes a capacitive load 300, and the capacitive load 300 is, for example, a lighting element, such as a xenon arc lamp, an incandescent tail lamp, a headlamp, etc. The microcontroller is connected to the intelligent electronic switch 200 for controlling the intelligent electronic switch 200. At the same time, the intelligent electronic switch 200 feeds back its status and relevant parameter information, such as relevant parameter information for diagnosis, to the microprocessor for processing.

[0045] Please continue to refer to Figure 1a , in this embodiment, the intelligent electronic switch 200 includes a power supply terminal VCC, a power ground terminal GND, and a load output terminal OUT. Among them, the power supply terminal VCC is connected to the positive electrode of the battery 100, the power ground terminal GND is connected to the negative electrode of the battery 100, the load output terminal OUT is connected to the first end of the capacitive load 300, and the second end of the capacitive load 300 is connected to the negative electrode of the battery 100.

[0046] In this embodiment, the intelligent electronic switch 200 further includes a power switch GK1 and a switch control unit 210. One end of the power switch GK1 is connected in series with the capacitive load 300 via the load output terminal OUT, and the other end thereof is connected to the power supply terminal VCC, and its control end is connected to the switch control unit 210. The switch control unit 210 is configured to control whether the power switch GK1 is turned on. In this embodiment, the power switch GK1 is an NMOS transistor, a PMOS transistor, or a junction FET, etc. In the figure, the NMOS transistor is taken as an example for illustration. The power switch GK1 can be implemented as a silicon device, or other semiconductor materials can be used for implementation, such as silicon carbide (SiC), gallium arsenide (GaAs), or gallium nitride (GaN), etc.

[0047] In Figure 1a this embodiment, the power switch GK1 is connected as a high-side switch, which is a switch connected between the power supply terminal VCC and the capacitive load 300. However, the present application is not limited thereto. In other embodiments of the present application, please refer to Figure 1b for that in which the power switch GK1 is connected as a low-side switch, which is a switch connected between the capacitive load 300 and the power ground terminal GND.

[0048] Please continue to refer to Figure 1a for that in this embodiment, the intelligent electronic switch 200 further includes a capacitor terminal CD, and the electromechanical device further includes a first capacitor C1. The first end of the first capacitor C1 is connected to the capacitor terminal CD, and the second end of the first capacitor C1 is connected to the second end of the capacitive load 300. In this embodiment, the capacitance value of the capacitive load 300 can be determined by experimental measurement. After the capacitance value of the capacitive load 300 is determined, a matching first capacitor C1 can be selected according to the capacitance value of the capacitive load 300, that is, the capacitance value of the first capacitor C1 in this embodiment should match the capacitance value of the capacitive load 300. In this embodiment, the capacitance value of the first capacitor C1 is proportional to the capacitance value of the capacitive load 300. Assume that the ratio of the capacitance value of the capacitive load 300 to the capacitance value of the first capacitor C1 is A, and A is a number greater than 1. A is, for example, 10:1, 100:1, 1000:1, 2000:1, 10000:1, etc.

[0049] Please refer to in combination with Figure 1a and Figure 2, in this embodiment, the intelligent electronic switch 200 further includes a current sampling unit 220. The current sampling unit 220 is connected to the capacitor terminal CD. The current sampling unit 220 is connected in series with the first capacitor C1. The current sampling unit 220 samples the current flowing through the power switch GK1. When the power switch GK1 is turned on, the current flowing through the current sampling unit 220 is proportional to the current flowing through the power switch GK1. Assume that the ratio of the current flowing through the power switch GK1 to the current flowing through the current sampling unit 220 is B, and B is a number greater than 1. B can be, for example, 10:1, 100:1, 1000:1, 2000:1, 10000:1, etc. In this embodiment, B is equal to A. In other embodiments of the present application, B and A may also be unequal. When the power switch GK1 is turned off and cut off, at this time, the current flowing through the current sampling unit 220 and the current flowing through the power switch GK1 are both 0.

[0050] In this embodiment, when the power switch GK1 is just turned on, the voltage on the capacitive load 300 is 0, and the voltage on the first capacitor C1 is also 0. At this time, a current will be generated on the power switch GK1, and this current will charge the capacitive load 300. The voltage difference across the capacitive load 300 gradually increases. Correspondingly, a current will also flow through the current sampling unit 220, and this current will charge the first capacitor C1. Similarly, the voltage difference across the first capacitor C1 gradually increases.

[0051] In order to detect whether the capacitive load 300 is abnormal, in this embodiment, the intelligent electronic switch 200 further includes an abnormality detection unit 230. The abnormality detection unit 230 is connected to the load output terminal OUT and the capacitor terminal CD. When the voltages at the capacitor terminal CD and the load output terminal OUT satisfy a preset condition after the power switch GK1 is turned on, the abnormality detection unit 230 outputs an abnormality signal. The abnormality signal is used to indicate that the capacitive load 300 is abnormal, such as faults like weak short-circuit abnormality and short-circuit abnormality. The abnormality signal is output to the switch control unit 210, or the abnormality signal is directly output to the microprocessor.

[0052] In this embodiment, the abnormality detection unit 230 is further connected to a first reference voltage Vref1 and a second reference voltage Vref2. The first reference voltage Vref1 and the second reference voltage Vref2 are generated by a reference source in the intelligent electronic switch 200. In this embodiment, the first reference voltage Vref1 is equal to the second reference voltage Vref2, and at this time, it is a reference voltage. In this embodiment, the preset condition is that the time required for the voltage at the capacitor terminal CD to reach the first reference voltage Vref1 differs from the time required for the voltage at the load output terminal OUT to reach the second reference voltage Vref2 by greater than or equal to a first preset duration. The first preset duration can be, for example, 10 microseconds, 20 microseconds, 100 microseconds, 200 microseconds, 300 microseconds, etc.

[0053] Specifically, when the power switch GK1 is turned off and cut off, the voltage difference across the capacitive load 300 is 0 at this time, and the voltage difference across the first capacitor C1 is also 0; when the power switch GK1 starts to conduct, a current will be generated on the power switch GK1 at this time. This current is called the first current. The first current will charge the capacitive load 300, and the voltage difference across the capacitive load 300 gradually increases. Correspondingly, a current will also flow through the current sampling unit 220. This current is called the second current. The second current will charge the first capacitor C1, and the voltage difference across the first capacitor C1 gradually increases. Since the second end of the capacitive load 300 and the second end of the first capacitor C1 are both connected to the negative electrode of the battery 100, the voltage at the capacitor terminal CD gradually increases, and the voltage at the load output terminal OUT gradually increases.

[0054] According to the formula CV = It, since A = B, and the first reference voltage Vref1 is equal to the second reference voltage Vref2, the time required for the voltage at the capacitor terminal CD to be charged to the second reference voltage Vref2 is theoretically equal to the time required for the voltage at the load output terminal OUT to be charged to the first reference voltage Vref1. However, due to various factors such as manufacturing errors, matching errors, and differences in the equivalent models of the capacitive load 300, the two times may not be equal, but the difference will not be too large. Through experimental tests or theoretical calculations, a first preset duration can be obtained. When the difference between the time required for the voltage at the capacitor terminal CD to be charged to the second reference voltage Vref2 and the time required for the voltage at the load output terminal OUT to be charged to the first reference voltage Vref1 is less than the first preset duration, it can be considered at this time that the capacitive load 300 is normal. When the difference between the time required for the voltage at the capacitor terminal CD to be charged to the second reference voltage Vref2 and the time required for the voltage at the load output terminal OUT to be charged to the first reference voltage Vref1 is greater than or equal to the first preset duration, the difference between the two times is relatively large at this time. It is very likely caused by reasons such as weak short circuit or short circuit of the capacitive load 300, resulting in a decrease or increase in the capacitance value of the capacitive load 300. Therefore, the abnormality detection unit 230 in this embodiment can effectively monitor whether the capacitive load 300 is abnormal.

[0055] Please refer to Figure 1a 、 Figure 2 and Figure 3a, in this embodiment, the current sampling unit 220 includes a first semiconductor switch BK1. The first semiconductor switch has the same type as the power switch GK1. The first semiconductor switch BK1 can be an NMOS transistor, a PMOS transistor, or a junction FET, etc. In the figure, an NMOS transistor is taken as an example for illustration. The first end of the first semiconductor switch BK1 is connected to the first end of the power switch GK1, its second end is directly or indirectly connected to the capacitor terminal CD, and its control end is connected to the control end of the power switch GK1. The first semiconductor switch BK1 and the power switch GK1 are highly matched to realize the first semiconductor switch BK1 sampling the current of the power switch GK1, and the ratio of the current flowing through the power switch GK1 to the current flowing through the first semiconductor switch BK1 is B:1. In order to achieve the ratio of the two currents as B:1, one implementation is that the ratio of the aspect ratio of the power switch GK1 to the aspect ratio of the first semiconductor switch BK1 is B:1. In this embodiment, the first semiconductor switch BK1 and the power switch GK1 form a current mirror, and the current flowing through the first semiconductor switch BK1 is determined by the current flowing through the power switch GK1.

[0056] In this embodiment, the abnormality detection unit 230 includes a first voltage comparator VCP1, a second voltage comparator VCP2, and a timing comparison unit 231. The first input terminal of the first voltage comparator VCP1 is connected to the load output terminal OUT, the second input terminal of the first voltage comparator VCP1 is connected to a first reference voltage Vref1, the output terminal of the first voltage comparator VCP1 is connected to the timing comparison unit 231, the first input terminal of the second voltage comparator VCP2 is connected to the capacitor terminal CD, the second input terminal of the second voltage comparator VCP2 is connected to a second reference voltage Vref2, and the output terminal of the second voltage comparator VCP2 is connected to the timing comparison unit 231. The timing comparison unit 231 is connected to a first preset duration. When a signal change occurs at one of the output terminals of the first voltage comparator VCP1 and the second voltage comparator VCP2, for example, from a low level to a high level, or from a high level to a low level, the timing comparison unit 231 starts timing. When a signal change occurs at the output terminal of the other voltage comparator, for example, from a low level to a high level, or from a high level to a low level, the timing comparison unit 231 compares the current timing duration with the first preset duration. At this time, the timing comparison unit 231 can stop timing or not stop timing. When the current timing duration is greater than or equal to the first preset duration, the timing comparison unit 231 outputs an abnormality signal. When the current timing duration is less than the first preset duration, the timing comparison unit 231 does not output a signal or outputs a normal signal.

[0057] In addition, in other embodiments of the present application, please refer to Figure 1a 、 Figure 2 and Figure 3b, the anomaly detection unit 230 includes a first voltage comparator VCP1, a second voltage comparator VCP2, a first timing unit 232, a second timing unit 233, a duration subtractor 234, and a duration comparator 235. Among them, the first input terminal of the first voltage comparator VCP1 is connected to the load output terminal OUT, the second input terminal of the first voltage comparator VCP1 is connected to a first reference voltage Vref1, the output terminal of the first voltage comparator VCP1 is connected to the first timing unit 232, the first input terminal of the second voltage comparator VCP2 is connected to the capacitor terminal CD, the second input terminal of the second voltage comparator VCP2 is connected to a second reference voltage Vref2, the output terminal of the second voltage comparator VCP2 is connected to the second timing unit 233, the duration subtractor 234 is connected to the first timing unit 232 and the second timing unit 233, the duration comparator 235 is connected to the duration subtractor 234, and the duration comparator 235 is further connected to a first preset duration. When the power switch GK1 starts to conduct, the first timing unit 232 and the second timing unit 233 are triggered to start timing simultaneously (in this embodiment, the signal of the switch control unit 210 is used as an example for illustration). When the signal at the output terminal of the first voltage comparator VCP1 changes, for example, from a low level to a high level, or from a high level to a low level, the first timing unit 232 stops timing and outputs a first timing duration to the duration subtractor 234. The first timing duration is the current timing duration of the first timing unit 232. When the signal at the output terminal of the second voltage comparator VCP2 changes, for example, from a low level to a high level, or from a high level to a low level, the second timing unit 233 stops timing and outputs a second timing duration to the duration subtractor 234. The second timing duration is the current timing duration of the second timing unit 233. After receiving the first timing duration and the second timing duration, the duration subtractor 234 subtracts the second timing duration from the first timing duration to obtain a duration difference. The duration subtractor 234 outputs the duration difference to the duration comparator 235. The duration comparator 235 compares the duration difference with the first preset duration. When the duration difference is greater than or equal to the first preset duration, the duration comparator 235 outputs an anomaly signal. When the duration difference is less than the first preset duration, the duration comparator 235 does not output a signal or outputs a normal signal.

[0058] To prevent the first capacitor C1 from affecting the subsequent anomaly judgment after this charging, please continue to refer to Figure 3a, in this embodiment, the intelligent electronic switch 200 further includes a second semiconductor switch BK2. The second semiconductor switch BK2 can be an NMOS transistor, a PMOS transistor, or a junction FET, etc. The first end of the second semiconductor switch BK2 is connected to the capacitor terminal CD, and its second end is connected to the power ground terminal GND or the power supply terminal VCC. When the power switch GK1 is connected as a high-side switch, at this time, the second end of the second semiconductor switch BK2 is connected to the power ground terminal GND. When the power switch GK1 is connected as a low-side switch, at this time, the second end of the second semiconductor switch BK2 is connected to the power supply terminal VCC. The control end of the second semiconductor switch BK2 is connected to the switch control unit 210. After the abnormal judgment is completed, the switch control unit 210 controls the second semiconductor switch BK2 to conduct, so that the charge in the first capacitor C1 is released, and the voltage difference across the first capacitor C1 is made 0. By setting like this, it is possible to avoid the influence of the first capacitor C1 being charged previously on the subsequent process. For example, the charge remaining in the first capacitor C1 may affect the second timing duration, resulting in misjudgment. In addition, in other embodiments of the present application, the second semiconductor switch BK2 can be controlled to conduct after the capacitor terminal CD reaches the second reference voltage Vref2. For example, the control end of the second semiconductor switch BK2 can be connected to the output end of the second voltage comparator VCP2, or the control end of the second semiconductor switch BK2 is connected to the timing comparison unit 231.

[0059] In this embodiment, the conduction or cutoff of the power switch GK1 is controlled by the output signal of the microcontroller. Each time the microcontroller controls the power switch GK1 to conduct, the intelligent electronic switch 200 will detect whether the capacitive load 300 is abnormal. For example, the microcontroller sends a conduction signal to the intelligent electronic switch 200. After receiving the conduction signal, the intelligent electronic switch 200 first detects the abnormality of the capacitive load 300. After detecting that the capacitive load 300 is normal, the switch control unit 210 controls the power switch GK1 to conduct. After detecting that the capacitive load 300 is abnormal, the switch control unit 210 controls the power switch GK1 to remain cutoff. The intelligent electronic switch 200 also sends a feedback signal to inform the microcontroller that the capacitive load 300 is abnormal. In addition, in other embodiments of the present application, the detection of whether the capacitive load 300 is abnormal can also be performed at other time periods, as long as it is convenient for detection. The embodiments of the present application do not limit this.

[0060] The intelligent electronic switch 200 of this embodiment includes a capacitor terminal CD, a current sampling unit 220, and an anomaly detection unit 230. The capacitor terminal CD is used to connect to the first end of the first capacitor C1. The capacitance value of the first capacitor C1 is proportional to the capacitance value of the capacitive load 300. By setting it in this way, when the intelligent electronic switch 200 is connected to different capacitive loads 300, the first capacitor C1 that matches can be selected according to the capacitive load 300, so that the preset conditions inside the intelligent electronic switch 200 do not need to be changed, and there is no need to change the internal circuit and logic of the intelligent electronic switch 200. The load output terminal OUT of the intelligent electronic switch 200 can be connected to capacitive loads 300 of various specifications, which is beneficial to expanding the application range of the intelligent electronic switch 200. Moreover, the current flowing through the current sampling unit 220 is proportional to the current flowing through the power switch GK1, so that the current flowing into the first capacitor C1 is proportional to the current flowing into the capacitive load 300. Therefore, the charging process of the first capacitor C1 is similar to the charging process of the capacitive load 300. The charging of the first capacitor C1 will cause a change in the voltage of the capacitor terminal CD, and the charging of the capacitive load 300 will cause a change in the voltage of the load output terminal OUT. When the voltages of the capacitor terminal CD and the load output terminal OUT meet the preset conditions, the anomaly detection unit 230 outputs an anomaly signal. That is, when the charging process of the first capacitor C1 is quite different from the charging process of the capacitive load 300, at this time, the voltages of the capacitor terminal CD and the load output terminal OUT will be quite different, which will cause the capacitor terminal CD and the load output terminal OUT to meet the preset conditions. Therefore, through this application, it is possible to effectively monitor whether the capacitive load 300 is abnormal.

[0061] In addition, in other embodiments of this application, when the power switch GK1 is connected as a low-side switch, that is, the first end of the power switch GK1 is connected to the power supply ground terminal GND, the second end of the power switch GK1 is connected to the load output terminal OUT, the first end of the capacitive load 300 is connected to the load output terminal OUT, and the second end of the capacitive load 300 is connected to the positive electrode of the battery 100. Please refer to Figure 1b and Figure 4, the first end of the first capacitor C1 is connected to the capacitor terminal CD, the second end of the first capacitor C1 is connected to the second end of the capacitive load 300, and the second end of the capacitive load 300 is connected to the positive electrode of the battery 100; the current sampling unit 220 is connected to the capacitor terminal CD. The current sampling unit 220 includes a first semiconductor switch BK1. The first semiconductor switch has the same type as the power switch GK1. The first end of the first semiconductor switch BK1 is connected to the first end of the power switch GK1. The first end of the power switch GK1 is connected to the power ground terminal GND. The second end of the first semiconductor switch BK1 is directly or indirectly connected to the capacitor terminal CD, and its control end is connected to the control end of the power switch GK1. The first semiconductor switch BK1 and the power switch GK1 are highly matched to realize the current sampling of the power switch GK1 by the first semiconductor switch BK1. When the power switch GK1 is turned on, there is current flowing through both the power switch GK1 and the current sampling unit 220 at this time. At this time, the current flowing through the power switch GK1 charges the capacitive load 300, and the voltage difference across the capacitive load 300 gradually increases. The voltage at the load output terminal OUT gradually decreases from the battery voltage. The current flowing through the current sampling unit 220 charges the first capacitor C1, and the voltage difference across the first capacitor C1 gradually increases. The voltage at the capacitor terminal CD gradually decreases from the battery voltage. Similarly, when the voltage at the capacitor terminal CD and the voltage at the load output terminal OUT meet the preset conditions, the abnormality detection unit 230 outputs an abnormality signal. For example, the time difference between the time when the voltage at the capacitor terminal CD drops from the battery voltage to the second reference voltage Vref2 and the time when the voltage at the load output terminal OUT drops from the battery voltage to the first reference voltage Vref1 is greater than or equal to the first preset duration. In addition, in other embodiments of the present application, the implementation manner of the current sampling unit 220 is not limited to the above manner, and those skilled in the art can also implement it in other ways, which will not be limited here.

[0062] In addition, in other embodiments of the present application, the ratio of the capacitance value of the capacitive load 300 to the capacitance value of the first capacitor C1 is A, and the ratio of the current flowing through the power switch GK1 to the current flowing through the current sampling unit 220 is B. A and B may not be equal. At this time, the values of the first reference voltage Vref1 and the second reference voltage Vref2 can be adjusted to make the time required for the capacitor terminal CD to be charged to the second reference voltage Vref2 close to the time required for the load output terminal OUT to be charged to the first reference voltage Vref1. For example, if the value of A is 1000:1 and the value of B is 500:1, at this time, the ratio of the first reference voltage Vref1 to the second reference voltage Vref2 can be designed to be 1:2, so that the time required for the capacitor terminal CD to be charged to the second reference voltage Vref2 is close to the time required for the load output terminal OUT to be charged to the first reference voltage Vref1. In addition, in other embodiments of the present application, A and B are not equal, and the first reference voltage Vref1 and the second reference voltage Vref2 are equal. At this time, whether it is abnormal can be judged by adjusting the first preset duration. For example, if the difference in time between the time required for the voltage of the capacitor terminal CD to reach the first reference voltage Vref1 and the time required for the voltage of the load output terminal OUT to reach the second reference voltage Vref2 becomes larger, such as changing from the first preset duration to 2 times the first preset duration, it can also be used to judge whether it is abnormal. In the same way, it can also be achieved by adjusting the third preset voltage mentioned in the second embodiment.

[0063] Generally speaking, the capacitive load 300 is equivalent to a load capacitor C0, but the present application is not limited thereto. In other embodiments of the present application, in a more accurate model, please refer to Figure 5 ., the capacitive load 300 can also be equivalent to a load capacitor C0 and a load resistor R0. The load capacitor C0 and the load resistor R0 are connected in parallel. At this time, the design of the first preset duration and the third preset voltage (second embodiment) needs to consider the influence of the current shunting of the load resistor R0. Please continue to refer to Figure 5 ., a first resistor R1 can also be added. One end of the first resistor R1 is connected to the capacitor terminal CD, and the other end of the first resistor R1 is connected to the second end of the capacitive load 300. The ratio of the resistance value of the load resistor R0 to the resistance value of the first resistor R1 is A. By setting it in this way, the influence of the load resistor R0 can be reduced, so that the charging process of the first capacitor by the current is more similar to the charging process of the capacitive load by the current, and more accurate detection of whether the capacitive load 300 is abnormal can be achieved.

[0064] In addition, in this embodiment, the first reference voltage Vref1 and the second reference voltage Vref2 can be set according to actual needs, and the maximum value cannot be greater than the voltage of the power supply terminal VCC, and the minimum value cannot be less than 0. There is no limitation here.

[0065] The embodiment of the present application also provides an integrated circuit chip, which includes the above-mentioned intelligent electronic switch 200, that is, the above-mentioned intelligent electronic switch 200 is fabricated on the same semiconductor substrate. Among them, the power supply terminal VCC is a power supply pin, the power ground terminal GND is a power ground pin, the load output terminal OUT is a load output pin, and the capacitor terminal CD is a capacitor pin.

[0066] Other embodiments of the present application also provide a chip product, which includes the above-mentioned intelligent electronic switch 200. Among them, the components of the intelligent electronic switch 200 except the power switch GK1 are located on the first integrated circuit chip, and the power switch GK1 is located on the second integrated circuit chip, that is, the first integrated circuit chip is fabricated on one semiconductor substrate, and the second integrated circuit chip is fabricated on another semiconductor substrate. Among them, the power supply terminal VCC is a power supply pin, the power ground terminal GND is a power ground pin, the load output terminal OUT is a load output pin, the capacitor terminal CD is a capacitor pin, the power supply pin, the power ground pin, and the capacitor pin are located on the first integrated circuit chip, and the load output pin is located on the second integrated circuit chip. Other pins can also be added to the first integrated circuit chip and the second integrated circuit chip as needed. Here, the first integrated circuit chip and the second integrated circuit chip are packaged into a product.

[0067] The intelligent electronic switch 200 and the integrated circuit chip of this embodiment are not limited to being used in automotive electronics, and can also be used in fields such as industrial automation and aerospace.

[0068] Second Embodiment

[0069] Please refer to Figure 6 , Figure 6 , which is the circuit module diagram of the intelligent electronic switch 200 in the second embodiment of the present application. This embodiment is similar to the first embodiment, so the parts not described in this embodiment can be referred to the first embodiment. The main difference between this embodiment and the first embodiment is the preset condition.

[0070] Please see Figure 1a , Figure 2 and Figure 6 , in this embodiment, the anomaly detection unit 230 is also connected to the first reference duration Tref1 and the second reference duration Tref2. The first reference duration Tref1 and the second reference duration Tref2 are generated by the standard timing unit in the intelligent electronic switch 200, and the first reference duration Tref1 and the second reference duration Tref2 are equal in this embodiment. The preset condition is that the difference between the voltage of the charging capacitor terminal CD after the first reference duration Tref1 and the voltage of the charging load output terminal OUT after the second reference duration Tref2 is greater than or equal to the third preset voltage.

[0071] Specifically, in this embodiment, the anomaly detection unit 230 includes a timer 236, a voltage subtractor 237, and a third voltage comparator VCP3. Among them, the timer 236 is connected to a first reference duration Tref1 and a second reference duration Tref2. The voltage subtractor 237 is connected to the timer 236, the load output terminal OUT, and the capacitor terminal CD. The output terminal of the voltage subtractor 237 is connected to the third voltage comparator VCP3, and the third voltage comparator VCP3 is further connected to a third preset voltage.

[0072] In this embodiment, when the power switch GK1 starts to conduct, the current flowing through the power switch GK1 starts to charge the capacitive load 300, and the current flowing through the current sampling unit 220 starts to charge the first capacitor C1. The timing unit is triggered to start timing. When the timing unit counts to the first reference duration Tref1 and the second reference duration Tref2 (which are equal in this embodiment), the voltage subtractor 237 obtains the voltage of the load output terminal OUT and the voltage of the capacitor terminal CD, and subtracts the two voltages to obtain a voltage difference. The voltage subtractor 237 outputs the voltage difference to the voltage comparator, and the voltage comparator compares the voltage difference with the third preset voltage. If the voltage difference is greater than or equal to the third preset voltage, the voltage comparator outputs an anomaly signal. If the voltage difference is less than the third preset voltage, the voltage comparator does not output a signal or outputs a normal signal. Additionally, in other embodiments of the present application, when the first reference duration Tref1 and the second reference duration Tref2 are not equal, for example, the first reference duration Tref1 is relatively shorter than the second reference duration Tref2. In this case, when the power switch GK1 starts to conduct, the timing unit starts timing. When the timing unit counts to the first reference duration Tref1, at this time, the voltage subtractor 237 obtains the voltage of the load output terminal OUT, and the timer 236 continues to time. When the timer 236 counts to the second reference duration Tref2, at this time, the voltage subtractor 237 obtains the voltage of the capacitor terminal CD, and subtracts the voltage of the capacitor terminal CD from the previously obtained voltage of the load output terminal OUT to obtain a voltage difference. The voltage subtractor 237 outputs the voltage difference to the voltage comparator, and the voltage comparator compares the voltage difference with the third preset voltage. If the voltage difference is greater than or equal to the third preset voltage, the voltage comparator outputs an anomaly signal. Additionally, in other embodiments of the present application, in order to count to the first reference duration Tref1 and the second reference duration Tref2, the timing unit may further include two timers 236, one for timing the first reference duration Tref1 and one for timing the second reference duration Tref2. The embodiments of the present application can also effectively determine whether the capacitive load 300 is abnormal.

[0073] In the above two embodiments, the first end of the first semiconductor switch BK1 is connected to the first end of the power switch GK1, and the control end of the first semiconductor switch BK1 is connected to the control end of the power switch GK1, so that the ratio of the current flowing through the first semiconductor switch BK1 to the current flowing through the power switch GK1 can be approximately equal to 1:B. However, in practice, since the second end of the first semiconductor switch BK1 is not connected to the second end of the power switch GK1, there may be a difference in the voltage between the second end of the first semiconductor switch BK1 and the second end of the power switch GK1, resulting in a difference between the ratio of the current flowing through the first semiconductor switch BK1 to the current flowing through the power switch GK1 and 1:B, thereby affecting the abnormal judgment of the capacitive load 300. To solve this problem, the present application provides a third embodiment.

[0074] Third Embodiment

[0075] Please refer to Figure 7 , Figure 7 is the circuit module diagram of the intelligent electronic switch 200 according to the third embodiment of the present application. This embodiment is similar to the first and second embodiments. Therefore, the parts not described in this embodiment can be referred to the first and second embodiments. The main difference between this embodiment and the first and second embodiments is that the voltage at the second end of the first semiconductor switch BK1 is made equal to the voltage at the second end of the power switch GK1.

[0076] To make the voltage at the second end of the first semiconductor switch BK1 equal to the voltage at the second end of the power switch GK1, please refer to Figure 1a , Figure 2 and Figure 7 . In this embodiment, the current sampling unit 220 further includes an operational amplifier OPA and a third semiconductor switch BK3. Among them, the first input terminal of the operational amplifier OPA is connected to the second end of the power switch GK1, that is, to the load output terminal OUT. The second input terminal of the operational amplifier OPA is connected to the second end of the first semiconductor switch BK1. The load output terminal OUT of the operational amplifier OPA is connected to the control end of the third semiconductor switch BK3. The first end of the third semiconductor switch BK3 is connected to the second end of the first semiconductor switch BK1. The second end of the third semiconductor switch BK3 is connected to the capacitor terminal CD. In this embodiment, the third semiconductor switch BK3 is, for example, an NMOS transistor, a PMOS transistor, etc., and is a PMOS transistor in the figure.

[0077] In this embodiment, through the combination of the operational amplifier OPA and the third semiconductor switch BK3, the voltage at the second end of the first semiconductor switch BK1 can be made equal to the voltage at the second end of the power switch GK1, so that the ratio of the current flowing through the first semiconductor switch BK1 to the current flowing through the power switch GK1 can be accurately equal to 1:B, and more accurate abnormal judgment can be achieved.

[0078] Those skilled in the art can clearly understand that, for the convenience and conciseness of description, only the above division of each functional unit and module is used as an example. In actual applications, the above functions can be allocated to different functional units and modules according to needs, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiment can be integrated into a processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit. In addition, the specific names of each functional unit and module are only for the convenience of mutual distinction and do not limit the protection scope of the present application. The specific working processes of the units and modules in the above system can refer to the corresponding processes in the foregoing method embodiments and will not be described herein again.

[0079] It should be understood that "a plurality of" mentioned herein refers to two or more. After considering the specification and practicing the application disclosed herein, those skilled in the art will readily think of other embodiments of the present application. The present application is intended to cover any variations, uses or adaptations of the present application, which follow the general principles of the present application and include common general knowledge or conventional technical means in the technical field not disclosed in the present application. The specification and embodiments are only regarded as exemplary, and the true scope and spirit of the present application are pointed out by the following claims.

[0080] It should be noted that each embodiment in this specification is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other. For the device embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can refer to the partial description of the method embodiments.

[0081] The above-disclosed are only the preferred embodiments of the present application, and of course, the scope of the rights of the present application cannot be limited thereby. Therefore, equivalent changes made according to the claims of the present application still fall within the scope covered by the present application.

Claims

1. An intelligent electronic switch, characterized in that, Comprising: A power supply terminal, a power ground terminal, a load output terminal, and a switch control unit. Among them, the power supply terminal is used to connect to the positive electrode of the battery, the power ground terminal is used to connect to the negative electrode of the battery, and the load output terminal is used to connect to the first end of the capacitive load; A power switch, whose first end is connected to the power supply terminal or the power ground terminal, whose second end is connected to the load output terminal for being connected in series with the capacitive load, and whose control end is connected to the switch control unit. The switch control unit is used to control the power switch to turn on and conduct or turn off and cut off; A capacitor terminal, which is used to connect to the first end of the first capacitor. The second end of the first capacitor is connected to the second end of the capacitive load. The capacitance value of the first capacitor is proportional to the capacitance value of the capacitive load; A current sampling unit, which is connected to the capacitor terminal for being connected in series with the first capacitor. The current sampling unit samples the current flowing through the power switch, and when the power switch is conducting, the current flowing through the current sampling unit is proportional to the current flowing through the power switch; An abnormality detection unit, which is connected to the load output terminal and the capacitor terminal. When the voltage of the capacitor terminal and the voltage of the load output terminal satisfy a preset condition after the power switch is conducting, the abnormality detection unit outputs an abnormality signal. The abnormality signal is used to indicate that the capacitive load is abnormal.

2. The intelligent electronic switch according to claim 1, characterized in that, The abnormality detection unit is further connected to a first reference voltage and a second reference voltage; the preset condition is that the time required for the voltage of the capacitor terminal to reach the first reference voltage and the time required for the voltage of the load output terminal to reach the second reference voltage differ by greater than or equal to a first preset time period.

3. The intelligent electronic switch according to claim 2, characterized in that, The first reference voltage is equal to the second reference voltage; or, The abnormality detection unit includes a first voltage comparator, a second voltage comparator, and a timing comparison unit. Among them, the first input terminal of the first voltage comparator is connected to the load output terminal, its second input terminal is connected to the first reference voltage, and its output terminal is connected to the timing comparison unit. The first input terminal of the second voltage comparator is connected to the capacitor terminal, its second input terminal is connected to the second reference voltage, and its output terminal is connected to the timing comparison unit. When the signal of one of the output terminals of the first voltage comparator and the second voltage comparator changes, the timing comparison unit starts timing. The timing comparison unit is connected to the first preset time period. When the signal of the other voltage comparator output terminal changes, the timing comparison unit compares the current timing duration with the first preset time period. When the current timing duration is greater than or equal to the first preset time period, the timing comparison unit outputs an abnormality signal; or, The abnormal detection unit includes a first voltage comparator, a second voltage comparator, a first timing unit, a second timing unit, a duration subtractor, and a duration comparator. Among them, the first input terminal of the first voltage comparator is connected to the load output terminal, its second input terminal is connected to a first reference voltage, and its load output terminal is connected to the first timing unit. The first input terminal of the second voltage comparator is connected to the capacitor terminal, its second input terminal is connected to a second reference voltage, and its load output terminal is connected to the second timing unit. The duration subtractor is connected to the first timing unit and the second timing unit, and the duration comparator is connected to the duration subtractor. The duration comparator is also connected to a first preset duration. Among them, when the power switch starts to conduct, the first timing unit and the second timing unit start timing. When the signal at the output terminal of the first voltage comparator changes, the first timing unit outputs a first timing duration. When the signal at the load output terminal of the second voltage comparator changes, the second timing unit outputs a second timing duration. The duration subtractor subtracts the second timing duration from the first timing duration to obtain a duration difference. The duration comparator compares the duration difference with the first preset duration. When the duration difference is greater than or equal to the first preset duration, the duration comparator outputs an abnormal signal.

4. The intelligent electronic switch according to claim 1, wherein, The abnormal detection unit is also connected to a first reference duration and a second reference duration. The preset condition is that the difference between the voltage of the capacitor terminal charged for the first reference duration and the voltage of the load output terminal charged for the second reference duration is greater than or equal to a third preset voltage.

5. The intelligent electronic switch according to claim 4, wherein The first reference duration is equal to the second reference duration; or, The abnormal detection unit includes a timer, a voltage subtractor, and a third voltage comparator. Among them, the timer is connected to the first reference duration and the second reference duration. The voltage subtractor is connected to the timer, the load output terminal, and the capacitor terminal. The output terminal of the voltage subtractor is connected to the third voltage comparator. The third voltage comparator is also connected to a third preset voltage. Among them, when the power switch starts to conduct, the timer starts timing. When the timer times to the first reference duration, the voltage subtractor obtains the voltage of the load output terminal. When the timer times to the second reference voltage, the voltage subtractor obtains the voltage of the capacitor terminal. The voltage subtractor subtracts the obtained voltage of the capacitor terminal from the voltage of the load output terminal to obtain a voltage difference. The voltage subtractor outputs the voltage difference to the third voltage comparator. The third voltage comparator compares the voltage difference with the third preset voltage. When the voltage difference is greater than or equal to the third preset voltage, the third voltage comparator outputs an abnormal signal.

6. The intelligent electronic switch according to any one of claims 1-5, characterized in that, The ratio of the capacitance value of the first capacitor to the capacitance value of the capacitive load is a first ratio, and the ratio of the current generated by the current sampling unit to the current flowing through the power switch is a second ratio. The first ratio is equal to the second ratio.

7. The intelligent electronic switch according to any one of claims 1-5, characterized in that, The current sampling unit includes a first semiconductor switch, which is of the same type as the power switch. The first end of the first semiconductor switch is connected to the first end of the power switch, its second end is connected to the capacitor terminal, and its control end is connected to the control end of the power switch. Wherein, the current flowing through the first semiconductor switch is less than the current flowing through the power switch.

8. The intelligent electronic switch according to claim 7, characterized in that, The current sampling unit further includes an operational amplifier and a third semiconductor switch. Wherein, the first input terminal of the operational amplifier is connected to the second end of the power switch, the second input terminal of the operational amplifier is connected to the second end of the first semiconductor switch, the load output terminal of the operational amplifier is connected to the control end of the third semiconductor switch, the first end of the third semiconductor switch is connected to the second end of the first semiconductor switch, and the second end of the third semiconductor switch is connected to the capacitor terminal.

9. The intelligent electronic switch according to any one of claims 1-5, characterized in that, The intelligent electronic switch further includes a second semiconductor switch. The first end of the second semiconductor switch is connected to the capacitor terminal, and its second end is connected to the power supply ground terminal or the power supply terminal. The second semiconductor switch is used to discharge the charge on the first capacitor.

10. The intelligent electronic switch according to any one of claims 1-5, characterized in that, The capacitor terminal is further used to be connected to the first end of a first resistor, and the second end of the first resistor is connected to the second end of the capacitive load. Wherein, the resistance value of the first resistor is proportional to the resistance value of the capacitive load, and the ratio of the capacitance value of the first capacitor to the capacitance value of the capacitive load is equal to the ratio of the resistance value of the first resistor to the resistance value of the capacitive load.

11. An integrated circuit chip, characterized in that, It includes the intelligent electronic switch according to any one of claims 1-10. Wherein, the power supply terminal is a power supply pin, the power supply ground terminal is a power supply ground pin, the load output terminal is a load output pin, and the capacitor terminal is a capacitor pin.

12. A chip product, characterized in that, It includes the intelligent electronic switch according to any one of claims 1-10. Wherein, the components of the intelligent electronic switch except the power switch are located on a first integrated circuit chip, and the power switch is located on a second integrated circuit chip; Wherein, the power supply terminal is a power supply pin, the power supply ground terminal is a power supply ground pin, the load output terminal is a load output pin, the capacitor terminal is a capacitor pin. The power supply pin, the power supply ground pin, and the capacitor pin are located on the first integrated circuit chip, and the load output pin is located on the second integrated circuit chip.

13. An electromechanical device, characterized in that, It includes the intelligent electronic switch according to any one of claims 1-10, or the integrated circuit chip according to claim 11, or the chip product according to claim 12; It further includes a battery, a capacitive load, and a microprocessor. Wherein, the positive electrode of the battery is connected to the power supply terminal, the negative electrode of the battery is connected to the power supply ground terminal, the first end of the capacitive load is connected to the load output terminal, the second end of the capacitive load is connected to the power supply ground terminal or the power supply terminal, and the microprocessor is connected to the intelligent electronic switch.

14. The electromechanical device according to claim 13, wherein The electromechanical device includes an automobile.

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