Three-dimensional space multi-direction multi-scroll chaotic oscillator
In a three-dimensional multi-edge chaotic oscillator combined with a polynomial translation method and a step function, the problem of difficult to control the number of edge coils in a multi-directional multi-edge coil signal is solved. It realizes continuous output of signals and circuit regulation flexibility, and is suitable for the application of multi-directional multi-vortex chaotic signals.
Patent Information
- Application Number
- CN202411320264.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-23
- Publication Date
- 2025-01-03
- Estimated Expiration
- 2044-09-23
AI Technical Summary
In the prior art, the number of vortex coils with multi-directional multi-vortex coil chaotic signals is difficult to regulate, the circuit implementation is complex, and the number of vortex coils is not suitable.
The polynomial translation method is combined with step functions, and a three-dimensional space multi-directional multi-vortex chaotic oscillator is constructed through the inverse integral operation circuit, the inverse proportional operation circuit and the multi-purpose circuit to realize the translation of the polynomial structure, thereby controlling the multi-vortex The number of volumes can reduce the types of circuit components and improve the flexibility of hardware regulation.
It realizes continuous output of multi-direction multi-edimeter coil signals, reduces the difficulty of circuit debugging, and provides a circuit foundation for the application of multi-direction multi-edimeter coil chaotic signals in the fields of electronics, communications and information engineering.
Smart Images

Figure CN119254402A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of oscillators, specifically relates to electronic, communication and information engineering technologies, and in particular to a three-dimensional multi-directional multi-vortex chaotic oscillator. Background Art
[0002] Chaos is an important manifestation of internal randomness in deterministic nonlinear systems, and is widely present in natural laws and social life. Since simple nonlinear dynamic systems can produce complex dynamic behaviors, chaotic systems have attracted increasing attention from the theoretical and engineering communities in recent years, becoming a new hotspot in information engineering fields such as information encryption, secure communications, and chaotic radar.
[0003] In 1993, Suyken et al. successfully constructed a unidirectional multi-vortex chaotic system. Since then, a large number of researchers have constructed multi-vortex chaotic attractors on various systems such as the Lorenz system, Chen system, and Jerk system. However, the resulting multi-vortices are only in one direction and the number of vortices is limited. Practical applications often require multi-vortex chaotic attractors to extend to planes and three dimensions, so the vortices need to be extended in multiple directions.
[0004] In 2002, after Yalcin et al. successfully constructed a grid multi-scroll system, many new grid multi-scroll systems were proposed, such as a grid multi-torus system, a grid multi-scroll Cai system, a three-dimensional multi-scroll time-delay system, etc. The key factor in the generation of multi-scroll chaotic attractors lies in the construction of nonlinear functions. The common methods currently used include piecewise linear function method, sine function method, hyperbolic function method, etc., while the generation of grid multi-scrolls mostly uses a combination of non-smooth functions. The design idea is simple, and chaos control can be achieved by using multiple inflection points. However, when the above method is used to control the number of scrolls, the calculation of the inflection point voltage is cumbersome, more circuit components are required, the circuit implementation is relatively complex, and the number of scrolls is not easy to control. Summary of the invention
[0005] In order to solve the problem that the number of vortices of the multi-directional multi-vortex chaotic signal in the prior art is difficult to control, the present invention provides a three-dimensional multi-directional multi-vortex chaotic oscillator. On the basis of using polynomial construction to generate a one-dimensional multi-vortex chaotic attractor, the polynomial translation method is used, and by combining with a step function, the multi-vortex can be extended on the plane. On the basis of the one-dimensional multi-vortex chaotic system, a multi-directional multi-vortex chaotic system that can generate multiple vortices in the three directions of x, y, and z is constructed. In this system, the number of vortices in each direction can be achieved by increasing the step function term in the sign function of the direction, which is helpful for the engineering application of nonlinear physical systems and provides a model for theoretical research and application practice.
[0006] To achieve the above purpose, the technical solution provided by the present invention is:
[0007] A three-dimensional multi-directional multi-scroll chaotic oscillator comprises a first product branch circuit, a second product branch circuit, a third product branch circuit and three F-function operation circuits;
[0008] The first integral branch circuit includes an operational amplifier U1, an operational amplifier U2, a resistor R1, a resistor R2, a resistor R3, a capacitor C1 and a gain amplifier G1; the positive input terminal of the amplifier U1 is grounded, the reverse input terminal of the amplifier U1 is connected to the output terminal of the amplifier U1 via the capacitor C1, the output terminal of the amplifier U1 is connected to the reverse input terminal of the operational amplifier U2 via the resistor R2, the positive input terminal of the amplifier U2 is grounded, and the reverse input terminal of the amplifier U2 is connected to the output terminal of the amplifier U2 via the resistor R3; the signal F(y) is input to the input terminal of the reverse integral operation circuit, and the output terminal of the reverse integral operation circuit outputs a signal -x; the signal -x is input to the input terminal of the reverse proportional operation circuit, and finally the output signal 2x is output;
[0009] The second integral branch circuit comprises an operational amplifier U3, an operational amplifier U4, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a capacitor C2 and a gain amplifier G2; the positive input terminal of the amplifier U3 is grounded, the reverse input terminal of the amplifier U3 is connected to the output terminal of the amplifier U2 via the capacitor C2, the output terminal of the amplifier U3 is connected to the reverse input terminal of the operational amplifier U4 via the resistor R6, the positive input terminal of the amplifier U4 is grounded, the reverse input terminal of the amplifier U4 is connected to the output terminal of the amplifier U4 via the resistor R7; the signals -F(z) and F(y) are input to the input terminal of the reverse integral operation circuit, the output terminal of the reverse integral operation circuit outputs the signal 2y, the signals F(x) and F(y) are input to the input terminal of the reverse proportional operation circuit, and finally the signal -y is output;
[0010] The third integration branch circuit includes an operational amplifier U5, an operational amplifier U6, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a capacitor C3 and a gain amplifier G3; the positive input terminal of the amplifier U5 is grounded, the reverse input terminal of the amplifier U5 is connected to the output terminal of the amplifier U5 via the capacitor C3, the output terminal of the amplifier U5 is connected to the reverse input terminal of the operational amplifier U6 via the resistor R10, the positive input terminal of the amplifier U6 is grounded, and the reverse input terminal of the amplifier U6 is connected to the output terminal of the amplifier U6 via the resistor R11; the signals -F(z) and F(y) are input to the input terminal of the inverting integration operation circuit, the output terminal of the inverting integration operation circuit outputs the signal z, the signal z outputs the signal 2z through the gain amplifier, the signal 2z is input to the input terminal of the inverting proportional operation circuit, and finally the signal -z is output.
[0011] Further, the three F-function operation circuits include an F(x) operation circuit, an F(y) operation circuit and an F(z) operation circuit;
[0012] The F(x) operation circuit includes an operational amplifier U7, an operational amplifier U8, an operational amplifier U9, an operational amplifier U10, an operational amplifier U11, an operational amplifier U12, an operational amplifier U13, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a gain amplifier G4, an adder A1 and an adder A2; wherein the signal 2x is connected to the inverting input terminal of the operational amplifier U7, and the gain amplifier G4 ... The positive input terminal of amplifier U7 is grounded, the output terminal of amplifier U7 is connected to the reverse input terminal of operational amplifier U8 via resistor R12, the positive input terminal of amplifier U8 is grounded, the reverse input terminal of amplifier U8 is connected to the output terminal of amplifier U8 via resistor R13, and the output terminal of amplifier U8 is connected to one side input terminal of adder A1; signal 2x is connected to the reverse input terminal of operational amplifier U9, the positive input terminal of amplifier U9 is connected to the proportional circuit composed of resistor R14 and resistor R15, the output terminal of amplifier U9 is connected to the reverse input terminal of operational amplifier U10 via resistor R16. The positive input of amplifier U10 is grounded, the negative input of amplifier U10 is connected to the output of amplifier U10 via resistor R17, and the output of amplifier U10 is connected to the other input of adder A1; the output of adder A1 is connected to one input of adder A2; signal 2x is connected to the negative input of operational amplifier U11, the positive input of amplifier U11 is connected to the proportional circuit composed of resistor R18 and resistor R19, the output of amplifier U11 is connected to the negative input of operational amplifier U12 via resistor R20, and the positive input of amplifier U12 is connected to the negative input of adder A12. The input end is grounded, the reverse input end of the amplifier U12 is connected to the output end of the amplifier U12 via the resistor R21, and the output end of the amplifier U12 is connected to the other side input end of the adder A2; -x is connected to the reverse input end of the operational amplifier U13 via the resistor R22, the output end of the adder A2 is connected to the reverse input end of the operational amplifier U13 via the gain amplifier G4 and the resistor R23, the positive input end of the signal amplifier U13 is grounded, the reverse input end of the amplifier U13 is connected to the output end of the amplifier U13 via the resistor R24, and the output end of the amplifier U13 outputs the signal F(x);
[0013] The F(y) operational circuit includes an operational amplifier U14, an operational amplifier U15, an operational amplifier U16, an operational amplifier U17, an operational amplifier U18, a resistor R25, a resistor R26, a resistor R27, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32, a resistor R33, a resistor R34, a resistor R35, a gain amplifier G5 and an adder A3; the signal 2y is connected to the reverse input terminal of the operational amplifier U14, the positive input terminal of the amplifier U14 is connected to the proportional circuit composed of resistor R25 and resistor R26, the output terminal of the amplifier U14 is connected to the reverse input terminal of the operational amplifier U15 via resistor R27, the positive input terminal of the amplifier U15 is grounded, the reverse input terminal of the amplifier U15 is connected to the output terminal of the amplifier U15 via resistor R28, and the output terminal of the amplifier U15 is connected to one side input terminal of the adder A3 ; Signal 2y is connected to the reverse input terminal of the operational amplifier U16, the positive input terminal of the amplifier U16 is connected to the proportional circuit composed of resistors R29 and R30, the output terminal of the amplifier U16 is connected to the reverse input terminal of the operational amplifier U17 via resistor R31, the positive input terminal of the amplifier U17 is grounded, the reverse input terminal of the amplifier U17 is connected to the output terminal of the amplifier U17 via resistor R32, and the output terminal of the amplifier U17 is connected to the other side input terminal of the adder A3; -y is connected to the reverse input terminal of the operational amplifier U18 via resistor R33, the output terminal of the adder A3 is connected to the reverse input terminal of the operational amplifier U18 via gain amplifier G5 and resistor R34, the positive input terminal of the signal amplifier U18 is grounded, the reverse input terminal of the amplifier U18 is connected to the output terminal of the amplifier U18 via resistor R35, and the output terminal of the amplifier U18 outputs the signal F(y);
[0014] The F(z) operational circuit includes an operational amplifier U19, an operational amplifier U20, an operational amplifier U21, an operational amplifier U22, an operational amplifier U23, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41, a resistor R42, a resistor R43, a resistor R44, a resistor R45, a resistor R46, a gain amplifier G6 and an adder A4; the signal 2z is connected to the reverse input terminal of the operational amplifier U19, the positive input terminal of the amplifier U19 is connected to the proportional circuit composed of resistors R36 and R37, the output terminal of the amplifier U19 is connected to the reverse input terminal of the operational amplifier U20 via resistor R38, the positive input terminal of the amplifier U20 is grounded, the reverse input terminal of the amplifier U20 is connected to the output terminal of the amplifier U20 via resistor R39, and the output terminal of the amplifier U20 is connected to one side input terminal of the adder A4 ; Signal 2z is connected to the reverse input terminal of the operational amplifier U21, the positive input terminal of the amplifier U21 is connected to the proportional circuit composed of resistor R40 and resistor R41, the output terminal of the amplifier U21 is connected to the reverse input terminal of the operational amplifier U22 via resistor R42, the positive input terminal of the amplifier U22 is grounded, the reverse input terminal of the amplifier U22 is connected to the output terminal of the amplifier U22 via resistor R43, and the output terminal of the amplifier U22 is connected to the other side input terminal of the adder A4; z is connected to the reverse input terminal of the operational amplifier U23 via resistor R44, the output terminal of the adder A4 is connected to the reverse input terminal of the operational amplifier U23 via gain amplifier G6 and resistor R45, the positive input terminal of the signal amplifier U23 is grounded, the reverse input terminal of the amplifier U23 is connected to the output terminal of the amplifier U23 via resistor R46, and the output terminal of the amplifier U23 outputs the signal F(z).
[0015] Furthermore, the capacitance of the capacitor C1, the capacitor C2, and the capacitor C3 are all 50nF.
[0016] Furthermore, the resistance values of the resistors R1, R2, R3, R5, R6, R7, R9, R10, and R11 are all 10 kΩ, and the resistance value of the resistor R8 is 16.7 kΩ.
[0017] 5. A three-dimensional multi-directional multi-vortex chaotic oscillator as described in claim 1, characterized in that the resistance values of resistors R12, R16, R20, R27, R31, R38 and R42 are all 19.81 kΩ, the resistance values of resistors R13, R17, R21, R28, R32, R39 and R43 are all 1 kΩ, the resistance values of resistors R14 and R18 are all 12 kΩ, the resistance values of resistors R15 and R19 are all 8 kΩ, the resistance values of resistors R25, R29, R36 and R40 are all 15 kΩ, and the resistance values of resistors R26, R30, R37 and R41 are all 5 kΩ.
[0018] Furthermore, the gain coefficient g1 of the gain amplifier G1 , the gain coefficient g2 of the gain amplifier G2 , the gain coefficient g3 of the gain amplifier G3 , and the gain coefficient g4 of the gain amplifier G4 are all 2.
[0019] Furthermore, the gain coefficient g5 of the gain amplifier G5 is 2.5.
[0020] Furthermore, the gain coefficient g6 of the gain amplifier G6 is -2.5.
[0021] Beneficial Effects
[0022] The advantages of the present invention are as follows: a novel three-dimensional multi-directional multi-scroll chaotic oscillator disclosed by the present invention outputs a continuous multi-directional multi-scroll chaotic oscillation signal through an inverted integral summation operation circuit, an inverted proportional operation circuit and a multiplier circuit. By changing the polynomial structure corresponding to the three branches and increasing or decreasing the sign function operation module in the polynomial, the polynomial translation is realized, so that the number of multi-scrolls in the corresponding direction can be controlled, the types of circuit elements used are reduced, the flexibility of hardware circuit regulation is increased, and the difficulty of circuit debugging is reduced, which provides a circuit basis for the application of multi-directional multi-scroll chaotic signals in the fields of electronics, communications and information engineering, and facilitates the research of multi-directional multi-scroll chaotic oscillators in application fields such as image encryption. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 It is the main circuit principle block diagram of the present invention.
[0024] Figure 2 It is a principle block diagram of the x-direction nonlinear function F(x) operation circuit of the present invention.
[0025] Figure 3 It is a principle block diagram of the y-direction nonlinear function F(y) operation circuit of the present invention.
[0026] Figure 4It is a principle block diagram of the z-direction nonlinear function F(z) operation circuit of the present invention.
[0027] Figure 5 is the attractor phase diagram in the xy plane.
[0028] Figure 6 is the attractor phase diagram of the xz plane.
[0029] Figure 7 is the attractor phase diagram of the yz plane. DETAILED DESCRIPTION
[0030] The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments:
[0031] See also Figure 1-Figure 7 The present invention discloses a novel three-dimensional multi-directional multi-scroll chaotic oscillator, the main circuit includes a first product branch, a second product branch, a third product branch, and three F function operation circuits, including an F(x) operation circuit, an F(y) operation circuit, and an F(z) operation circuit. The circuit diagram is shown in FIG. Figure 1 As shown, the first product branch includes an input terminal of the signal F(y), the signal F(y) is connected to the input terminal of the operational amplifier U1 through the resistor R1, the output terminal of the operational amplifier U1 is connected to the input terminal of the operational amplifier U2 through the resistor R2, the output terminal of the operational amplifier U2 is connected to the input terminal of the operational amplifier U2 through the gain amplifier G1, and finally the output signal 2x is output; the second product branch includes two input terminals of the signal -F(z) and the signal F(y), the signal -F(z) is connected to the input terminal of the operational amplifier U3 through R4, the signal F(y) is connected to the input terminal of the operational amplifier U3 through R5, the output terminal of the operational amplifier U3 is connected to the input terminal of the operational amplifier U4 through the resistor R6, and finally the output signal -y is output; the third product branch includes two input terminals of the signal F(y) and the signal F(x), the signal F(y) is connected to the input terminal of the operational amplifier U5 through R8, the signal F(x) is connected to the input terminal of the operational amplifier U5 through R9, the output terminal of the operational amplifier U5 is connected to the input terminal of the operational amplifier U6 through the resistor R10, and finally the output signal -z is output.
[0032] The first product branch includes an operational amplifier U1, an operational amplifier U2, a resistor R1, a resistor R2, a resistor R3, a capacitor C1, and a gain amplifier G1. The signal F(y) is connected to the input end of the inverting integral operation circuit constructed by the operational amplifier U1, the resistor R1, and the capacitor C1, and the output end of the inverting integral operation circuit outputs a signal -x; the signal -x is input to the input end of the inverting proportional operation circuit constructed by the operational amplifier U2, the resistor R2, and the resistor R3, and the output end of the inverting proportional operation circuit is connected to the gain amplifier G1, and finally the output signal 2x is output.
[0033] The second integral branch includes an operational amplifier U3, an operational amplifier U4, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a capacitor C2, and a gain amplifier G2. The signal -F(z) and the signal F(y) are connected to the input end of the inverting integral operation circuit constructed by the operational amplifier U3, the resistor R4, the resistor R5, and the capacitor C2, and the output end of the inverting integral operation circuit outputs the signal 2y through the gain amplifier G2; the signal y is input to the input end of the inverting proportional operation circuit constructed by the operational amplifier U4, the resistor R6, and the resistor R7, and the output end of the inverting proportional operation circuit outputs the signal -y.
[0034] The third product branch includes an operational amplifier U5, an operational amplifier U6, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a capacitor C3, and a gain amplifier G3. The signal F(y) and the signal F(x) are connected to the input end of the inverting integral operation circuit constructed by the operational amplifier U5, the resistor R8, the resistor R9, and the capacitor C3, and the output end of the inverting integral operation circuit outputs the signal z; the signal z outputs the signal 2z through the gain amplifier G3; the signal z is input to the input end of the inverting proportional operation circuit constructed by the operational amplifier U6, the resistor R10, and the resistor R11, and the output end of the inverting proportional operation circuit outputs the signal -z.
[0035] The F(x) operational circuit includes operational amplifier U7, operational amplifier U8, operational amplifier U9, operational amplifier U10, operational amplifier U11, operational amplifier U12, operational amplifier U13, resistor R12, resistor R13, resistor R14, resistor R15, resistor R16, resistor R17, resistor R18, resistor R19, resistor R20, resistor R21, resistor R22, resistor R23, resistor R24, gain amplifier G4, adder A1, and adder A2. Signal 2x is connected to the input end of the sign function operation circuit constructed by operational amplifier U7, operational amplifier U8, resistor R12, and resistor R13, and the output end of the sign function operation circuit outputs signal sgn(x); Signal 2x is connected to the input end of the sign function operation circuit constructed by operational amplifier U9, operational amplifier U10, resistor R14, resistor R15, resistor R16, and resistor R17, and the output end of the sign function operation circuit outputs signal sgn(x-2c); Signal 2x is connected to the input end of the sign function operation circuit constructed by operational amplifier U11, operational amplifier U12, resistor R18, resistor R19, and resistor R20, and the output end of the sign function operation circuit outputs signal sgn(x-2c). The input end of the sign function operation circuit constructed by resistors R20 and R21, and the output end of the sign function operation circuit outputs signal sgn(x+2c); the signal sgn(x) and the signal sgn(x-2c) are connected to the input end of the adder A1, the output end of the adder A1 and the signal sgn(x+2c) are connected to the input end of the adder A2, the output end of the adder A2 is input to the input end of the inverting proportional operation circuit constructed by the operational amplifier U13, resistors R22, resistors R23, and resistors R24 through the gain amplifier G4, and the output end of the inverting proportional operation circuit outputs signal F(x).
[0036] The F(y) operational circuit includes operational amplifier U14, operational amplifier U15, operational amplifier U16, operational amplifier U17, operational amplifier U18, resistor R25, resistor R26, resistor R27, resistor R28, resistor R29, resistor R30, resistor R31, resistor R32, resistor R33, resistor R34, resistor R35, gain amplifier G5, and adder A3. Signal 2y is connected to the input end of the sign function operation circuit constructed by operational amplifier U14, operational amplifier U15, resistor R25, resistor R26, resistor R27, and resistor R28, and the output end of the sign function operation circuit outputs signal sgn(ye); signal 2y is connected to the input end of the sign function operation circuit constructed by operational amplifier U16, operational amplifier U17, resistor R29, resistor R30, resistor R31, and resistor R32, and the output end of the sign function operation circuit outputs signal sgn(y+e); signal sgn(ye) and signal sgn(y+e) are connected to the input end of adder A3, and the output end of adder A3 is input to the input end of the inverting proportional operation circuit constructed by operational amplifier U18, resistor R33, resistor R34, and resistor R35 through gain amplifier G5, and the output end of the inverting proportional operation circuit outputs signal F(y).
[0037] The F(z) operational circuit includes operational amplifier U19, operational amplifier U20, operational amplifier U21, operational amplifier U22, operational amplifier U23, resistor R36, resistor R37, resistor R38, resistor R39, resistor R40, resistor R41, resistor R42, resistor R43, resistor R44, resistor R45, resistor R46, gain amplifier G6, and adder A4. Signal 2z is connected to the input end of the sign function operation circuit constructed by operational amplifier U19, operational amplifier U20, resistor R36, resistor R37, resistor R38, and resistor R39, and the output end of the sign function operation circuit outputs signal sgn(zf); signal 2z is connected to the input end of the sign function operation circuit constructed by operational amplifier U21, operational amplifier U22, resistor R40, resistor R41, resistor R42, and resistor R43, and the output end of the sign function operation circuit outputs signal sgn(z+f); signal sgn(zf) and signal sgn(z+f) are connected to the input end of adder A4, and the output end of adder A4 is input to the input end of the inverting proportional operation circuit constructed by operational amplifier U23, resistor R44, resistor R45, and resistor R46 through gain amplifier G6, and the output end of the inverting proportional operation circuit outputs signal F(z).
[0038] Preferably, the voltage value of the voltage source VCC is 20V, and the voltage value of the voltage source VEE is -20V.
[0039] Preferably, the capacitance of the capacitor C1, the capacitor C2, and the capacitor C3 are all 50nF.
[0040] Preferably, the resistance values of the resistors R1, R2, R3, R5, R6, R7, R9, R10 and R11 in the main circuit are all 10 kΩ, and the resistance value of the resistor R8 is 16.7 kΩ. In the symbolic function operation circuit, the resistance values of resistors R12, R16, R20, R27, R31, R38, and R42 are all 19.81 kΩ, the resistance values of resistors R13, R17, R21, R28, R32, R39, and R43 are all 1 kΩ, the resistance values of resistors R14 and R18 are all 12 kΩ, the resistance values of resistors R15 and R19 are all 8 kΩ, the resistance values of resistors R25, R29, R36, and R40 are all 15 kΩ, and the resistance values of resistors R26, R30, R37, and R41 are all 5 kΩ.
[0041] Preferably, the gain coefficient g1 of the gain amplifier G1 is 2, the gain coefficient g2 of the gain amplifier G2 is 2, the gain coefficient g3 of the gain amplifier G3 is 2, the gain coefficient g4 of the gain amplifier G4 is 2, the gain coefficient g5 of the gain amplifier G5 is 2.5, and the gain coefficient g6 of the gain amplifier G6 is -2.5.
[0042] A dimensionless mathematical model of a novel three-dimensional multi-directional multi-scroll chaotic oscillator system is as follows:
[0043]
[0044] f L (x)=xc·[sgn(x)+sgn(x-2c)+sgn(x+2c)+sgn(x-4c)+sgn(x+4c)] (2)
[0045] f L (y)=ye·[sgn(y+e)+sgn(ye)+sgn(y+3e)+sgn(y-3e)] (3)
[0046] f L (z)=zf·[sgn(z+f)+sgn(zf)+sgn(z+3f)+sgn(z-3f)] (4)
[0047] Formula (1) can be realized by three integral operation circuits. The circuit equation is consistent with the dynamic equation. The coefficients of each feedback term in the system are realized by the joint setting of resistance and capacitance. The circuit equation corresponding to formula (1) is:
[0048]
[0049] In which, let the time constant Capacitor C1 = C2 = C3 = 100nF, the corresponding resistance value is R 13 =R 15 =12kΩ, R 12 =R 14 =8kΩ, R8 =16.7kΩ, R 26 =R 28 =R 39 =R 41 =15kΩ, R 25 =R 27 =R 38 =R 40 =5kΩ, R 21 =R 51 =R 53 =R 59 =R 61 =R 67 =R 69 =1kΩ, R 20 =R 52 =R 54 =R 60 =R 62 =R 68 =R 70 =19.81kΩ, R i =10kΩ(i=1,2,3,4,5,6,7,9,10,11,22,23,24,35,36,37,48,49,50). R1C1 is the time scale change factor. In order to observe the waveform, R1C1 needs to be further debugged. It is found that when R1C1=5×10 -4 When , a better waveform can be observed, such as Figure 5 , Figure 6 , Figure 7 As shown, they are the xy, yz, and xz plane phase diagrams of the chaotic attractor. The system can generate 4×3 vortices on the xy plane, the system can generate 4×3 vortices on the yz plane, and the system can generate 3×3 vortices on the xz plane.
[0050] The specific implementation methods are only for illustrating the technical idea of the present invention, and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the present invention.
Claims
1. A three-dimensional multi-directional multi-vortex chaotic oscillator, characterized in that: It includes a first product branch path, a second product branch path, a third product branch path and three F function operation circuits; The first integral branch circuit includes an operational amplifier U1, an operational amplifier U2, a resistor R1, a resistor R2, a resistor R3, a capacitor C1 and a gain amplifier G1; the positive input terminal of the amplifier U1 is grounded, the reverse input terminal of the amplifier U1 is connected to the output terminal of the amplifier U1 via the capacitor C1, the output terminal of the amplifier U1 is connected to the reverse input terminal of the operational amplifier U2 via the resistor R2, the positive input terminal of the amplifier U2 is grounded, and the reverse input terminal of the amplifier U2 is connected to the output terminal of the amplifier U2 via the resistor R3; the signal F(y) is input to the input terminal of the reverse integral operation circuit, and the output terminal of the reverse integral operation circuit outputs a signal -x; the signal -x is input to the input terminal of the reverse proportional operation circuit, and finally the output signal 2x is output; The second integral branch circuit comprises an operational amplifier U3, an operational amplifier U4, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a capacitor C2 and a gain amplifier G2; the positive input terminal of the amplifier U3 is grounded, the reverse input terminal of the amplifier U3 is connected to the output terminal of the amplifier U2 via the capacitor C2, the output terminal of the amplifier U3 is connected to the reverse input terminal of the operational amplifier U4 via the resistor R6, the positive input terminal of the amplifier U4 is grounded, the reverse input terminal of the amplifier U4 is connected to the output terminal of the amplifier U4 via the resistor R7; the signals -F(z) and F(y) are input to the input terminal of the reverse integral operation circuit, the output terminal of the reverse integral operation circuit outputs the signal 2y, the signals F(x) and F(y) are input to the input terminal of the reverse proportional operation circuit, and finally the signal -y is output; The third integration branch circuit includes an operational amplifier U5, an operational amplifier U6, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a capacitor C3 and a gain amplifier G3; the positive input terminal of the amplifier U5 is grounded, the reverse input terminal of the amplifier U5 is connected to the output terminal of the amplifier U5 via the capacitor C3, the output terminal of the amplifier U5 is connected to the reverse input terminal of the operational amplifier U6 via the resistor R10, the positive input terminal of the amplifier U6 is grounded, and the reverse input terminal of the amplifier U6 is connected to the output terminal of the amplifier U6 via the resistor R11; the signals -F(z) and F(y) are input to the input terminal of the inverting integration operation circuit, the output terminal of the inverting integration operation circuit outputs the signal z, the signal z outputs the signal 2z through the gain amplifier, the signal 2z is input to the input terminal of the inverting proportional operation circuit, and finally the signal -z is output.
2. A three-dimensional multi-directional multi-vortex chaotic oscillator as claimed in claim 1, characterized in that: The three F-function operation circuits include an F(x) operation circuit, an F(y) operation circuit and an F(z) operation circuit; The F(x) operation circuit includes an operational amplifier U7, an operational amplifier U8, an operational amplifier U9, an operational amplifier U10, an operational amplifier U11, an operational amplifier U12, an operational amplifier U13, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a gain amplifier G4, an adder A1 and an adder A2; wherein the signal 2x is connected to the inverting input terminal of the operational amplifier U7, and the gain amplifier G4 ... The positive input terminal of amplifier U7 is grounded, the output terminal of amplifier U7 is connected to the reverse input terminal of operational amplifier U8 via resistor R12, the positive input terminal of amplifier U8 is grounded, the reverse input terminal of amplifier U8 is connected to the output terminal of amplifier U8 via resistor R13, and the output terminal of amplifier U8 is connected to one side input terminal of adder A1; signal 2x is connected to the reverse input terminal of operational amplifier U9, the positive input terminal of amplifier U9 is connected to the proportional circuit composed of resistor R14 and resistor R15, the output terminal of amplifier U9 is connected to the reverse input terminal of operational amplifier U10 via resistor R16. The positive input of amplifier U10 is grounded, the negative input of amplifier U10 is connected to the output of amplifier U10 via resistor R17, and the output of amplifier U10 is connected to the other input of adder A1; the output of adder A1 is connected to one input of adder A2; signal 2x is connected to the negative input of operational amplifier U11, the positive input of amplifier U11 is connected to the proportional circuit composed of resistor R18 and resistor R19, the output of amplifier U11 is connected to the negative input of operational amplifier U12 via resistor R20, and the positive input of amplifier U12 is connected to the negative input of adder A12. The input end is grounded, the reverse input end of the amplifier U12 is connected to the output end of the amplifier U12 via the resistor R21, and the output end of the amplifier U12 is connected to the other side input end of the adder A2; -x is connected to the reverse input end of the operational amplifier U13 via the resistor R22, the output end of the adder A2 is connected to the reverse input end of the operational amplifier U13 via the gain amplifier G4 and the resistor R23, the positive input end of the signal amplifier U13 is grounded, the reverse input end of the amplifier U13 is connected to the output end of the amplifier U13 via the resistor R24, and the output end of the amplifier U13 outputs the signal F(x); The F(y) operational circuit includes an operational amplifier U14, an operational amplifier U15, an operational amplifier U16, an operational amplifier U17, an operational amplifier U18, a resistor R25, a resistor R26, a resistor R27, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32, a resistor R33, a resistor R34, a resistor R35, a gain amplifier G5 and an adder A3; the signal 2y is connected to the reverse input terminal of the operational amplifier U14, the positive input terminal of the amplifier U14 is connected to the proportional circuit composed of resistor R25 and resistor R26, the output terminal of the amplifier U14 is connected to the reverse input terminal of the operational amplifier U15 via resistor R27, the positive input terminal of the amplifier U15 is grounded, the reverse input terminal of the amplifier U15 is connected to the output terminal of the amplifier U15 via resistor R28, and the output terminal of the amplifier U15 is connected to one side input terminal of the adder A3 ; Signal 2y is connected to the reverse input terminal of the operational amplifier U16, the positive input terminal of the amplifier U16 is connected to the proportional circuit composed of resistors R29 and R30, the output terminal of the amplifier U16 is connected to the reverse input terminal of the operational amplifier U17 via resistor R31, the positive input terminal of the amplifier U17 is grounded, the reverse input terminal of the amplifier U17 is connected to the output terminal of the amplifier U17 via resistor R32, and the output terminal of the amplifier U17 is connected to the other side input terminal of the adder A3; -y is connected to the reverse input terminal of the operational amplifier U18 via resistor R33, the output terminal of the adder A3 is connected to the reverse input terminal of the operational amplifier U18 via gain amplifier G5 and resistor R34, the positive input terminal of the signal amplifier U18 is grounded, the reverse input terminal of the amplifier U18 is connected to the output terminal of the amplifier U18 via resistor R35, and the output terminal of the amplifier U18 outputs the signal F(y); The F(z) operational circuit includes an operational amplifier U19, an operational amplifier U20, an operational amplifier U21, an operational amplifier U22, an operational amplifier U23, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41, a resistor R42, a resistor R43, a resistor R44, a resistor R45, a resistor R46, a gain amplifier G6 and an adder A4; the signal 2z is connected to the reverse input terminal of the operational amplifier U19, the positive input terminal of the amplifier U19 is connected to the proportional circuit composed of resistors R36 and R37, the output terminal of the amplifier U19 is connected to the reverse input terminal of the operational amplifier U20 via resistor R38, the positive input terminal of the amplifier U20 is grounded, the reverse input terminal of the amplifier U20 is connected to the output terminal of the amplifier U20 via resistor R39, and the output terminal of the amplifier U20 is connected to one side input terminal of the adder A4 ; Signal 2z is connected to the reverse input terminal of the operational amplifier U21, the positive input terminal of the amplifier U21 is connected to the proportional circuit composed of resistor R40 and resistor R41, the output terminal of the amplifier U21 is connected to the reverse input terminal of the operational amplifier U22 via resistor R42, the positive input terminal of the amplifier U22 is grounded, the reverse input terminal of the amplifier U22 is connected to the output terminal of the amplifier U22 via resistor R43, and the output terminal of the amplifier U22 is connected to the other side input terminal of the adder A4; z is connected to the reverse input terminal of the operational amplifier U23 via resistor R44, the output terminal of the adder A4 is connected to the reverse input terminal of the operational amplifier U23 via gain amplifier G6 and resistor R45, the positive input terminal of the signal amplifier U23 is grounded, the reverse input terminal of the amplifier U23 is connected to the output terminal of the amplifier U23 via resistor R46, and the output terminal of the amplifier U23 outputs the signal F(z).
3. A three-dimensional multi-directional multi-vortex chaotic oscillator as claimed in claim 1, characterized in that: The capacitance of the capacitor C1, the capacitor C2 and the capacitor C3 are all 50nF.
4. A three-dimensional multi-directional multi-vortex chaotic oscillator as claimed in claim 1, characterized in that: The resistance values of the resistors R1, R2, R3, R5, R6, R7, R9, R10 and R11 are all 10 kΩ, and the resistance value of the resistor R8 is 16.7 kΩ.
5. A three-dimensional multi-directional multi-vortex chaotic oscillator as claimed in claim 1, characterized in that: The resistance values of resistor R12, resistor R16, resistor R20, resistor R27, resistor R31, resistor R38, and resistor R42 are all 19.81 kΩ, the resistance values of resistor R13, resistor R17, resistor R21, resistor R28, resistor R32, resistor R39, and resistor R43 are all 1 kΩ, the resistance values of resistor R14 and resistor R18 are all 12 kΩ, the resistance values of resistor R15 and resistor R19 are all 8 kΩ, the resistance values of resistor R25, resistor R29, resistor R36, and resistor R40 are all 15 kΩ, and the resistance values of resistor R26, resistor R30, resistor R37, and resistor R41 are all 5 kΩ.
6. A three-dimensional multi-directional multi-vortex chaotic oscillator as claimed in claim 1, characterized in that: The gain coefficient g1 of the gain amplifier G1 , the gain coefficient g2 of the gain amplifier G2 , the gain coefficient g3 of the gain amplifier G3 , and the gain coefficient g4 of the gain amplifier G4 are all 2.
7. A three-dimensional multi-directional multi-vortex chaotic oscillator as claimed in claim 1, characterized in that: The gain factor g5 of the gain amplifier G5 is 2.
5.
8. A three-dimensional multi-directional multi-vortex chaotic oscillator as claimed in claim 1, characterized in that: The gain factor g6 of the gain amplifier G6 is -2.5.
Citation Information
Patent Citations
Reticular multi-scroll chaotic circuit and method for generating multiple scrolls
CN101873210A
Multi-scroll chaotic circuit system
CN108512646A
Novel three-dimensional hidden multi-scroll chaotic oscillator based on JERK system
CN117811719A
