DP signal quality detection method and device, equipment, storage medium and product

Abstract

The invention relates to the technical field of DP signal testing, in particular to a DP signal quality detection method and device, equipment, a storage medium and a product. The method comprises the following steps: when a first surface of a to-be-detected FPC is initialized, acquiring a DP state of the first surface of the to-be-detected FPC; if the first face DP state meets the preset operation standard, whether the first face error rate of the FPC to be detected is smaller than a preset error code standard value or not is judged; if yes, when the initialization of the second surface of the to-be-detected FPC is completed, acquiring the DP state of the second surface of the to-be-detected FPC; if the second face DP state meets the preset operation standard, whether the second face error rate of the FPC to be detected is smaller than a preset error code standard value or not is judged; and if yes, taking the to-be-detected FPC as a target FPC. According to the method, DP state and bit error rate detection is carried out on the two sides of the FPC respectively through staged initialization and detection processes, and the efficiency and effect of DP signal detection are improved in combination with automatic state acquisition and judgment.

Description

Technical Field

[0001] The present application relates to the technical field of DP signal testing, and in particular to a DP signal quality detection method, device, equipment, storage medium and product. Background Art

[0002] DisplayPort (DP), as a digital video interface standardized by the Video Electronics Standards Association (VESA), is widely used for data transmission between video sources and display devices. The DP interface supports high-bandwidth, high-definition video and audio transmission, and has the advantages of no certification and no licensing fees, so it is widely used in personal computers, monitors, projectors, AR / VR devices and other fields. With the popularization of DP technology, the requirements of equipment for signal transmission quality are also increasing. Especially in high-resolution and high-refresh rate application scenarios, the stability and quality of DP signals become particularly important. In practical applications, the transmission quality of DP signals may be affected by multiple factors, such as connector design, PCB wiring, and material properties of transmission media (such as FPC). These factors may cause signal insertion loss, reflection, bit error and other problems, which in turn affect the video display effect, manifested as screen distortion, image tearing and other phenomena. At present, DP signal quality detection mainly relies on the following methods: Manual detection: technicians manually detect signal quality by visual inspection or using tools such as oscilloscopes and spectrum analyzers. This method is time-consuming and labor-intensive, depends on the experience and technical level of the detection personnel, and is prone to missed detection or misjudgment; Automated test equipment: Use dedicated automated test equipment for signal detection. This type of equipment is usually expensive, takes up a lot of production resources, and has poor flexibility when switching detection parameters, resulting in unsatisfactory results. Summary of the invention

[0003] The main purpose of this application is to provide a DP signal quality detection method, device, equipment, storage medium and product, aiming to solve the technical problem of how to improve the efficiency and effect of DP signal detection.

[0004] To achieve the above object, the present application provides a DP signal quality detection method, the method comprising:

[0005] When the FPC to be detected completes initialization of the first surface, obtaining the DP state of the first surface of the FPC to be detected;

[0006] If the DP state of the first surface meets the preset operating standard, determining whether the bit error rate of the first surface of the FPC to be detected is less than a preset bit error standard value;

[0007] If yes, when the FPC to be detected completes the initialization of the second surface, obtaining the DP state of the second surface of the FPC to be detected;

[0008] If the second surface DP state meets the preset operating standard, determining whether the bit error rate of the second surface of the FPC to be detected is less than the preset bit error standard value;

[0009] If yes, the FPC to be detected is used as the target FPC.

[0010] In one embodiment, before the step of obtaining the DP state of the first surface of the FPC to be detected when the first surface of the FPC to be detected is initialized, the step further includes:

[0011] Read the transmission signal swing standard value in the preset configuration file;

[0012] According to the transmission signal swing standard value, the transmission signal swing value of the DP signal of the FPC is determined.

[0013] In one embodiment, the first surface DP state includes a link rate, a number of data channels, a resolution, and a refresh rate, the preset operation standard includes a preset link rate value, a preset number of channels, a preset resolution, and a preset refresh rate, and before the step of judging whether the first surface bit error rate of the FPC to be detected is less than a preset bit error standard value if the first surface DP state meets the preset operation standard, the step further includes:

[0014] Respectively comparing the link rate with the preset link rate value, the number of data channels with the preset number of channels, the resolution with the preset resolution, and the refresh rate with the preset refresh rate;

[0015] If the link rate matches the preset link rate value, the number of data channels matches the preset number of channels, the resolution matches the preset resolution, and the refresh rate matches the preset refresh rate, it is determined that the first surface DP state meets the preset operating standard.

[0016] In one embodiment, before the step of obtaining the DP state of the first surface of the FPC to be detected when the first surface of the FPC to be detected is initialized, the step further includes:

[0017] Obtaining the hardware self-test result and startup log of the FPC to be tested;

[0018] Based on the hardware self-test result and the startup log, it is determined whether the FPC to be tested has completed initialization.

[0019] In one embodiment, after the step of judging whether the bit error rate of the second surface of the FPC to be detected is less than the preset bit error standard value if the DP state of the second surface meets the preset operating standard, the method further includes:

[0020] If not, the FPC to be tested is marked as unqualified, and the second side bit error rate is recorded.

[0021] In one embodiment, after the step of taking the FPC to be detected as the target FPC, the method further includes:

[0022] Generate test reports in preset standardized formats;

[0023] Based on a preset transmission protocol, the detection report is transmitted to the MES system.

[0024] In addition, to achieve the above-mentioned purpose, the present application also proposes a DP signal quality detection device, the DP signal quality detection device comprising:

[0025] A first DP state module, used for obtaining the DP state of the first surface of the FPC to be detected when the FPC to be detected completes the initialization of the first surface;

[0026] A first bit error rate judgment module, configured to judge whether the bit error rate of the first side of the FPC to be detected is less than a preset bit error standard value if the DP state of the first side meets the preset operation standard;

[0027] A second DP state module is used to obtain the DP state of the second surface of the FPC to be detected when the initialization of the second surface of the FPC to be detected is completed;

[0028] A second bit error rate judgment module, used for judging whether the bit error rate of the second side of the FPC to be detected is less than the preset bit error standard value if the second side DP state meets the preset operation standard;

[0029] The target module is used to, if yes, take the FPC to be detected as the target FPC.

[0030] In addition, to achieve the above-mentioned purpose, the present application also proposes a DP signal quality detection device, which includes: a memory, a processor, and a DP signal quality detection program stored in the memory and executable on the processor, and the DP signal quality detection program is configured to implement the steps of the DP signal quality detection method described above.

[0031] In addition, to achieve the above-mentioned purpose, the present application also proposes a storage medium, on which a DP signal quality detection program is stored, and when the DP signal quality detection program is executed by a processor, the steps of the DP signal quality detection method described above are implemented.

[0032] In addition, to achieve the above-mentioned purpose, the present application also proposes a computer program product, wherein the computer program product includes a computer program, and when the computer program is executed by a processor, the steps of the DP signal quality detection method as described above are implemented.

[0033] This application obtains the DP state of the first side of the FPC to be detected when the FPC to be detected completes the initialization of the first side; if the DP state of the first side meets the preset operating standard, it is determined whether the bit error rate of the first side of the FPC to be detected is less than the preset bit error standard value; if so, when the FPC to be detected completes the initialization of the second side, the DP state of the second side of the FPC to be detected is obtained; if the DP state of the second side meets the preset operating standard, it is determined whether the bit error rate of the second side of the FPC to be detected is less than the preset bit error standard value; if so, the FPC to be detected is used as the target FPC. This application performs DP state and bit error rate detection on both sides of the FPC through a phased initialization and detection process, and combines automated state acquisition and judgment to significantly improve the efficiency and effect of DP signal detection. Accurate bit error rate detection and strict standards ensure the signal transmission quality of each side. Double-sided detection ensures the comprehensive reliability of the FPC in actual use and reduces the failure rate caused by signal problems. The overall optimized detection process not only greatly reduces detection time and resource consumption, but also improves the reliability and user experience of the final product. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 This is a flow chart of the first embodiment of the DP signal quality detection method of the present application;

[0035] Figure 2 This is a schematic diagram of a sub-flow in the second embodiment of the DP signal quality detection method of the present application;

[0036] Figure 3 This is a schematic diagram of a sub-flow in the third embodiment of the DP signal quality detection method of the present application;

[0037] Figure 4 This is a schematic diagram of the module structure of the DP signal quality detection device according to an embodiment of the present application;

[0038] Figure 5 Schematic diagram of the device structure of the hardware operating environment involved in the DP signal quality detection method in the embodiment of the present application.

[0039] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0040] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0041] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0042] It should be noted that DisplayPort (DP), as a digital video interface standardized by the Video Electronics Standards Association (VESA), is widely used for data transmission between video sources and display devices. The DP interface supports high-bandwidth, high-definition video and audio transmission, and has the advantages of no certification and no licensing fee, so it is widely used in personal computers, monitors, projectors, AR / VR devices and other fields. With the popularization of DP technology, the requirements of equipment for signal transmission quality are also increasing. Especially in high-resolution and high-refresh rate application scenarios, the stability and quality of DP signals become particularly important. In practical applications, the transmission quality of DP signals may be affected by multiple factors, such as connector design, PCB wiring, and material properties of transmission media (such as FPC). These factors may cause signal insertion loss, reflection, bit error and other problems, which in turn affect the video display effect, manifested as screen distortion, image tearing and other phenomena. At present, DP signal quality detection mainly relies on the following methods: Manual detection: technicians manually detect signal quality by visual inspection or using tools such as oscilloscopes and spectrum analyzers. This method is time-consuming and labor-intensive, depends on the experience and technical level of the detection personnel, and is prone to missed detection or misjudgment; Automated test equipment: Use dedicated automated test equipment for signal detection. This type of equipment is usually expensive, takes up a lot of production resources, and has poor flexibility when switching detection parameters, resulting in unsatisfactory results.

[0043] The main solution of the present application is: when the FPC to be detected completes the initialization of the first side, the DP state of the first side of the FPC to be detected is obtained; if the DP state of the first side meets the preset operating standard, it is determined whether the bit error rate of the first side of the FPC to be detected is less than the preset bit error standard value; if so, when the FPC to be detected completes the initialization of the second side, the DP state of the second side of the FPC to be detected is obtained; if the DP state of the second side meets the preset operating standard, it is determined whether the bit error rate of the second side of the FPC to be detected is less than the preset bit error standard value; if so, the FPC to be detected is used as the target FPC.

[0044] This application uses a phased initialization and detection process to perform DP status and bit error rate detection on both sides of the FPC, combined with automated status acquisition and judgment, to significantly improve the efficiency and effectiveness of DP signal detection. Accurate bit error rate detection and strict standards ensure the signal transmission quality on each side. Double-sided detection ensures the comprehensive reliability of the FPC in actual use and reduces the failure rate caused by signal problems. The overall optimized detection process not only greatly reduces detection time and resource consumption, but also improves the reliability and user experience of the final product.

[0045] It should be noted that the execution subject of the method of this embodiment can be a computing service device with data processing, network communication and program running functions, or it can be the above-mentioned DP signal quality detection device with the same or similar functions. This embodiment and the following embodiments will be described by taking the DP signal quality detection device as an example.

[0046] Based on this, the first embodiment of the DP signal quality detection method of the present application is proposed, please refer to Figure 1 , Figure 1 This is a flow chart of the first embodiment of the DP signal quality detection method of the present application.

[0047] In this embodiment, the method includes the following steps:

[0048] S1: when the first surface of the FPC to be detected is initialized, obtaining the DP state of the first surface of the FPC to be detected;

[0049] Specifically, after the device is powered on, it automatically performs a hardware self-test (Power-On Self-Test, POST) to check whether the memory, CPU, GPU and other hardware are normal. After the hardware self-test is completed, the operating system begins to load, including the system kernel and the startup of necessary drivers and services. Confirm that the system startup is complete and enters the working state through the status indicator or display prompt on the device. Send a command to read the DP status through the Android Debug Bridge (ADB). If other interfaces are used, make sure to call the correct system file or debug interface to read the status information.

[0050] Furthermore, the link rate, number of data channels (num_lanes), resolution, refresh rate, etc. of the current DP signal are read. The read link rate, number of data channels, refresh rate, and resolution are compared with the preset standard values ​​to ensure that each parameter meets the requirements. The read DP status parameters are recorded in the local storage or test report, and the test software interface displays whether the DP status meets the preset standards, and prompts the user with the current test results.

[0051] It should be noted that the FPC (flexible printed circuit board) to be tested is a flexible circuit board used to connect electronic components and is often used in electronic devices with limited space. Initialization refers to the hardware self-test and system startup process after the device is powered on to ensure that the device is in normal working condition. DP status (DisplayPort status) refers to the working status of the DP interface, including parameters such as link rate, number of data lanes and resolution. Link rate indicates the speed of DP signal transmission, in bits per second (bps); number of data lanes (num_lanes) indicates the number of parallel data lanes used in DP signal transmission; resolution indicates the pixel size of the display, usually expressed as width x height @ refresh rate, such as 3840x1200@90Hz. The preset operating standard refers to the preset standard value of the DP state parameter, which is used to determine whether the current DP state meets the requirements. The bit error rate refers to the ratio of errors occurring during data transmission, which indicates an indicator of signal quality. The preset bit error standard value refers to the preset bit error rate standard value, which is used to determine whether the signal transmission quality meets the requirements.

[0052] By automatically reading the DP status parameters, the time and errors of manual operation are reduced, and the detection efficiency is improved. Accurately obtain and compare key parameters such as link rate, number of data channels and resolution to ensure that the DP signal transmission on each side meets the standards and improve the accuracy of detection. Ensure that the signal transmission quality on each side meets the standards, reduce the failure rate caused by signal problems, and improve the reliability of the final product. Use ADB commands and automated software for detection, reduce dependence on expensive equipment and manual operation, and reduce detection costs. Through these steps, the efficiency and effect of DP signal detection can be effectively improved, ensuring the signal transmission quality and reliability of FPC in actual use.

[0053] S2: If the DP state of the first surface meets the preset operating standard, determine whether the bit error rate of the first surface of the FPC to be detected is less than a preset bit error standard value;

[0054] Specifically, first compare the DP status parameters (link rate, number of data channels, resolution) read from the first side with the preset operating standards. If all parameters meet the standards, proceed to the next step; otherwise, record the exception and terminate the current detection process. Send a command to read the bit error rate through the Android Debug Bridge (ADB).

[0055] Furthermore, the current bit error rate value is obtained from the debugging information returned by the device. The bit error rate indicates the ratio of errors that occur during data transmission and is an important indicator for measuring signal quality. The read bit error rate is compared with the preset standard value. The preset bit error standard value is the upper limit of the bit error rate set according to actual application requirements. If the bit error rate is less than or equal to the preset bit error standard value, it is considered qualified; otherwise, it is recorded as unqualified and prompts that it needs to be checked or adjusted.

[0056] Optionally, the bit error rate and comparison results are recorded in local storage or test reports to ensure that detailed information of each test is available. The test software interface displays whether the bit error rate meets the preset standard and prompts the user with the current test result.

[0057] By strictly comparing the bit error rate with the preset standard value, we can ensure that the signal transmission quality meets high standards and reduce product failures caused by signal problems. By real-time detection and comparison of bit error rates, FPCs that do not meet the standards can be discovered and eliminated in a timely manner to ensure the reliability and stability of the final product. Automated reading and comparison of bit error rates reduces manual intervention, improves detection efficiency and consistency, and reduces detection costs. Record the bit error rate and comparison results of each test in detail to ensure that the detection process is transparent and traceable, providing strong support for quality control. Through the above specific steps, it can be ensured that when detecting the DP state of the first side of the FPC to be detected, it can be accurately judged whether its bit error rate meets the preset standard, thereby improving the efficiency and effect of DP signal detection and ensuring the signal transmission quality and reliability of the FPC in actual use.

[0058] S3: If yes, when the second surface of the FPC to be detected completes initialization, obtaining the DP state of the second surface of the FPC to be detected;

[0059] Specifically, connect the second side (back side) of the FPC to be tested to the test equipment. After power is turned on, the equipment automatically performs a hardware self-test (Power-On Self-Test, POST) to check whether the memory, CPU, GPU and other hardware are normal. After the hardware self-test is completed, the operating system begins to load, including the system kernel and the startup of necessary drivers and services. Confirm that the system startup is complete and enters the working state through the status indicator light or display prompt on the device. Confirm that the device connected to the second side has completed the hardware self-test and system startup, and the device is in normal working condition and ready for signal detection.

[0060] Furthermore, a command to read the DP status of the second side is sent through the Android Debug Bridge (ADB). The read link rate, number of data channels, and resolution are compared with the preset standard values ​​to ensure that each parameter meets the requirements. The read DP status parameters are recorded in local storage or test reports to ensure that the detailed information of each test is well documented. Whether the DP status meets the preset standard is displayed on the test software interface, and the user is prompted with the current test results.

[0061] By testing the front and back sides of the FPC in steps, it is ensured that each side meets the preset standards, which reduces invalid testing steps and improves testing efficiency. The DP status is tested on the front and back sides of the FPC to ensure the comprehensiveness and consistency of the signal transmission quality and reduce the product failure rate. Accurately obtain and compare key parameters such as link rate, number of data channels and resolution to ensure that the DP signal transmission on each side meets the standards and improve the accuracy of the test. Testing through ADB commands and automated software reduces manual operations, improves testing speed and consistency, and reduces testing costs. Record the DP status parameters of each test in detail to ensure that the testing process is transparent and traceable, providing strong support for quality control. Through the above specific steps, it can be ensured that when testing the DP status of the second side of the FPC to be tested, it can be accurately judged whether it meets the preset standards, thereby improving the efficiency and effect of DP signal detection and ensuring the signal transmission quality and reliability of the FPC in actual use.

[0062] S4: If the second surface DP state meets the preset operating standard, determine whether the bit error rate of the second surface of the FPC to be detected is less than the preset bit error standard value;

[0063] Specifically, first compare the DP status parameters (link rate, number of data channels, resolution) read from the second side with the preset operating standards. If all parameters meet the standards, proceed to the next step; otherwise, record the exception and terminate the current detection process. Send a command to read the bit error rate through the Android Debug Bridge (ADB). If other interfaces are used, ensure that the system file or debug interface is correctly called to obtain the bit error rate data.

[0064] Furthermore, the current bit error rate value is obtained from the debugging information returned by the device. The bit error rate indicates the ratio of errors that occur during data transmission and is an important indicator for measuring signal quality. The read bit error rate is compared with the preset standard value. The preset bit error standard value is the upper limit of the bit error rate set according to actual application requirements. If the bit error rate is less than or equal to the preset bit error standard value, it is considered qualified; otherwise, it is recorded as unqualified and prompts that it needs to be checked or adjusted.

[0065] Optionally, the bit error rate and comparison results are recorded in local storage or test reports to ensure that detailed information of each test is available. The test software interface displays whether the bit error rate meets the preset standard and prompts the user with the current test result.

[0066] By strictly comparing the bit error rate with the preset standard value, we can ensure that the signal transmission quality meets high standards and reduce product failures caused by signal problems. By real-time detection and comparison of bit error rates, FPCs that do not meet the standards can be discovered and eliminated in a timely manner to ensure the reliability and stability of the final product. Automated reading and comparison of bit error rates reduces manual intervention, improves detection efficiency and consistency, and reduces detection costs. Record the bit error rate and comparison results of each test in detail to ensure that the detection process is transparent and traceable, providing strong support for quality control. Through the above specific steps, it can be ensured that when detecting the DP status of the second side of the FPC to be detected, it can be accurately judged whether its bit error rate meets the preset standard, thereby improving the efficiency and effect of DP signal detection and ensuring the signal transmission quality and reliability of the FPC in actual use.

[0067] S5: If yes, the FPC to be detected is used as the target FPC.

[0068] Specifically, after completing the DP status and bit error rate detection of the second side, confirm that all parameters meet the preset standards. If the DP status and bit error rate detection results of the second side meet the standards, the FPC to be detected is marked as the target FPC. All test data of the FPC to be detected, including the DP status parameters, bit error rate and comparison results of the first and second sides, are recorded in local storage or test reports. All recorded test data are saved in a central database or MES system (manufacturing execution system) for traceability and quality control.

[0069] Furthermore, labels or logos are added to the FPCs that have passed the test so that they can be identified in subsequent production and use. The target FPCs are classified and stored to ensure that they are not confused with unqualified products during subsequent assembly and use. The test results of the current FPC are displayed on the test software interface, prompting the user that the FPC has been marked as the target FPC. The relevant production and quality control personnel are notified of the test results through the system to ensure seamless connection of subsequent processes.

[0070] It should be noted that the target FPC refers to the FPC that has passed all the inspection steps and meets the preset standards. It is marked as a qualified product and can enter the next step of production or use. The MES system (Manufacturing Execution System) is an information system used to manage and monitor the production process, record and trace various data and operations in the production process.

[0071] Through a rigorous multi-step testing process, each target FPC is ensured to meet high quality standards, thereby improving the overall quality and reliability of the product. Through automated testing and marking processes, manual operations and human errors are reduced, and production efficiency and consistency are improved. Detailed recording and preservation of test data facilitates traceability when problems arise, improving the efficiency of quality management. Through the above specific steps, it can be ensured that the FPC to be tested can be correctly marked and processed after passing all the test steps, thereby improving the efficiency and effect of DP signal detection and ensuring the signal transmission quality and reliability of FPC in actual use.

[0072] In this embodiment, when the FPC to be detected completes the initialization of the first side, the DP state of the first side of the FPC to be detected is obtained; if the DP state of the first side meets the preset operating standard, it is determined whether the bit error rate of the first side of the FPC to be detected is less than the preset bit error standard value; if so, when the FPC to be detected completes the initialization of the second side, the DP state of the second side of the FPC to be detected is obtained; if the DP state of the second side meets the preset operating standard, it is determined whether the bit error rate of the second side of the FPC to be detected is less than the preset bit error standard value; if so, the FPC to be detected is used as the target FPC. This embodiment performs DP state and bit error rate detection on both sides of the FPC through a staged initialization and detection process, and combines automated state acquisition and judgment to significantly improve the efficiency and effect of DP signal detection. Accurate bit error rate detection and strict standards ensure the signal transmission quality of each side. Double-sided detection ensures the comprehensive reliability of the FPC in actual use and reduces the failure rate caused by signal problems. The overall optimized detection process not only greatly reduces detection time and resource consumption, but also improves the reliability and user experience of the final product.

[0073] Based on the above first embodiment, a second embodiment of the DP signal quality detection method of the present application is proposed. Figure 2 , Figure 2 This is a schematic diagram of a sub-flow in the second embodiment of the DP signal quality detection method of the present application.

[0074] like Figure 2 As shown, in this embodiment, before step S1, the following steps are also included:

[0075] S1a: Read the standard value of the transmission signal swing in the preset configuration file;

[0076] S1b: Determine the transmission signal swing value of the DP signal of the FPC according to the transmission signal swing standard value.

[0077] Specifically, the preset configuration file is usually stored in a specified directory of the test system, and contains various standard parameters for DP signal transmission. The configuration file content is opened and read through the file read operation to obtain the standard value of the transmission signal swing. The read configuration file content is parsed to extract the standard value of the transmission signal swing (TXSwing value).

[0078] Furthermore, obtain the transmission signal swing standard value from the configuration file. Apply the read TXSwing standard value to the DP signal transmission setting of the current FPC to be tested. Confirm that the TXSwing value has been correctly applied, and verify whether the setting is successful by reading the current TXSwing value of the device. Record the set TXSwing value in local storage or test report to ensure that the setting process is transparent and traceable. Display the currently set TXSwing value on the test software interface, and prompt the user that the parameters have been successfully applied.

[0079] It should be noted that the preset configuration file is a file used to store various parameters and standard values ​​required for system operation, which is usually pre-configured by the system administrator. Transmission signal swing (TXSwing) indicates the voltage swing size in DP signal transmission and is an important parameter affecting signal transmission quality. ADB (Android Debug Bridge) is a command line tool used for debugging and data interaction with Android devices.

[0080] By reading the standard values ​​in the preset configuration file, the standardization and consistency of the DP signal transmission parameter settings are ensured, thereby improving the reliability of detection. The transmission signal swing is set according to the standard value to ensure that the signal transmission quality meets the preset standard, reduce the bit error rate, and improve the overall quality of the product. By automatically reading and setting parameters, manual intervention is reduced, the detection efficiency and consistency are improved, and the detection cost is reduced. The process and results of each parameter setting are recorded in detail to ensure that the setting process is transparent and traceable, providing strong support for quality control. Through the above specific steps, it can be ensured that the transmission signal swing value can be accurately read and set when detecting the FPC to be detected, thereby improving the efficiency and effect of DP signal detection and ensuring the signal transmission quality and reliability of the FPC in actual use.

[0081] Based on the above first embodiment, in this embodiment, the first-plane DP state includes a link rate, a number of data channels, a resolution, and a refresh rate, and the preset operation standard includes a preset link rate value, a preset number of channels, a preset resolution, and a preset refresh rate. Before step S2, it also includes:

[0082] S2a: respectively comparing the link rate with the preset link rate value, the number of data channels with the preset number of channels, the resolution with the preset resolution, and the refresh rate with the preset refresh rate;

[0083] S2b: If the link rate matches the preset link rate value, the number of data channels matches the preset number of channels, the resolution matches the preset resolution, and the refresh rate matches the preset refresh rate, it is determined that the first surface DP state meets the preset operating standard.

[0084] Specifically, the link rate of the current DP signal, the number of data channels used by the current DP signal, the resolution of the current DP signal, and the refresh rate of the current DP signal are read from the device. The standard value of the link rate, the standard value of the number of data channels, the standard value of the resolution, and the standard value of the refresh rate are read from the configuration file or system preset.

[0085] Furthermore, the current link rate is compared with the preset link rate value to check whether they match. The current number of data channels is compared with the preset number of channels to check whether they match. The current resolution is compared with the preset resolution to check whether they match. The current refresh rate is compared with the preset refresh rate to check whether they match. If all parameters (link rate, number of data channels, resolution, refresh rate) match the preset standard values, it is determined that the first surface DP state meets the preset operating standard.

[0086] Optionally, the comparison results of all parameters are recorded in local storage or test reports to ensure that they are traceable. The test software interface displays whether the DP status meets the preset standards and prompts the user with the current test results.

[0087] By comprehensively comparing the link rate, number of data channels, resolution, and refresh rate, we can ensure that the DP signal transmission quality meets high standards and reduce product failures caused by signal problems. Comprehensively judging the DP status parameters can comprehensively evaluate the signal transmission performance, ensure compliance with the preset operating standards, and improve the reliability and stability of the product. By automatically reading and comparing parameters, manual intervention is reduced, detection efficiency and consistency are improved, and detection costs are reduced. The process and results of each parameter comparison are recorded in detail to ensure that the detection process is transparent and traceable, providing strong support for quality control. Through the above specific steps, it can be ensured that when detecting the FPC to be detected, its DP status can be accurately compared and judged to see if it meets the preset standards, thereby improving the efficiency and effect of DP signal detection and ensuring the signal transmission quality and reliability of the FPC in actual use.

[0088] In this embodiment, when the FPC to be detected completes the initialization of the first side, the DP state of the first side of the FPC to be detected is obtained; if the DP state of the first side meets the preset operating standard, it is determined whether the bit error rate of the first side of the FPC to be detected is less than the preset bit error standard value; if so, when the FPC to be detected completes the initialization of the second side, the DP state of the second side of the FPC to be detected is obtained; if the DP state of the second side meets the preset operating standard, it is determined whether the bit error rate of the second side of the FPC to be detected is less than the preset bit error standard value; if so, the FPC to be detected is used as the target FPC. This embodiment performs DP state and bit error rate detection on both sides of the FPC through a staged initialization and detection process, and combines automated state acquisition and judgment to significantly improve the efficiency and effect of DP signal detection. Accurate bit error rate detection and strict standards ensure the signal transmission quality of each side. Double-sided detection ensures the comprehensive reliability of the FPC in actual use and reduces the failure rate caused by signal problems. The overall optimized detection process not only greatly reduces detection time and resource consumption, but also improves the reliability and user experience of the final product.

[0089] Based on the above second embodiment, a third embodiment of the DP signal quality detection method of the present application is proposed. Figure 3 , Figure 3 This is a schematic diagram of a sub-flow in the third embodiment of the DP signal quality detection method of the present application.

[0090] In this embodiment, after step S5, the method further includes:

[0091] S5a: Generate a test report in a preset standardized format;

[0092] S5b: Based on a preset transmission protocol, the detection report is transmitted to the MES system.

[0093] Specifically, all necessary data is collected from the detection process, including link rate, number of data channels, resolution, refresh rate, bit error rate, etc. The collected data is sorted and formatted according to a preset standardized format. For example, the standardized format can be CSV, JSON, XML, or PDF, etc. A detection report file is generated according to the preset format and saved to local storage or a specified directory.

[0094] Furthermore, select a suitable transmission protocol according to the system requirements, such as HTTP, FTP, MQTT, etc. The transmission protocol determines how to send the test report to the MES system. Configure the transmission parameters, including the server address, port, authentication information, etc. of the MES system. Use the selected transmission protocol to upload the test report file to the specified location of the MES system.

[0095] Optionally, upload the test report through HTTP POST request, use FTP client to upload the test report file to the FTP server of MES system, and publish the test report to the specified topic through MQTT protocol. Monitor the transmission process to ensure that the test report is successfully uploaded to MES system. If the transmission fails, record the error information and retry or manually intervene. Record the results of test report generation and transmission to local log files to ensure that they are well documented. Display the status of test report generation and transmission on the test software interface, and prompt the user with the current operation results.

[0096] It should be noted that the test report is a file that records the FPC test results, including information such as link rate, number of data channels, resolution, refresh rate, bit error rate, etc. The preset standardized format refers to a pre-defined report format that is used to standardize and unify the content and structure of the test report. The MES system (manufacturing execution system) is an information system used to manage and monitor the production process, record and trace various data and operations in the production process. The transmission protocol is a standardized communication protocol used for data transmission, such as HTTP, FTP, MQTT, etc.

[0097] Generate a test report in a preset standardized format to ensure a unified data format for easy analysis and management. Automatically upload the test report to the MES system through a preset transmission protocol, which improves the efficiency and accuracy of data transmission and reduces manual intervention. The automated report generation and transmission process reduces manual operations and improves the efficiency of production and quality control. Record the process of test report generation and transmission in detail to ensure that the test and data transmission process is transparent and traceable, providing strong support for quality control. Through the above specific steps, it can be ensured that when testing the FPC to be tested, a standardized test report can be generated and automatically uploaded to the MES system, thereby improving the efficiency and effect of DP signal detection and ensuring the signal transmission quality and reliability of the FPC in actual use.

[0098] Based on the above second embodiment, in this embodiment, before step S1, the following is further included:

[0099] S1A: Obtain the hardware self-test result and startup log of the FPC to be tested;

[0100] S1B: Based on the hardware self-test result and the startup log, determine whether the FPC to be tested has completed initialization.

[0101] Specifically, after the device is powered on, it will automatically perform a hardware self-test (Power-On Self-Test, POST) to check whether the memory, CPU, GPU and other hardware are normal. Obtain the hardware self-test results through the system log or dedicated interface to confirm whether each hardware component has passed the self-test. Read the hardware self-test result file to check whether there are any errors or warnings.

[0102] Furthermore, after the hardware self-test is completed, the operating system begins to load, including the system kernel and the startup of necessary drivers and services. Read the startup log from the system log file to view the startup process and results of the operating system and services. Read the startup log file to check whether each service is started normally and whether there are any errors or warning messages. Analyze the hardware self-test results to confirm that all hardware components have passed the self-test without any errors or warning messages. Analyze the startup log to confirm that the operating system and necessary services have been successfully started without any errors or warning messages. If the hardware self-test results and the startup log both appear normal and there are no errors or warning messages, it is determined that the FPC to be tested has completed initialization.

[0103] Optionally, the hardware self-test results and the analysis results of the startup log are recorded in the local storage or test report to ensure that they are traceable. The test software interface displays whether the FPC to be tested has completed initialization, and prompts the user with the current test results.

[0104] It should be noted that hardware self-check refers to the hardware check process that the device automatically performs when it starts up to ensure that each component is working properly. Boot log refers to the log file that records the startup process of the operating system and services, which is used to check the details of system startup and possible errors. Initialization refers to the process of completing hardware self-check and system startup after the device is powered on to ensure that the device is in normal working condition.

[0105] By analyzing the hardware self-test results and startup logs in detail, we can ensure that all components and services of the FPC to be tested are working properly and reduce detection errors caused by initialization problems. By checking the hardware self-test and startup logs, we can promptly discover and eliminate potential problems that may affect the stability of the system, ensuring that the equipment is in the best condition for subsequent testing. By automatically acquiring and analyzing self-test results and startup logs, manual intervention is reduced, detection efficiency and consistency are improved, and detection costs are reduced. The process and results of each initialization judgment are recorded in detail to ensure that the detection process is transparent and traceable, providing strong support for quality control. Through the above specific steps, it can be ensured that when detecting the FPC to be detected, it can be accurately judged whether it has completed initialization, thereby improving the efficiency and effect of DP signal detection and ensuring the signal transmission quality and reliability of the FPC in actual use.

[0106] Based on the above second embodiment, in this embodiment, after step S4, the following is further included:

[0107] S4a: If not, mark the FPC to be tested as unqualified and record the bit error rate of the second surface.

[0108] Specifically, confirm whether the hardware self-test results show that all components are working properly without errors or warnings. Confirm whether the startup log shows that the operating system and necessary services are successfully started without errors or warnings. If any of the hardware self-test results and the startup log show an abnormality, it is determined that the FPC to be tested has not completed initialization. FPCs that fail the initialization test are marked as unqualified. Marks can be added to the system, such as updating the FPC status in the database, or indicating unqualified on the actual physical label. Depending on the specific requirements of the system, marking may be performed by updating the status of the FPC in the MES system, or adding a label to the FPC itself.

[0109] Furthermore, obtain the bit error rate data of the second side of the FPC to be tested. Record the bit error rate data in local storage or test reports to ensure that the results of each test are recorded in detail. Save the bit error rate and test status to the central database or MES system for traceability and quality control. Display the current FPC test status and bit error rate on the test software interface, prompting the user that the FPC has been marked as unqualified. Notify relevant production and quality control personnel through the system and inform them of the test results to ensure seamless connection of subsequent processes.

[0110] It should be noted that the unqualified mark refers to the marking of FPCs that have failed the test, indicating that the FPC does not meet the preset standards and cannot enter the next step of production or use.

[0111] By marking the FPCs that fail the initialization test as unqualified, we ensure that only products that meet the standards enter the next stage of production or use, thereby improving the overall quality of the product. Automatically marking unqualified FPCs and recording the bit error rate reduces manual intervention and improves the efficiency and consistency of testing. The bit error rate and unqualified marks of each test are recorded in detail to ensure that the testing process is transparent and traceable, providing strong support for quality control. The system automatically feeds back the test results and notifies relevant personnel to ensure timely adjustment and optimization of the production and quality control processes.

[0112] In this embodiment, when the FPC to be detected completes the initialization of the first side, the DP state of the first side of the FPC to be detected is obtained; if the DP state of the first side meets the preset operating standard, it is determined whether the bit error rate of the first side of the FPC to be detected is less than the preset bit error standard value; if so, when the FPC to be detected completes the initialization of the second side, the DP state of the second side of the FPC to be detected is obtained; if the DP state of the second side meets the preset operating standard, it is determined whether the bit error rate of the second side of the FPC to be detected is less than the preset bit error standard value; if so, the FPC to be detected is used as the target FPC. This embodiment performs DP state and bit error rate detection on both sides of the FPC through a staged initialization and detection process, and combines automated state acquisition and judgment to significantly improve the efficiency and effect of DP signal detection. Accurate bit error rate detection and strict standards ensure the signal transmission quality of each side. Double-sided detection ensures the comprehensive reliability of the FPC in actual use and reduces the failure rate caused by signal problems. The overall optimized detection process not only greatly reduces detection time and resource consumption, but also improves the reliability and user experience of the final product.

[0113] The present application also provides a DP signal quality detection device, please refer to Figure 4 , Figure 4 This is a schematic diagram of the module structure of the DP signal quality detection device according to an embodiment of the present application, wherein the DP signal quality detection device comprises:

[0114] A first DP state module 401 is used to obtain the DP state of the first surface of the FPC to be detected when the first surface of the FPC to be detected is initialized;

[0115] A first bit error rate judgment module 402, configured to judge whether the bit error rate of the first side of the FPC to be detected is less than a preset bit error standard value if the DP state of the first side meets the preset operating standard;

[0116] The second DP state module 403 is used to obtain the DP state of the second surface of the FPC to be detected when the initialization of the second surface of the FPC to be detected is completed;

[0117] A second bit error rate judgment module 404 is used to judge whether the bit error rate of the second side of the FPC to be detected is less than the preset bit error standard value if the second side DP state meets the preset operation standard;

[0118] The target module 405 is used to, if yes, take the FPC to be detected as the target FPC.

[0119] The DP signal quality detection device provided in the embodiment of the present application adopts the DP signal quality detection method in the above embodiment, which can solve the technical problem of how to improve the efficiency and effect of DP signal detection. Compared with the prior art, the beneficial effects of the DP signal quality detection device provided in the embodiment of the present application are the same as the beneficial effects of the DP signal quality detection method provided in the above embodiment, and the other technical features in the DP signal quality detection device are the same as the features disclosed in the above embodiment method, which will not be repeated here.

[0120] The present application provides a DP signal quality detection device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the DP signal quality detection method in the above-mentioned embodiment.

[0121] Reference below Figure 5 , which shows a schematic diagram of the structure of a DP signal quality detection device suitable for implementing the embodiment of the present application. The DP signal quality detection device in the embodiment of the present application may include but is not limited to mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 5 The DP signal quality detection device shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0122] like Figure 5As shown, the DP signal quality detection device may include a processing device 1001 (e.g., a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read Only Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. In RAM1004, various programs and data required for the operation of the DP signal quality detection device are also stored. The processing device 1001, ROM1002, and RAM1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Generally, the following systems can be connected to the I / O interface 1006: an input device 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; an output device 1008 including, for example, a liquid crystal display (LCD: Liquid Crystal Display), a speaker, a vibrator, etc.; a storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 can allow the DP signal quality detection device to communicate with other devices wirelessly or by wire to exchange data. Although the DP signal quality detection device with various systems is shown in the figure, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems can be implemented or have alternatively.

[0123] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are executed.

[0124] The DP signal quality detection device provided by the present application adopts the DP signal quality detection method in the above embodiment, which can solve the technical problem of how to improve the efficiency and effect of DP signal detection. Compared with the prior art, the beneficial effects of the DP signal quality detection device provided by the present application are the same as the beneficial effects of the DP signal quality detection method provided by the above embodiment, and the other technical features in the DP signal quality detection device are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0125] It should be understood that the various parts disclosed in this application can be implemented by hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0126] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0127] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, computer programs) stored thereon, and the computer-readable program instructions are used to execute the DP signal quality detection method in the above-mentioned embodiment.

[0128] The computer-readable storage medium provided in the present application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, systems or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination of the above. The computer-readable storage medium may be included in the DP signal quality detection device; or may exist independently without being assembled into the DP signal quality detection device.

[0129] The computer-readable storage medium carries one or more programs. When the one or more programs are executed by the DP signal quality detection device, the DP signal quality detection device: when the FPC to be detected completes the initialization of the first side, obtains the DP state of the first side of the FPC to be detected; if the DP state of the first side meets the preset operating standard, judges whether the bit error rate of the first side of the FPC to be detected is less than the preset bit error standard value; if so, when the FPC to be detected completes the initialization of the second side, obtains the DP state of the second side of the FPC to be detected; if the DP state of the second side meets the preset operating standard, judges whether the bit error rate of the second side of the FPC to be detected is less than the preset bit error standard value; if so, takes the FPC to be detected as the target FPC. The computer program code for performing the operation of the present application can be written in one or more programming languages ​​or a combination thereof, and the programming languages ​​include object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" language or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0130] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present application. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0131] The modules involved in the embodiments described in this application may be implemented by software or hardware, wherein the name of the module does not constitute a limitation on the unit itself in some cases.

[0132] The readable storage medium provided in the present application is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-mentioned DP signal quality detection method, and can solve the technical problem of how to improve the efficiency and effect of DP signal detection. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in the present application are the same as the beneficial effects of the DP signal quality detection method provided in the above-mentioned embodiment, and will not be repeated here.

[0133] An embodiment of the present application provides a computer program product, including a computer program, which implements the steps of the above-mentioned DP signal quality detection method when executed by a processor.

[0134] The computer program product provided in this application can solve the technical problem of how to improve the efficiency and effect of DP signal detection. Compared with the prior art, the beneficial effects of the computer program product provided in the embodiment of this application are the same as the beneficial effects of the DP signal quality detection method provided in the above embodiment, which will not be repeated here.

[0135] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent processing scope of the present application.

Claims

1. A DP signal quality detection method, characterized in that: The method comprises: When the FPC to be detected completes initialization of the first surface, obtaining the DP state of the first surface of the FPC to be detected; If the DP state of the first surface meets the preset operating standard, determining whether the bit error rate of the first surface of the FPC to be detected is less than a preset bit error standard value; If yes, when the FPC to be detected completes the initialization of the second surface, obtaining the DP state of the second surface of the FPC to be detected; If the second surface DP state meets the preset operating standard, determining whether the bit error rate of the second surface of the FPC to be detected is less than the preset bit error standard value; If yes, the FPC to be detected is used as the target FPC.

2. The method according to claim 1, characterized in that Before the step of obtaining the DP state of the first surface of the FPC to be detected when the first surface of the FPC to be detected is completed, the method further includes: Read the transmission signal swing standard value in the preset configuration file; According to the transmission signal swing standard value, the transmission signal swing value of the DP signal of the FPC is determined.

3. The method according to claim 1, characterized in that The first surface DP state includes a link rate, a number of data channels, a resolution, and a refresh rate, the preset operation standard includes a preset link rate value, a preset number of channels, a preset resolution, and a preset refresh rate, and before the step of judging whether the first surface bit error rate of the FPC to be detected is less than a preset bit error standard value if the first surface DP state meets the preset operation standard, the step further includes: Respectively comparing the link rate with the preset link rate value, the number of data channels with the preset number of channels, the resolution with the preset resolution, and the refresh rate with the preset refresh rate; If the link rate matches the preset link rate value, the number of data channels matches the preset number of channels, the resolution matches the preset resolution, and the refresh rate matches the preset refresh rate, it is determined that the first surface DP state meets the preset operating standard.

4. The method according to claim 1, characterized in that Before the step of obtaining the DP state of the first surface of the FPC to be detected when the first surface of the FPC to be detected is completed, the method further includes: Obtaining the hardware self-test result and startup log of the FPC to be tested; Based on the hardware self-test result and the startup log, determine whether the FPC to be tested has completed initialization.

5. The method according to claim 1, characterized in that After the step of judging whether the bit error rate of the second surface of the FPC to be detected is less than the preset bit error standard value if the DP state of the second surface meets the preset operating standard, the method further includes: If not, the FPC to be tested is marked as unqualified, and the second side bit error rate is recorded.

6. The method according to claim 1, characterized in that After the step of taking the FPC to be detected as the target FPC, the method further includes: Generate test reports in preset standardized formats; Based on a preset transmission protocol, the detection report is transmitted to the MES system.

7. A DP signal quality detection device, characterized in that: The device comprises: A first DP state module, used for obtaining the DP state of the first surface of the FPC to be detected when the FPC to be detected completes the initialization of the first surface; A first bit error rate judgment module, configured to judge whether the bit error rate of the first side of the FPC to be detected is less than a preset bit error standard value if the DP state of the first side meets the preset operation standard; A second DP state module is used to obtain the DP state of the second surface of the FPC to be detected when the initialization of the second surface of the FPC to be detected is completed; A second bit error rate judgment module, used for judging whether the bit error rate of the second side of the FPC to be detected is less than the preset bit error standard value if the second side DP state meets the preset operation standard; The target module is used to, if yes, take the FPC to be detected as the target FPC.

8. A computer device, characterized in that: The device comprises: a memory, a processor, and a DP signal quality detection program stored in the memory and executable on the processor, wherein the DP signal quality detection program is configured to implement the steps of the DP signal quality detection method according to any one of claims 1 to 6.

9. A storage medium, characterized in that: The storage medium stores a DP signal quality detection program, and when the DP signal quality detection program is executed by the processor, the steps of the DP signal quality detection method according to any one of claims 1 to 6 are implemented.

10. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the steps of the DP signal quality detection method according to any one of claims 1 to 6 are implemented.

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