Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel comprises an anode layer, a first light-emitting functional layer, an N-type charge generation layer, a light-emitting composite layer and a cathode layer, the first light-emitting functional layer is arranged on one side of the anode layer; the N-type charge generation layer is arranged on the side, away from the anode layer, of the first light-emitting functional layer; the light-emitting composite layer is arranged on the side, away from the first light-emitting functional layer, of the N-type charge generation layer; the cathode layer is arranged on one side, far away from the N-type charge generation layer, of the light-emitting composite layer; the light-emitting composite layer comprises a plurality of functional layers which are stacked, and the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage range of the orthographic projection of at least one functional layer in the light-emitting composite layer on the cathode layer; according to the display panel, the probability of short circuit between the N-type charge generation layer and the cathode layer can be reduced, the probability of short circuit of the light-emitting composite layer between the cathode layer and the N-type charge generation layer is reduced, and the display uniformity and stability of the display panel are improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Organic Light Emitting Display (OLED) display panels have the characteristics of low power consumption, fast response speed, and wide viewing angle, and have broad application prospects.

[0003] At present, in order to improve the efficiency and life of an organic light emitting diode display panel, a plurality of light emitting layers are usually stacked (tandem) together through a charge generation layer, which can greatly improve the light emitting efficiency and life compared to a display panel with a single-layer light emitting device.

[0004] However, the charge generation layer includes an N-type charge generation layer and a P-type charge generation layer which are stacked, and the N-type charge generation layer is formed by doping an N-type doping material into an electron transport material. Therefore, when the cathode layer in the organic light emitting diode display panel contacts the doped part in the N-type charge generation layer, it is easy to cause the cathode layer and the doped part in the N-type charge generation layer to be short-circuited, thereby causing the light emitting unit located between the cathode layer and the N-type charge generation layer to be short-circuited, affecting the display effect of the display panel. Summary of the invention

[0005] The embodiments of the present application provide a display panel and a display device, which can reduce the probability of short circuit between the N-type charge generation layer and the cathode layer, and improve the stability and display effect of the display panel.

[0006] An embodiment of the present application provides a display panel, comprising:

[0007] Anode layer;

[0008] A first light-emitting functional layer is disposed on one side of the anode layer;

[0009] An N-type charge generation layer is arranged on a side of the first light-emitting functional layer away from the anode layer;

[0010] A light-emitting composite layer is disposed on a side of the N-type charge generation layer away from the first light-emitting functional layer;

[0011] A cathode layer, disposed on a side of the light-emitting composite layer away from the N-type charge generation layer;

[0012] The light-emitting composite layer includes a plurality of stacked functional layers, and the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage of the orthographic projection of at least one of the functional layers in the light-emitting composite layer on the cathode layer.

[0013] In one embodiment of the present application, doped materials and intrinsic materials are distributed in the N-type charge generation layer, and the distribution area of ​​the doped materials in the N-type charge generation layer is the same as the distribution area of ​​the intrinsic materials in the N-type charge generation layer.

[0014] In one embodiment of the present application, an edge of the N-type charge generation layer is retracted toward a center of the N-type charge generation layer relative to an edge of at least one of the functional layers in the light-emitting composite layer.

[0015] In one embodiment of the present application, the edge of the N-type charge generation layer is retracted by a distance greater than or equal to 30 micrometers relative to the edge of at least one of the functional layers in the light-emitting composite layer toward the center of the N-type charge generation layer.

[0016] In one embodiment of the present application, at least one of the functional layers in the light-emitting composite layer covers an upper surface of the N-type charge generation layer away from the first light-emitting functional layer and a plurality of side surfaces of the N-type charge generation layer connected to the upper surface.

[0017] In one embodiment of the present application, the plurality of functional layers include a P-type charge generation layer disposed between the N-type charge generation layer and the cathode layer and a second light-emitting functional layer disposed between the P-type charge generation layer and the cathode layer;

[0018] The orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage of the orthographic projection of the P-type charge generation layer on the cathode layer, and / or the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage of the orthographic projection of the second light-emitting functional layer on the cathode layer.

[0019] In one embodiment of the present application, the first light-emitting functional layer includes a first light-emitting layer and a first light-emitting auxiliary layer which are stacked, and the first light-emitting auxiliary layer includes at least one of a first electron injection layer, a first electron transport layer, a first hole injection layer, and a first hole transport layer;

[0020] The second light-emitting functional layer includes a second light-emitting layer and a second light-emitting auxiliary layer stacked, and the second light-emitting auxiliary layer includes at least one of a second electron injection layer, a second electron transport layer, a second hole injection layer and a second hole transport layer;

[0021] Among them, the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage of the orthographic projection of the P-type charge generation layer on the cathode layer, and / or the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage of the orthographic projection of the second light-emitting auxiliary layer on the cathode layer.

[0022] In one embodiment of the present application, at least one of the functional layers in the light-emitting composite layer is disposed between the N-type charge generation layer and the cathode layer.

[0023] In one embodiment of the present application, the display panel includes a display area and a non-display area adjacent to the display area, the non-display area includes a binding area located on one side of the display area, the display panel includes a substrate and a VDD signal terminal disposed on the substrate and located between the binding area and the display area, and the anode layer is electrically connected to the VDD signal terminal;

[0024] The orthographic projection of the N-type charge generation layer on the substrate is spaced apart from the orthographic projection of the VDD signal terminal on the substrate.

[0025] According to the above-mentioned purpose of the present application, an embodiment of the present application further provides a display device, which includes the display panel.

[0026] Beneficial effects of the present application: The present application sets the orthographic projection of the N-type charge generation layer on the cathode layer to not exceed the coverage range of the orthographic projection of at least one functional layer in the light-emitting composite layer on the cathode layer; thereby reducing the probability of a short circuit between the N-type charge generation layer and the cathode layer, reducing the probability of a short circuit in the light-emitting composite layer located between the cathode layer and the N-type charge generation layer, improving the display uniformity and stability of the display panel, and improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The technical solution and other beneficial effects of the present application will be made apparent by describing in detail the specific implementation methods of the present application in conjunction with the accompanying drawings.

[0028] Figure 1 A schematic diagram of the structure of a display panel provided by an embodiment;

[0029] Figure 2 A schematic diagram of a first structure of a display panel provided in an embodiment of the present application;

[0030] Figure 3 A second structural schematic diagram of a display panel provided in an embodiment of the present application;

[0031] Figure 4 A third structural schematic diagram of a display panel provided in an embodiment of the present application;

[0032] Figure 5 A schematic diagram of the coverage of a light-emitting composite layer in a display panel provided in an embodiment of the present application;

[0033] Figure 6A schematic diagram of another coverage range of a light-emitting composite layer in a display panel provided in an embodiment of the present application;

[0034] Figure 7 A schematic diagram of a planar distribution structure of a display panel provided in an embodiment of the present application;

[0035] Figure 8 A flow chart of a method for manufacturing a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0036] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0037] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the various specific processes and material examples provided by the present application, but those of ordinary skill in the art can appreciate the application of other processes and / or the use of other materials.

[0038] Please refer to Figure 1 A display panel with a tandem structure generally includes an anode 1, a first light-emitting unit 2 arranged on the anode 1, an N-type charge generation layer 3 arranged on the first light-emitting unit 2, a second light-emitting unit 4 arranged on the N-type charge generation layer 3, and a cathode layer 5 arranged on the second light-emitting unit 4; wherein, when the N-type charge generation layer 3 comes into contact with the cathode layer 5, especially when the doped part in the N-type charge generation layer 3 comes into contact, it is easy to cause the cathode layer 5 to be short-circuited with the doped part in the N-type charge generation layer 3, thereby causing the light-emitting unit located between the cathode layer 5 and the N-type charge generation layer 3 to be short-circuited, that is, causing the second light-emitting unit 4 to be short-circuited, resulting in a direct reduction of the start-up voltage by about 50%, which seriously affects the stability and display uniformity of the display panel, for example, light leakage is easy to occur under the L0 grayscale, thereby affecting the display effect of the display panel.

[0039] Please refer to Figure 2An embodiment of the present application provides a display panel, which includes an anode layer 10, a first light-emitting functional layer 20, an N-type charge generation layer 30, a light-emitting composite layer 60 and a cathode layer 50.

[0040] Among them, the first light-emitting functional layer 20 is arranged on one side of the anode layer 10; the N-type charge generation layer 30 is arranged on the side of the first light-emitting functional layer 20 away from the anode layer 10; the light-emitting composite layer 60 is arranged on the side of the N-type charge generation layer 30 away from the first light-emitting functional layer 20; the cathode layer 50 is arranged on the side of the light-emitting composite layer 60 away from the N-type charge generation layer 30.

[0041] Furthermore, the light-emitting composite layer 60 includes a plurality of stacked functional layers, and the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of the orthographic projection of at least one of the functional layers in the light-emitting composite layer 60 on the cathode layer 50 .

[0042] During the implementation and application process, the embodiment of the present application sets the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 to not exceed the coverage range of the orthographic projection of at least one functional layer in the light-emitting composite layer 60 on the cathode layer 50; thereby, the probability of a short circuit between the N-type charge generation layer 30 and the cathode layer 50 is reduced, and the probability of the light-emitting composite layer 60 located between the cathode layer 50 and the N-type charge generation layer 30 being short-circuited is reduced, thereby improving the display uniformity and stability of the display panel and improving the display effect of the display panel.

[0043] Specifically, please combine Figure 2 , Figure 3 as well as Figure 4 In some embodiments, the display panel may include a substrate, a thin film transistor array layer disposed on the substrate, a light emitting device layer disposed on a side of the thin film transistor array layer away from the substrate, and an encapsulation layer disposed on a side of the light emitting device layer away from the thin film transistor array layer.

[0044] It should be noted that the light-emitting device layer includes the anode layer 10, the first light-emitting functional layer 20, the N-type charge generation layer 30, the light-emitting composite layer 60 and the cathode layer 50 as described in the above embodiments, wherein the anode layer 10 includes a plurality of anodes, and each anode can be connected to the thin film transistor in the thin film transistor array layer; further, the encapsulation layer can cover the side of the cathode layer 50 away from the light-emitting composite layer 60.

[0045] In some embodiments, the first light-emitting functional layer 20 includes the first light-emitting layer 21 and the first light-emitting auxiliary layer which are stacked, and the first light-emitting auxiliary layer may include at least one of a first hole layer 22 and a first electron layer 23 .

[0046] The light-emitting composite layer 60 includes a plurality of functional layers stacked together, and the plurality of functional layers may include a P-type charge generation layer 61 between the N-type charge generation layer 30 and the cathode layer 50 , and a second light-emitting functional layer 40 between the P-type charge generation layer 61 and the cathode layer 50 .

[0047] The second light-emitting functional layer 40 includes a second light-emitting layer 41 and a second light-emitting auxiliary layer stacked in layers. The second light-emitting auxiliary layer may include at least one of a second hole layer 42 and a second electron layer 43 .

[0048] In some embodiments, please combine Figure 3 as well as Figure 4 The first hole layer 22 may include a first hole injection layer 221 and a first hole transport layer 222, and the first electron layer 23 may include a first electron injection layer 231 and a first electron transport layer 232; the second hole layer 42 may include a second hole injection layer 421 and a second hole transport layer 422, and the second electron layer 43 may include a second electron injection layer 431 and a second electron transport layer 432.

[0049] Continuing from the above, the first light-emitting auxiliary layer may include at least one of a first hole injection layer 221, a first hole transport layer 222, a first electron injection layer 231 and a first electron transport layer 232; the second light-emitting auxiliary layer may include at least one of a second hole injection layer 421, a second hole transport layer 422, a second electron injection layer 431 and a second electron transport layer 432.

[0050] In some embodiments, please refer to Figure 4 The first light-emitting functional layer 20 includes a first hole injection layer 221, a first hole transport layer 222, a first light-emitting layer 21, a first electron injection layer 231 and a first electron transport layer 232 which are sequentially stacked on the anode layer 10; the second light-emitting functional layer 40 includes a second hole injection layer 421, a second hole transport layer 422, a second light-emitting layer 41, a second electron injection layer 431 and a second electron transport layer 432 which are sequentially stacked on the P-type charge generation layer 61.

[0051] In some embodiments, the P-type charge generation layer 61 is located between the N-type charge generation layer 30 and the second hole injection layer 421 ; the material of the P-type charge generation layer 61 includes a hole transport material and a P-type doping material distributed in the hole transport material.

[0052] In some embodiments, the N-type charge generation layer 30 is distributed with intrinsic materials and doping materials; further, the intrinsic material includes an electron transport material, and the doping material includes a metal material, for example, the metal material may include at least one of Yb and Li. It should be noted that since the doping material is a metal material, and the metal material has conductivity, when the N-type charge generation layer 30 contacts the cathode layer 50, it is easy to cause the cathode layer 50 to short-circuit with the N-type charge generation layer 30, thereby causing the second light-emitting functional layer 40 to be short-circuited, resulting in a direct reduction of the start-up voltage by about 50%, which seriously affects the stability and display uniformity of the display panel, and further affects the display effect of the display panel.

[0053] In some embodiments, the distribution area of ​​the doping material in the N-type charge generation layer 30 is the same as the distribution area of ​​the intrinsic material in the N-type charge generation layer 30, that is, the N-type charge generation layer 30 is formed by overall doping. Specifically, in the process, the same mask or a mask with the same evaporation opening area can be used to evaporate the intrinsic material and the doping material, so that the evaporation area of ​​the intrinsic material and the doping material is the same, and the evaporation areas overlap.

[0054] As mentioned above, in the embodiment of the present application, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage range of the orthographic projection of at least one functional layer in the light-emitting composite layer 60 on the cathode layer 50, that is, the embodiment of the present application limits the boundary of the N-type charge generation layer 30 and the boundary of the light-emitting composite layer 60 so that the boundary of the N-type charge generation layer 30 does not exceed the boundary of the light-emitting composite layer 60, thereby effectively reducing the probability of short circuit between the N-type charge generation layer 30 and the cathode layer 50, reducing the probability of short circuit of the second light-emitting functional layer 40, improving the display uniformity of the display panel, improving the L0 grayscale light leakage phenomenon, and improving the display effect and stability of the display panel.

[0055] It should be noted that, since the light-emitting composite layer 60 includes multiple functional layers, the boundary of the N-type charge generation layer 30 does not exceed the boundary of at least one functional layer in the light-emitting composite layer 60, that is, it can serve the purpose of blocking the N-type charge generation layer 30 and the cathode layer 50, and can effectively reduce the probability of short circuit between the N-type charge generation layer 30 and the cathode layer 50, reduce the probability of the second light-emitting functional layer 40 being short-circuited, improve the display uniformity of the display panel, improve the L0 grayscale light leakage phenomenon, and improve the display effect and stability of the display panel.

[0056] In some embodiments, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of the orthographic projection of the P-type charge generation layer 61 on the cathode layer 50, and / or the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of the orthographic projection of the second light-emitting functional layer 40 on the cathode layer 50.

[0057] In some embodiments, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of the orthographic projection of the P-type charge generation layer 61 on the cathode layer 50, and / or the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of the orthographic projection of the second light-emitting auxiliary layer on the cathode layer 50.

[0058] In some embodiments, when the second light-emitting auxiliary layer includes the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431 and the second electron transport layer 432, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage range of at least one of the orthographic projection of the P-type charge generation layer 61 on the cathode layer 50, the orthographic projection of the second hole injection layer 421 on the cathode layer 50, the orthographic projection of the second hole transport layer 422 on the cathode layer 50, the orthographic projection of the second electron injection layer 431 on the cathode layer 50 and the orthographic projection of the second electron transport layer 432 on the cathode layer 50.

[0059] For further information, please refer to Figure 5 In some embodiments, the edge of the N-type charge generation layer 30 is retracted toward the center of the N-type charge generation layer 30 relative to the edge of at least one of the functional layers in the light-emitting composite layer 60; thereby, the probability of contact between the side surface of the N-type charge generation layer 30 and the cathode layer 50 can be further reduced.

[0060] It can be understood that the edge of the N-type charge generation layer 30 can be retracted toward the center of the N-type charge generation layer 30 relative to the edge of at least one functional layer in the light-emitting composite layer 60, which can reduce the probability of contact between the side surface of the N-type charge generation layer 30 and the cathode layer 50.

[0061] In some embodiments, the edge of the N-type charge generation layer 30 may be retracted toward the center of the N-type charge generation layer 30 relative to at least one of the P-type charge generation layer 61 and the second light-emitting auxiliary layer in the cathode layer 50 .

[0062] In some embodiments, when the second light-emitting auxiliary layer includes the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431 and the second electron transport layer 432, the edge of the N-type charge generation layer 30 can be retracted toward the center of the N-type charge generation layer 30 relative to at least one of the P-type charge generation layer 61, the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431 and the second electron transport layer 432.

[0063] Further, in some embodiments, the distance L by which the edge of the N-type charge generation layer 30 is retracted relative to the edge of at least one of the functional layers in the light-emitting composite layer 60 toward the center of the N-type charge generation layer 30 is greater than or equal to 30 microns. For example, the distance by which the edge of the N-type charge generation layer 30 is retracted may be 30 microns, 40 microns, 50 microns, 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 110 microns, 120 microns, 130 microns, 140 microns or 150 microns.

[0064] In some embodiments, please refer to Figure 6 , at least one of the functional layers in the light-emitting composite layer 60 covers the upper surface 301 of the N-type charge generation layer 30 away from the first light-emitting functional layer 20 and the multiple side surfaces 302 of the N-type charge generation layer 30 connected to the upper surface 301; that is, at least one of the functional layers in the light-emitting composite layer 60 encapsulates the N-type charge generation layer 30.

[0065] Among them, the light-emitting composite layer 60 is arranged between the N-type charge generation layer 30 and the cathode layer 50, and at least one of the functional layers in the light-emitting composite layer 60 is arranged between the N-type charge generation layer 30 and the cathode layer 50, thereby further reducing the probability of contact between the N-type charge generation layer 30 and the cathode layer 50.

[0066] In some embodiments, at least one of the P-type charge generation layer 61 and the second light-emitting auxiliary layer in the cathode layer 50 is interposed between the N-type charge generation layer 30 and the cathode layer 50 .

[0067] In some embodiments, when the second light-emitting auxiliary layer includes the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431 and the second electron transport layer 432, the N-type charge generation layer 30 and the cathode layer 50 are separated by at least one of the P-type charge generation layer 61, the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431 and the second electron transport layer 432.

[0068] In some embodiments, please combine Figure 2 as well as Figure 7 The display panel includes a display area 101 and a non-display area 102 adjacent to the display area 101, the non-display area 102 includes a binding area 1021 located on one side of the display area 101, the display panel includes a substrate and a VDD signal terminal 11 arranged on the substrate and located between the binding area 1021 and the display area 101, and the anode layer 10 is electrically connected to the VDD signal terminal 11.

[0069] Among them, the orthographic projection of the N-type charge generation layer 30 on the substrate is spaced apart from the orthographic projection of the VDD signal terminal 11 on the substrate, that is, the coverage range of the N-type charge generation layer 30 does not extend to the position of the VDD signal terminal 11, and thus the N-type charge generation layer 30 will not be short-circuited with the anode layer 10.

[0070] Furthermore, in some embodiments, the cathode layer 50 covers the display area 101 and extends outside the display area 101, and the cathode layer 50 is connected to a VSS signal terminal (not shown in the figure) in the non-display area 102, wherein the VSS signal terminal may be distributed around the display area 101, and may be located at least in other areas of the non-display area 102 except for the side where the binding area 1021 is provided, and the N-type charge generation layer 30 also covers the display area 101 and extends to the non-display area 102, and on the periphery of the display area 101, the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 is located within the coverage range of the orthographic projection of the light-emitting composite layer 60.

[0071] Continuing from the above, the embodiment of the present application sets the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 to not exceed the coverage range of the orthographic projection of at least one functional layer in the light-emitting composite layer 60 on the cathode layer 50; thereby, the probability of a short circuit between the N-type charge generation layer 30 and the cathode layer 50 is reduced, the probability of the light-emitting composite layer 60 located between the cathode layer 50 and the N-type charge generation layer 30 being short-circuited is reduced, the display uniformity and stability of the display panel are improved, and the display effect of the display panel is improved.

[0072] According to the above purpose of this application, please combine Figure 2 , Figure 3 , Figure 4 as well as Figure 8 The present application also provides a method for manufacturing a display panel, the method comprising:

[0073] S10 , forming an anode layer 10 .

[0074] S20 , forming a first light-emitting functional layer 20 on one side of the anode layer 10 .

[0075] S30 , forming an N-type charge generation layer 30 on a side of the first light-emitting functional layer 20 away from the anode layer 10 .

[0076] S40 , forming a light-emitting composite layer 60 on a side of the N-type charge generation layer 30 away from the first light-emitting functional layer 20 , wherein the light-emitting composite layer 60 includes a plurality of stacked functional layers.

[0077] S50, forming a cathode layer 50 on a side of the light-emitting composite layer 60 away from the N-type charge generation layer 30, wherein the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of the orthographic projection of at least one of the functional layers in the light-emitting composite layer 60 on the cathode layer 50.

[0078] Specifically, in step S10, a substrate is first provided, and the substrate may be a rigid substrate or a flexible substrate.

[0079] A thin film transistor layer is formed on the substrate, the thin film transistor layer includes a plurality of thin film transistors distributed in an array on the substrate, and the thin film transistor is part of the driving circuit in the display panel and can be used to control the on and off of signal transmission; the thin film transistor includes an active layer, a gate, a source and a drain.

[0080] A flat layer is formed on a side of the thin film transistor layer away from the substrate, and an anode layer 10 is formed on a side of the flat layer away from the thin film transistor layer, and the anode layer 10 includes a plurality of patterned anodes, each of which can be connected to a source or drain of the thin film transistor, and a signal is transmitted to the anode through the control of the thin film transistor.

[0081] In step S20, a pixel definition layer is formed on the planar layer, wherein a plurality of pixel openings are formed in the pixel definition layer, and each of the pixel openings exposes one of the anodes.

[0082] Next, a first light-emitting functional layer 20 is formed on the pixel definition layer, wherein the first light-emitting functional layer 20 includes a first light-emitting layer 21 and a first light-emitting auxiliary layer formed on the pixel definition layer; further, the first light-emitting functional layer 20 may include a first hole layer 22, a first light-emitting layer 21 and a first electron layer 23 formed in sequence on the pixel definition layer; the first hole layer 22 and the first electron layer 23 continuously cover a side of the pixel definition layer away from the flat layer and the plurality of pixel openings, and the first light-emitting layer 21 may include a plurality of first light-emitting portions arranged in the plurality of pixel openings, and one first light-emitting portion is correspondingly located in one pixel opening and is located between the first hole layer 22 and the first electron layer 23.

[0083] In some embodiments, the first hole layer 22 may include a first hole injection layer 221 and a first hole transport layer 222 , and the first electron layer 23 may include a first electron injection layer 231 and a first electron transport layer 232 .

[0084] In step S30 , an intrinsic material and the doping material are evaporated on a side of the first light-emitting functional layer 20 away from the anode layer 10 using a first mask to form the N-type charge generation layer 30 .

[0085] It can be understood that the evaporation opening areas corresponding to the intrinsic material and the doping material are the same, so the distribution area of ​​the doping material in the N-type charge generation layer 30 is the same as the distribution area of ​​the intrinsic material in the N-type charge generation layer 30.

[0086] In some embodiments, the intrinsic material includes an electron transport material, and the doping material includes a metal material. For example, the metal material may include at least one of Yb and Li.

[0087] In step S40 , at least one second mask may be used to form the light-emitting composite layer 60 on a side of the N-type charge generation layer 30 away from the first light-emitting functional layer 20 .

[0088] A P-type charge generation layer 61 is formed on a side of the N-type charge generation layer 30 away from the first light-emitting functional layer 20 , and the material of the P-type charge generation layer 61 includes a hole transport material and a P-type doping material distributed in the hole transport material.

[0089] A second light-emitting functional layer 40 is formed on the side of the P-type charge generation layer 61 away from the N-type charge generation layer 30, wherein the second light-emitting functional layer 40 includes a second light-emitting layer 41 and a second light-emitting auxiliary layer formed on the side of the P-type charge generation layer 61 away from the N-type charge generation layer 30; further, the second light-emitting functional layer 40 may include a second hole layer 42, a second light-emitting layer 41 and a second electron layer 43 formed in sequence on the P-type charge generation layer 61; the second hole layer 42 and the second electron layer 43 continuously cover the side of the P-type charge generation layer 61 away from the N-type charge generation layer 30, and the second light-emitting layer 21 may include a plurality of second light-emitting portions arranged in the plurality of pixel openings, and one second light-emitting portion is correspondingly located in one pixel opening and is located between the second hole layer 42 and the second electron layer 43.

[0090] In some embodiments, the second hole layer 42 may include a second hole injection layer 421 and a second hole transport layer 422 , and the second electron layer 43 may include a second electron injection layer 431 and a second electron transport layer 432 .

[0091] It should be noted that the P-type charge generation layer 61, the second hole layer 42 and the second electron layer 43 can be formed by evaporation using at least one of the second mask plates, that is, any one or more of the P-type charge generation layer 61, the second hole injection layer 421, the second hole transport layer 422, the second electron injection layer 431 and the second electron transport layer 432 can be formed by using the second mask plate with the same evaporation opening area, or by using the second mask plate with different evaporation opening areas.

[0092] In some embodiments, when the number of the second mask is one, the evaporation opening area of ​​the second mask is greater than or equal to the evaporation opening area of ​​the first mask.

[0093] In some embodiments, when there are multiple second mask plates, the evaporation opening area of ​​each of the second mask plates is the same or different, and the evaporation opening area of ​​at least one of the second mask plates is greater than or equal to the evaporation opening area of ​​the first mask plate.

[0094] As mentioned above, by controlling the area of ​​the evaporation openings of the second mask and the area of ​​the evaporation openings of the first mask, the boundary of at least one of the functional layers in the light-emitting composite layer 60 can be made greater than or equal to the boundary of the N-type charge generation layer 30, so that the boundary of the N-type charge generation layer 30 does not exceed the boundary of at least one of the functional layers in the light-emitting composite layer 60.

[0095] In step S50, a cathode layer 50 is formed on a side of the light-emitting composite layer 60 away from the N-type charge generation layer 30, and the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 does not exceed the coverage of the orthographic projection of at least one of the functional layers in the light-emitting composite layer 60 on the cathode layer 50.

[0096] Wherein, at least one functional layer of the light-emitting composite layer 60 is spaced between the N-type charge generation layer 30 and the cathode layer 50 .

[0097] In summary, the embodiment of the present application sets the orthographic projection of the N-type charge generation layer 30 on the cathode layer 50 to not exceed the coverage range of the orthographic projection of at least one functional layer in the light-emitting composite layer 60 on the cathode layer 50; thereby reducing the probability of a short circuit between the N-type charge generation layer 30 and the cathode layer 50, and reducing the probability of the light-emitting composite layer 60 located between the cathode layer 50 and the N-type charge generation layer 30 being short-circuited, thereby improving the display uniformity and stability of the display panel, and improving the display effect of the display panel.

[0098] In addition, an embodiment of the present application further provides a display device, which includes the display panel described in the above embodiment, or a display panel manufactured by the method for manufacturing the display panel described in the above embodiment.

[0099] It can be understood that, since the display device includes the display panel described in the above embodiment, the display device has the same beneficial effects as the display panel described in the above embodiment, which will not be described in detail herein.

[0100] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0101] The above is a detailed introduction to a display panel and a display device provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, characterized in that: include: Anode layer; A first light-emitting functional layer is disposed on one side of the anode layer; An N-type charge generation layer is arranged on a side of the first light-emitting functional layer away from the anode layer; A light-emitting composite layer is disposed on a side of the N-type charge generation layer away from the first light-emitting functional layer; A cathode layer, disposed on a side of the light-emitting composite layer away from the N-type charge generation layer; The light-emitting composite layer includes a plurality of stacked functional layers, and the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage of the orthographic projection of at least one of the functional layers in the light-emitting composite layer on the cathode layer.

2. The display panel according to claim 1, characterized in that: Doping materials and intrinsic materials are distributed in the N-type charge generation layer, and a distribution area of ​​the doping materials in the N-type charge generation layer is the same as a distribution area of ​​the intrinsic materials in the N-type charge generation layer.

3. The display panel according to claim 1 or 2, characterized in that: The edge of the N-type charge generation layer is retracted toward the center of the N-type charge generation layer relative to the edge of at least one of the functional layers in the light-emitting composite layer.

4. The display panel according to claim 3, characterized in that: The distance that the edge of the N-type charge generation layer is retracted toward the center of the N-type charge generation layer relative to the edge of at least one of the functional layers in the light-emitting composite layer is greater than or equal to 30 micrometers.

5. The display panel according to claim 3, characterized in that: At least one of the functional layers in the light-emitting composite layer covers an upper surface of the N-type charge generation layer away from the first light-emitting functional layer and a plurality of side surfaces of the N-type charge generation layer connected to the upper surface.

6. The display panel according to claim 1 or 2, characterized in that: The plurality of functional layers include a P-type charge generation layer disposed between the N-type charge generation layer and the cathode layer and a second light-emitting functional layer disposed between the P-type charge generation layer and the cathode layer; The orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage of the orthographic projection of the P-type charge generation layer on the cathode layer, and / or the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage of the orthographic projection of the second light-emitting functional layer on the cathode layer.

7. The display panel according to claim 6, characterized in that: The first light-emitting functional layer includes a first light-emitting layer and a first light-emitting auxiliary layer which are stacked, and the first light-emitting auxiliary layer includes at least one of a first electron injection layer, a first electron transport layer, a first hole injection layer and a first hole transport layer; The second light-emitting functional layer includes a second light-emitting layer and a second light-emitting auxiliary layer stacked, and the second light-emitting auxiliary layer includes at least one of a second electron injection layer, a second electron transport layer, a second hole injection layer and a second hole transport layer; Among them, the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage of the orthographic projection of the P-type charge generation layer on the cathode layer, and / or the orthographic projection of the N-type charge generation layer on the cathode layer does not exceed the coverage of the orthographic projection of the second light-emitting auxiliary layer on the cathode layer.

8. The display panel according to claim 1, characterized in that: At least one functional layer in the light-emitting composite layer is disposed between the N-type charge generation layer and the cathode layer.

9. The display panel according to claim 1, characterized in that: The display panel includes a display area and a non-display area adjacent to the display area, the non-display area includes a binding area located at one side of the display area, the display panel includes a substrate and a VDD signal terminal disposed on the substrate and located between the binding area and the display area, and the anode layer is electrically connected to the VDD signal terminal; The orthographic projection of the N-type charge generation layer on the substrate is spaced apart from the orthographic projection of the VDD signal terminal on the substrate.

10. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1 to 9.

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