Absolute temperature proportional voltage determination without dynamic element matching

Abstract

The invention relates to a voltage determination proportional to absolute temperature without dynamic element matching. An integrated circuit is provided that includes a current source, a plurality of transistors arranged in parallel, a plurality of resistors, a plurality of switches, a switch control circuit, and a measurement circuit. Each resistor is coupled with an emitter of a respective transistor. Each switch selectively couples a current source to a respective transistor such that a bias current flows from the current source to an emitter of the respective transistor when the respective switch is closed. A measurement circuit is coupled to the first transistor between an emitter of the first transistor and a respective resistor. The measurement circuit is configured to measure a base-emitter voltage (VBE1) of the first transistor when all switches are closed and a base-emitter voltage (VBE2) of the first transistor when only a switch associated with the first transistor is closed, respectively, and to determine [Delta] VBE by calculating a difference between VBE2 and VBE1.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority to U.S. Provisional Patent Application Serial No. 63 / 525,019, filed on July 5, 2023, entitled “PROPORTIONAL TO ABSOLUTETEMPERATURE VOLTAGE DETERMINATION WITHOUT DYNAMIC ELEMENT MATCHING,” which is incorporated herein by reference in its entirety. Technical Field

[0003] Example embodiments of the present disclosure relate generally to electronic circuits and, more particularly, to temperature measurement of integrated circuits using a voltage proportional to absolute temperature. Background Art

[0004] Applicants have discovered many technical challenges and difficulties associated with using a voltage proportional to absolute temperature for temperature measurement. Through hard work, ingenuity, and innovation, Applicants have solved the problems associated with using a voltage proportional to absolute temperature for temperature measurement by developing the solutions embodied in the present disclosure, which are described in detail below. Summary of the invention

[0005] Various embodiments described herein relate to systems, devices, products, and methods for temperature measurement using a PTAT voltage.

[0006] According to some embodiments of the present disclosure, an example integrated circuit is provided. In some embodiments, the example integrated circuit includes a current source, a plurality of transistors arranged in parallel, a plurality of resistors, a plurality of switches, a switch control circuit, and a coupled measurement circuit. Each of the plurality of transistors has an emitter and a base. Each resistor is coupled to the emitter of a corresponding transistor in the plurality of transistors. Each switch selectively couples a current source to a corresponding resistor in the plurality of resistors so that when one or more corresponding switches in the plurality of switches are closed, a bias current flows from the current source to the emitter of one or more corresponding transistors in the plurality of transistors. The switch control circuit is configured to close all switches in the plurality of switches at different times, and to close switches associated with a first transistor in the plurality of transistors respectively while opening all other switches. The measurement circuit is coupled to a first transistor in the plurality of transistors between the emitter of the first transistor in the plurality of transistors and the corresponding resistor in the plurality of resistors. The measurement circuit is configured to measure, respectively, a base-emitter voltage (VBE) of a first transistor of the plurality of transistors when all switches of the plurality of switches are closed and a VBE of the first transistor of the plurality of transistors when only a switch associated with the first transistor of the plurality of transistors is closed. The measurement circuit is further configured to determine ΔVBE by calculating a difference between the VBE when only a switch associated with the first transistor of the plurality of transistors is closed and the VBE when all switches of the plurality of switches are closed.

[0007] In some embodiments, the measurement circuit is further configured to calculate the temperature based on the determined ΔVBE.

[0008] In some embodiments, the measurement circuit includes an analog-to-digital converter for converting the determined ΔVBE from an analog value to a digital value.

[0009] In some embodiments, each transistor of the plurality of transistors comprises a bipolar junction transistor.

[0010] In some embodiments, each of the plurality of bipolar junction transistors comprises a parasitic bipolar junction transistor of CMOS technology.

[0011] In some embodiments, the bias current from the current source is selected to be within an operating region of the plurality of transistors.

[0012] In some embodiments, each resistor of the plurality of resistors has a same resistance value.

[0013] In some embodiments, the same resistance value is selected so that, when all of the plurality of switches are closed and bias current flows through all of the resistors, a difference in bias current flowing through each of the plurality of resistors due to mismatch of transistors associated with each of the plurality of resistors is less than a threshold percentage of a nominal bias current passing through each of the plurality of resistors.

[0014] According to some embodiments of the present disclosure, an example method is provided. In some embodiments, the example method includes, for a first transistor of a plurality of transistors arranged in parallel, each of the plurality of transistors having an emitter and a base, the emitter of each of the plurality of transistors being selectively coupled to a current source via a corresponding switch of a plurality of switches and a corresponding resistor of a plurality of resistors, so that when the corresponding one or more switches are closed, a bias current flows from the current source to the emitter of the corresponding one or more transistors of the plurality of transistors, respectively measuring a base-emitter voltage (VBE) when all switches of the plurality of switches are closed and the VBE when only the switch associated with the first transistor of the plurality of transistors is closed; determining a ΔVBE of the first transistor of the plurality of transistors by calculating the difference between the VBE when only the switch associated with the first transistor of the plurality of transistors is closed and the VBE when all switches of the plurality of switches are closed; and calculating a temperature using the determined ΔVBE.

[0015] In some embodiments, the method further includes converting each of the measured VBEs from an analog value to a digital value.

[0016] In some embodiments, each transistor of the plurality of transistors comprises a bipolar junction transistor.

[0017] In some embodiments, the bias current from the current source is selected to be within an operating region of the plurality of transistors.

[0018] In some embodiments, each resistor in the plurality of resistors has a same resistance value.

[0019] In some embodiments, the same resistance value is selected so that, when all of the plurality of switches are closed and bias current flows through all of the resistors, a difference in bias current flowing through each of the plurality of resistors due to mismatch of transistors associated with each of the plurality of resistors is less than a threshold percentage of a nominal bias current passing through each of the plurality of resistors.

[0020] According to some embodiments of the present disclosure, an example temperature sensor is provided. In some embodiments, the example temperature sensor includes a current source, a plurality of transistors arranged in parallel, a plurality of resistors, a plurality of switches, a switch control circuit, and a measurement circuit. Each of the plurality of transistors has an emitter and a base. Each resistor is coupled to the emitter of a corresponding transistor in the plurality of transistors. Each switch selectively couples a current source to a corresponding resistor in the plurality of resistors, so that when one or more corresponding switches in the plurality of switches are closed, a bias current flows from the current source to the emitter of one or more corresponding transistors in the plurality of transistors. The switch control circuit is configured to close all switches in the plurality of switches at different times, and to close switches associated with a first transistor in the plurality of transistors respectively while opening all other switches. The measurement circuit is coupled to a first transistor in the plurality of transistors between the emitter of the first transistor in the plurality of transistors and the corresponding resistor of the plurality of resistors. The measurement circuit is configured to respectively measure a base-emitter voltage (VBE) of a first transistor of the plurality of transistors when all switches of the plurality of switches are closed and the VBE of the first transistor of the plurality of transistors when only a switch associated with the first transistor of the plurality of transistors is closed. The measurement circuit is further configured to determine ΔVBE by calculating a difference between the VBE when only a switch associated with the first transistor of the plurality of transistors is closed and the VBE when all switches of the plurality of switches are closed.

[0021] In some embodiments, the measurement circuit is further configured to calculate the temperature based on the determined ΔVBE.

[0022] In some embodiments, the measurement circuit includes an analog-to-digital converter for converting the determined ΔVBE from an analog value to a digital value.

[0023] In some embodiments, each transistor of the plurality of transistors comprises a bipolar junction transistor.

[0024] In some embodiments, the bias current from the current source is selected to be within an operating region of the plurality of transistors.

[0025] In some embodiments, each of the plurality of resistors has a same resistance value selected such that, when all of the plurality of switches are closed so that a bias current flows through all of the resistors, a difference in bias current flowing through each of the plurality of resistors due to a mismatch in transistors associated with each of the plurality of resistors is less than a threshold percentage of a nominal bias current passing through each of the plurality of resistors.

[0026] The above overview is provided only for the purpose of summarizing some example embodiments to provide a basic understanding of certain aspects of the present disclosure. Therefore, it will be understood that the above embodiments are merely examples and should not be interpreted as narrowing the scope or spirit of the present disclosure in any way. It will also be appreciated that the scope of the present disclosure also includes many potential embodiments in addition to those embodiments summarized here, some of which will be further described below. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The description of the illustrative embodiments may be read in conjunction with the accompanying drawings. It should be understood that for simplicity and clarity of illustration, the elements illustrated in the drawings are not necessarily drawn to scale unless otherwise described. For example, the dimensions of some elements may be exaggerated relative to other elements unless otherwise described. Embodiments incorporating the teachings of the present disclosure are shown and described in conjunction with the drawings presented herein, in which:

[0028] Figure 1 illustrates a block diagram of an example system for temperature measurement using a voltage proportional to absolute temperature according to an example embodiment of the present disclosure;

[0029] Figure 2 illustrates a circuit diagram of an example system for temperature measurement using a voltage proportional to absolute temperature according to an example embodiment of the present disclosure;

[0030] Figure 3 is an example flow chart illustrating an example method of temperature measurement using a PTAT voltage according to an example embodiment of the present disclosure; and

[0031] Figure 4 and Figure 5 FIG. 1 illustrates various states of an implementation of an example method for temperature measurement using a PTAT voltage according to an example embodiment of the present disclosure. Figure 2 circuit. DETAILED DESCRIPTION

[0032] Some embodiments of the present disclosure will now be described more fully below in conjunction with the accompanying drawings, in which some but not all embodiments of the present disclosure are shown. In fact, these disclosures may be implemented in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the present disclosure will satisfy applicable legal requirements. The same reference numerals identify the same elements throughout.

[0033] As used herein, terms such as "front", "rear", "top", etc. are used for explanatory purposes in the examples provided below to describe the relative positions of certain components or parts of components. In addition, based on this disclosure, it will be apparent to those of ordinary skill in the art that the terms "substantially" and "approximately" mean that the referenced elements or associated descriptions are accurate within applicable engineering tolerances.

[0034] As used herein, the term "comprising" means including but not limited to, and should be interpreted in the manner commonly used in a patent context. The use of broader terms such as including, comprising, and having should be understood to provide support for narrower terms such as consisting of, consisting substantially of, and consisting essentially of.

[0035] The phrases "in one embodiment," "according to one embodiment," and the like generally mean that the particular feature, structure, or characteristic following the phrase may be included in at least one embodiment of the present disclosure, and may be included in more than one embodiment of the present disclosure (importantly, these phrases are not necessarily referring to the same embodiment).

[0036] The word “example” or “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any implementation described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other implementations.

[0037] If the specification states that a component or feature "may", "could", "might", "should", "would", "preferably", "likely", "usually", "optionally", "for example", "often", or "might" (or other such language) be included or have a property, then the particular component or feature is not required to be included or have the property. Such components or features may optionally be included in some embodiments, or may be excluded.

[0038] As integrated circuit (IC) density and operating speeds increase, among other things, it is important in some cases to monitor the temperature of the integrated circuit. If the temperature is too high (e.g., above 85 degrees Celsius), the IC may be damaged. If it is sensed that the temperature of the IC is increasing, remedial measures may be taken to reduce the temperature. For example, in some cases, the remedial measures may include reducing the frequency and / or voltage of the IC.

[0039] One approach that has been used to determine the temperature of an IC uses a voltage that is proportional to absolute temperature (PTAT). When using a PTAT voltage for temperature sensing, it is important to be able to determine the PTAT voltage with a desired accuracy. One approach that has been used to determine the PTAT voltage is to calculate the difference between the base-emitter voltages of two bipolar junction transistors (BJTs) biased at different current densities. However, the accuracy of this approach is limited by the accuracy of the bias current ratio, which is sensitive to mismatch errors.

[0040] Errors due to mismatches between current sources and transistors can be reduced by swapping them dynamically. This technique is called dynamic element matching (DEM). One approach that has been used implements DEM in the current sources that bias the BJT. Since MOS (metal oxide semiconductor) current sources have very high mismatches to begin with, the residual inaccuracy may not be low enough even after DEM of these current sources. In addition, previous attempts to implement DEM in BJTs while using only one current source are prone to switch IR drop mismatches, further degrading performance.

[0041] Various embodiments of the present disclosure overcome the above technical challenges and difficulties, and provide various technical improvements and advantages. Various embodiments of the present disclosure at least provide integrated circuits, methods, and temperature sensors for obtaining more accurate ΔVBE. For example, various embodiments of the present disclosure provide an example system for generating a more accurate PTAT voltage without using dynamic element matching, thereby reducing the steps and time required to obtain the PTAT voltage. Various embodiments of the present disclosure achieve PTAT voltage accuracy similar to that of a solution using DEM, but faster.

[0042] Various embodiments of the present disclosure use only one current source, thereby eliminating current source mismatch. Various embodiments of the present disclosure sample the VBE at the emitter of the BJT (at different current densities), thereby avoiding switch IR drop mismatch. Various embodiments of the present disclosure couple a resistor to the emitter of each BJT, which reduces the effect of BJT mismatch, as further explained below.

[0043] Various embodiments of the present disclosure measure the VBE of just one BJT at both high and low current densities. Various embodiments of the present disclosure obtain the higher current density VBE1 by flowing the entire bias current in that one BJT, and obtain the lower current density VBE2 by flowing the bias current across a plurality of such BJTs arranged in parallel (the number of BJTs may vary, as described below). Various embodiments of the present disclosure subtract VBE2 from VBE1 to obtain ΔVBE. In various embodiments of the present disclosure, the ΔVBE value is the PTAT value used to calculate the temperature.

[0044] Compared to some schemes that have been used, various embodiments of the present disclosure provide a smaller footprint because fewer components are used (e.g., only one current source, no DEM circuits). Compared to some DEM schemes that have been used, various embodiments of the present disclosure provide similar accuracy in fewer steps.

[0045] Various embodiments of the present disclosure provide a PTAT voltage faster than some schemes that have been used because various embodiments of the present invention do not use the additional steps involved in the DEM schemes that have been used.

[0046] Reference now Figure 1 , a block diagram of an example system 100 for temperature measurement using a PTAT voltage is illustrated, according to an example embodiment of the present disclosure. The example system 100 may include a controller 102, a circuit 104, a VBE sampling / PTAT amplification circuit 114, and an analog-to-digital converter (ADC) 112. The example system 100 may be implemented as part of an IC to perform temperature measurement of the IC. Such an IC may be any IC for which high-speed temperature measurement is desired, such as, but not limited to, a central processing unit, a graphics processing unit, a digital signal processor, a computationally intensive application specific integrated circuit, and the like.

[0047] As combined with the following Figure 2 As further described, in some embodiments, the circuit 104 includes a current source 106, a plurality of switches 108, a plurality of resistors 109, and a plurality of transistors 110. In some embodiments, each of the plurality of switches 108 selectively couples the current source 106 to a corresponding resistor in the plurality of resistors 109, which in turn couples to an emitter of a corresponding transistor in the plurality of transistors 110, such that when a corresponding one or more switches in the plurality of switches 108 are closed, a bias current flows from the current source 106 through a corresponding one or more resistors in the plurality of resistors 109 and to an emitter of a corresponding one or more transistors in the plurality of transistors 110.

[0048] In some embodiments, each resistor in the plurality of resistors has the same resistance value, as further described below. By selecting appropriate resistance values ​​for the resistors (as further described below), the current distribution mismatch is reduced to a level that can be ignored in some cases in exchange for higher speed obtained by not using dynamic element matching.

[0049] In some embodiments, the plurality of transistors include a plurality of bipolar junction transistors. In some embodiments, the plurality of bipolar junction transistors include a plurality of parasitic bipolar junction transistors of complementary metal oxide semiconductor (CMOS) technology. In some embodiments, the current source 106 is a single current source. In some embodiments, the bias current from the current source is selected to be within the operating region of the plurality of transistors. In some embodiments, the bias current from the current source is selected to be between the high injection region and the low injection region of the plurality of transistors.

[0050] like Figure 1 As shown, an example system 100 for temperature measurement using a PTAT voltage includes a controller 102. The controller 102 may include one or more processors, input / output circuits, data storage media, communication circuits, and / or other components configured to perform computing operations. In some embodiments, the data storage medium may be configured to store information, data, content, applications, instructions, etc., for enabling the controller 102 to perform a variety of functions. Therefore, in some embodiments, the controller 102 may be referred to as functional logic. The controller 102 may be implemented in a variety of different ways, for example, in some embodiments, the controller 102 may include one or more processing devices configured to execute independently. Additionally or alternatively, in some embodiments, the controller 102 may include one or more processors that are configured in tandem via a bus to enable independent execution of instructions, pipelines, and / or multithreading. The use of the terms "controller", "processor", and "processing circuit" should be understood to include a single-core processor, a multi-core processor, multiple processors within the controller 102, and / or one or more remote or "cloud" processors outside the controller 102.

[0051] In an example embodiment, the controller 102 may be configured to execute instructions stored in a data storage medium or otherwise accessible to the processor. Alternatively or additionally, in some embodiments, the controller 102 is configured to execute hard-coded functionality. Therefore, whether configured by hardware or software methods, or by a combination thereof, the controller 102 represents an entity (e.g., physically implemented in a circuit) that is capable of performing operations in accordance with the embodiments of the present disclosure and is configured accordingly. Alternatively or additionally, as another example, in some example embodiments, when the controller 102 is implemented as an executor of software instructions, the instructions specifically configure the controller 102 to perform algorithms implemented in the specific operations described herein when executing these instructions.

[0052] In some embodiments, Figure 1As shown, the controller 102 includes a switch control circuit 116 and a measurement circuit 118. When one or more of the plurality of switches 108 are closed, a bias voltage (not shown) biases the current source 106 to provide a fixed current value. In some embodiments, the switch control circuit 116 includes hardware, software, firmware, and / or a combination thereof for selectively opening or closing each of the plurality of switches 108, thereby causing the bias current from the current source 106 to flow to one or more of the plurality of resistors and, in turn, to one or more of the plurality of transistors 110, depending on the state of the switch (i.e., open or closed), as further described below. In some embodiments, the VBE sampling / PTAT amplification circuit 114 includes hardware, software, firmware, and / or a combination thereof for sampling and storing VBE1, VBE2 (such as in a switched capacitor arrangement) and amplifying the PTAT voltage to feed in the ADC 112 for digitization. In some embodiments, the VBE sampling / PTAT amplification circuit 114 measures the base-emitter voltage (VBE) of one of the plurality of transistors 110 at low current density and high current density, thereby determining ΔVBE, as described below. In some embodiments, the measurement circuit 118 includes hardware, software, firmware, and / or a combination thereof for receiving and storing the digitized PTAT voltage and a reference voltage (Vref) from the ADC 112, controlling the timing / sequence of the VBE sampling / PTAT amplification circuit 114 and the ADC 112, calculating the temperature (in degrees Celsius) using the digitized PTAT voltage and the reference voltage, and providing a digitized temperature output. For overall high performance, the accuracy of the sampling, amplification, and ADC reference should be high or at least comparable to the accuracy of the PTAT voltage generation mentioned in the present disclosure.

[0053] Although the components are described in conjunction with functional limitations, it should be understood that specific implementations necessarily include the use of specific hardware. It should also be understood that certain components described herein may include similar or common hardware. For example, both sets of circuits may fully utilize the same processor, network interface, storage medium, etc. to perform their associated functions, so that no duplicate hardware is required for each set of circuits.

[0054] The term "circuitry" as used herein with respect to components of an apparatus should be understood to include specific hardware configured to perform the functions associated with the specific circuits described herein. The term "circuitry" should be broadly understood to include hardware, and in some embodiments, software for configuring the hardware. For example, in some embodiments, a "circuitry" may include processing circuitry, storage media, network interfaces, input / output devices, and the like.

[0055] Although Figure 1The example block diagram of FIG. 1 illustrates an example system 100 for temperature measurement using a PTAT voltage, but note that the scope of the present disclosure is not limited to Figure 1 In some embodiments, the example system for temperature measurement using a PTAT voltage may include one or more additional or alternative components.

[0056] Reference now Figure 2 , illustrates a circuit diagram for determining a PTAT voltage for determining temperature according to an example embodiment of the present disclosure. Figure 2 As shown, circuit 104 includes a current source 106 coupled to a plurality of parallel branches, each of which includes one of a plurality of switches 108, one of a plurality of resistors 109, and one of a plurality of transistors 110, all of which are connected in series within its respective branch.

[0057] In some embodiments, the number of parallel branches in the circuit 104 can vary. The greater the number of parallel branches, the higher the calculated ΔVBE will be, and the higher the signal-to-noise ratio (SNR) will be. In some embodiments, the number of branches is determined to balance between area (occupied by the BJT and resistors) and signal-to-noise ratio. As described herein, the number of parallel branches can be represented as "p". Each of the plurality of switches 108 selectively couples the current source 106 to a corresponding resistor in the plurality of resistors 109, which in turn couples to the emitter of a corresponding transistor in the plurality of transistors 110. Thus, when a corresponding one or more switches in the plurality of switches 108 are closed, a bias current ("Ibias") flows from the current source 106 through a corresponding resistor in the plurality of resistors 109 and to the emitter of a corresponding one or more transistors in the plurality of transistors 110. In the illustrated embodiment, each of the plurality of switches 108 is individually labeled S1 to Sp to indicate the number of potential variations of the switch. In the illustrated embodiment, each resistor in the plurality of resistors 109 is individually labeled R1 to Rp to indicate the number of potential variations of the resistor. In the illustrated embodiment, each transistor in the plurality of transistors 110 is individually labeled Q1 to Qp to indicate the number of potential variations of the transistor. As shown, switch S1 selectively couples resistor R1 and transistor Q1 to current source 106, switch S2 selectively couples resistor R2 and transistor Q2 to current source 106, switch S3 selectively couples resistor R3 and transistor Q3 to current source 106, and so on. In some embodiments, because each branch has a switch, a resistor, and a transistor, the number of switches, the number of resistors, and the number of transistors will all be the same.

[0058] In some embodiments, the resistance values ​​are selected such that when all switches are closed to distribute the bias current through all resistors, a distributed bias current (which may be referred to as a “mismatch current” or “I 失配 ”)) is small enough to meet the required PTAT voltage accuracy. In some embodiments, this determination can be based on the nominal bias current through each resistor in the plurality of resistors (i.e., the current assuming no mismatch, which may be referred to as “I 标称 ”). For example, consider an example embodiment where Ibias is equal to 1 microampere (μA), there are eight parallel branches (i.e., eight switches, eight resistors, and eight transistors), and the maximum VBE mismatch (according to VBEavg) across the eight branches is 1 millivolt (mV). In this example embodiment, the nominal current through each resistor is Ibias divided by 8 (1μA / 8), which is equal to 125 nanoamperes (nA). In this example embodiment, the threshold percentage is assumed to be 5% (6.25nA). That is, the resistance value of the resistor should be selected so that I 失配 Less than I 标称 In this example, a resistor value of 160 kilo-ohms (kΩ) produces an I of 6.25 nA (1 mV / 160 kΩ). 失配 Due to the 6.25nA I 失配 Less than 125nA I 标称 5%, so a resistor value greater than 160kΩ should be sufficient.

[0059] In some embodiments, Figure 2 As shown, there is a connection point at or adjacent to the emitter of one of the transistors, which is used to measure the VBE of that transistor. Figure 2 , the connection point is at the emitter of transistor Q1 and is labeled VBE. In alternative embodiments, the connection point may be at the emitter of either transistor. Note that only such a connection point is required for one of the transistors in accordance with embodiments of the present invention. Although not shown, in some embodiments, connection point VBE is coupled to ADC 112 to enable VBE to be converted from analog to digital for use by measurement circuit 118.

[0060] As mentioned above, by choosing appropriate resistance values ​​for the resistors, the current distribution mismatch is reduced to a level that can be ignored in some cases. This can be seen from the following equation. Figure 2 In the example circuit, when all switches are closed, the bias current can be calculated using the following equation (1):

[0061]

[0062] Where Ibias is the bias current, VC is the voltage at the common node, VBEj is the base-emitter voltage at the jth transistor, and R is the resistor value (same for all resistors).

[0063] The base-emitter voltage (VBEj) at the jth transistor can be calculated using the following equation (2):

[0064] (2) VBEj=VBEavg±Δj,

[0065] Where VBEavg is the average VBE of all transistors and Δj is the mismatch of VBEj around VBEavg.

[0066] Substituting the definition of VBEj from equation (2) into equation (1), we obtain the following definition of Ibias in equation (3):

[0067] (3)

[0068] Taking the constants (VC and VBEavg) out of the sum of equation (3), we get the following equation (4):

[0069] (4)

[0070] As mentioned above, Δj is the mismatch of VBEj around VBEavg. Since the sum of the variations around the average is very small and is further reduced by dividing by R in equation (4), the summation in equation (4) can be ignored. Ignoring the summation and rearranging equation (4) to solve for VC yields the following equation (5):

[0071] (5)

[0072] The jth bias current (Ij) can be defined as shown in the following equation (6):

[0073] (6)

[0074] Using the definition of VC from equation (5) and the definition of VBEj from equation (2) in equation (6), the following equation (7) is obtained:

[0075] (7)

[0076] As shown in equation (7), since Δj is the mismatch in VBEj, any error in Ij caused by this mismatch is suppressed by R because the error is divided by R. That is, the larger the value of R, the smaller the mismatch error in Ij. Therefore, choosing a suitably large R can reduce the mismatch to a desired level. By having a sufficiently large value of R, the mismatch in VBE is masked, and the Ibias / p current flowing through each branch has very small mismatch error. Therefore, obtaining ΔVBE at any one transistor provides sufficient mismatch accuracy without the need for dynamic element matching. Typically, resistor mismatch is small, and resistor mismatch can be further reduced (to an insignificant level) by using resistors with sufficient width.

[0077] Figure 4 and Figure 5 The present disclosure is illustrated in various embodiments. Figure 2 For simplicity, reference numerals 108, 109 and 110 are removed from Figure 4 and Figure 5 Omitted in .

[0078] Reference now Figure 3 , provides an example flow chart illustrating an example method according to some embodiments of the present disclosure.

[0079] It is worth noting that each block of the flowchart and the combination of blocks in the flowchart can be implemented in a variety of ways, such as hardware, firmware, circuits and / or other devices associated with executing software including one or more programming instructions. Figure 3 One or more methods described in the present disclosure may be implemented by programming instructions, which may be stored in a non-transitory memory component of a device using an embodiment of the present disclosure and executed by one or more processing components in the device. These programming instructions may direct the processing component or other programmable device to work in a specific manner so that the instructions stored in the non-transitory memory component produce an article of manufacture that performs the functions specified in the (one or more) flowchart blocks.

[0080] As described above, and as will be understood based on the present disclosure, the embodiments of the present disclosure may be configured as methods, devices, etc. Therefore, the embodiments may include a variety of schemes (means) that completely include hardware or include any combination of software and hardware. In addition, the embodiments may take the form of a computer program product on at least one non-transitory computer-readable storage medium, and the non-transitory storage medium has computer-readable program instructions (e.g., computer software) implemented in the storage medium. Similarly, the embodiments may take the form of a computer program code stored on at least one non-transitory computer-readable storage medium. Any suitable computer-readable storage medium may be used, including a non-transitory hard disk, a CD-ROM, a flash memory, an optical storage device, or a magnetic storage device.

[0081] Reference now Figure 3 , illustrates an example method 300 according to some embodiments of the present disclosure. In particular, the example method 300 illustrates example steps / operations for calculating temperature using a circuit without dynamic element matching according to some embodiments of the present disclosure.

[0082] At step / operation 302, a controller (such as, but not limited to, the controller described above) Figure 1 The controller 102 of the described system 100, in conjunction with the switch control circuit 116, closes one of the switches (S1 in this example embodiment, since VBE is measured for transistor Q1) while opening all other switches. Figure 4 , illustrates circuit 104 with switch S1 closed and all other switches (S2 to Sp) open. As described above, in alternative embodiments, VBE may be measured at either transistor, in which case a different switch would be closed at that step / operation. It is noteworthy that, in accordance with embodiments of the present invention, VBE need only be measured for one of the transistors.

[0083] Now return to Figure 3 At step / operation 304, due to the closing of switch S1, the bias current flows out of the current source 106. Since only switch S1 is closed at this time, Figure 4 As shown, the entire bias current flows through resistor R1 to transistor Q1.

[0084] Now return to Figure 3 At step / operation 306, a controller (such as, but not limited to, the controller described above) Figure 1 Controller 102 of system 100 described herein, in conjunction with measurement circuit 118, measures (or samples) the base-emitter voltage at the emitter of transistor Q1. In some embodiments, the measured (or sampled and stored) VBE is referred to as VBE1 (and is referred to as VBE2 in FIG. Figure 4) because it is the first VBE measurement. This VBE measurement is at a higher current density because the entire bias current flows through resistor R1 to transistor Q1.

[0085] At step / operation 308, a controller (such as, but not limited to, the controller described above with respect to Figure 1 The controller 102 of the described system 100, in conjunction with the switch control circuit 116, causes all switches to close. Figure 5 , illustrates the circuit 104 in which all switches S1 to Sp are closed.

[0086] Return now Figure 3 At step / operation 310, due to the closing of all switches, bias current flows out of current source 106. Because all switches are closed at this time, bias current flows through all switches to all transistors, such as Figure 5 As shown. Since the transistors are arranged in parallel, the bias current flowing to each transistor is Ibias / p (with the mismatch advantage of this arrangement as mentioned above).

[0087] Now return to Figure 3 At step / operation 312, a controller (such as, but not limited to, the controller described above) Figure 1 Controller 102 of system 100 described herein, in conjunction with measurement circuit 118, measures (or samples) the base-emitter voltage at the emitter of transistor Q1. In some embodiments, this measured (or sampled and stored) VBE is referred to as VBE2 (and is stored in Figure 5 ) because it is the second VBE measurement. This VBE measurement is at a lower current density because the bias current flowing to each transistor is Ibias / p.

[0088] At step / operation 314, a controller (such as, but not limited to, the controller described above with respect to Figure 1 The controller 102 of the depicted system 100 , in conjunction with the measurement circuit 118 , calculates the ΔVBE of transistor Q1 by subtracting VBE2 from VBE1 .

[0089] At step / operation 316, a controller (such as, but not limited to, the controller described above with respect to Figure 1 The controller 102 of the system 100 described above, in conjunction with the measurement circuit 118, uses ΔVBE as the PTAT voltage to calculate the temperature of the IC. The process of calculating the temperature based on the PTAT voltage is conventionally known. In some embodiments, the conventionally known formula is used. to calculate the temperature T. Since k, q, and ln(p) in this formula are constants, ΔVBE is multiplied by a conventional known scalar value and then converted from degrees Kelvin to degrees Celsius.

[0090] in conclusion

[0091] With the benefit of the teachings given in the above description and the related drawings, those skilled in the art to which the present disclosure belongs will think of many modifications and other embodiments of the present disclosure set forth herein. Although the drawings only show certain components of the devices and systems described herein, it should be understood that a variety of other components can be used in conjunction with the system. Therefore, it should be understood that the present disclosure is not limited to the specific embodiments disclosed, and modifications and other embodiments are intended to be included within the scope of the appended claims. In addition, the steps in the above method may not necessarily occur in the order shown in the drawings, and in some cases, one or more of the steps shown may occur substantially simultaneously, or may involve additional steps. Although specific terms are used herein, they are used only in a general and descriptive sense, and not for the purpose of limitation.

[0092] Although various embodiments according to the principles disclosed herein have been shown and described above, those skilled in the art may modify them without departing from the spirit and teachings of the present disclosure. The embodiments described herein are representative only and are not intended to be limiting. Many variations, combinations and modifications are possible and within the scope of the present disclosure. Alternative embodiments produced by combining, integrating and / or omitting the features of (one or more) embodiments are also within the scope of the present disclosure. Therefore, the scope of protection is not limited by the above description.

[0093] In addition, the section headings used herein are provided to be consistent with the recommendations under 37 CFR 1.77, or to otherwise provide a hint of the organizational structure of this document. These headings should not limit or characterize the disclosure set forth in any claim(s) that may arise from this disclosure.

[0094] Although the detailed description sets forth some embodiments of the present disclosure, the appended claims cover other embodiments of the present disclosure that differ from the described embodiments according to various modifications and improvements. For example, the appended claims may cover any form of integrated circuits in which temperature measurement is desired, such as but not limited to multi-core processors, digital signal processors, application specific integrated circuits, etc.

[0095] In the following claims, unless the specific terms "means for" or "step for" are used in a given claim, it is not intended that the claim be interpreted under 35 USC 112, paragraph 6.

Claims

1. An integrated circuit, comprising: Current source; a plurality of transistors arranged in parallel, each transistor in the plurality of transistors having an emitter and a base; a plurality of resistors, each resistor coupled to an emitter of a corresponding transistor of the plurality of transistors; a plurality of switches, each switch selectively coupling a current source to a corresponding one of the plurality of resistors such that when a corresponding one or more of the plurality of switches are closed, a bias current flows from the current source to an emitter of a corresponding one or more of the plurality of transistors; a switch control circuit configured to, at different times, close all of the plurality of switches and to respectively close a switch associated with a first transistor of the plurality of transistors while opening all of the other switches; and A measurement circuit is coupled to a first transistor of the plurality of transistors between an emitter of the first transistor of the plurality of transistors and a corresponding resistor of the plurality of resistors, the measurement circuit being configured to respectively measure a base-emitter voltage VBE of the first transistor of the plurality of transistors when all switches of the plurality of switches are closed and a base-emitter voltage VBE of the first transistor of the plurality of transistors when only a switch associated with the first transistor of the plurality of transistors is closed, and the measurement circuit being further configured to determine ΔVBE by calculating a difference between the base-emitter voltage VBE when only a switch associated with the first transistor of the plurality of transistors is closed and the base-emitter voltage VBE when all switches of the plurality of switches are closed. 2 . The integrated circuit of claim 1 , wherein the measurement circuit is further configured to calculate a temperature based on the determined ΔVBE. 3 . The integrated circuit of claim 1 , wherein the measurement circuit comprises an analog-to-digital converter for converting the determined ΔVBE from an analog value to a digital value. 4 . The integrated circuit of claim 1 , wherein each transistor of the plurality of transistors comprises a bipolar junction transistor. 5 . The integrated circuit of claim 4 , wherein each of the plurality of bipolar junction transistors comprises a parasitic bipolar junction transistor.

6. The integrated circuit of claim 1, wherein the bias current from the current source is selected to be within an operating region of the plurality of transistors.

7. The integrated circuit of claim 1, wherein each resistor of the plurality of resistors has a same resistance value.

8. The integrated circuit of claim 7, wherein the same resistance value is selected such that, when all of the plurality of switches are closed to cause bias current to flow through all of the resistors, a difference in bias current flowing through each of the plurality of resistors due to mismatch of transistors associated with each of the plurality of resistors is less than a threshold percentage of a nominal bias current passing through each of the plurality of resistors.

9. A method for determining temperature, the method comprising: for a first transistor of a plurality of transistors arranged in parallel, each of the plurality of transistors having an emitter and a base, the emitter of each of the plurality of transistors being selectively coupled to a current source via a corresponding switch of a plurality of switches and a corresponding resistor of a plurality of resistors so that when the corresponding one or more switches are closed, a bias current flows from the current source to the emitter of the corresponding one or more transistors of the plurality of transistors, respectively measuring a base-emitter voltage VBE when all switches of the plurality of switches are closed and a base-emitter voltage VBE when only a switch associated with the first transistor of the plurality of transistors is closed; determining a ΔVBE of a first transistor of the plurality of transistors by calculating a difference between a base-emitter voltage VBE when only a switch associated with the first transistor of the plurality of transistors is closed and a base-emitter voltage VBE when all of the plurality of switches are closed; as well as The temperature is calculated using the determined ΔVBE.

10. The method of claim 9, further comprising converting each of the measured VBEs from an analog value to a digital value.

11. The method of claim 9, wherein each transistor of the plurality of transistors comprises a bipolar junction transistor.

12. The method of claim 9, wherein the bias current from the current source is selected to be within an operating region of the plurality of transistors.

13. The method of claim 9, wherein each resistor of the plurality of resistors has a same resistance value.

14. The method of claim 13, wherein the same resistance value is selected such that, when all of the plurality of switches are closed to cause bias current to flow through all of the resistors, a difference in bias current flowing through each of the plurality of resistors due to mismatch of transistors associated with each of the plurality of resistors is less than a threshold percentage of a nominal bias current passing through each of the plurality of resistors.

15. A temperature sensor, comprising: Current source; a plurality of transistors arranged in parallel, each transistor in the plurality of transistors having an emitter and a base; a plurality of resistors, each resistor coupled to an emitter of a corresponding transistor of the plurality of transistors; a plurality of switches, each switch selectively coupling a current source to a corresponding one of the plurality of resistors such that when a corresponding one or more of the plurality of switches are closed, a bias current flows from the current source to an emitter of a corresponding one or more of the plurality of transistors; a switch control circuit configured to, at different times, close all of the plurality of switches and to respectively close a switch associated with a first transistor of the plurality of transistors while opening all of the other switches; and A measurement circuit is coupled to a first transistor of the plurality of transistors between an emitter of the first transistor of the plurality of transistors and a corresponding resistor of the plurality of resistors, the measurement circuit being configured to respectively measure a base-emitter voltage VBE of the first transistor of the plurality of transistors when all switches of the plurality of switches are closed and a base-emitter voltage VBE of the first transistor of the plurality of transistors when only a switch associated with the first transistor of the plurality of transistors is closed, the measurement circuit being further configured to determine ΔVBE by calculating a difference between the base-emitter voltage VBE when only a switch associated with the first transistor of the plurality of transistors is closed and the base-emitter voltage VBE when all switches of the plurality of switches are closed. 16 . The temperature sensor of claim 15 , wherein the measurement circuit is further configured to calculate the temperature based on the determined ΔVBE. 17 . The temperature sensor of claim 15 , wherein the measurement circuit comprises an analog-to-digital converter for converting the determined ΔVBE from an analog value to a digital value.

18. The temperature sensor of claim 15, wherein each of the plurality of transistors comprises a bipolar junction transistor.

19. The temperature sensor of claim 15, wherein the bias current from the current source is selected to be within an operating region of the plurality of transistors.

20. The temperature sensor of claim 15, wherein each resistor of the plurality of resistors has the same resistance value; and Wherein the same resistance value is selected such that, when all of the plurality of switches are closed so that a bias current flows through all of the resistors, a difference in the bias current flowing through each of the plurality of resistors due to a mismatch in transistors associated with each of the plurality of resistors is less than a threshold percentage of a nominal bias current passing through each of the plurality of resistors.

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