PLC test system

Abstract

The invention relates to PLC (Programmable Logic Controller) detection, in particular to a PLC test system, which comprises an upper computer, and is characterized in that a corresponding test scheme is screened out from a pre-stored test scheme library according to a test requirement, a corresponding test process is acquired from the test scheme, and the test process is issued to a lower computer; the lower computer determines corresponding test steps according to the test process issued by the upper computer, controls the to-be-tested PLC to execute the test steps by sending an input signal to the to-be-tested PLC, and evaluates a PLC network environment according to the input signal and an output signal sent by the to-be-tested PLC; the to-be-tested PLC executes testing steps under the control of the lower computer and sends an output signal to the lower computer at the same time; the interference source is used for applying an interference signal to a network environment between the lower computer and the PLC to be tested; according to the technical scheme provided by the invention, the defect that the PLC is difficult to efficiently and comprehensively test in the prior art can be effectively overcome.

Description

Technical Field

[0001] The invention relates to PLC detection, and in particular to a PLC testing system. Background Art

[0002] Programmable Logic Controller (PLC) is a digital computing electronic system designed for use in industrial environments. It uses a programmable memory to store instructions for logical operations, timing control, timing, counting and arithmetic operations, and controls various types of mechanical equipment through digital or analog input and output. At present, the PLC used in industry is equivalent to a compact computer host. Its advantages in scalability and reliability make it widely used in the field of industrial control.

[0003] Before application, PLC generally needs to be tested. Existing PLC testing methods mainly rely on manual testing, which has a long cycle and low efficiency. In most cases, it is difficult to conduct full-scenario coverage testing due to time or cost reasons. At the same time, there may be human errors, resulting in deviations in test results, or there may be some problems and hidden dangers left in the product, resulting in increased maintenance costs in the later stage. Summary of the invention

[0004] 1. Technical issues to be resolved

[0005] In view of the above-mentioned shortcomings of the prior art, the present invention provides a PLC testing system, which can effectively overcome the defect of the prior art that it is difficult to perform efficient and comprehensive testing on the PLC.

[0006] (II) Technical solution

[0007] To achieve the above objectives, the present invention is implemented through the following technical solutions:

[0008] A PLC test system comprises a host computer, a slave computer, a PLC to be tested and an interference source;

[0009] The upper computer selects the corresponding test scheme from the pre-stored test scheme library according to the test requirements, obtains the corresponding test process from the test scheme, and sends the test process to the lower computer;

[0010] The lower computer determines the corresponding test steps according to the test process sent by the upper computer, and controls the PLC to be tested to execute the test steps by sending input signals to the PLC to be tested, and evaluates the PLC network environment according to the input signals and the output signals sent by the PLC to be tested;

[0011] The PLC to be tested executes the test steps under the control of the lower computer and sends the output signal to the lower computer at the same time;

[0012] Interference source, which applies interference signals to the network environment between the lower computer and the PLC to be tested;

[0013] Among them, each test plan in the test plan library is generated according to the test process of testing the PLC and its supporting equipment in the actual test scenario.

[0014] Preferably, the lower computer determines the corresponding test steps according to the test process sent by the upper computer, and controls the PLC to be tested to execute the test steps by sending an input signal to the PLC to be tested, including:

[0015] The lower computer determines the interface for sending the input signal to the PLC to be tested in the target interface configuration information table, and simulates and generates the input signal according to the first preset signal type and the first preset signal value;

[0016] The lower computer sends input signals to the PLC to be tested through a determined interface according to the execution time of the test steps.

[0017] Preferably, the PLC to be tested executes the test steps under the control of the lower computer and sends the output signal to the lower computer, including:

[0018] The PLC to be tested executes the test steps according to the input signal sent by the lower computer, simulates and generates the output signal according to the second preset signal type and the second preset signal value, and sends the output signal to the lower computer at the same time;

[0019] The lower computer determines the interface for receiving the output signal sent by the PLC to be tested in the target interface configuration information table, and receives the output signal sent by the PLC to be tested through the determined interface according to the execution time of the test step.

[0020] Preferably, the lower computer determines the interface for receiving the output signal sent by the PLC to be tested in the target interface configuration information table, and after receiving the output signal sent by the PLC to be tested through the determined interface according to the execution time of the test step, comprises:

[0021] The lower computer judges the correctness of the output signal according to the preset judgment logic and generates the output signal judgment result.

[0022] Preferably, the lower computer evaluates the PLC network environment according to the input signal and the output signal sent by the PLC to be tested, including:

[0023] The lower computer calculates the bit error rate, false signal rate, propagation speed and signal strength of the input and output signals;

[0024] The lower computer evaluates the PLC network environment based on the bit error rate, signal error rate, propagation speed and signal strength of the input and output signals.

[0025] Preferably, the upper computer selects a corresponding test scheme from a pre-stored test scheme library according to the test requirements, obtains corresponding identification information from the test scheme, and sends the identification information to the lower computer;

[0026] The lower computer selects a target interface configuration information table from a plurality of interface configuration information tables according to the identification information sent by the upper computer, and performs interface configuration.

[0027] Preferably, the lower computer is configured with a plurality of interface configuration information tables corresponding to different test schemes in the test scheme library, and each test scheme corresponds to an interface configuration information table;

[0028] The interface configuration information table is generated according to the corresponding relationship between the pins of the PLC and the interfaces of its supporting equipment during the test process of the corresponding test scheme.

[0029] Preferably, the test process includes the content of the test steps executed when the PLC and its supporting equipment are tested, and the execution time of the executed test steps.

[0030] Preferably, the interference sources include harmonic interference, power supply interference, transmission line interference and high-frequency interference.

[0031] (III) Beneficial effects

[0032] Compared with the prior art, the PLC test system provided by the present invention has the following features:

[0033] Beneficial effects:

[0034] 1) The upper computer selects the corresponding test scheme from the pre-stored test scheme library according to the test requirements, obtains the corresponding test process from the test scheme, and sends the test process to the lower computer. The lower computer determines the corresponding test steps according to the test process sent by the upper computer, and controls the PLC to be tested to execute the test steps by sending input signals to the PLC to be tested. The PLC to be tested executes the test steps under the control of the lower computer, and sends the output signal to the lower computer. The lower computer judges the correctness of the output signal according to the preset judgment logic, and generates the output signal judgment result, so that the test scheme library can be used to perform automatic testing on the PLC, effectively improving the PLC test efficiency. At the same time, the test scheme library contains various types of test schemes, which can realize comprehensive testing of the PLC;

[0035] 2) The interference source applies interference signals to the network environment between the lower computer and the PLC to be tested. The lower computer evaluates the PLC network environment based on the input signal and the output signal sent by the PLC to be tested. The interference source is used to actively apply interference to the PLC network environment. The lower computer calculates the bit error rate, signal error rate, propagation speed and signal strength of the input and output signals, and evaluates the PLC network environment based on the calculation results, thereby achieving effective evaluation of the PLC network environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0037] Figure 1 It is a schematic diagram of the system of the present invention;

[0038] Figure 2 It is a schematic diagram of the process of the present invention. DETAILED DESCRIPTION

[0039] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] A PLC test system, such as Figure 1 and Figure 2 As shown, it includes the host computer, the slave computer, the PLC to be tested and the interference source;

[0041] The upper computer selects the corresponding test scheme from the pre-stored test scheme library according to the test requirements, obtains the corresponding test process from the test scheme, and sends the test process to the lower computer;

[0042] The lower computer determines the corresponding test steps according to the test process sent by the upper computer, and controls the PLC to be tested to execute the test steps by sending input signals to the PLC to be tested, and evaluates the PLC network environment according to the input signals and the output signals sent by the PLC to be tested;

[0043] The PLC to be tested executes the test steps under the control of the lower computer and sends the output signal to the lower computer at the same time;

[0044] Interference source, which applies interference signals to the network environment between the lower computer and the PLC to be tested;

[0045] Among them, each test plan in the test plan library is generated according to the test process of testing the PLC and its supporting equipment in the actual test scenario.

[0046] In the technical solution of the present application, the test process includes the content of the test steps executed when the PLC and its supporting equipment are tested, as well as the execution time of the executed test steps.

[0047] In the technical solution of the present application, interference sources include harmonic interference, power supply interference, transmission line interference and high-frequency interference.

[0048] The upper computer selects the corresponding test scheme from the pre-stored test scheme library according to the test requirements, obtains the corresponding identification information from the test scheme, and sends the identification information to the lower computer;

[0049] The lower computer selects a target interface configuration information table from multiple interface configuration information tables according to the identification information sent by the upper computer, and performs interface configuration.

[0050] Specifically, the lower computer is configured with a plurality of interface configuration information tables corresponding to different test schemes in the test scheme library, and each test scheme corresponds to an interface configuration information table;

[0051] The interface configuration information table is generated according to the corresponding relationship between the pins of the PLC and the interfaces of its supporting equipment during the test process of the corresponding test scheme.

[0052] ① The lower computer determines the corresponding test steps according to the test process sent by the upper computer, and controls the PLC to be tested to execute the test steps by sending input signals to the PLC to be tested, including:

[0053] The lower computer determines the interface for sending the input signal to the PLC to be tested in the target interface configuration information table, and simulates and generates the input signal according to the first preset signal type and the first preset signal value;

[0054] The lower computer sends input signals to the PLC to be tested through a determined interface according to the execution time of the test steps.

[0055] ②The PLC to be tested executes the test steps under the control of the lower computer and sends the output signal to the lower computer, including:

[0056] The PLC to be tested executes the test steps according to the input signal sent by the lower computer, simulates and generates the output signal according to the second preset signal type and the second preset signal value, and sends the output signal to the lower computer at the same time;

[0057] The lower computer determines the interface for receiving the output signal sent by the PLC to be tested in the target interface configuration information table, and receives the output signal sent by the PLC to be tested through the determined interface according to the execution time of the test step.

[0058] ③ The lower computer determines the interface for receiving the output signal sent by the PLC to be tested in the target interface configuration information table, and after receiving the output signal sent by the PLC to be tested through the determined interface according to the execution time of the test step, it includes:

[0059] The lower computer judges the correctness of the output signal according to the preset judgment logic and generates the output signal judgment result.

[0060] In the above technical scheme, the upper computer screens out the corresponding test scheme from the pre-stored test scheme library according to the test requirements, obtains the corresponding test process from the test scheme, and sends the test process to the lower computer. The lower computer determines the corresponding test steps according to the test process sent by the upper computer, and controls the PLC to be tested to execute the test steps by sending input signals to the PLC to be tested. The PLC to be tested executes the test steps under the control of the lower computer, and sends the output signal to the lower computer. The lower computer judges the correctness of the output signal according to the preset judgment logic, and generates the output signal judgment result, so that the test scheme library can be used to perform automatic testing on the PLC, effectively improving the PLC testing efficiency. At the same time, the test scheme library contains various types of test schemes, which can realize comprehensive testing of the PLC.

[0061] ④ The lower computer evaluates the PLC network environment based on the input signal and the output signal sent by the PLC to be tested, including:

[0062] The lower computer calculates the bit error rate, false signal rate, propagation speed and signal strength of the input and output signals;

[0063] The lower computer evaluates the PLC network environment based on the bit error rate, signal error rate, propagation speed and signal strength of the input and output signals.

[0064] In the above technical scheme, the interference source applies an interference signal to the network environment between the lower computer and the PLC to be tested. The lower computer evaluates the PLC network environment based on the input signal and the output signal sent by the PLC to be tested. The interference source is used to actively apply interference to the PLC network environment. The lower computer calculates the bit error rate, signal error rate, propagation speed and signal strength of the input signal and the output signal, and evaluates the PLC network environment based on the calculation results, thereby achieving effective evaluation of the PLC network environment.

[0065] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A PLC testing system, characterized in that: Including host computer, slave computer, PLC to be tested and interference source; The upper computer selects the corresponding test scheme from the pre-stored test scheme library according to the test requirements, obtains the corresponding test process from the test scheme, and sends the test process to the lower computer; The lower computer determines the corresponding test steps according to the test process sent by the upper computer, and controls the PLC to be tested to execute the test steps by sending input signals to the PLC to be tested, and evaluates the PLC network environment according to the input signals and the output signals sent by the PLC to be tested; The PLC to be tested executes the test steps under the control of the lower computer and sends the output signal to the lower computer at the same time; Interference source, which applies interference signals to the network environment between the lower computer and the PLC to be tested; Among them, each test plan in the test plan library is generated according to the test process of testing the PLC and its supporting equipment in the actual test scenario.

2. The PLC test system according to claim 1, characterized in that: The lower computer determines the corresponding test steps according to the test process sent by the upper computer, and controls the PLC to be tested to execute the test steps by sending an input signal to the PLC to be tested, including: The lower computer determines the interface for sending the input signal to the PLC to be tested in the target interface configuration information table, and simulates and generates the input signal according to the first preset signal type and the first preset signal value; The lower computer sends input signals to the PLC to be tested through a determined interface according to the execution time of the test steps.

3. The PLC test system according to claim 2, characterized in that: The PLC to be tested executes the test steps under the control of the lower computer and sends the output signal to the lower computer, including: The PLC to be tested executes the test steps according to the input signal sent by the lower computer, and simulates and generates the output signal according to the second preset signal type and the second preset signal value, and sends the output signal to the lower computer at the same time; The lower computer determines the interface for receiving the output signal sent by the PLC to be tested in the target interface configuration information table, and receives the output signal sent by the PLC to be tested through the determined interface according to the execution time of the test step.

4. The PLC test system according to claim 3, characterized in that: The lower computer determines the interface for receiving the output signal sent by the PLC to be tested in the target interface configuration information table, and after receiving the output signal sent by the PLC to be tested through the determined interface according to the execution time of the test step, comprises: The lower computer judges the correctness of the output signal according to the preset judgment logic and generates the output signal judgment result.

5. The PLC test system according to claim 3, characterized in that: The lower computer evaluates the PLC network environment according to the input signal and the output signal sent by the PLC to be tested, including: The lower computer calculates the bit error rate, false signal rate, propagation speed and signal strength of the input and output signals; The lower computer evaluates the PLC network environment based on the bit error rate, signal error rate, propagation speed and signal strength of the input and output signals.

6. The PLC test system according to claim 5, characterized in that: The upper computer selects a corresponding test scheme from a pre-stored test scheme library according to the test requirements, obtains corresponding identification information from the test scheme, and sends the identification information to the lower computer; The lower computer selects a target interface configuration information table from a plurality of interface configuration information tables according to the identification information sent by the upper computer, and performs interface configuration.

7. The PLC test system according to claim 6, characterized in that: The lower computer is configured with a plurality of interface configuration information tables corresponding to different test schemes in the test scheme library, and each test scheme corresponds to an interface configuration information table; The interface configuration information table is generated according to the corresponding relationship between the pins of the PLC and the interfaces of its supporting equipment during the test process of the corresponding test scheme.

8. The PLC test system according to claim 1, characterized in that: The test process includes the content of the test steps executed when the PLC and its supporting equipment are tested, and the execution time of the executed test steps.

9. The PLC test system according to claim 1, characterized in that: The interference sources include harmonic interference, power supply interference, transmission line interference and high-frequency interference.

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