Voltage comparison circuit and electronic equipment

Abstract

The embodiment of the invention provides a voltage comparison circuit and electronic equipment, and the circuit comprises a sampling voltage improvement module which collects a sampling voltage, amplifies the sampling voltage by a first preset multiple, and outputs a sampling amplification voltage to the first input end of each comparison module; the reference voltage increasing module is used for collecting the reference voltage, amplifying the reference voltage by a second preset multiple and then outputting the reference amplified voltage to the voltage dividing module; the voltage dividing module amplifies the reference amplified voltage according to a plurality of different third preset multiples to obtain a plurality of different target reference amplified voltages, and outputs each target reference amplified voltage to the second input end of the corresponding comparison module; and the comparison module outputs a level signal according to the sampling amplification voltage received by the first input end and the target reference amplification voltage received by the second input end. Therefore, the precision of the level signal output by the comparison module is higher, and the precision of the voltage range of the sampling voltage determined based on the level signal output by the comparison module is higher.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the technical field of integrated circuits and related technical fields, and in particular, to a voltage comparison circuit and an electronic device. Background Art

[0002] The voltage comparison circuit is a commonly used integrated circuit. Its basic function is to compare the magnitudes of two input voltages and determine which one is larger. The comparison result is represented by the high and low output voltages. As a basic circuit module, the voltage comparison circuit is widely used in integrated circuits such as DCDC converters, digital-to-analog converters ADC, linear regulators LDO, high-side / low-side switches, and charging controllers.

[0003] In the prior art, when a voltage comparison circuit compares a reference voltage and a sampling voltage, when the sampling voltage is less than the reference voltage, the level signal output by the voltage comparison circuit is a low level, and when the sampling voltage is greater than the reference voltage, the level signal output by the voltage comparison circuit flips from a low level to a high level. Since the voltage comparison circuit has an offset voltage, no matter whether the voltage comparison circuit outputs a low level or a high level, the numerical range of the input sampling voltage cannot be accurately determined. At this time, when the sampling voltage is output to a subsequent functional circuit, if the voltage value of the sampling voltage cannot meet the voltage requirement range of the functional circuit, the functional circuit will not work properly. Summary of the invention

[0004] The embodiments described herein provide a voltage comparison circuit and an electronic device to solve the problems existing in the prior art.

[0005] According to a first aspect of the present disclosure, there is provided a voltage comparison circuit, comprising: a sampling voltage increasing module, a reference voltage increasing module, a voltage dividing module and N comparison modules, where N is an integer greater than 1;

[0006] The sampling voltage increasing module is configured to collect the sampling voltage, amplify the sampling voltage by a first preset multiple, and then output the sampling amplified voltage to the first input terminal of each comparison module;

[0007] The reference voltage increasing module is configured to collect a reference voltage, amplify the reference voltage by a second preset multiple, and then output a reference amplified voltage to the voltage dividing module;

[0008] The voltage dividing module is configured to obtain a plurality of different target reference amplified voltages after amplifying the reference amplified voltage according to a plurality of different third preset multiples, and output each target reference amplified voltage to the second input terminal of the corresponding comparison module respectively;

[0009] The comparison module is configured to output a level signal according to the sampled amplified voltage received by the first input terminal and the target reference amplified voltage received by the second input terminal.

[0010] In some embodiments of the present disclosure, the sampling voltage increasing module includes a first buffer, a first resistor and a second resistor, the positive input terminal of the first buffer receives the sampling voltage, the reverse input terminal of the first buffer is electrically connected to the second end of the first resistor and the first end of the second resistor, respectively, the first end of the first resistor is electrically connected to the output terminal of the first buffer, and the second end of the second resistor is electrically connected to the ground node.

[0011] In some embodiments of the present disclosure, the sampling voltage increasing module further includes a first adjuster, a first end of the first adjuster is electrically connected to a first end of the first resistor, and a second end of the first adjuster is electrically connected to an output end of the first buffer.

[0012] In some embodiments of the present disclosure, the sampling voltage increasing module further includes a first capacitor, a first end of the first capacitor is electrically connected to the output end of the first buffer, and a second end of the first capacitor is electrically connected to a ground node.

[0013] In some embodiments of the present disclosure, the reference voltage increasing module includes a second buffer, a third resistor and a fourth resistor, the positive input terminal of the second buffer receives the reference voltage, the reverse input terminal of the second buffer is electrically connected to the second end of the third resistor and the first end of the fourth resistor, respectively, the first end of the third resistor is electrically connected to the output terminal of the second buffer, and the second end of the fourth resistor is electrically connected to the ground node.

[0014] In some embodiments of the present disclosure, the reference voltage increasing module further includes a second adjuster, a first end of the second adjuster is electrically connected to a first end of the third resistor, and a second end of the second adjuster is electrically connected to an output end of the second buffer.

[0015] In some embodiments of the present disclosure, the reference voltage increasing module further includes a second capacitor, a first end of the second capacitor is electrically connected to the output end of the second buffer, and a second end of the second capacitor is electrically connected to a ground node.

[0016] In some embodiments of the present disclosure, the voltage divider module includes N fifth resistors connected in series, the first end of the first fifth resistor is electrically connected to the output end of the reference voltage improvement module and the second input end of the first comparison module, the first end of the Nth fifth resistor is electrically connected to the second end of the N-1th fifth resistor and the second input end of the Nth comparison module, and the second end of the Nth fifth resistor is electrically connected to the ground node.

[0017] In some embodiments of the present disclosure, any one of the comparison modules includes a comparator, a positive input terminal of the comparator receives a sampled amplified voltage, and a negative input terminal of the comparator receives a target reference amplified voltage.

[0018] According to a second aspect of the present disclosure, an electronic device is provided, comprising the voltage comparison circuit described in any one of the first aspects.

[0019] The disclosed embodiments provide a voltage comparison circuit and an electronic device. The voltage comparison circuit includes a sampling voltage increasing module, a reference voltage increasing module and a voltage dividing module. The sampling voltage increasing module amplifies the sampling voltage by a first preset multiple and outputs the amplified voltage to the first input terminal of each comparison module. The reference voltage increasing module amplifies the reference voltage by a second preset multiple and outputs the amplified voltage to the second input terminal of each comparison module after voltage division. The sampling voltage is amplified by a first preset multiple and inputs the amplified voltage to the first input terminal of the comparison module. The reference voltage is amplified by a second preset multiple and outputs the amplified voltage to the second input terminal of the comparison module after voltage division. When an offset voltage exists in the comparison module, the precision of the level signal output by the comparison module is higher based on the amplified sampling voltage and the reference voltage, thereby the precision of the voltage range of the sampling voltage determined based on the level signal output by the comparison module is higher. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below. It should be noted that the drawings described below only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure, wherein:

[0021] Figure 1 is a schematic diagram of the structure of a voltage comparison circuit provided by an embodiment of the present disclosure;

[0022] Figure 2 is a circuit structure diagram of a voltage comparison circuit provided by an embodiment of the present disclosure;

[0023] Figure 3 It is a circuit structure diagram of another voltage comparison circuit provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without creative work also fall within the scope of protection of the present disclosure.

[0025] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by a person skilled in the art to which the subject matter of the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the specification and the relevant art, and will not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, a statement that two or more parts are "connected" or "coupled" together shall mean that the parts are joined together directly or through one or more intermediate components.

[0026] In all embodiments of the present disclosure, terms such as “first” and “second” are used only to distinguish one component (or a part of a component) from another component (or another part of a component).

[0027] Unless the context clearly indicates otherwise, the singular form of the words used herein and in the appended claims includes the plural and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the words "comprise" and "include" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it is located after a group of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.

[0028] Based on the problems existing in the prior art, the present disclosure provides a voltage comparison circuit. Figure 1 is a schematic diagram of a voltage comparison circuit provided by an embodiment of the present disclosure. Figure 2 is a schematic diagram of a specific circuit structure of a voltage comparison circuit provided by an embodiment of the present disclosure, such as Figure 1 and Figure 2As shown, the voltage comparison circuit includes: a sampling voltage increasing module 10, a reference voltage increasing module 20, a voltage dividing module 30 and N comparison modules 40, where N is an integer greater than 1; the sampling voltage increasing module 10 is configured to collect the sampling voltage Vfb, and amplify the sampling voltage Vfb by a first preset multiple and then output the sampling amplified voltage Vfb_NX to the first input terminal of each comparison module 40; the reference voltage increasing module 20 is configured to collect the reference voltage Vref, and amplify the reference voltage Vref by a second preset multiple and then output the reference amplified voltage Vref_NX to the voltage dividing module 30; the voltage dividing module 30 is configured to amplify the reference amplified voltage Vref_NX according to multiple different third preset multiples to obtain multiple different target reference amplified voltages, and output each target reference amplified voltage to the second input terminal of the corresponding comparison module 40 respectively; the comparison module 40 is configured to output a level signal according to the sampling amplified voltage received at the first input terminal and the target reference amplified voltage received at the second input terminal.

[0029] The voltage comparison circuit provided by the embodiment of the present disclosure first obtains a sampling amplified voltage Vfb_NX by a first preset multiple through the sampling voltage improvement module 10, obtains a reference amplified voltage Vref_NX by a second preset multiple through the reference voltage improvement module 20, and outputs the reference amplified voltage Vref_NX to the voltage divider module 30. At this time, the voltage divider module 30 receives the reference amplified voltage Vref_NX, and obtains a plurality of different target reference amplified voltages by amplifying the reference amplified voltage according to a plurality of different third preset multiples, and then the voltage divider module 30 outputs a target reference amplified voltage to the second input terminal of the corresponding comparison module 40.

[0030] Specifically, N=4, the sampling voltage is Vfb, the first preset multiple is K1, the sampling amplified voltage is Vfb_NX, Vfb_NX=K1*Vfb, the reference voltage is Vref, the second preset multiple is K2, the reference amplified voltage is Vref_NX, Vref_NX=K2*Vref, and the third preset multiples include K31, K32, K33 and K34 respectively. Then, the target reference amplified voltages output by the voltage divider module 30 are Vref_NX1, Vref_NX2, Vref_NX3 and Vref_NX4 respectively, where Vref_ NX1=K31*Vref_NX, Vref_NX2=K32*Vref_NX, Vref_NX3=K33*Vref_NX, Vref_NX4=K34*Vref_NX, that is, the target reference amplified voltage input to the first comparison module is Vref_NX1, the target reference amplified voltage input to the second comparison module is Vref_NX2, the target reference amplified voltage input to the third comparison module is Vref_NX3, and the target reference amplified voltage input to the fourth comparison module is Vref_NX4. At this time, the first comparison module compares the sampling and amplified voltage Vfb_NX with the first target reference amplified voltage Vref_NX1, and outputs a first level signal, the second comparison module compares the sampling and amplified voltage Vfb_NX with the second target reference amplified voltage Vref_NX2, and outputs a second level signal, the third comparison module compares the sampling and amplified voltage Vfb_NX with the third target reference amplified voltage Vref_NX3, and outputs a third level signal, the fourth comparison module compares the sampling and amplified voltage Vfb_NX with the fourth target reference amplified voltage Vref_NX4, and outputs a fourth level signal, and the logic circuit electrically connected to the voltage comparison circuit can determine the voltage range of the collected sampling voltage according to whether the first level signal, the second level signal, the third level signal and the fourth level signal are high level or low level, and then determine whether the sampling voltage acts on the subsequent functional circuit, so as to avoid the corresponding connected functional circuit from failing to work normally due to the input sampling voltage being too small or too large.

[0031] Exemplarily, if N=4, the sampling voltage is a1, the reference voltage is 1V, the first preset multiple is 4 times, the second preset multiple is 5 times, and the third preset multiples are 1 times, 0.9 times, 0.8 times and 0.7 times respectively. At this time, the sampling amplified voltage output by the sampling voltage increasing module to the first input terminal of each comparison module is 4*a1, the reference amplified voltage output by the reference voltage increasing module to the voltage divider module is 5V, and the target reference amplified voltages obtained after the voltage divider module divides the voltage are 3.5V, 4V, 4.5V and 5V respectively. At this time, the first comparison module compares the first target reference amplified voltage. The relationship between the large voltage 5V and the sampling amplified voltage 4*a1 outputs a first level signal, the second comparison module compares the relationship between the second target reference amplified voltage 4.5V and the sampling amplified voltage 4*a1 to output a second level signal, the third comparison module compares the relationship between the third target reference amplified voltage 4V and the sampling amplified voltage 4*a1 to output a third level signal, the fourth comparison module compares the relationship between the fourth target reference amplified voltage 3.5V and the sampling amplified voltage 4*a1 to output a fourth level signal, which is exemplarily represented as follows: when the first level signal output by the first comparison module and the second When the second level signal output by the comparison module, the third level signal output by the third comparison module and the fourth level signal output by the fourth comparison module are all low level signals, it indicates that the input sampling amplified voltage is less than the fourth target reference amplified voltage. When the first level signal output by the first comparison module and the second level signal output by the second comparison module are low level signals, the third level signal output by the third comparison module and the fourth level signal output by the fourth comparison module are high level signals, it indicates that the input sampling amplified voltage is greater than the third target reference amplified voltage and less than the second target reference amplified voltage. When the first level signal output by the first comparison module, the second level signal output by the second comparison module, the third level signal output by the third comparison module and the fourth level signal output by the fourth comparison module are all high level signals, it indicates that the input sampling amplified voltage is greater than the first target reference amplified voltage. That is, the voltage range of the sampling amplified voltage is determined by comparing the level signal output by the comparison module, and then the voltage range of the sampling voltage is determined, so as to avoid the problem that the corresponding connected functional circuit cannot work normally due to the input sampling voltage being too small or too large.

[0032] In the above embodiment, it is exemplified that the voltage divider module amplifies the reference amplified voltage according to four different third preset multiples, the number of different target reference amplified voltages formed by the voltage divider module is related to the number of comparison modules, and in the process of the voltage divider module amplifying the reference amplified voltage according to different third preset multiples, the specific setting of the third preset multiple is related to the connected functional circuit, and the specific setting of the third preset multiple is determined according to the highest operating voltage and the lowest operating voltage of the functional circuit.

[0033] In addition, in the voltage comparison circuit provided by the embodiment of the present disclosure, the sampling voltage can be amplified by a first preset multiple by a sampling voltage enhancement module and then output to the first input terminal of each comparison module; the reference voltage can be amplified by a second preset multiple by a reference voltage enhancement module and then divided by a voltage divider module and then output to the second input terminal of each comparison module respectively; by amplifying the sampling voltage and the reference voltage by preset multiples and then inputting them into the two input terminals of the comparison module, when there is an offset voltage in the comparison module, the output level signal has a higher accuracy based on the amplified sampling voltage and the reference voltage.

[0034] Specifically, after the reference voltage enhancement module amplifies the reference voltage by a second preset multiple, the voltage is divided by the voltage divider module and then output to the second input terminal of a comparison module as a target reference. The amplified voltage is K2*K3*Vref, and the offset voltage of the comparison module is Voffset. In the prior art, when the difference between the sampled voltage input to the comparison module and the reference voltage is greater than the offset voltage, the level signal output by the comparison module will be reversed, and the error of the comparison module is Voffset / Vref. In the embodiment of the present disclosure, by setting the sampled voltage enhancement module and the reference voltage enhancement module, when the sampled voltage input to the comparison module is greater than the offset voltage, the level signal output by the comparison module will be reversed. When the difference between the amplified voltage and the target reference amplified voltage is greater than the offset voltage, the level signal output by the comparison module will be reversed. If the amplification factor of the sampled amplified voltage compared to the sampled voltage is the same as the amplification factor of the target reference amplified voltage compared to the reference voltage, that is, when K1=K2*K3, the error of the comparison module is Voffset / (K2*K3*Vref). Therefore, the error of the level signal output by the comparison module in the voltage comparison circuit provided in the embodiment of the present disclosure is smaller than the error of the level signal output by the comparison module in the prior art, thereby improving the accuracy of the level signal output by the comparison module.

[0035] The disclosed embodiment provides a voltage comparison circuit. The voltage comparison circuit includes a sampling voltage increasing module, a reference voltage increasing module and a voltage dividing module. The sampling voltage increasing module amplifies the sampling voltage by a first preset multiple and outputs the amplified voltage to the first input terminal of each comparison module. The reference voltage increasing module amplifies the reference voltage by a second preset multiple and outputs the amplified voltage to the second input terminal of each comparison module after voltage division. The sampling voltage is amplified by a first preset multiple and inputs the amplified voltage to the first input terminal of the comparison module. The reference voltage is amplified by a second preset multiple and outputs the amplified voltage to the second input terminal of the comparison module after voltage division. When an offset voltage exists in the comparison module, based on the amplified sampling voltage and the reference voltage, the accuracy of the level signal output by the comparison module is higher, thereby the accuracy of the voltage range of the sampling voltage determined based on the level signal output by the comparison module is higher.

[0036] In a specific embodiment, Figure 2As shown, the sampling voltage boosting module 10 includes a first buffer BUFFER1, a first resistor R1, and a second resistor R2. The positive input terminal of the first buffer BUFFER1 receives the sampling voltage Vfb. The negative input terminal of the first buffer BUFFER1 is electrically connected to the second terminal of the first resistor R1 and the first terminal of the second resistor R2 respectively. The first terminal of the first resistor R1 is electrically connected to the output terminal of the first buffer BUFFER1, and the second terminal of the second resistor R2 is electrically connected to the ground node.

[0037] Specifically, after the first buffer BUFFER1 amplifies the sampling voltage Vfb in proportion and outputs it to the negative input terminal of the first buffer BUFFER1, through the voltage division of the first resistor R1 and the second resistor R2, the sampling voltage Vfb is amplified by a first preset multiple K1. By setting the resistance values of the first resistor R1 and the second resistor R2 of the sampling voltage boosting module, the value of the first preset multiple K1 can be changed.

[0038] As a preferred implementable manner, as Figure 3 shown, the sampling voltage boosting module further includes a first trimmer TRIM1. The first terminal of the first trimmer TRIM1 is electrically connected to the first terminal of the first resistor R1, and the second terminal of the first trimmer TRIM1 is electrically connected to the output terminal of the first buffer BUFFER1.

[0039] A trimmer usually allows an output voltage adjustment of ±10%. By changing the voltage division ratio of the output voltage feedback loop, fine adjustment of the output voltage is achieved.

[0040] Specifically, when there are non-ideal situations such as offset voltage and resistor mismatch in the sampling voltage boosting module 10, the first trimmer TRIM1 can be set in the sampling voltage boosting module 10. The first trimmer TRIM1 can set the least significant bit (LSB) of the trimming, that is, the minimum step size of the trimming, so as to ensure that the voltage range of the sampled amplified voltage Vfb_NX output from the sampling voltage boosting module 10 to the comparison module 40 is K1*Vfb - 1 / 2LSB < Vfb_NX < K1*Vfb + 1 / 2LSB, thereby effectively ensuring the accuracy of the level signal determined by the subsequent comparison module based on the sampled amplified voltage and the target reference amplified voltage.

[0041] Based on the above embodiments, the sampling voltage boosting module further includes a first capacitor C1. The first terminal of the first capacitor C1 is electrically connected to the output terminal of the first buffer BUFFER1, and the second terminal of the first capacitor C1 is electrically connected to the ground node.

[0042] The first capacitor C1 plays a voltage stabilizing role in the sampling voltage boosting module 10, improving the stability of the sampled amplified voltage output from the sampling voltage boosting module 10 to the comparison module 40.

[0043] In a specific embodiment, continue to refer to Figure 2 , the reference voltage boosting module 20 includes a second buffer BUFFER2, a third resistor R3, and a fourth resistor R4. The positive input terminal of the second buffer BUFFER2 receives the reference voltage Vref. The negative input terminal of the second buffer BUFFER2 is electrically connected to the second terminal of the third resistor R3 and the first terminal of the fourth resistor R4 respectively. The first terminal of the third resistor R3 is electrically connected to the output terminal of the second buffer BUFFER1, and the second terminal of the fourth resistor R4 is electrically connected to the ground node.

[0044] Specifically, after the second buffer BUFFER2 amplifies the reference voltage Vref in proportion and outputs it to the negative input terminal of the second buffer BUffER2, and then through the voltage division of the third resistor R3 and the fourth resistor R4, the reference voltage Vref is amplified by a second preset multiple K2 and then output to the voltage division module 30. By setting the resistance values of the third resistor R3 and the fourth resistor R4 of the reference voltage boosting module 20, the value of the second preset multiple K2 can be changed.

[0045] As a preferred implementable embodiment, refer to Figure 3 , the reference voltage boosting module further includes a second trimmer TRIM2. The first terminal of the second trimmer TRIM2 is electrically connected to the first terminal of the third resistor R3, and the second terminal of the second trimmer TRIM2 is electrically connected to the output terminal of the second buffer BUFFER2.

[0046] Specifically, when there are non-ideal situations such as offset voltage and resistor mismatch in the reference voltage boosting module 20, the second trimmer TRIM2 can be set in the reference voltage boosting module 20. The second trimmer TRIM2 can set the least significant bit (LSB) of the trimming, that is, the minimum step size of the trimming, so as to ensure that the voltage range of the reference amplified voltage Vref_NX output from the reference voltage boosting module 20 to the voltage division module 30 is K2*Vref - 1 / 2LSB < Vref_NX < K2*Vref + 1 / 2LSB, which can ensure the accuracy of the level signal determined by the subsequent comparison module based on the sampled amplified voltage and the target reference amplified voltage.

[0047] Based on the above embodiments, the reference voltage boosting module 20 further includes a second capacitor C2. The first terminal of the second capacitor C2 is electrically connected to the output terminal of the second buffer BUFFER1, and the second terminal of the second capacitor C2 is electrically connected to the ground node.

[0048] The second capacitor C2 plays a voltage stabilizing role in the reference voltage boosting module 20, improving the stability of the reference amplified voltage output from the reference voltage boosting module 20 to the voltage division module 30.

[0049] As a specific implementation method, continue to refer to Figure 2 The voltage dividing module 30 includes N fifth resistors R5 connected in series, the first end of the first fifth resistor R5 is electrically connected to the output end of the reference voltage improvement module 20 and the second input end of the first comparison module, the first end of the Nth fifth resistor R5 is electrically connected to the second end of the N-1th fifth resistor R5 and the second input end of the Nth comparison module, and the second end of the Nth fifth resistor is electrically connected to the ground node.

[0050] Specifically, when the voltage comparison circuit includes four comparison modules, the voltage divider module includes four fifth resistors R5 connected in series. Through the voltage division of multiple fifth resistors R5 connected in series, the reference amplified voltage Vref_NX output by the reference voltage improvement module 20 is amplified by different third preset multiples K3 and then output to the comparison module 40.

[0051] Exemplarily, when N=4, the third preset multiples are 0.7 times, 0.8 times, 0.9 times and 1 times respectively, and the reference amplified voltage output by the reference voltage increasing module 20 to the voltage divider module 30 is Vref_NX, then at this time, the target reference amplified voltages obtained after voltage division by the voltage divider module 30 are 0.7*Vref_NX, 0.8*Vref_NX, 0.9*Vref_NX and Vref_NX respectively, that is, the target reference amplified voltage received by the second input terminal of the first comparison module is Vref_NX, the target reference amplified voltage received by the second input terminal of the second comparison module is 0.9*Vref_NX, the target reference amplified voltage received by the second input terminal of the third comparison module is 0.8*Vref_NX, and the target reference amplified voltage received by the second input terminal of the fourth comparison module is 0.7*Vref_NX.

[0052] As a specific implementation method, continue to refer to Figure 2 Any comparison module includes a comparator, a positive input terminal of the comparator receives a sampled amplified voltage, and a negative input terminal of the comparator receives a target reference amplified voltage.

[0053] Any comparison module includes a comparator, which outputs a level signal by comparing the sampled amplified voltage input at the positive input terminal with the target reference amplified voltage input at the reverse input terminal. Then, the subsequent logic module can determine the signal interval of the input sampled voltage according to the level signal output by each comparison module.

[0054] The voltage comparison circuit provided by the embodiments of the present disclosure is illustrated by a specific example. When there are no non-ideal conditions such as buffer offset voltage and resistor mismatch in the sampling voltage boosting module and the reference voltage boosting module, the first trimmer in the sampling voltage boosting module and the second trimmer in the reference voltage boosting module do not work. The sampled amplified voltage Vfb_NX is equal to K1*Vfb, and the reference amplified voltage Vref_NX is equal to K2*Vref. The output of the first comparison module flips when K1*Vfb = K3*Vref_NX1 + Voffset, that is, K1*Vfb = K2*K3*Vref + Voffset, which means that the voltage difference between K2*K3*Vref and K1*Vfb needs to reach more than Voffset for the level signal output by the first comparison module to flip. When K2*K3 = K1, the comparison error of the comparison module is Voffset / (K1*Vfb), which is much smaller than the voltage comparison error Voffset / Vfb of the voltage comparison circuit without using the circuit of the present invention.

[0055] When there are non-ideal conditions such as offset voltage and resistor mismatch in the reference voltage boosting module and the reference voltage boosting module, the first trimmer in the sampling voltage boosting module and the second trimmer in the reference voltage boosting module work, so that the voltage range of the reference amplified voltage Vref_NX is K2*Vref - 1 / 2LSB < Vref_NX < K2*Vref + 1 / 2LSB, and the voltage range of the sampled amplified voltage Vfb_NX is K1*Vfb - 1 / 2LSB < Vfb_NX < K2*Vfb + 1 / 2LSB. At this time, for the first comparison module, Vref_NX = Vref_NX1 + Voffset, and the output of the first comparison module flips when K1*Vfb ± 1 / 2LSB = K2*K3*Vref ± 1 / 2LSB + Voffset. When K1 = K2*K3, simplifying the above formula gives: Vfb(Max) = Vref + (LSB + Voffset) / K1. When the voltage difference between Vref_NX1 and Vfb_NX reaches a maximum of Voffset + LSB, the comparison module can work normally, and the maximum comparison error of the comparison module is (Voffset + LSB) / (K1*Vfb). Since LSB can be set very small and K1 can be set as a large multiple, the voltage comparison error (Voffset + LSB) / (K1*Vfb) is much smaller than the voltage comparison error Voffset / Vfb of the voltage comparison circuit without using the circuit of the present invention.

[0056] Based on the above embodiments, the embodiments of the present disclosure further provide an electronic device, including the voltage comparison circuit described in any one of the above embodiments, having the beneficial effects described in any one of the above embodiments, and the embodiments of the present disclosure will not illustrate them one by one.

[0057] The electronic device provided in the embodiments of the present disclosure can be applied to flexible electronic devices to realize technologies such as augmented reality (AR), virtual reality (VR), extended reality (XR), and mixed reality (MR). For example, the display device can be the projection part of the electronic device, such as a projector, a head-up display (HUD), etc.; for another example, the display device can also be the display part of the electronic device, such as a smart phone, a smart watch, a laptop, a tablet computer, a driving recorder, a navigator, a head-mounted device, and any other device with a display screen.

[0058] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0059] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the serial number of each step / process mentioned above does not mean the order of execution, and the execution order of each step / process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application. In addition, the serial numbers of the embodiments of the present application mentioned above are only for description and do not represent the advantages and disadvantages of the embodiments.

[0060] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein, for example. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0061] The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. For those skilled in the art, the present disclosure may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A voltage comparison circuit, characterized in that: include: A sampling voltage increasing module, a reference voltage increasing module, a voltage dividing module and N comparison modules, where N is an integer greater than 1; The sampling voltage increasing module is configured to collect the sampling voltage, amplify the sampling voltage by a first preset multiple, and then output the sampling amplified voltage to the first input terminal of each comparison module; The reference voltage increasing module is configured to collect a reference voltage, amplify the reference voltage by a second preset multiple, and then output a reference amplified voltage to the voltage dividing module; The voltage dividing module is configured to obtain a plurality of different target reference amplified voltages after amplifying the reference amplified voltage according to a plurality of different third preset multiples, and output each target reference amplified voltage to the second input terminal of the corresponding comparison module respectively; The comparison module is configured to output a level signal according to the sampled amplified voltage received by the first input terminal and the target reference amplified voltage received by the second input terminal.

2. The circuit according to claim 1, characterized in that The sampling voltage increasing module includes a first buffer, a first resistor and a second resistor, the positive input terminal of the first buffer receives the sampling voltage, the reverse input terminal of the first buffer is electrically connected to the second end of the first resistor and the first end of the second resistor respectively, the first end of the first resistor is electrically connected to the output terminal of the first buffer, and the second end of the second resistor is electrically connected to the ground node.

3. The circuit according to claim 2, characterized in that The sampling voltage increasing module further includes a first adjuster, a first end of the first adjuster is electrically connected to a first end of the first resistor, and a second end of the first adjuster is electrically connected to an output end of the first buffer.

4. The circuit according to claim 2, characterized in that The sampling voltage increasing module further includes a first capacitor, a first end of the first capacitor is electrically connected to the output end of the first buffer, and a second end of the first capacitor is electrically connected to a ground node.

5. The circuit according to claim 1, characterized in that The reference voltage increasing module includes a second buffer, a third resistor and a fourth resistor, the positive input terminal of the second buffer receives the reference voltage, the reverse input terminal of the second buffer is electrically connected to the second end of the third resistor and the first end of the fourth resistor respectively, the first end of the third resistor is electrically connected to the output terminal of the second buffer, and the second end of the fourth resistor is electrically connected to the ground node.

6. The circuit according to claim 5, characterized in that The reference voltage increasing module further includes a second adjuster, a first end of the second adjuster is electrically connected to the first end of the third resistor, and a second end of the second adjuster is electrically connected to the output end of the second buffer.

7. The circuit according to claim 5, characterized in that The reference voltage increasing module further includes a second capacitor, a first end of the second capacitor is electrically connected to the output end of the second buffer, and a second end of the second capacitor is electrically connected to a ground node.

8. The circuit according to claim 1, characterized in that The voltage divider module includes N fifth resistors connected in series, the first end of the first fifth resistor is electrically connected to the output end of the reference voltage improvement module and the second input end of the first comparison module, the first end of the Nth fifth resistor is electrically connected to the second end of the N-1th fifth resistor and the second input end of the Nth comparison module, and the second end of the Nth fifth resistor is electrically connected to the ground node.

9. The circuit according to claim 1, characterized in that Any of the comparison modules comprises a comparator, a positive input terminal of the comparator receives a sampled amplified voltage, and a negative input terminal of the comparator receives a target reference amplified voltage.

10. An electronic device, characterized in that: The invention comprises the voltage comparison circuit as described in any one of claims 1 to 9.

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