IMA system master-slave mechanism implementation method and system

Abstract

The invention provides an IMA system master-slave mechanism implementation method and system, and belongs to the technical field of computers.In the system, a GPU is directly connected through two RS422 bus interfaces, one path is discrete magnitude, an input end is adopted for pulling up, and logic 1 is input under the condition that no far-end connection exists; the other path is a standard RS422 interface and is used for transmitting and receiving heartbeat signals between GPU application software; after the GPU is powered on, right grabbing operation is executed; the GPU entering the slave mode is switched to the master mode after detecting that the master GPU enters the fault state; after the GPU entering the master mode breaks down, a master-slave switching process is triggered; when a heartbeat signal communication line or a discrete magnitude signal line separately breaks down, a master-slave working mechanism of the system is not damaged; when the main module breaks down, a heartbeat signal cannot be sent normally, a discrete magnitude signal is set to be 1, and seamless switching of hardware modules is achieved; and the requirement of high reliability on software and hardware application in an airborne environment can be met.

Description

Technical Field

[0001] The present invention belongs to the field of computer technology, and in particular relates to a method and system for realizing a master-slave mechanism of an IMA system. Background Art

[0002] The Integrated Modular Avionics (IMA) system is an integrated modular avionics system that is widely used in modern aircraft. It integrates electronic equipment that was originally scattered in various subsystems in the aircraft onto a unified platform to improve the reliability, flexibility and maintainability of the system. The core idea of ​​the IMA system is to modularize different avionics functions and integrate them in a standardized way. Each functional module has its own computing and communication capabilities and interacts through a high-speed data bus. In this way, each module can be developed, tested and updated independently without interfering with each other. At the same time, the IMA system also provides a reliable redundancy mechanism to ensure the stable operation of the system in the event of a failure. By using the IMA system, aircraft manufacturers can reduce the weight and complexity of the aircraft and improve the flexibility and adaptability of the aircraft. In addition, the IMA system also supports software-defined functions, so that the functions of the aircraft can be customized and expanded according to needs without hardware changes, which provides a more convenient way to update and upgrade the aircraft. With the development of IMA technology, distributed integrated modular avionics (DIMA) has begun to be applied in avionics systems. Based on bus technology, an IMA system is divided into several sub-IMA systems. The subsystems communicate data and interconnect the systems through the bus, which can solve the problem of the IMA system concentrating all computing resources in a certain area. Figure 1The description is of a typical DIMA platform, whose hardware architecture consists of a series of general processing units (GPU) and signal processing modules (DSPM), and each processing module exchanges data through a network switch. The DIMA system uses multiple functional modules in a hot standby state that synchronously sends and receives information and processes data. When the main module fails, fault identification and fault isolation are required, and then one of the hot standby modules is enabled through arbitration to replace the original faulty module to continue to support the system function, achieving seamless switching, ensuring the completeness of system functions, and improving system reliability. Taking two IMA subsystems that serve as hot standby for each other as an example, in actual use, these two IMA subsystems need to implement a master-slave mechanism. When both work normally, one device is the master and the other is the slave. When a device working in the master mode fails, the device working in the slave mode needs to switch to the master mode to complete the predetermined system function. It is crucial to ensure that the system can work correctly in the master-slave mode and successfully complete the conversion of working states.

[0003] The active / standby switching of the IMA system generally depends on the peripheral hardware environment, such as the heartbeat signal of the bus network, hardware signals, etc. The detection mechanism that only uses the heartbeat signal or hardware signal has the problem of low reliability. Figure 1 For example, if DPM1 and DPM2 only rely on the heartbeat signal of the bus network, when the network data is abnormal, DPM1 and DPM2 will be in a competitive state and switch to the master working mode at the same time, causing the system to work abnormally. Relying on the network heartbeat also means that the communication between GPU1 and GPU2 must be based on the normal operation of the switch. If the switch works normally only after GPU1 and GPU2 start to compete for power after the system is powered on, it may cause the master-slave switching mechanism of GPU1 and GPU2 to fail. There is also the problem of adaptation when relying on the bus network. Both the AFDX network or the Fibre Channel network need to be customized for network messages, which increases the coordination difficulty of system design. Summary of the invention

[0004] In order to solve the problem of low reliability of master-slave mechanism in IMA subsystem, the present invention proposes a method and system for implementing master-slave mechanism in IMA system, and designs two RS422 level interfaces in GPU1 and GPU2 respectively, one of which is designed as discrete quantity and the other is designed as standard RS422 interface, which is used for sending and receiving heartbeat signals between two GPU application software. By means of software and hardware coordination, the discrete quantity signal and the heartbeat signal sent by standard RS422 communication are comprehensively judged to realize the master-slave switching function of IMA system, and the technical scheme is as follows:

[0005] In the first aspect, an IMA system master-slave mechanism implementation system is provided, including: GPU1 and GPU2, GPU1 and GPU2 are interconnected through a network switch, and are directly connected through two RS422 bus interfaces, one of which is designed as a discrete quantity, uses input end pull-up, and inputs logic "1" in the absence of a remote connection; the other is designed as a standard RS422 interface, which is used for sending and receiving heartbeat signals between two GPU application software.

[0006] In a second aspect, a method for implementing an IMA system master-slave mechanism is provided, which is used in the IMA system master-slave mechanism implementation system according to the first aspect, and the method includes:

[0007] Step 1: After GPU1 and GPU2 are powered on, the power grabbing operation is performed;

[0008] Step 2: The GPU in the slave mode will switch to the master mode after detecting that the master GPU has entered a fault state.

[0009] Step 3: After a GPU in the master mode fails, the master-slave switching process is triggered and the GPU enters the slave mode working state.

[0010] Optionally, step 1 includes:

[0011] After the two GPUs are powered on, they need to read the discrete quantity status multiple times and make judgments to determine whether to start grabbing the right: for each GPU, when the application software detects that the input discrete quantity is "0", it determines that the current system already has a master control unit, and then the application software reads the RS422 data and judges the working status of the master control; when the RS422 data meets the preset conditions, the application software determines that the working status of the master control is correct, and controls the GPU to directly switch to the slave mode working state; otherwise, it enters the grabbing state;

[0012] Different countdown values ​​are set for the logic circuit counters of the two GPUs according to the predefined master-slave relationship, where the countdown value MT of the master GPU is small by default, and the countdown value ST of the slave GPU is large by default;

[0013] After normal startup, the default logic circuit timer of the master GPU is first cleared, and the logic circuit sends an interrupt instruction to the processor. The processor distributes the corresponding interrupt information to the application software. When the application software receives the interrupt information, it believes that the GPU has successfully seized the master right. At this time, the application software sends a mode switching command to the logic circuit. The logic circuit sets the working mode of the GPU to the master mode and sets the discrete quantity output by RS422 to "0", starting the master right maintenance watchdog timer;

[0014] The application software of the master GPU sends local heartbeat information to the application software of the other end through the RS422 bus in units of 32 bits, starting from 0 and stepping to 1, to notify the other end GPU that it has obtained control;

[0015] When the logic circuit of the slave GPU detects that the input discrete quantity is "0", it stops counting and reports the interrupt instruction to the processor. The processor sets the working state of this GPU to slave mode and sets the software working mode to slave. The output discrete quantity continues to remain at "1" and sends local heartbeat information to the master GPU periodically through the RS422 interface.

[0016] Optionally, step 2 includes:

[0017] The GPU working in "slave mode" periodically receives and judges the heartbeat information and input discrete quantity status sent by the GPU working in "master mode" through the RS422 bus to detect whether the maintenance and operation status of the master GPU control right are normal; when the maintenance and operation status of the master GPU control right are abnormal, it is determined that the master GPU has a fault; when the master GPU fails, the watchdog cannot be fed normally, resulting in a watchdog timeout, which will cause the slave GPU to be unable to receive RS422 heartbeat information normally and detect that the input discrete quantity is "1";

[0018] The GPU working in "slave mode" switches to "master mode" based on the RS422 heartbeat information and discrete quantity after comprehensive judgment, sets the discrete quantity output by RS422 to "0", and starts the master control maintenance watchdog timer. At this time, the GPU working in "slave mode" becomes the master GPU;

[0019] The application software of the master GPU enters the "master mode" working state and sends local heartbeat information to the other GPU via the RS422 bus.

[0020] Optionally, step 3 includes:

[0021] The GPU working in the "master mode" periodically outputs the heartbeat information of the GPU through RS422, feeds the dog to the underlying logic circuit, starts the initiative maintenance function, and keeps the output discrete quantity as "0"; when the GPU working in the "master mode" fails, it cannot normally periodically output the RS422 heartbeat information, nor can it normally feed the dog;

[0022] The logic circuit of the GPU working in the "master mode" sets the output discrete quantity to "1" after the watchdog timeout, and keeps it for T seconds, and then resets the GPU;

[0023] After the reset, the GPU enters the initial power-on state and re-enters the grabbing mode;

[0024] After reset, since there is already a GPU working in "master mode", this GPU will switch to "slave mode" working state.

[0025] Optionally, T is equal to 1 and is maintained for 1 second to allow the GPU working in "slave mode" enough time to detect that the discrete amount of input is "1".

[0026] Optionally, ST=MT*3.

[0027] Optionally, MT is 1 second and ST3 is seconds.

[0028] Optionally, when the master control maintenance watchdog timer is started, the time is 0.5 seconds.

[0029] The present invention is applied to the master-slave switching of the helicopter IMA system, and can meet the high reliability requirements for software and hardware applications in an airborne environment. Due to the use of a double insurance mechanism of a heartbeat signal combined with a discrete quantity, when a heartbeat signal communication line or a discrete quantity signal line fails alone, it can ensure that the system works in a pre-designed working state, and will not damage the master-slave working mechanism of the system. When the main module fails, the heartbeat signal cannot be sent normally, and the discrete quantity signal will be set to "1". At this time, the hot backup module is enabled to replace the faulty module to continue to maintain the platform function, and the seamless switching of the hardware module is realized. It has been verified by experiments that the present invention fully meets the requirements for model development and use, and is the basis for ensuring the functional integrity of the platform and improving the reliability of the platform. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is a typical DIMA system architecture diagram;

[0031] Figure 2 A system architecture diagram for implementing the master-slave mechanism of an IMA system provided by an embodiment of the present invention;

[0032] Figure 3 A power-on privilege grabbing workflow diagram provided by an embodiment of the present invention;

[0033] Figure 4 A power-on right grabbing sequence diagram provided by an embodiment of the present invention;

[0034] Figure 5 A flowchart of the GPU switching from slave mode to master mode provided in an embodiment of the present invention;

[0035] Figure 6 A flowchart of the GPU switching from master mode to slave mode provided in an embodiment of the present invention;

[0036] Figure 7 A master-slave switching sequence diagram provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0037] The present application is further described in detail below through specific implementation methods and drawings.

[0038] An embodiment of the present invention provides a method for automatically switching between master and slave when two IMA devices in a system are running at the same time. An embodiment of the present invention provides a method for implementing the master-slave mechanism of an IMA system, wherein two RS422 level interfaces are respectively designed on GPU1 and GPU2, one of which is designed as a discrete quantity and the other is designed as a standard RS422 interface, for sending and receiving heartbeat signals between two GPU application software. By means of software and hardware coordination, the discrete quantity signal and the heartbeat signal sent by the standard RS422 communication are comprehensively judged to realize the master-slave switching function of the IMA system.

[0039] The embodiment of the present invention provides an IMA system master-slave mechanism implementation system, such as Figure 2 As shown in the figure, GPU1 and GPU2 are interconnected through a network switch and directly connected through two RS422 interfaces. GPU needs to take on the work of system management and time server. These two functions cannot be operated as dual-master in principle, especially the time service function. Therefore, a corresponding power grabbing mechanism should be designed to ensure that the two GPUs have a clear master-slave relationship during initialization, and do a good job of power grabbing and maintaining the master-slave relationship.

[0040] The GPU provides two RS422 level interfaces, one of which is designed as a discrete quantity, with input end pull-up, and inputs logic "1" when there is no remote connection; the other is designed as a standard RS422 interface for sending and receiving heartbeat signals between two GPU application software.

[0041] The embodiment of the present invention provides a method for implementing the master-slave mechanism of an IMA system, including three processes: power-on grabbing, switching the GPU from "slave mode" to "master mode", and switching the GPU from "master mode" to "slave mode", which are specifically as follows:

[0042] 1. Power-on power grabbing workflow:

[0043] After GPU1 and GPU2 are powered on, the power-on grabbing process is as follows: Figure 3 As shown, the sequence diagram is as Figure 4 As shown, the specific steps include:

[0044] 1) After the two GPUs are powered on, they need to read the discrete quantity status multiple times and make judgments to determine whether to start grabbing the right: for each GPU, when the application software detects that the input discrete quantity is "0", it determines that the current system already has a master control unit, then the application software reads the RS422 data and further judges the working status of the master control. When the RS422 data meets the preset conditions, the application software determines that the working status of the master control is correct, and controls the GPU to directly switch to the slave mode working state; otherwise, it enters the grabbing state;

[0045] 2) According to the pre-defined master-slave relationship, different countdown values ​​are set for the logic circuit counters of the two GPUs. The default countdown value of the master GPU is small, assuming it is MT (the recommended value is 1 second, refer to the task cycle), and the default countdown value of the slave GPU is large, defined as ST, and it is recommended to be MT*3=ST (the recommended value is 3 seconds), which can be enlarged;

[0046] 3) After normal startup, the default logic circuit timer of the master GPU is first cleared, and the logic circuit sends an interrupt instruction to the processor. The processor distributes the corresponding interrupt information to the application software. When the application software receives the interrupt information, it believes that the GPU has successfully seized the master right. At this time, the application software sends a mode switching command to the logic circuit. The logic circuit sets the working mode of the GPU to the master mode, and sets the discrete quantity output by RS422 to "0", and starts the master right maintenance watchdog timer for 0.5 seconds;

[0047] 4) The application software of the master GPU sends local heartbeat information to the application software of the other end through RS422 in 32-bit units, starting from 0 and stepping to 1, to notify the GPU of the other end that the local GPU has obtained control;

[0048] 5) After the logic circuit of the GPU, which is set as a slave by default, detects that the input discrete quantity is "0", it stops counting and reports the interrupt instruction to the processor. The processor sets the working state of this GPU to slave mode and sets the software working mode to slave. The output discrete quantity continues to remain at "1" and sends the local heartbeat information 0x0 to the master GPU through the RS422 interface periodically.

[0049] At this point, the master-slave mode of the two GPUs has been determined.

[0050] 2. The workflow of switching GPU from “slave mode” to “master mode”:

[0051] After power-on and power grabbing, the GPU that enters the "slave mode" state will switch to the "master mode" after detecting that the master GPU has entered a fault state. For the specific workflow, see Figure 5 , specifically including the following steps:

[0052] 1) The GPU working in "slave mode" periodically receives and judges the heartbeat information and input discrete quantity status sent by the GPU working in "master mode" through RS422 to detect whether the maintenance and operation status of the master GPU control right are normal; when the maintenance and operation status of the master GPU control right are abnormal, it is determined that the master GPU has a fault;

[0053] 2) When the main GPU fails, the watchdog cannot be fed normally, causing the watchdog to time out. This will cause the slave GPU to be unable to receive RS422 heartbeat information normally and detect that the input discrete quantity is "1";

[0054] 3) The GPU working in "slave mode" switches to "master mode" after comprehensive judgment based on RS422 heartbeat information and discrete quantity, sets the discrete quantity output by RS422 to "0", and starts the master control maintenance watchdog timer. At this time, the GPU working in "slave mode" becomes the master GPU;

[0055] 4) The application software of the master GPU enters the "master mode" working state and sends local heartbeat information to another GPU via RS422.

[0056] 3. The workflow of switching GPU from “master mode” to “slave mode”:

[0057] After the GPU enters the "master mode" state after the power-on grabbing workflow, it will trigger the master-slave switching process and enter the "slave mode" working state after a fault occurs. For the specific workflow, see Figure 6 and Figure 7 , specifically including the following steps:

[0058] 1) The GPU working in the "master mode" periodically outputs the heartbeat information of the GPU through RS422, feeds the dog to the underlying logic circuit, starts the initiative maintenance function, and keeps the output discrete quantity as "0";

[0059] 2) When the GPU working in the "main mode" fails, it cannot output RS422 heartbeat information periodically and cannot feed the dog normally;

[0060] 3) After the watchdog times out, the logic circuit of the GPU working in the "master mode" sets the output discrete quantity to "1" and keeps it for 1 second, and then resets the GPU. The 1 second is required to allow the GPU working in the "slave mode" to have enough time to detect that the input discrete quantity is "1";

[0061] 4) After the reset, the GPU enters the initial power-on state and re-enters the power grabbing mode. The workflow is as follows: Figure 3 As shown;

[0062] 5) After reset, since there is already a GPU working in "master mode", this GPU will switch to "slave mode" working state.

[0063] The embodiment of the present invention aims at improving the reliability requirement of master-slave switching of the IMA system, and proposes a solution combining a heartbeat signal and a discrete quantity signal. The master-slave switching mechanism of the IMA system is realized by comprehensively judging the heartbeat signal input by the application software and the discrete quantity input signal of the hardware circuit, which can effectively avoid the misjudgment problem caused by judging only the heartbeat signal or the discrete quantity signal.

[0064] The above only expresses the implementation methods of the present application, and the description is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present application, which all belong to the protection scope of the present application. In addition, the parts that are not detailed in this application are all conventional technologies.

Claims

1. An IMA system master-slave mechanism implementation system, characterized in that: include: GPU1 and GPU2 are interconnected through a network switch and directly connected through two RS422 bus interfaces. One is designed as a discrete quantity and uses input pull-up to input logic "1" without a remote connection; the other is designed as a standard RS422 interface for sending and receiving heartbeat signals between the two GPU application software.

2. A method for implementing the master-slave mechanism of an IMA system, characterized in that: The method used for the IMA system master-slave mechanism implementation system according to claim 1 comprises: Step 1: After GPU1 and GPU2 are powered on, the power grabbing operation is performed; Step 2: The GPU in the slave mode switches to the master mode after detecting that the master GPU has entered a fault state; Step 3: After a GPU in the master mode fails, a master-slave switching process is triggered and the GPU enters the slave mode working state.

3. The method according to claim 2, characterized in that Step 1 includes: After the two GPUs are powered on, they read the discrete quantity status multiple times and make judgments to determine whether to start grabbing the right: for each GPU, when the application software detects that the input discrete quantity is "0", it determines that the current system already has a master control unit, and then the application software reads the RS422 data and determines the working status of the master control; when the RS422 data meets the preset conditions, the application software determines that the working status of the master control is correct, and controls the GPU to directly switch to the slave mode working state; otherwise, it enters the grabbing state; Different countdown values ​​are set for the logic circuit counters of the two GPUs according to the predefined master-slave relationship, where the countdown value MT of the master GPU is small by default, and the countdown value ST of the slave GPU is large by default; After normal startup, the default logic circuit timer of the master GPU is cleared first, and the logic circuit sends an interrupt instruction to the processor. The processor distributes the corresponding interrupt information to the application software. When the application software receives the interrupt information, it determines that the GPU has successfully seized the master right. At this time, the application software sends a mode switching command to the logic circuit. The logic circuit sets the working mode of the GPU to the master mode and sets the discrete value of the RS422 output to "0", starting the master right maintenance watchdog timer; The application software of the master GPU sends local heartbeat information to the application software of the other end through the RS422 bus in units of 32 bits, starting from 0 and stepping to 1, to notify the other end GPU that it has obtained control; When the logic circuit of the slave GPU detects that the input discrete quantity is "0", it stops counting and reports the interrupt instruction to the processor. The processor sets the working state of this GPU to slave mode and sets the software working mode to slave mode. The output discrete quantity continues to remain at "1" and sends local heartbeat information to the master GPU periodically through the RS422 interface.

4. The method according to claim 2, characterized in that: Step 2 includes: The GPU working in the slave mode periodically receives and judges the heartbeat information and input discrete quantity status sent by the GPU working in the master mode through the RS422 bus to detect whether the maintenance and operation status of the master GPU control right are normal; when the maintenance and operation status of the master GPU control right are abnormal, it is determined that the master GPU has a fault; when the master GPU fails, the watchdog cannot be fed normally, resulting in a watchdog timeout, which will cause the slave GPU to be unable to receive the RS422 heartbeat information normally and detect that the input discrete quantity is "1"; The GPU working in slave mode switches to master mode based on the RS422 heartbeat information and discrete quantity, sets the discrete quantity output by RS422 to "0", and starts the master control maintenance watchdog timer. At this time, the GPU working in slave mode becomes the master GPU; The application software of the master GPU enters the master mode working state and sends local heartbeat information to the other GPU via the RS422 bus.

5. The method according to claim 2, characterized in that: Step 3 includes: The GPU working in the master mode periodically outputs the heartbeat information of the GPU through RS422, feeds the dog to the underlying logic circuit, starts the initiative maintenance function, and keeps the output discrete quantity as "0"; when the GPU working in the master mode fails, it cannot normally periodically output the RS422 heartbeat information, nor can it normally feed the dog; The logic circuit of the GPU working in the master mode sets the output discrete quantity to "1" after the watchdog timeout, and keeps it for T seconds, and then resets the GPU; After the reset, the GPU enters the initial power-on state and re-enters the grabbing mode; After reset, the GPU will switch to slave mode.

6. The method according to claim 5, characterized in that T is equal to 1.

7. The method according to claim 3, characterized in that ST=MT*3.

8. The method according to claim 7, characterized in that MT is 1 second and ST3 is seconds.

9. The method according to claim 3, characterized in that: When the master control maintenance watchdog timer is started, the time is 0.5 seconds.

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