Parasitic parameter extraction method based on supervised learning decision

Abstract

The invention discloses a parasitic parameter extraction method based on supervised learning decision, which predicts a method which meets the precision requirement and has the shortest parasitic parameter extraction time from a plurality of parasitic parameter extraction technologies. The method comprises the following steps: reading a layout file; scanning and dividing the layout file into modules; extracting a density voltage matrix by all modules, flattening the density voltage matrix to serve as an input vector, and transmitting the input vector to a multi-layer sensor (MLP); predicting a parasitic parameter extraction technology which accords with precision and is shortest in time through MLP; each module executes the predicted parasitic parameter extraction technology; and generating an extraction netlist. According to the method, the advantages of the existing parasitic parameter extraction technology are fully exerted, and the respective defects are avoided.

Description

Technical Field

[0001] The present invention belongs to the technical field of physical verification in integrated circuit IC design, and relates to a parasitic parameter extraction method, and in particular to a parasitic parameter extraction method based on supervised learning decision making. Background Art

[0002] The increase in integrated circuit density and the reduction in metal line size in recent years have led to an increase in the impact of interconnect parasitic elements on chip performance. This has led to the need to effectively model parasitic parameter extraction by capturing advanced node structures, placing higher demands on traditional parasitic parameter extraction techniques.

[0003] Accuracy and efficiency are important indicators for measuring a parasitic parameter extraction technology, and designers need to make trade-offs. Traditional parasitic parameter extraction technologies include field-solver-based and rule-based methods, both of which have their own advantages and disadvantages in terms of accuracy and efficiency.

[0004] The field solver is a tool for parasitic extraction based on the Poisson equation with boundary conditions. It provides very high accuracy because it simulates the actual electromagnetic field distribution through numerical solutions, such as the Finite Element Method (FEM) or the Finite Difference Method (FDM). It can handle complex three-dimensional structures and a variety of dielectric environments, and is suitable for circuit design of arbitrary shapes and layouts. It is mainly suitable for occasions with high precision requirements, especially in advanced technology nodes. However, this method has a high computational cost and requires a lot of memory and computing resources; it is slow and not suitable for design processes that require fast iterations; for very large designs, there are processing power limitations.

[0005] Rule-based extraction uses layout rule files or pattern matching technology to identify basic interconnect structures for capacitor extraction. Compared with field solvers, it has fast calculation speed and is relatively simple to implement based on empirical formulas and predefined rules, but it is limited in accuracy, especially in advanced technology nodes and complex layouts, and the rule base needs to be updated to adapt to new process technologies.

[0006] In order to solve the problems of field solvers and rule-based extraction, neural network-based parasitic parameter extraction technology has been proposed in recent years, which can provide higher accuracy than rule-based methods while maintaining faster processing speed. By learning a large amount of training data, neural networks can capture complex layout patterns and parasitic effects, process large-scale data sets, and are suitable for the complexity of modern integrated circuits.

[0007] Supervised learning is a method in machine learning that learns a model from labeled training data so that it can make predictions or decisions about unknown data. The training dataset used in supervised learning consists of input features and corresponding output labels, which are considered to be correct examples and are used to train the model. Supervised learning mainly solves two tasks: classification predicts discrete labels and regression predicts continuous values.

[0008] In the actual parasitic parameter extraction process, different scenarios require different accuracy, and a parasitic parameter extraction technology that meets the accuracy and takes relatively short time should be selected. Compared with relying on experience, supervised learning methods can make predictions more accurately and quickly. Summary of the invention

[0009] In view of the problems existing in the above-mentioned prior art, the purpose of the present invention is to provide a parasitic parameter extraction method based on supervised learning decision-making. The method uses supervised learning to predict a method that meets the accuracy requirements and has the shortest parasitic parameter extraction time from a variety of parasitic parameter extraction technologies. The method can give full play to the advantages of the existing parasitic parameter extraction technologies while avoiding their respective shortcomings.

[0010] The technical solution of the present invention is specifically described as follows:

[0011] The present invention provides a parasitic parameter extraction method based on supervised learning decision, comprising the following steps:

[0012] Step S11, read in the layout file;

[0013] Step S12, scanning the layout and dividing the layout file into modules, the scanning process uses a sliding selection box to traverse the entire layout and divide it into multiple modules;

[0014] Step S13, extracting the density voltage matrix from all the divided modules, flattening it and passing it to the multi-layer perceptron MLP as an input vector;

[0015] Step S14, inference network, multi-layer perceptron MLP predicts the parasitic parameter extraction method that meets the accuracy and the shortest time; the parasitic parameter extraction method includes a field solver, a rule-based method and a deep neural network DNN-based method;

[0016] Step S15, each module executes the predicted parasitic parameter extraction method respectively;

[0017] Step S16, generating an extracted netlist.

[0018] In the present invention, in step S13, on each module, an n×n grid is divided, the density and voltage of each grid are obtained, and an n×n matrix is ​​obtained; for m metal layers, the corresponding density and voltage matrices are summed to obtain an n×n×m density-voltage matrix, which is flattened to obtain an input vector with a dimension of n×n×m, and the input dimension is n×n×m.

[0019] In the present invention, the density of polygons is calculated in each module, thereby creating a density matrix for each layer in a given layout; the conductor portion that produces capacitive coupling effects on other conductors in the electric field is called an aggressive polygon, and when creating a voltage matrix, the aggressive polygon is assigned a value of 1 and the others are assigned a value of 0.

[0020] In the present invention, the training method of the multi-layer perceptron MLP comprises the following steps:

[0021] Obtain a training data set, where the data set contains circuit layout designs of different sizes;

[0022] Dataset preprocessing: creating density matrix and voltage matrix;

[0023] MLP forward propagation,prediction of the best parasitic parameter extraction method;

[0024] Perform parasitic extraction using each extraction method and physical verification EDA software;

[0025] The parasitic capacitance extracted by EDA software is used as the standard value to calculate the parasitic capacitance error of each technology;

[0026] Calculate the loss function and execute the back-propagation algorithm to update the network weights;

[0027] The training is over.

[0028] In the present invention, the training data set of MLP is obtained from the real layout design. The training data set includes the layout of the real design, the module parasitic capacitance values ​​and module labels obtained from the three methods of field solver, rule-based and neural network-based. The module label is used to indicate which method should be used for parasitic parameter extraction; the acquisition process of the module label is as follows:

[0029] The parasitic capacitance extracted by EDA software CalibrexACT was used as a reference standard to compare the differences between the parasitic capacitance of the three methods and the standard value;

[0030] Among the methods that meet the error, that is, the accuracy requirement, according to field solver < neural network-based method < rule-based method, the method with the shortest time is selected and used as the label of this module.

[0031] In the present invention, the loss function is a categorical cross entropy loss function, which is used to measure the difference between the probability distribution predicted by the model and the probability distribution of the true label; the categorical cross entropy loss function is defined as: Where M is the number of categories, y o,c is a binary indicator that is 1 if category c is the correct classification for observation o and 0 otherwise. o,c is the probability that the model predicts that sample o belongs to category c.

[0032] Compared with the prior art, the present invention has the following beneficial effects:

[0033] The present invention first divides the layout into many modules, then makes predictions for each module, and selects a suitable parasitic parameter extraction technology for each module. Otherwise, for a specific accuracy requirement, it is often necessary to conservatively select a high-precision but time-consuming technology for all modules. However, for modules with low density and simple structure, selecting a low-precision technology can meet the accuracy requirements. Through MLP prediction, the time and resources spent on parasitic parameter extraction of these modules are saved, thereby avoiding unnecessary time and resource expenditure.

[0034] The present invention determines the parasitic parameter extraction technology that best meets the accuracy and time requirements from a variety of extraction technologies based on supervised learning; the present invention can give full play to the advantages of the existing parasitic parameter extraction technologies while avoiding their respective disadvantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 It is a flow chart of a parasitic parameter extraction method based on supervised learning decision-making provided in an embodiment of the present invention.

[0036] Figure 2 Schematic diagram of MLP provided by an embodiment of the present invention.

[0037] Figure 3 It is a schematic diagram of the training process of the MLP provided in an embodiment of the present invention.

[0038] Figure 4 It is a data flow diagram of the field solver, rule-based, and neural network-based parasitic parameter extraction technology provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0039] In order to further understand the content, features and effects of the present invention, the following embodiments are given as examples and described in detail with reference to the accompanying drawings.

[0040] The present invention provides a parasitic parameter extraction method based on supervised learning decision. Figure 1 , the method comprises the following steps:

[0041] Step S11, read in the layout file;

[0042] Step S12, scanning the layout and dividing the layout file into modules, the scanning process uses a sliding selection box to traverse the entire layout and divide it into multiple modules;

[0043] Step S13, extracting the density voltage matrix from all the divided modules, flattening it and passing it to the multi-layer perceptron MLP as an input vector;

[0044] Step S14, inference network, MLP predicts the parasitic parameter extraction technology that meets the accuracy and the shortest time;

[0045] Step S15, each module executes the predicted parasitic parameter extraction technology respectively;

[0046] Step S16, generating an extracted netlist.

[0047] The supervised learning of the present invention adopts a neural network algorithm, please refer to Figure 2 :Multilayer Perceptron (MLP) is a feedforward artificial neural network consisting of at least three layers of neurons: an input layer, one or more hidden layers, and an output layer. Each layer consists of multiple neurons, which are connected by weights. It consists of multiple layers of neurons, and the neurons in each layer are fully connected to the neurons in the next layer. Information only goes from the input layer to the hidden layer and finally to the output layer. Backpropagation algorithm is used to calculate the gradient during training, and gradient descent is used to update the network weights.

[0048] Before using MLP for parasitic parameter extraction technology prediction, you need to train the network using a dataset, see Figure 3 , the training steps include:

[0049] Step S31, obtaining a training data set, where the data set includes circuit layout designs of different scales;

[0050] Step S32, perform preprocessing of the data set, that is, create a density matrix and a voltage matrix. Density map feature representation is one of the most effective layout feature representations, in which each layer in a given layout is divided into multiple modules, and the density of the polygon is calculated in each module, so as to create a density matrix for each layer in the given layout. The conductor part that has a capacitive coupling effect on other conductors in the electric field is called an aggressor polygon. When creating a voltage matrix, the aggressor polygon is assigned a value of 1 and the others are assigned a value of 0;

[0051] Step S33, MLP forward propagation, predicting the best extraction technology;

[0052] Step S34, performing parasitic extraction using each extraction technique, including field solver, rule-based, neural network-based parasitic extraction techniques, and physical verification EDA software (CalibrexACT);

[0053] Step S35, taking the parasitic capacitance extracted by the EDA software as a standard value, calculating the parasitic capacitance error of each technology;

[0054] Step S36, calculating the loss function, executing the back propagation algorithm to update the network weights, and performing model estimation;

[0055] Step S37, training ends.

[0056] In the present invention, the input of the multilayer perceptron MLP is the density voltage matrix of the module, and the output is to select the most appropriate parasitic capacitance extraction method for each module. The output dimension is 3, and each neuron represents the decision output of an extraction method. The activation of these neurons will determine which parasitic capacitance extraction method is finally selected.

[0057] Figure 4 A data flow diagram of a field solver, rule-based, and neural network-based parasitic parameter extraction technology provided in an embodiment of the present invention. Figure 4 (a) is a schematic diagram of parasitic parameter extraction by field solver, (b) is a schematic diagram of parasitic parameter extraction based on rules, and (c) is a schematic diagram of parasitic parameter extraction based on neural network.

[0058] The field solver is the most accurate technology for calculating parasitic capacitance. It captures the coupling capacitance between different metal polygons by simulating the electrostatic field between different metal polygons in the integrated circuit. The coupling capacitance between metal polygons can be calculated as:

[0059]

[0060] Q is the charge on the metal polygon, C i The coupling capacitance between this polygon and polygon i, V is the potential of the polygon, calculated by Laplace's equation:

[0061]

[0062] The numerical solution of Laplace's equation can be solved using discretization method, integration method and stochastic method.

[0063] Field solver-based methods include: Finite Element Method (FEM), Finite Difference Method (FDM), and Boundary Element Method (BEM).

[0064] FEM is a commonly used numerical technique for solving partial differential equations, especially in complex geometries and boundary conditions. In parasitic parameter extraction, FEM divides the entire region into many small, simple-shaped subregions (called finite elements) and approximates the equations on each element. This method can handle complex three-dimensional structures and provide high-precision results, but the computational cost is relatively high, especially when dealing with large-scale integrated circuits.

[0065] FDM solves problems by converting continuous differential equations into discrete difference equations. In FDM, space and time are discretized and the derivatives in the equations are replaced by difference approximations, thus converting the differential equations into a system of algebraic equations. FDM is widely used in circuit simulation, especially when dealing with electromagnetic field problems. It is generally faster than FEM, but may not be as flexible as FEM when dealing with complex geometries.

[0066] BEM is a method based on integral equations, which transforms the solution of the problem domain into the solution of the unknown quantities on the boundary. This method only requires discretization of the boundary of the problem, rather than the entire domain, thus reducing the amount of calculation and the number of unknown quantities. BEM is particularly effective in dealing with open area problems, such as radiation and scattering problems of electromagnetic fields. In parasitic parameter extraction, BEM can be used to calculate the capacitance and inductance of interconnects. The advantage of BEM is that it can directly deal with infinite domain problems, but its accuracy is affected by the quality of boundary discretization, and it may be difficult to achieve high accuracy for some problems.

[0067] Rule-based methods are a type of parasitic parameter extraction technology that quickly calculates the parasitic parameters of interconnects through predefined rules and models. These methods are usually faster than field solver-based methods, but they compromise on accuracy. Rule-based methods include: Look-up Table Method, Analytical Formula Method, and Polynomial Fitting Method.

[0068] The lookup table method extracts parameters by creating a table of relationships between parasitic parameters and specific layout features. During the design process, parasitic parameters are quickly determined by finding entries that match the layout features without the need for complex numerical calculations. The specific process includes: data preparation, using the field solver method to simulate a series of representative structures with different geometric parameters to obtain parasitic parameter data; establishing a lookup table, classifying the simulated data according to different parameters and storing them in the lookup table. These tables are two-dimensional or multi-dimensional, which facilitates fast retrieval; parameter extraction, in the actual parasitic parameter extraction process, according to the specific geometric parameters of the circuit layout, the closest value is retrieved from the lookup table as the estimated value of the parasitic parameter; interpolation processing, if there is no exact matching entry in the lookup table, the parasitic parameter is estimated by the interpolation method.

[0069] The analytical formula method uses mathematical formulas to directly calculate parasitic parameters. These formulas are usually based on simplified models of electromagnetic field theory. The specific process includes: model simplification, deriving analytical formulas describing parasitic parameters through simplified models; formula derivation, these formulas are based on electromagnetic field theory and circuit theory, such as using charge simulation, electromagnetic coupling theory and other methods to derive expressions of parasitic parameters; parameter calculation, using the derived analytical formulas to directly calculate parasitic parameters based on the geometric parameters and material properties of the circuit layout; verification and adjustment, due to model simplification, the analytical formula may not be able to fully and accurately describe all situations. Therefore, it is usually necessary to verify and make necessary adjustments to the formula by comparing it with the results of the field solver.

[0070] The polynomial fitting method establishes a polynomial relationship between parasitic parameters and layout features by fitting experimental data or detailed numerical simulation results. The specific process includes: data collection, simulating a series of circuit structures with different geometric parameters through a field solver to collect parasitic parameter data; polynomial selection, selecting a suitable polynomial model such as linear, quadratic or high-order polynomial to fit the simulation data, and the selection of polynomials is based on the distribution of the data and the required accuracy; fitting process, using the least squares method or other optimization algorithms to fit the coefficients of the polynomial model based on the collected data points; parameter prediction, using the fitted polynomial model to predict parasitic parameters based on new geometric parameters.

[0071] The parasitic parameter extraction method based on neural network uses neural network to develop a pattern matching classifier, which will replace the lookup table in the rule-based method so that each layout pattern can be matched with a suitable capacitance model. Compared with the rule-based method, it can reduce pattern mismatch and improve the accuracy of parasitic capacitance extraction results.

[0072] The neural network methods used for parasitic parameter extraction include: deep neural network (DNN), support vector regression (SVR), random forest regression (RFR) and convolutional neural networks (CNNs).

[0073] DNN can automatically learn complex feature representations from input data, which can be applied to parasitic parameter extraction because it can handle complex geometry and material properties in integrated circuit layout. Through multiple layers of nonlinear transformation, it can capture the complex mapping relationship between input data and parasitic parameters, thereby improving the accuracy of prediction.

[0074] SVR uses the kernel trick to map data into a high-dimensional space, transforming linearly inseparable problems into linearly separable ones, which is very useful in dealing with complex parasitic parameter extraction problems.

[0075] Through multi-layer convolution and pooling operations, CNN can extract features at different levels from the layout graph, which helps to capture the multi-scale characteristics of the impact of layout on parasitic parameters.

[0076] The accuracy and time of parasitic parameter extraction method based on field solver, parasitic parameter extraction method based on neural network and parasitic parameter extraction method based on rule decrease.

[0077] RFR can handle the nonlinear relationship between input data and parasitic parameters well by constructing and integrating multiple decision trees.

[0078] In a specific embodiment, the application of supervised learning used in the present invention in the prediction of parasitic parameter extraction technology involves the following key steps:

[0079] 1. Dataset preparation. We collect multiple layouts from real integrated circuit designs and divide them into modules. We apply three different parasitic capacitance extraction methods to each module: a field solver, a rule-based method, and a deep neural network (DNN)-based method.

[0080] 2. Feature extraction. Generate a density voltage matrix from each module, which is a method of converting the module into a digital feature representation, and then flatten the density voltage matrix into an input vector. For the 28nm process, the layout is divided into 1um×1um modules. On this module, an n×n grid is divided to obtain the density and voltage of each grid to obtain an n×n matrix. For the three metal layers, the corresponding density and voltage matrices are summed to obtain an n×n×3 density voltage matrix, which is flattened to an input vector with a dimension of n×n×3.

[0081] 3. Training data labeling. The training data set includes 1) the layout of the real design, 2) the module parasitic capacitance values ​​obtained from three methods, and 3) the module label to indicate which method should be used for parasitic parameter extraction.

[0082] Using Calibre xACT as a reference standard, the capacitance error of each module using different extraction methods is calculated. Calibre xACT uses the field solver method to extract parasitic capacitance with higher accuracy.

[0083] According to the preset accuracy threshold, the most suitable extraction method for each pattern is determined. That is, among the methods that meet the accuracy requirements, each pattern is assigned a label, indicating the fastest extraction method that meets the accuracy requirements, with rule-based methods taking precedence and neural network and field solver methods taking second place.

[0084] 4. Training process: The training data set is divided into a training set and a test set, and the classification cross entropy loss function is used to measure the difference between the probability distribution predicted by the model and the probability distribution of the true label.

[0085] The categorical cross entropy loss function is defined as: Where M is the number of categories, y o,c is a binary indicator that is 1 if category c is the correct classification for observation o and 0 otherwise. o,c is the probability that the model predicts that sample o belongs to category c. During training, the parameters of the model are adjusted by minimizing the loss function, using gradient descent to update the model's weights to reduce the difference between the predicted probability and the true label.

[0086] 5. Model estimation. Use the test set to evaluate the performance of the trained model. The evaluation indicators include precision, recall, and F1 score. Precision is the proportion of samples correctly predicted as positive by the model to all samples predicted as positive. The calculation formula is: TP is the number of true positives, that is, the number of samples correctly predicted as positive by the model, and FP is the number of false positives, that is, the number of negative samples incorrectly predicted as positive by the model. Recall measures the proportion of samples correctly identified as positive by the model to all actual positive samples, and the calculation formula is: FN is the number of false negatives, that is, the number of positive samples that the model incorrectly predicts as negative. The F1 score is the harmonic mean of recall and precision, and is calculated as The F1 score takes into account both precision and recall, avoiding the trade-off between the two.

[0087] Since this solution adopts a three-classification model, it is necessary to perform a weighted average on these evaluation indicators, that is, to calculate the average value of the evaluation indicators based on the number of samples in each category. c is the number of categories, and the evaluation index of the i-th category is metric i , the number of samples in this category n i .

[0088] This scheme designed an experiment, using field solver, rule-based, neural network-based, and supervised learning prediction-based parasitic parameter extraction technology under 28nm process and 3% accuracy requirement, and compared the proportion of modules that meet the accuracy requirements and extraction time in the four methods, as shown in Table 1. The accuracy of the supervised learning prediction-based method is close to that of the field solver parasitic parameter extraction technology, and the extraction time is greatly shortened.

[0089] Table 1

[0090]

Claims

1. A parasitic parameter extraction method based on supervised learning decision, characterized in that: The following steps are involved: Step S11, read in the layout file; Step S12, scanning the layout and dividing the layout file into modules, the scanning process uses a sliding selection box to traverse the entire layout and divide it into multiple modules; Step S13, extracting the density voltage matrix from all the divided modules, flattening it and passing it to the multi-layer perceptron MLP as an input vector; Step S14, inference network, multi-layer perceptron MLP predicts the parasitic parameter extraction method that meets the accuracy and the shortest time; the parasitic parameter extraction method includes a field solver, a rule-based method and a deep neural network DNN-based method; Step S15, each module executes the predicted parasitic parameter extraction method respectively; Step S16, generating an extracted netlist.

2. The parasitic parameter extraction method based on supervised learning decision according to claim 1, characterized in that: In step S13, on each module, an n×n grid is divided, and the density and voltage of each grid are obtained to obtain an n×n matrix; For m metal layers, the corresponding density and voltage matrices are summed to obtain an n×n×m density-voltage matrix, which is flattened to an input vector with a dimension of n×n×m. The input dimension is n×n×m.

3. The parasitic parameter extraction method based on supervised learning decision as claimed in claim 2, characterized in that: The density of polygons is calculated in each module, thus creating a density matrix for each layer in a given layout; The portion of the conductor that has a capacitive coupling effect on other conductors in the electric field is called the aggressive polygon. When creating the voltage matrix, the aggressive polygon is assigned a value of 1 and the others are assigned a value of 0.

4. The parasitic parameter extraction method based on supervised learning decision according to claim 1, characterized in that: In step S14, the field solver captures the coupling capacitance between different metal polygons by simulating the electrostatic field between different metal polygons in the integrated circuit; the coupling capacitance between the metal polygons is calculated as: Q is the charge on the metal polygon, C i The coupling capacitance between this polygon and polygon i, V is the potential of the polygon, calculated by Laplace's equation: The numerical solution of Laplace's equation uses discretization, integration or stochastic methods; The rule-based parasitic parameter extraction method consists of two steps, including characterization and extraction steps; The characterization step is responsible for generating a pre-characterized parasitic capacitance lookup table, where each lookup table calculates a specific parasitic capacitance for a specific mode; The extraction step is responsible for extracting the parasitic capacitance of the layout by matching each layout pattern with the corresponding parasitic capacitance lookup table stored in the corresponding characterization library; In the neural network-based parasitic parameter extraction method, a pattern matching classifier is developed using a neural network, which replaces the lookup table in the rule-based method so that each layout pattern is matched with a suitable capacitor model.

5. The parasitic parameter extraction method based on supervised learning decision according to claim 1, characterized in that: The training method of the multi-layer perceptron MLP includes the following steps: Obtain a training data set, where the data set contains circuit layout designs of different sizes; Dataset preprocessing: creating density matrix and voltage matrix; MLP forward propagation,prediction of the best parasitic parameter extraction method; Perform parasitic extraction using each extraction method and physical verification EDA software; The parasitic capacitance extracted by EDA software is used as the standard value to calculate the parasitic capacitance error of each technology; Calculate the loss function and execute the back-propagation algorithm to update the network weights; The training is over.

6. The parasitic parameter extraction method based on supervised learning decision according to claim 5, characterized in that: The training data set of MLP is obtained from the real layout design. The training data set includes the layout of the real design, the module parasitic capacitance values ​​and module labels obtained from the field solver, rule-based and neural network-based methods. The module label is used to indicate which method should be used for parasitic parameter extraction; the process of obtaining the module label is as follows: The parasitic capacitance extracted by EDA software CalibrexACT was used as a reference standard to compare the differences between the parasitic capacitance of the three methods and the standard value; Among the methods that meet the error, that is, the accuracy requirement, according to field solver < neural network-based method < rule-based method, the method with the shortest time is selected and used as the label of this module.

7. The parasitic parameter extraction method based on supervised learning decision according to claim 6, characterized in that: The loss function is the categorical cross entropy loss function, which is used to measure the difference between the probability distribution predicted by the model and the probability distribution of the true label; the categorical cross entropy loss function is defined as: Where M is the number of categories, y o,c is a binary indicator that is 1 if category c is the correct classification for observation o and 0 otherwise. o,c is the probability that the model predicts that sample o belongs to category c.

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