Method, device, equipment and medium for timing compensation of cable sensor network

By collecting and aggregating data in the cable network and using Gaussian-like process regression modeling and compensation, the problem of insufficient timing synchronization accuracy and stability in the cable network is solved, and higher synchronization accuracy and practicality are achieved.

CN119276451BActive Publication Date: 2025-03-07STATE GRID SHANDONG ELECTRIC POWER CO
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Patent Information

Application Number
CN202411793217.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-09
Publication Date
2025-03-07
Estimated Expiration
2044-12-09

AI Technical Summary

Technical Problem

The prior art synchronous clocks in power cable networks have problems such as low accuracy and low stability, especially when the satellite clock fails, the error is large, making it difficult to meet the high-precision synchronization requirements.

Method used

By collecting process history data of the cable network, setting step size scales to aggregate the data, building a Gaussian-like process regression model, modeling error feature vectors with an out-of-synchronous scale, generating error estimates, and timing error compensation is performed based on the difference error estimates of the lowest and highest step sizes.

Benefits of technology

It improves the timing synchronization accuracy and practicality in the cable sensor network, reduces the accumulation of synchronization errors, enhances the adaptability and flexibility of the model, and can better fit complex and variable cable network clock error data.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a method, device, equipment and medium for timing compensation of a cable sensor network, which belongs to the technical field of network timing. The method comprises the following steps: collecting the process history data of the actual error compensation system of the cable network, and taking the error data of the satellite second clock and the crystal second clock as the initial sample; aggregating the initial sample to obtain the aggregated sample at each step size; constructing an error feature vector of the accumulated error including the aggregated sample at the current size and the current time point information; using a Gaussian process regression model to model the error feature vector respectively, and obtaining a Gaussian process regression model at each step size; sequentially generating the error estimation value of each step size, and combining the differential error estimation value of the lowest step size and the highest step size to obtain the timing error estimation value at the current moment; and compensating the accumulated error of the crystal clock based on the timing error estimation value at the current moment. The present invention improves synchronization accuracy and practicality.
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Description

Technical Field

[0001] The invention relates to a method, a device, equipment and a medium for timing compensation of a cable sensor network, belonging to the technical field of network timing. Background Art

[0002] With the comprehensive development of modern navigation, positioning and timing technologies, the application of precise time has expanded from the military industry to the civilian basic field. Although the satellite navigation system has good timing accuracy and wide-area synchronization performance, it is affected by factors such as ephemeris error, satellite clock error, and receiver error, and the error can reach tens or even hundreds of μs when it fails. As the scale of power cable systems gradually expands, the accuracy requirements for the automatic synchronization time of cable sensor networks are getting higher and higher. The time accuracy requirements in PMU (phasor-measurement-unit) have reached the microsecond level, and the time accuracy requirements for traveling wave ranging and traveling wave protection are as high as ns.

[0003] In recent years, the technology of using satellite clocks combined with crystal oscillator clocks to generate synchronous clocks has developed rapidly. At present, relevant personnel are using satellite signals to correct the accumulated error of crystal oscillator signals online and meet the synchronization acquisition requirements of cable networks based on the characteristics of large cumulative error of crystal oscillator signals and small random error of satellite signals. On the other hand, using digital signal processors to sample satellite clocks and crystal oscillator clock signals and using least squares regression algorithms to estimate clock errors can improve the synchronization accuracy of satellite clocks and the timing acquisition tasks of cable networks.

[0004] These existing methods can generate relatively accurate synchronous clocks, but they still have shortcomings such as insufficient real-time performance, complex compensation schemes, abnormal sample data processing, and poor robustness of error models. In order to solve the problems of low accuracy and weak stability of the existing synchronous clocks in the power cable network system, the present invention proposes a method for timing compensation of cable sensor networks. Summary of the invention

[0005] In order to solve the above problems, the present invention proposes a method, device, equipment and medium for timing compensation in a cable sensor network, which can effectively cope with the challenges of timing synchronization in a high-precision cable network and improve synchronization accuracy and practicality.

[0006] The technical solution adopted by the present invention to solve the technical problem is:

[0007] In a first aspect, an embodiment of the present invention provides a method for timing compensation of a cable sensor network, comprising the following steps:

[0008] Step S1, collecting process history data of the actual error compensation system of the cable network, and taking the error data between the satellite second clock and the crystal oscillator second clock in the process history data as the initial sample;

[0009] Step S2, setting the step size, aggregating the initial samples, and obtaining aggregated samples at each step size;

[0010] Step S3, for each step size, construct an error feature vector of the accumulated error including the aggregated samples of the current scale and the current time point information;

[0011] Step S4, using a Gaussian process regression model to respectively model the error feature vectors corresponding to each step size, and obtain a Gaussian process regression model of each step size;

[0012] Step S5, using the Gaussian process regression model of each step size to generate error estimates of each step size in turn, and combining the difference error estimates of the lowest step size and the highest step size to obtain the timing error estimate at the current moment;

[0013] Step S6, compensating the accumulated error of the crystal oscillator clock based on the estimated value of the timing error at the current moment: when the satellite clock is normal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the estimated value of the timing error at the current moment; when the satellite clock is abnormal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average value of the compensation values ​​before the abnormal operation M times.

[0014] As a possible implementation of this embodiment, the value range of the step size is [1, 10].

[0015] As a possible implementation of this embodiment, step S2, setting the step size, aggregating the initial samples, and obtaining aggregated samples at various step sizes, includes the following steps:

[0016] Define the initial sample value as , n is the number of samples, m is the initial sample index;

[0017] The initial aggregated sample value corresponding to the step size h is defined as: , , i is the aggregate sample index, is the number of sub-interval blocks divided according to the step size, ;

[0018] Aggregate the initial samples to obtain the aggregated samples with a step size of h: .

[0019] As a possible implementation of this embodiment, the error characteristic vector is:

[0020] ,

[0021] ,

[0022] in, is the cumulative error at the current moment i, a, b, c are regression coefficients, is the random error of the satellite second clock at the current moment and obeys the normal distribution.

[0023] As a possible implementation of this embodiment, Depending on the specific satellite receiver sensitivity setting, the value range is [10.175, 15.825].

[0024] As a possible implementation of this embodiment, the Gaussian process regression model for obtaining each step size is:

[0025] ,

[0026] in is the error eigenvector with a step size of h, is the cumulative error at the current time i, (-) is the gamma function, and is the model hyperparameter.

[0027] As a possible implementation of this embodiment, step S5, using the Gaussian process regression model of each step size in sequence to generate the error estimation value of each step size, and combining the differential error estimation value of the lowest step size and the highest step size to obtain the timing error estimation value at the current moment, includes the following steps:

[0028] Step S51, construct the error characteristic vector of the previous and next step sizes under the current step size h:

[0029] and ,

[0030] and is the error feature vector of the previous and next step size h;

[0031] Step S52, based on the Gaussian process regression model of each step length , , Generate error estimates for each step size in turn , , ;

[0032] Step S53, obtain the difference error estimation value of the minimum step size and the maximum step size according to the following formula: :

[0033] ;

[0034] Step S54: The scale error estimate and w form a new error feature vector and input it into the Gaussian process regression model Get the estimated value of the timing error at the current time ;

[0035] Step S55, continuously iteratively update each scale according to whether the normalized mean square error (NMSE) meets the threshold requirement , , as well as Hyperparameters of .

[0036] As a possible implementation of this embodiment, the specific process of compensating the accumulated error of the crystal oscillator clock based on the estimated value of the timing error at the current moment is:

[0037] When the satellite clock works normally, the compensation value for the accumulated error of the crystal oscillator clock is ;

[0038] When the satellite clock is not working properly, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average value of the M compensation values ​​before the abnormal operation. :

[0039] ,

[0040] Where j is the compensation value index, M is the size of the step size, is the jth estimated error value.

[0041] In a second aspect, an embodiment of the present invention provides a device for timing compensation of a cable sensor network, comprising:

[0042] A data acquisition module is used to collect the process history data of the actual error compensation system of the cable network, and use the error data between the satellite second clock and the crystal second clock in the process history data as the initial sample;

[0043] The sample aggregation module is used to set the step size, aggregate the initial samples, and obtain aggregated samples at each step size;

[0044] An error vector construction module is used to construct an error feature vector of the accumulated error including the aggregated samples of the current scale and the current time point information for each step size;

[0045] A model building module is used to use a Gaussian process regression model to model the error feature vectors corresponding to each step size, and obtain a Gaussian process regression model of each step size;

[0046] The error generation module is used to generate error estimates of each step size in sequence using the Gaussian process regression model of each step size, and to obtain the timing error estimate of the current moment by combining the difference error estimates of the lowest step size and the highest step size;

[0047] The timing compensation module is used to compensate for the accumulated error of the crystal oscillator clock based on the estimated timing error at the current moment: when the satellite clock is normal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the estimated timing error at the current moment; when the satellite clock is abnormal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average of the compensation values ​​before the abnormal operation M times.

[0048] As a possible implementation of this embodiment, the value range of the step size is [1, 10].

[0049] As a possible implementation of this embodiment, the specific process of the sample aggregation module aggregating the initial samples is as follows:

[0050] Define the initial sample value as , n is the number of samples, m is the initial sample index;

[0051] The initial aggregated sample value corresponding to the step size h is defined as: , , i is the aggregate sample index, is the number of sub-interval blocks divided according to the step size, ;

[0052] Aggregate the initial samples to obtain the aggregated samples with a step size of h: .

[0053] As a possible implementation of this embodiment, the error characteristic vector is:

[0054] ,

[0055] ,

[0056] in, is the cumulative error at the current moment i, a, b, c are regression coefficients, is the random error of the satellite second clock at the current moment and obeys the normal distribution.

[0057] As a possible implementation of this embodiment, Depending on the specific satellite receiver sensitivity setting, the value range is [10.175, 15.825].

[0058] As a possible implementation of this embodiment, the Gaussian process regression model for obtaining each step size is:

[0059] ,

[0060] in is the error eigenvector with a step size of h, is the cumulative error at the current time i, (-) is the gamma function, and is the model hyperparameter.

[0061] As a possible implementation of this embodiment, the error generation module uses the Gaussian process regression model of each step size to sequentially generate the error estimation value of each step size, and combines the differential error estimation value of the lowest step size and the highest step size to obtain the timing error estimation value of the current moment. The specific process is as follows:

[0062] Step S51, construct the error characteristic vector of the previous and next step sizes under the current step size h:

[0063] and ,

[0064] and is the error feature vector of the previous and next step size h;

[0065] Step S52, based on the Gaussian process regression model of each step length , , Generate error estimates for each step size in turn , , ;

[0066] Step S53, obtain the difference error estimation value of the minimum step size and the maximum step size according to the following formula: :

[0067] ;

[0068] Step S54: The scale error estimate and w form a new error feature vector and input it into the Gaussian process regression model Get the estimated value of the timing error at the current time ;

[0069] Step S55, continuously iteratively update each scale according to whether the normalized mean square error (NMSE) meets the threshold requirement , , as well as Hyperparameters of .

[0070] As a possible implementation of this embodiment, the specific process of the timing compensation module compensating the accumulated error of the crystal oscillator clock based on the estimated value of the timing error at the current moment is:

[0071] When the satellite clock works normally, the compensation value for the accumulated error of the crystal oscillator clock is ;

[0072] When the satellite clock is not working properly, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average value of the M compensation values ​​before the abnormal operation. :

[0073] ,

[0074] Where j is the compensation value index, M is the size of the step size, is the jth estimated error value.

[0075] In a third aspect, an embodiment of the present invention provides an electronic device, comprising a processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor. When the electronic device is running, the processor communicates with the memory through the bus, and the processor executes the machine-readable instructions to perform the steps of any of the above-mentioned methods for timing compensation of cable sensor networks.

[0076] In a fourth aspect, an embodiment of the present invention provides a storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of any of the above-mentioned methods for timing compensation of a cable sensor network are executed.

[0077] The beneficial effects of the technical solution of the embodiment of the present invention are as follows:

[0078] A method for timing compensation of a cable sensor network according to the technical solution of an embodiment of the present invention comprises the following steps: step S1, collecting process history data of an actual error compensation system of a cable network, and taking the error data of a satellite second clock and a crystal second clock in the process history data as an initial sample; step S2, setting a step size, aggregating the initial samples, and obtaining aggregated samples at each step size; step S3, for each step size, constructing an error feature vector of the accumulated error including the aggregated samples of the current size and the information of the current time point; step S4, using a quasi-Gaussian process regression model to respectively perform a regression on the error feature vectors corresponding to each step size Modeling, obtaining the Gaussian process regression model of each step size; step S5, using the Gaussian process regression model of each step size to generate the error estimation value of each step size in turn, and combining the differential error estimation value of the lowest step size and the highest step size to obtain the timing error estimation value at the current moment; step S6, based on the timing error estimation value at the current moment, the accumulated error of the crystal oscillator clock is compensated: when the satellite clock is normal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the timing error estimation value at the current moment; when the satellite clock is abnormal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average value of the compensation values ​​before the abnormal operation M times. The present invention combines the accumulated errors on different time scales and uses the Gaussian process regression model for multi-step correction, which effectively responds to the challenge of timing synchronization in the cable high-precision network and improves the synchronization accuracy and practicality.

[0079] The present invention can capture and utilize different modes of errors on short time scales (such as events related to data collection) and long time scales (such as daily inspection activities) by modeling the timing errors of the cable network on different time scales, thereby improving the accuracy and applicability of timing; and using a Gaussian process regression model (GLPR) to model the timing deviation behavior on different time scales, reducing the accumulation of synchronization errors. Compared with the traditional timing method of iterative or direct regression analysis estimation, the present invention effectively reduces the error accumulation problem in multi-step estimation by combining the error estimation results on different time scales to correct the model. In particular, the present invention utilizes the accumulated error at the current moment to correct the estimation result of the current time scale model, which helps to reduce the trend error of error divergence. The present invention constructs multiple GLPR models, each model is specifically for a specific time scale. Such a design enhances the adaptability and flexibility of the model and can better fit the clock error data of complex and changeable cable networks. BRIEF DESCRIPTION OF THE DRAWINGS

[0080] Figure 1 is a flow chart of a method for timing compensation of a cable sensor network according to an exemplary embodiment;

[0081] Figure 2is a structural schematic diagram of a device for timing compensation of a cable sensor network according to an exemplary embodiment;

[0082] Figure 3 is a curve chart of simulation data according to an exemplary embodiment;

[0083] Figure 4 This is a graph comparing the NMSE results of different algorithms;

[0084] Figure 5 This is a comparison chart of the NMSE results of different scale steps. DETAILED DESCRIPTION

[0085] In order to more clearly illustrate the technical features of the solution of the present invention, the present invention is described in detail below through specific implementation methods and in conjunction with the accompanying drawings.

[0086] like Figure 1 As shown, a method for timing compensation of a cable sensor network provided by an embodiment of the present invention comprises the following steps:

[0087] Step S1, collecting process history data of the actual error compensation system of the cable network, and taking the error data between the satellite second clock and the crystal oscillator second clock in the process history data as the initial sample;

[0088] Step S2, setting the step size, aggregating the initial samples, and obtaining aggregated samples at each step size;

[0089] Step S3, for each step size, construct an error feature vector of the accumulated error including the aggregated samples of the current scale and the current time point information;

[0090] Step S4, using a Gaussian process regression model to respectively model the error feature vectors corresponding to each step size, and obtain a Gaussian process regression model of each step size;

[0091] Step S5, using the Gaussian process regression model of each step size to generate error estimates of each step size in turn, and combining the difference error estimates of the lowest step size and the highest step size to obtain the timing error estimate at the current moment;

[0092] Step S6, compensating the accumulated error of the crystal oscillator clock based on the estimated value of the timing error at the current moment: when the satellite clock is normal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the estimated value of the timing error at the current moment; when the satellite clock is abnormal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average value of the compensation values ​​before the abnormal operation M times.

[0093] As a possible implementation of this embodiment, the value range of the step size is [1, 10].

[0094] As a possible implementation of this embodiment, step S2, setting the step size, aggregating the initial samples, and obtaining aggregated samples at various step sizes, includes the following steps:

[0095] Define the initial sample value as , n is the number of samples, m is the initial sample index;

[0096] The initial aggregated sample value corresponding to the step size h is defined as: , , i is the aggregate sample index, is the number of sub-interval blocks divided according to the step size, ;

[0097] Aggregate the initial samples to obtain the aggregated samples with a step size of h: .

[0098] As a possible implementation of this embodiment, the error characteristic vector is:

[0099] ,

[0100] ,

[0101] in, is the cumulative error at the current moment i, a, b, c are regression coefficients, is the random error of the satellite second clock at the current moment and obeys the normal distribution.

[0102] As a possible implementation of this embodiment, Depending on the specific satellite receiver sensitivity setting, the value range is [10.175, 15.825].

[0103] As a possible implementation of this embodiment, the Gaussian process regression model for obtaining each step size is:

[0104] ,

[0105] in is the error eigenvector with a step size of h, is the cumulative error at the current time i, (-) is the gamma function, and is the model hyperparameter.

[0106] As a possible implementation of this embodiment, step S5, using the Gaussian process regression model of each step size in sequence to generate the error estimation value of each step size, and combining the differential error estimation value of the lowest step size and the highest step size to obtain the timing error estimation value at the current moment, includes the following steps:

[0107] Step S51, construct the error characteristic vector of the previous and next step sizes under the current step size h:

[0108] and ,

[0109] and is the error feature vector of the previous and next step size h;

[0110] Step S52, based on the Gaussian process regression model of each step length , , Generate error estimates for each step size in turn , , ;

[0111] Step S53, obtain the difference error estimation value of the minimum step size and the maximum step size according to the following formula: :

[0112] ;

[0113] Step S54: The scale error estimate and w form a new error feature vector and input it into the Gaussian process regression model Get the estimated value of the timing error at the current time ;

[0114] Step S55, continuously iteratively update each scale according to whether the normalized mean square error (NMSE) meets the threshold requirement , , as well as Hyperparameters of .

[0115] As a possible implementation of this embodiment, the specific process of compensating the accumulated error of the crystal oscillator clock based on the estimated value of the timing error at the current moment is:

[0116] When the satellite clock works normally, the compensation value for the accumulated error of the crystal oscillator clock is ;

[0117] When the satellite clock is not working properly, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average value of the M compensation values ​​before the abnormal operation. :

[0118] ,

[0119] Where j is the compensation value index, M is usually the size of the step size, is the jth estimated error value.

[0120] In a second aspect, an embodiment of the present invention provides a device for timing compensation of a cable sensor network, comprising:

[0121] A data acquisition module is used to collect the process history data of the actual error compensation system of the cable network, and use the error data between the satellite second clock and the crystal second clock in the process history data as the initial sample;

[0122] The sample aggregation module is used to set the step size, aggregate the initial samples, and obtain aggregated samples at each step size;

[0123] An error vector construction module is used to construct an error feature vector of the accumulated error including the aggregated samples of the current scale and the current time point information for each step size;

[0124] A model building module is used to use a Gaussian process regression model to model the error characteristic vectors corresponding to each step size, and obtain a Gaussian process regression model of each step size;

[0125] The error generation module is used to generate error estimates of each step size in sequence using the Gaussian process regression model of each step size, and to obtain the timing error estimate of the current moment by combining the difference error estimates of the lowest step size and the highest step size;

[0126] The timing compensation module is used to compensate for the accumulated error of the crystal oscillator clock based on the estimated timing error at the current moment: when the satellite clock is normal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the estimated timing error at the current moment; when the satellite clock is abnormal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average of the compensation values ​​before the abnormal operation M times.

[0127] As a possible implementation of this embodiment, the value range of the step size is [1, 10].

[0128] As a possible implementation of this embodiment, the specific process of the sample aggregation module aggregating the initial samples is as follows:

[0129] Define the initial sample value as , n is the number of samples, m is the initial sample index;

[0130] The initial aggregated sample value corresponding to the step size h is defined as: , , i is the aggregate sample index, is the number of sub-interval blocks divided according to the step size, ;

[0131] Aggregate the initial samples to obtain the aggregated samples with a step size of h: .

[0132] As a possible implementation of this embodiment, the error characteristic vector is:

[0133] ,

[0134] ,

[0135] in, is the cumulative error at the current moment i, a, b, c are regression coefficients, is the random error of the satellite second clock at the current moment and obeys the normal distribution.

[0136] As a possible implementation of this embodiment, Depending on the specific satellite receiver sensitivity setting, the value range is [10.175, 15.825].

[0137] As a possible implementation of this embodiment, the Gaussian process regression model for obtaining each step size is:

[0138] ,

[0139] in is the error eigenvector with a step size of h, is the cumulative error at the current time i, (-) is the gamma function, and is the model hyperparameter.

[0140] As a possible implementation of this embodiment, the error generation module uses the Gaussian process regression model of each step size to sequentially generate the error estimation value of each step size, and combines the differential error estimation value of the lowest step size and the highest step size to obtain the timing error estimation value of the current moment. The specific process is as follows:

[0141] Step S51, construct the error characteristic vector of the previous and next step sizes under the current step size h:

[0142] and ,

[0143] and is the error feature vector of the previous and next step size h;

[0144] Step S52, based on the Gaussian process regression model of each step length , , Generate error estimates for each step size in turn , , ;

[0145] Step S53, obtain the difference error estimation value of the minimum step size and the maximum step size according to the following formula: :

[0146] ;

[0147] Step S54: The scale error estimate and w form a new error feature vector and input it into the Gaussian process regression model Get the estimated value of the timing error at the current time ;

[0148] Step S55, continuously iteratively update each scale according to whether the normalized mean square error (NMSE) meets the threshold requirement , , as well as Hyperparameters of .

[0149] As a possible implementation of this embodiment, the specific process of the timing compensation module compensating the accumulated error of the crystal oscillator clock based on the estimated value of the timing error at the current moment is:

[0150] When the satellite clock works normally, the compensation value for the accumulated error of the crystal oscillator clock is ;

[0151] When the satellite clock is not working properly, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average value of the M compensation values ​​before the abnormal operation. :

[0152] ,

[0153] Where j is the compensation value index, M is usually the size of the step size, is the jth estimated error value.

[0154] In the process of outputting second pulses, the current satellite receiver has a certain left and right drift with the coordinated universal time UTC (coordinated-universal-time). Assume that the random error is ε, which obeys the normal distribution:

[0155] .

[0156] Different satellite receivers have different time accuracy outputs, such as GARMINGPS-25 / 20's σ is 1μs, Beidou Tianxuan N200-BT's σ is 50ns. Investigating the time series of the satellite second clock, compared with UTC, it can be recorded as:

[0157] ,

[0158] Where y′ is the UTC clock corresponding to the satellite second clock at the kth moment; is the random error of the satellite second clock at the kth moment.

[0159] The crystal oscillator second clock has a large cumulative error. Since the random error generated by its frequency stability at 109Hz is less than 1ns, the random error of the crystal oscillator second clock is not considered. The drift of the first second clock with the UTC clock is R, and the drift rate between each crystal oscillator second clock is d. Then the drift of the kth crystal oscillator second clock relative to the UTC clock is:

[0160] ;

[0161] The clock deviation of the kth second clock output by the crystal oscillator relative to UTC is:

[0162] ,

[0163] Where a is the initial deviation between the crystal oscillator second clock and the UTC clock. Considering the time series of the crystal oscillator second clock, compared with UTC, it can be recorded as:

[0164] ,

[0165] Wherein, y″ is the UTC clock corresponding to the crystal oscillator second clock at the kth moment; a+bk+ck2 is the accumulated error of the crystal oscillator second clock at the kth moment.

[0166] In view of the volatility of the deviation between satellite and crystal clock, the theoretical timing estimation error modeling often fails to meet the requirements of real-time and effectiveness. A large number of experimental results show that traditional methods cannot achieve accurate estimation of high-precision timing errors in cable networks because most methods do not consider the characteristics of the timing process. In fact, both crystal oscillators and satellite clocks exhibit different modes of decoding and reading time information at different time scales. For example, timing compensation has different estimation modes at short time scales (such as events related to data collection) and long time scales (such as daily inspection activities). In order to model timing errors at different time scales, it is necessary to adopt scale aggregation technology, which forms aggregated sample sequences of different time scales by dividing the original process history data into non-overlapping blocks and calculating their sum, and then analyzes and estimates the errors of aggregated samples of each scale separately.

[0167] To this end, the specific process of the present invention for performing multi-scale Gaussian process regression for cable network timing compensation is as follows.

[0168] Step 1: Collect the error difference data between the satellite second clock and the crystal second clock in the process history as the initial sample.

[0169] Two historical logs corresponding to the actual error compensation system in the cable network are selected as the process history data set. At the same time, in order to improve the generalization of the method and data of the present invention, a random function with a mean of zero is added to the satellite second clock, as shown in the attached figure. Figure 3 As shown, the simulation produces the UTC second clock C u (t), satellite second clock C b (t) and crystal oscillator second clock C k (t), there is a certain left and right drift between the satellite second clock and the UTC second clock, and the crystal second clock has a large cumulative error due to its own frequency fluctuation. The simulation produced a random error of 50ns for the satellite clock, the crystal frequency was 200MHz, and the frequency accuracy was 5x10 -11 , the frequency stability is 1x10 -11 / s, assuming the crystal temperature is constant at 45°C.

[0170] Step 2: Get aggregated samples at each scale by setting the step size.

[0171] The step size range is [1, 10].

[0172] The aggregated samples at each scale are specifically:

[0173] Define the initial sample value as , n is the number of samples, m is the initial sample index;

[0174] The initial aggregated sample value corresponding to the step size h is defined as: , i is the aggregate sample index, is the number of sub-interval blocks divided according to the step size,

[0175] ,

[0176] To this end, the aggregate sample can be expressed as: , that is, the aggregation process is to divide the original sample sequence into non-overlapping sub-interval blocks and sum the samples in the interval to obtain an aggregated sample with a new sample number of h.

[0177] The simulated data and the real data were split into 100 equal parts, each used to create a pair of non-overlapping training and test sets. For each pair, the model was fit on the training set and then evaluated on the test set.

[0178] Step 3: For each step size, construct an error feature vector containing the aggregated samples of the current scale and the accumulated error of the current time point information.

[0179] The error characteristic vector is specifically:

[0180] The cumulative error expression is: ,

[0181] in, is the cumulative error at the current moment i, a, b, c are regression coefficients, is the random error of the satellite second clock at the current moment and obeys the normal distribution; according to the test, a, b, c are set to 60.75, 2.464, 1.0775 According to the specific satellite receiver sensitivity setting, the value range is [10.175, 15.825];

[0182] For this reason, the error eigenvector is: .

[0183] Step 4: Use a Gaussian process regression model to model the error feature vectors corresponding to each step size.

[0184] The Gaussian process regression model is expressed as follows:

[0185] ,

[0186] in, (-) is the gamma function, and is the model hyperparameter.

[0187] Step 5: The Gaussian process regression model of each scale generates scale error estimates in turn and combines the differential error estimates of the lowest step size and the highest step size to obtain the timing error estimate at the current moment.

[0188] (1) Construct the error characteristic vector under the current step size h, that is, the error characteristic vector described in weight 4 The error eigenvectors of the step size before and after are:

[0189] and ;

[0190] (2) Based on the Gaussian process regression model at each scale , , Generate scale error estimates in sequence , , ;

[0191] (3) The differential error estimates of the lowest and highest step sizes are obtained according to the following formula: :

[0192] ;

[0193] (4) The scale error estimate and w form a new error feature vector and input it into the Gaussian process regression model Get the estimated value of the timing error at the current time ;

[0194] (5) Continuously iterate and update each scale based on whether the normalized mean square error (NMSE) meets the threshold requirement , , as well as Hyperparameters of .

[0195] Step 6: Compensate the accumulated error of the crystal oscillator clock with the estimated value: when the satellite clock is normal, the compensation value is the estimated value of the timing error at the current moment; when the satellite clock is abnormal, the compensation value is the average of the compensation values ​​before the abnormal operation M times.

[0196] When the satellite clock works normally, the compensation value of the crystal oscillator clock is ;

[0197] When the satellite clock is not working properly, the compensation value of the crystal oscillator clock is the average value of the M compensation values ​​before the abnormal operation. :

[0198] ,

[0199] Where j is the compensation value index, M is usually the size of the step size, is the jth error value of the estimate;

[0200] The final output is a synchronous clock with high accuracy and strong stability.

[0201] The model of the present invention is compared with three error estimation algorithms: least squares method, PLSR and long short-term memory (LSTM) network. Least squares method and PLSR are two commonly used multivariate regression analysis models. LSTM is a commonly used model for prediction and estimation methods of deep learning algorithms and LSTM is a type of recurrent neural network (RNN). We use a rational quadratic covariance function in the model to capture the characteristics of clock errors.

[0202] It should be noted that the comparison results select the normalized mean square error as the quantitative indicator, and its expression is:

[0203] ,

[0204] Where N is the size of the test set, σ 2 is the variance of the dataset. t and y represent the actual error and the estimated error respectively, and the value of NMSE=0 corresponds to a perfect estimation result.

[0205] like Figure 4 As shown in the figure, the performance of four models (LR, PLSR, LSTM and GLPR) is shown. In most of the error estimation results, the LSTM and GLPR models perform better than the LR and PLSR models. In addition, the standard deviation of each model also shows that their performance has a certain volatility. It is worth noting that the GLPR model of the method of the present invention achieves the lowest NMSE result in terms of fitting.

[0206] like Figure 5 As shown in the figure, the clock error estimation performance obtained with different scale steps is demonstrated. It can be seen that when the step size is 1, that is, the traditional single point estimation, the result error is large. In the value range of 1-10, when the scale step size is 3, the NMSE is the lowest.

[0207] In summary, the method of the present invention is used to estimate the error of the cable network timing clock system, and the generated clock signal has the characteristics of high accuracy and strong stability. In practical applications, in order to improve the clock accuracy after the satellite clock fails in the cable high-precision network, the ambient temperature should be kept constant as much as possible so that the crystal oscillator of the cable high-precision network has sufficient long-term stability.

[0208] The present invention can capture and utilize different modes of errors on short time scales (such as events related to data collection) and long time scales (such as daily inspection activities) by modeling the timing errors of the cable network on different time scales, thereby improving the accuracy and applicability of timing; and using a Gaussian process regression model (GLPR) to model the timing deviation behavior on different time scales, reducing the accumulation of synchronization errors. Compared with the traditional timing method of iterative or direct regression analysis estimation, the present invention effectively reduces the error accumulation problem in multi-step estimation by combining the error estimation results on different time scales to correct the model. In particular, the present invention utilizes the accumulated error at the current moment to correct the estimation result of the current time scale model, which helps to reduce the trend error of error divergence. The present invention constructs multiple GLPR models, each model is specifically for a specific time scale. Such a design enhances the adaptability and flexibility of the model and can better fit the clock error data of complex and changeable cable networks. The experiments on two cable timing error data sets demonstrate the effectiveness of the present invention, showing lower error propagation than other commonly used estimation and compensation algorithms (including ARIMA, PLSR, LSTM, etc.), demonstrating its potential and advantages in practical applications.

[0209] An electronic device provided by an embodiment of the present invention includes a processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor. When the electronic device is running, the processor communicates with the memory via the bus, and the processor executes the machine-readable instructions to perform the steps of any of the above-mentioned methods for timing compensation of a cable sensor network.

[0210] Specifically, the above-mentioned memory and processor can be general-purpose memory and processor, which are not specifically limited here. When the processor runs the computer program stored in the memory, the above-mentioned method for timing compensation of the cable sensor network can be executed.

[0211] Those skilled in the art will appreciate that the structure of the electronic device does not limit the electronic device and may include more or fewer components than shown in the figure, or combine or split certain components, or arrange the components differently.

[0212] In some embodiments, the electronic device may also include a touch screen that can be used to display a graphical user interface (e.g., a startup interface of an application) and receive user operations on the graphical user interface (e.g., startup operations on an application). The specific touch screen may include a display panel and a touch panel. The display panel may be configured in the form of LCD (Liquid Crystal Display), OLED (Organic Light-Emitting Diode), etc. The touch panel may collect the user's contact or non-contact operations on or near it, and generate pre-set operation instructions, for example, the user uses any suitable object such as a finger, stylus, or accessories on or near the touch panel. In addition, the touch panel may include two parts: a touch detection device and a touch controller. The touch detection device detects the user's touch position and posture, detects the signal brought by the touch operation, and transmits the signal to the touch controller; the touch controller receives the touch information from the touch detection device, converts it into information that the processor can process, and then sends it to the processor, and can receive and execute commands from the processor. In addition, the touch panel can be implemented by various types such as resistive, capacitive, infrared and surface acoustic wave, and any technology developed in the future can also be used to implement the touch panel. Further, the touch panel can cover the display panel, and the user can operate on or near the touch panel covered on the display panel according to the graphical user interface displayed on the display panel. After the touch panel detects the operation on or near it, it is transmitted to the processor to determine the user input, and then the processor provides corresponding visual output on the display panel in response to the user input. In addition, the touch panel and the display panel can be implemented as two independent components or integrated.

[0213] Corresponding to the method for starting the above application, an embodiment of the present invention further provides a storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned methods for timing compensation of a cable sensor network are executed.

[0214] The application startup device provided in the embodiment of the present application can be specific hardware on the device or software or firmware installed on the device. The device provided in the embodiment of the present application, its implementation principle and the technical effect produced are the same as those in the aforementioned method embodiment. For the sake of brief description, the parts not mentioned in the device embodiment can refer to the corresponding contents in the aforementioned method embodiment. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, devices and units described above can all refer to the corresponding processes in the aforementioned method embodiment, and will not be repeated here.

[0215] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0216] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of modules is only a logical function division. There may be other division methods in actual implementation. For example, multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0217] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0218] In addition, each functional module in the embodiments provided in the present application may be integrated into one processing module, or each module may exist physically separately, or two or more modules may be integrated into one module.

[0219] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0220] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0221] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0222] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A method for timing compensation of a cable sensor network, characterized in that: The steps include: Step S1, collecting process history data of the actual error compensation system of the cable network, and taking the error data between the satellite second clock and the crystal oscillator second clock in the process history data as the initial sample; Step S2, setting the step size, aggregating the initial samples, and obtaining aggregated samples at each step size; Step S3, for each step size, construct an error feature vector of the accumulated error including the aggregated samples of the current scale and the current time point information; Step S4, using a Gaussian process regression model to model the error feature vectors corresponding to each step size, and obtaining a Gaussian process regression model of each step size; Step S5, using the Gaussian process regression model of each step size to generate error estimates of each step size in turn, and combining the difference error estimates of the lowest step size and the highest step size to obtain the timing error estimate at the current moment; Step S6, compensating the accumulated error of the crystal oscillator clock based on the estimated value of the timing error at the current moment: when the satellite clock is normal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the estimated value of the timing error at the current moment; When the satellite clock is abnormal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average value of the compensation values ​​before the abnormal operation M times; The Gaussian process regression model for obtaining each step size is: , in is the error eigenvector with a step size of h, is the cumulative error at the current time i, (-) is the gamma function, and is the model hyperparameter; The step S5, using the Gaussian process regression model of each step size in turn to generate the error estimation value of each step size, and combining the difference error estimation value of the lowest step size and the highest step size to obtain the timing error estimation value at the current moment, includes the following steps: Step S51, construct the error characteristic vector of the previous and next step sizes under the current step size h: and , and is the error feature vector of the previous and next step size h; Step S52, based on the Gaussian process regression model of each step length , , Generate error estimates for each step size in turn , , ; Step S53, obtain the difference error estimation value of the minimum step size and the maximum step size according to the following formula: : ; Step S54: The scale error estimate and w form a new error feature vector and input it into the Gaussian process regression model Get the estimated value of the timing error at the current time ; Step S55: continuously iteratively update each scale according to whether the normalized mean square error meets the threshold requirement. , , as well as Hyperparameters of .

2. The method for timing compensation of a cable sensor network according to claim 1, characterized in that: The step size ranges from [1, 10].

3. The method for timing compensation of a cable sensor network according to claim 1, characterized in that: The step S2, setting the step size, aggregating the initial samples, and obtaining aggregated samples at each step size, includes the following steps: Define the initial sample value as , n is the number of samples, m is the initial sample index; The initial aggregated sample value corresponding to the step size h is defined as: , , i is the aggregate sample index, is the number of sub-interval blocks divided according to the step size, ; Aggregate the initial samples to obtain the aggregated samples with a step size of h: .

4. The method for timing compensation of a cable sensor network according to claim 1, characterized in that: The error characteristic vector is: , , in, is the cumulative error at the current moment i, a, b, c are regression coefficients, is the random error of the satellite second clock at the current moment and obeys the normal distribution.

5. The method for timing compensation of a cable sensor network according to claim 4, characterized in that: Depending on the specific satellite receiver sensitivity setting, the value range is [10.175, 15.825].

6. The method for timing compensation of a cable sensor network according to claim 1, characterized in that: The specific process of compensating the accumulated error of the crystal oscillator clock based on the estimated value of the timing error at the current moment is as follows: When the satellite clock works normally, the compensation value for the accumulated error of the crystal oscillator clock is ; When the satellite clock is not working properly, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average value of the M compensation values ​​before the abnormal operation. : , Where j is the compensation value index, M is the size of the step size, is the jth estimated error value.

7. A device for timing compensation of a cable sensor network, characterized in that: include: A data acquisition module is used to collect the process history data of the actual error compensation system of the cable network, and use the error data between the satellite second clock and the crystal second clock in the process history data as the initial sample; The sample aggregation module is used to set the step size, aggregate the initial samples, and obtain aggregated samples at each step size; An error vector construction module is used to construct an error feature vector of the accumulated error including the aggregated samples of the current scale and the current time point information for each step size; A model building module is used to use a Gaussian process regression model to model the error characteristic vectors corresponding to each step size, and obtain a Gaussian process regression model of each step size; The error generation module is used to generate error estimates of each step size in sequence using the Gaussian process regression model of each step size, and to obtain the timing error estimate of the current moment by combining the difference error estimates of the lowest step size and the highest step size; The timing compensation module is used to compensate the accumulated error of the crystal oscillator clock based on the estimated value of the timing error at the current moment: when the satellite clock is normal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the estimated value of the timing error at the current moment; When the satellite clock is abnormal, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average value of the compensation values ​​before the abnormal operation M times; The Gaussian process regression model for obtaining each step size is: , in is the error eigenvector with a step size of h, is the cumulative error at the current time i, (-) is the gamma function, and is the model hyperparameter; The error generation module uses the Gaussian process regression model of each step size to generate the error estimation value of each step size in turn, and combines the differential error estimation value of the lowest step size and the highest step size to obtain the timing error estimation value of the current moment. The specific process is: Step S51, construct the error characteristic vector of the previous and next step sizes under the current step size h: and , and is the error feature vector of the previous and next step size h; Step S52, based on the Gaussian process regression model of each step length , , Generate error estimates for each step size in turn , , ; Step S53, obtain the difference error estimation value of the minimum step size and the maximum step size according to the following formula: : ; Step S54: The scale error estimate and w form a new error feature vector and input it into the Gaussian process regression model Get the estimated value of the timing error at the current time ; Step S55: continuously iteratively update each scale according to whether the normalized mean square error meets the threshold requirement. , , as well as Hyperparameters of .

8. The device for timing compensation of a cable sensor network according to claim 7, characterized in that: The specific process of the sample aggregation module aggregating the initial samples is as follows: Define the initial sample value as , n is the number of samples, m is the initial sample index; The initial aggregated sample value corresponding to the step size h is defined as: , , i is the aggregate sample index, is the number of sub-interval blocks divided according to the step size, ; Aggregate the initial samples to obtain the aggregated samples with a step size of h: .

9. The device for timing compensation of a cable sensor network according to claim 8, characterized in that: The error characteristic vector is: , , in, is the cumulative error at the current moment i, a, b, c are regression coefficients, is the random error of the satellite second clock at the current moment and obeys the normal distribution.

10. The device for timing compensation of a cable sensor network according to claim 7, characterized in that: The specific process of the timing compensation module compensating the accumulated error of the crystal oscillator clock based on the estimated value of the timing error at the current moment is: When the satellite clock works normally, the compensation value for the accumulated error of the crystal oscillator clock is ; When the satellite clock is not working properly, the compensation value for compensating the accumulated error of the crystal oscillator clock is the average value of the M compensation values ​​before the abnormal operation. : , Where j is the compensation value index, M is the size of the step size, is the jth estimated error value.

11. An electronic device, characterized in that: It includes a processor, a memory and a bus, the memory stores machine-readable instructions executable by the processor, when the electronic device is running, the processor and the memory communicate through the bus, and the processor executes the machine-readable instructions to perform the steps of the method for timing compensation of a cable sensor network as described in any one of claims 1-6.

12. A storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method for timing compensation of a cable sensor network as claimed in any one of claims 1 to 6 are executed.

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