Coding method and device of hardware encoder

Abstract

The invention relates to the technical field of encoders, and discloses an encoding method and device of a hardware encoder, and the method comprises the steps: detecting first encoding information of an encoded frame group in a current scene; according to the first coding information, initial planning coding information of a current coding frame in the current scene is calculated, and the current coding frame comprises a plurality of coding tree units; acquiring second coding information of a previous adjacent coding tree unit of the current coding tree unit in the current coding frame; according to the second encoding information and the initial planning encoding information, target planning encoding information of the current encoding tree unit is calculated, and the target planning encoding information is used for indicating a hardware encoder to execute matched encoding operation on the current encoding tree unit. Therefore, the invention provides a frame group level, frame level and unit level fused encoder coding control mechanism, the coding flexibility of a hardware encoder can be improved, the coding performance of the hardware encoder can be fully released, and the output quality of a coded image can be improved.

Description

Technical Field

[0001] The present invention relates to the technical field of encoders, and in particular to an encoding method and device of a hardware encoder. Background Art

[0002] A hardware encoder is a hardware device that converts physical quantities into electrical or digital signals so that computers, control systems or other electronic devices can further process, analyze or display the converted signals. This conversion process is the cornerstone of automation, measurement, monitoring and control systems.

[0003] Unlike software encoders, hardware encoders must consider the performance requirements of application scenarios during the design phase. Therefore, the algorithm design of each pipeline level must take into account its performance bottleneck, thereby limiting the computational complexity of some modules. In addition, there will be areas of different complexity in the actual encoded image. If hardware encoders all use the same calculation process, it will lead to redundant calculations in simple areas and insufficient calculations in complex areas, thus failing to fully exert their performance.

[0004] It can be seen that it is particularly important to propose a technical solution to improve the encoding flexibility of the hardware encoder. Summary of the invention

[0005] The present invention provides a coding method and a device for a hardware encoder, which can improve the coding flexibility of the hardware encoder.

[0006] In order to solve the above technical problem, the first aspect of the present invention discloses an encoding method of a hardware encoder, the method comprising:

[0007] Detecting first encoding information of an encoded frame group in a current scene;

[0008] Calculating, according to the first coding information, initial planned coding information of a current coding frame in the current scene, the current coding frame including a plurality of coding tree units;

[0009] Obtaining second coding information of a previous adjacent coding tree unit of a current coding tree unit in the current coding frame;

[0010] According to the second coding information and the initial planning coding information, the target planning coding information of the current coding tree unit is calculated, and the target planning coding information is used to instruct the hardware encoder to perform a matching coding operation on the current coding tree unit.

[0011] As an optional implementation manner, in the first aspect of the present invention, the first coding information includes a first coding parameter and a first number of clock cycles consumed by the encoded frame group, and the calculating, according to the first coding information, the initial planned coding information of the current coded frame in the current scene includes:

[0012] Analyzing performance constraint information in the current scenario according to the first encoding parameter;

[0013] Analyzing, according to the performance constraint information and the first number of clock cycles, the number of second clock cycles planned to be consumed by the current coding frame group in which the current coding frame is located in the current scenario;

[0014] Calculating a third clock cycle number consumed by the current coding frame planning and a frame-level planning coding parameter according to the first clock cycle number and the second clock cycle number;

[0015] Initial planned coding information of the current coding frame is generated according to the third clock cycle number and the frame-level planned coding parameter.

[0016] As an optional implementation manner, in the first aspect of the present invention, the second coding information includes the number of fourth clock cycles consumed by the previous adjacent coding tree unit, and the calculating the target planning coding information of the current coding tree unit according to the second coding information and the initial planning coding information includes:

[0017] Calculating a fifth clock cycle number consumed by the current coding tree unit plan according to the fourth clock cycle number and the third clock cycle number;

[0018] According to the fifth clock cycle number, updating the frame-level planning coding parameter, wherein the updated frame-level planning coding parameter satisfies the constraint condition corresponding to the fifth clock cycle number;

[0019] Obtaining basic information of the current coding tree unit;

[0020] Calculate the target planning coding information of the current coding tree unit according to the basic information and the updated frame-level planning coding parameters.

[0021] As an optional implementation manner, in the first aspect of the present invention, the current coding tree unit includes multiple pixel blocks, the basic information includes pixel block distribution information and pixel block feature information, and the target planning coding information of the current coding tree unit is calculated according to the basic information and the updated frame-level planning coding parameter, including:

[0022] For each of the pixel blocks, matching the intra-frame multi-directional associated pixel blocks and the inter-frame reference pixel blocks associated with the pixel block according to the pixel block distribution information and the pixel block feature information;

[0023] Analyzing redundant spatial information of the current coding tree unit according to all the multi-directionally associated pixel blocks within the frame;

[0024] Analyzing first motion information of the current coding tree unit according to all the inter-frame reference pixel blocks, where the first motion information is used to represent a motion condition of the current coding tree unit;

[0025] According to the first coding information, matching the priority values ​​corresponding to the redundant spatial information and the first motion information;

[0026] Analyzing the image complexity information corresponding to the current coding tree unit according to the redundant spatial information, the first motion information and the corresponding priority values;

[0027] Calculate target planning coding information of the current coding tree unit according to the image complexity information and the updated frame-level planning coding parameters.

[0028] As an optional implementation manner, in the first aspect of the present invention, the basic information further includes actual pixel value information, and the analyzing the redundant spatial information of the current coding tree unit according to all the multi-directionally associated pixel blocks within the frame includes:

[0029] For each of the pixel blocks, predicting first predicted pixel value information of the pixel block according to the intra-frame multi-directionally associated pixel blocks of the pixel block;

[0030] Calculating second predicted pixel value information of the current coding tree unit according to all the first predicted pixel value information;

[0031] According to the second predicted pixel value information and the actual pixel value information, redundant space information of the current coding tree unit is analyzed, the redundant space information includes a prediction bias value, the prediction bias value is used to represent the deviation between the second predicted pixel value information and the actual pixel value information, and the deviation is used to represent the redundant space in the current coding tree unit.

[0032] As an optional implementation manner, in the first aspect of the present invention, the inter-frame reference pixel block is in the coded frame group, the frame where the inter-frame reference pixel block is located is a reference frame of the current coded frame, and the analyzing the first motion information of the current coding tree unit according to all the inter-frame reference pixel blocks includes:

[0033] For each of the pixel blocks, predict second motion information of the pixel block according to the inter-frame reference pixel block of the pixel block, where the second motion information is used to represent a motion condition of the pixel block based on the inter-frame reference pixel block;

[0034] The first motion information of the current coding tree unit is analyzed according to all the second motion information.

[0035] As an optional embodiment, in the first aspect of the present invention, the method further comprises:

[0036] Predicting the coding effect information of the current coding tree unit according to the target planning coding information;

[0037] determining whether the coding effect information matches the preset coding effect information, and when it is determined that the coding effect information does not match the preset coding effect information, determining association information between at least one target item and all the target items according to the preset coding effect information and the coding effect information, the target item being a target pixel block in the current coding tree unit that causes the coding effect information to not match the preset coding effect information;

[0038] According to all the target items, determine the target parameter information matching all the target items in the target planning coding information;

[0039] Adjust the target planning coding information according to the association information, the preset coding effect information and the target parameter information.

[0040] A second aspect of the present invention discloses an encoding device of a hardware encoder, the device comprising:

[0041] A detection module, used to detect first encoding information of an encoded frame group in a current scene;

[0042] A calculation module, configured to calculate initial planned coding information of a current coding frame in the current scene according to the first coding information, wherein the current coding frame includes a plurality of coding tree units;

[0043] An acquisition module, configured to acquire second coding information of a previous adjacent coding tree unit of a current coding tree unit in the current coding frame;

[0044] The calculation module is further used to calculate the target planning coding information of the current coding tree unit according to the second coding information and the initial planning coding information, and the target planning coding information is used to instruct the hardware encoder to perform a matching coding operation on the current coding tree unit.

[0045] As an optional implementation, in the second aspect of the present invention, the first coding information includes a first coding parameter and a first number of clock cycles consumed by the encoded frame group, and the calculation module calculates the initial planned coding information of the current coded frame in the current scene according to the first coding information. The specific manner includes:

[0046] Analyzing performance constraint information in the current scenario according to the first encoding parameter;

[0047] Analyzing, according to the performance constraint information and the first number of clock cycles, the number of second clock cycles planned to be consumed by the current coding frame group in which the current coding frame is located in the current scenario;

[0048] Calculating a third clock cycle number consumed by the current coding frame planning and a frame-level planning coding parameter according to the first clock cycle number and the second clock cycle number;

[0049] Initial planned coding information of the current coding frame is generated according to the third clock cycle number and the frame-level planned coding parameter.

[0050] As an optional implementation manner, in the second aspect of the present invention, the second coding information includes the number of fourth clock cycles consumed by the previous adjacent coding tree unit, and the calculation module calculates the target planning coding information of the current coding tree unit according to the second coding information and the initial planning coding information. The specific manner includes:

[0051] Calculating a fifth clock cycle number consumed by the current coding tree unit plan according to the fourth clock cycle number and the third clock cycle number;

[0052] According to the fifth clock cycle number, updating the frame-level planning coding parameter, wherein the updated frame-level planning coding parameter satisfies the constraint condition corresponding to the fifth clock cycle number;

[0053] Obtaining basic information of the current coding tree unit;

[0054] Calculate the target planning coding information of the current coding tree unit according to the basic information and the updated frame-level planning coding parameters.

[0055] As an optional implementation manner, in the second aspect of the present invention, the current coding tree unit includes multiple pixel blocks, the basic information includes pixel block distribution information and pixel block feature information, and the calculation module calculates the target planning coding information of the current coding tree unit according to the basic information and the updated frame-level planning coding parameter. The specific manner includes:

[0056] For each of the pixel blocks, matching the intra-frame multi-directional associated pixel blocks and the inter-frame reference pixel blocks associated with the pixel block according to the pixel block distribution information and the pixel block feature information;

[0057] Analyzing redundant spatial information of the current coding tree unit according to all the multi-directionally associated pixel blocks within the frame;

[0058] Analyzing first motion information of the current coding tree unit according to all the inter-frame reference pixel blocks, where the first motion information is used to represent a motion condition of the current coding tree unit;

[0059] According to the first coding information, matching the priority values ​​corresponding to the redundant spatial information and the first motion information;

[0060] Analyzing the image complexity information corresponding to the current coding tree unit according to the redundant spatial information, the first motion information and the corresponding priority values;

[0061] Calculate target planning coding information of the current coding tree unit according to the image complexity information and the updated frame-level planning coding parameters.

[0062] As an optional implementation manner, in the second aspect of the present invention, the basic information further includes actual pixel value information, and the specific manner in which the calculation module analyzes the redundant spatial information of the current coding tree unit according to all the multi-directionally associated pixel blocks within the frame includes:

[0063] For each of the pixel blocks, predicting first predicted pixel value information of the pixel block according to the intra-frame multi-directionally associated pixel blocks of the pixel block;

[0064] Calculating second predicted pixel value information of the current coding tree unit according to all the first predicted pixel value information;

[0065] According to the second predicted pixel value information and the actual pixel value information, redundant space information of the current coding tree unit is analyzed, the redundant space information includes a prediction bias value, the prediction bias value is used to represent the deviation between the second predicted pixel value information and the actual pixel value information, and the deviation is used to represent the redundant space in the current coding tree unit.

[0066] As an optional implementation manner, in the second aspect of the present invention, the inter-frame reference pixel block is in the encoded frame group, the frame where the inter-frame reference pixel block is located is the reference frame of the current encoded frame, and the specific manner in which the calculation module analyzes the first motion information of the current coding tree unit according to all the inter-frame reference pixel blocks includes:

[0067] For each of the pixel blocks, predict second motion information of the pixel block according to the inter-frame reference pixel block of the pixel block, where the second motion information is used to represent a motion condition of the pixel block based on the inter-frame reference pixel block;

[0068] The first motion information of the current coding tree unit is analyzed according to all the second motion information.

[0069] As an optional implementation, in the second aspect of the present invention, the device further includes:

[0070] A prediction module, used to predict the coding effect information of the current coding tree unit according to the target planning coding information;

[0071] A judging module, used for judging whether the coding effect information matches the preset coding effect information;

[0072] a determination module, configured to determine, when the determination module determines that the coding effect information does not match the preset coding effect information, association information between at least one target item and all the target items according to the preset coding effect information and the coding effect information, wherein the target item is a target pixel block in the current coding tree unit that causes the coding effect information to not match the preset coding effect information;

[0073] The determination module is further used to determine, based on all the target items, target parameter information matching all the target items in the target planning coding information;

[0074] An adjustment module is used to adjust the target planning coding information according to the association information, the preset coding effect information and the target parameter information.

[0075] A third aspect of the present invention discloses another encoding device of a hardware encoder, the device comprising:

[0076] A memory storing executable program code;

[0077] a processor coupled to the memory;

[0078] The processor calls the executable program code stored in the memory to execute the encoding method of the hardware encoder disclosed in the first aspect of the present invention.

[0079] A fourth aspect of the present invention discloses a computer storage medium, wherein the computer storage medium stores computer instructions, and when the computer instructions are called, they are used to execute the encoding method of the hardware encoder disclosed in the first aspect of the present invention.

[0080] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0081] In an embodiment of the present invention, first coding information of a group of encoded frames in a current scenario is detected; based on the first coding information, initial planning coding information of a current coding frame in the current scenario is calculated, and the current coding frame includes multiple coding tree units; second coding information of a previous adjacent coding tree unit of the current coding tree unit in the current coding frame is obtained; based on the second coding information and the initial planning coding information, target planning coding information of the current coding tree unit is calculated, and the target planning coding information is used to instruct a hardware encoder to perform a matching coding operation on the current coding tree unit. It can be seen that the implementation of the present invention proposes an encoder coding control mechanism that integrates the frame group level, frame level, and unit level, which can calculate the initial planning coding information of the current coding frame according to the first coding information of the encoded frame group before the current coding frame in the current scene, and adjust the above-calculated initial planning coding information in real time by obtaining the second coding information of the previous adjacent coding tree unit of the current coding tree unit in the current coding frame, so as to obtain the target planning coding information adapted to the current coding tree unit for instructing the hardware encoder to perform matching coding operations on the current coding tree unit, thereby realizing reasonable allocation of the encoder's computing performance, improving the calculation accuracy of the target planning coding information of the coding tree unit, and improving the coding flexibility of the hardware encoder, which is conducive to fully releasing the coding performance of the hardware encoder and also conducive to improving the output quality of the encoded image. BRIEF DESCRIPTION OF THE DRAWINGS

[0082] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0083] Figure 1 It is a flowchart of an encoding method of a hardware encoder disclosed in an embodiment of the present invention;

[0084] Figure 2 It is a flowchart of another encoding method of a hardware encoder disclosed in an embodiment of the present invention;

[0085] Figure 3 It is a structural schematic diagram of an encoding device of a hardware encoder disclosed in an embodiment of the present invention;

[0086] Figure 4 It is a structural schematic diagram of an encoding device of another hardware encoder disclosed in an embodiment of the present invention;

[0087] Figure 5 It is a structural schematic diagram of another encoding device of a hardware encoder disclosed in an embodiment of the present invention. DETAILED DESCRIPTION

[0088] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0089] The terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish different objects rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, device, product or end including a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units inherent to these processes, methods, products or ends.

[0090] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0091] The present invention discloses a coding method and device of a hardware encoder, and proposes a coding control mechanism of an encoder that integrates frame group level, frame level, and unit level, which can calculate the initial planning coding information of the current coding frame according to the first coding information of the coded frame group before the current coding frame in the current scene, and adjust the calculated initial planning coding information in real time by obtaining the second coding information of the previous adjacent coding tree unit of the current coding tree unit in the current coding frame, so as to obtain the target planning coding information adapted to the current coding tree unit for instructing the hardware encoder to perform matching coding operations on the current coding tree unit, so as to reasonably distribute the computing performance of the encoder, improve the calculation accuracy of the target planning coding information of the coding tree unit, improve the coding flexibility of the hardware encoder, and be conducive to fully releasing the coding performance of the hardware encoder, and also be conducive to improving the output quality of the coded image. The following are detailed descriptions.

[0092] Embodiment 1

[0093] See also Figure 1 , Figure 1 is a flow chart of an encoding method of a hardware encoder disclosed in an embodiment of the present invention. Figure 1The encoding method of the described hardware encoder relates to the field of encoder technology, in particular to the field of video hardware encoders, and can be specifically applied to video hardware encoders or other encoding devices, and can also be applied to smart devices associated with encoding devices, including but not limited to battery devices, cloud devices, edge computing devices, relay devices, base station devices, city management devices, and one or more of smart network devices, which are not limited in the embodiments of the present invention. Figure 1 As shown, the encoding method of the hardware encoder may include the following operations:

[0094] 101. Detect first encoding information of an encoded frame group in a current scene;

[0095] 102. Calculate initial planned coding information of a current coding frame in a current scene according to the first coding information, where the current coding frame includes a plurality of coding tree units;

[0096] In the embodiment of the present invention, as an optional implementation manner, the first coding information includes the first coding parameter and the first number of clock cycles consumed by the coded frame group, and the above-mentioned calculation of the initial planned coding information of the current coded frame in the current scene according to the first coding information may include the following operations:

[0097] Analyzing performance constraint information in a current scenario according to the first encoding parameter;

[0098] Analyze the number of second clock cycles consumed by the current coding frame group where the current coding frame is located in the current scenario according to the performance constraint information and the first clock cycle number;

[0099] Calculate the third clock cycle number and frame-level planned coding parameters consumed by the current coding frame planning according to the first clock cycle number and the second clock cycle number;

[0100] Initial planned coding information of the current coding frame is generated according to the third clock cycle number and the frame-level planned coding parameter.

[0101] In an embodiment of the present invention, optionally, the above-mentioned first encoding parameter may specifically refer to an actual encoding parameter of a previous adjacent encoded frame of the current encoded frame. Further optionally, if the above-mentioned current encoded frame is the first frame, the above-mentioned encoded frame group may be empty, and the embodiment of the present invention may also be implemented.

[0102] Further optionally, if the first encoding parameter is empty, a specific method of analyzing the performance constraint information in the current scenario may be:

[0103] Detect the scene requirement information of the current scene and the scene constraint information of the system corresponding to the hardware encoder;

[0104] The performance constraint information in the current scenario is analyzed according to the scenario requirement information and the scenario constraint information.

[0105] It can be seen that the implementation of this optional embodiment can analyze the performance constraint information in the current scenario according to the first coding parameter in the encoded frame group, and then analyze the second clock cycle number planned to be consumed by the current coding frame group where the current coding frame is located in the current scenario in combination with the first clock cycle number actually consumed by the above-mentioned encoded frame group and the second clock cycle number planned to be consumed by the current coding frame group, calculate the third clock cycle number and frame-level planned coding parameters planned to be consumed by the current coding frame, and then generate the initial planned coding information of the current coding frame in combination with the above-mentioned third clock cycle number and frame-level planned coding parameters, which can help improve the calculation accuracy of the initial planned coding information of the current coding frame, and thus help improve the coding accuracy and flexibility of the hardware encoder, and help to subsequently adjust the above-mentioned calculated initial planned coding information in real time in combination with the second coding information of the previous adjacent coding tree unit of the current coding tree unit in the current coding frame, so as to improve the calculation accuracy of the target planned coding information.

[0106] 103. Obtain second coding information of a previous adjacent coding tree unit of a current coding tree unit in a current coding frame;

[0107] Optionally, the specific unit range of the above-mentioned previous adjacent coding tree unit is not specifically limited in the embodiment of the present invention, that is, it at least includes the coding tree units that have been encoded in the current coding frame where the current coding tree unit is located, and on this basis can also include the coding tree units of the encoded frame group before the current coding frame.

[0108] 104. Calculate target planned coding information of the current coding tree unit according to the second coding information and the initial planned coding information, where the target planned coding information is used to instruct the hardware encoder to perform a matching coding operation on the current coding tree unit.

[0109] In the embodiment of the present invention, optionally, after the above step 104 is completed, the following operations may be further performed:

[0110] Detecting actual coding information of the current coding tree unit, where the actual coding information includes the actual number of consumed clock cycles and actual coding parameters;

[0111] Updating the current coding tree unit to the above-mentioned coded frame group, and setting the subsequent adjacent coding tree unit of the current coding tree unit as the new current coding tree unit;

[0112] According to the actual coding information, the first coding information is updated, and the step 101 and subsequent steps are continuously triggered to execute until there is no subsequent adjacent coding tree unit.

[0113] It can be seen that the implementation of the embodiment of the present invention proposes an encoder coding control mechanism that integrates the frame group level, frame level, and unit level, which can calculate the initial planning coding information of the current coding frame according to the first coding information of the encoded frame group before the current coding frame in the current scene, and adjust the above-calculated initial planning coding information in real time by obtaining the second coding information of the previous adjacent coding tree unit of the current coding tree unit in the current coding frame, so as to obtain the target planning coding information suitable for the current coding tree unit for instructing the hardware encoder to perform matching coding operations on the current coding tree unit, thereby realizing reasonable allocation of the encoder's computing performance, improving the calculation accuracy of the target planning coding information of the coding tree unit, and improving the coding flexibility of the hardware encoder, which is conducive to fully releasing the coding performance of the hardware encoder and also conducive to improving the output quality of the encoded image.

[0114] In the embodiment of the present invention, as another optional implementation manner, the second coding information includes the number of fourth clock cycles consumed by the previous adjacent coding tree unit, and the target planning coding information of the current coding tree unit is calculated according to the second coding information and the initial planning coding information, which may include the following operations:

[0115] Calculating the fifth clock cycle number consumed by the current coding tree unit plan according to the fourth clock cycle number and the third clock cycle number;

[0116] According to the fifth clock cycle number, updating the frame-level planning coding parameters, the updated frame-level planning coding parameters satisfy the constraint condition corresponding to the fifth clock cycle number;

[0117] Get the basic information of the current coding tree unit;

[0118] The target planning coding information of the current coding tree unit is calculated according to the basic information and the updated frame-level planning coding parameters.

[0119] It can be seen that the implementation of this optional embodiment can calculate the fifth clock cycle number planned to be consumed by the current coding tree unit in the current coding frame according to the fourth clock cycle number actually consumed by the previous adjacent coding tree unit of the current coding tree unit in the current coding frame obtained, combined with the third clock cycle number planned to be consumed by the current coding frame mentioned above, and then realize real-time updating of the current coding frame and frame-level planned coding parameters calculated above, so that the updated frame-level planned coding parameters meet the constraints corresponding to the fifth clock cycle number, and calculate the target planned coding information of the current coding tree unit based on the basic information of the current coding tree unit obtained and the updated frame-level planned coding parameters, so as to improve the calculation accuracy of the target planned coding information of the current coding tree unit, the allocation flexibility and accuracy of the encoder performance, which is conducive to fully releasing the coding performance of the hardware encoder, and is also conducive to improving the output quality of the encoded image.

[0120] In this optional embodiment, as an optional implementation manner, the current coding tree unit includes multiple pixel blocks, the basic information includes pixel block distribution information and pixel block feature information, and the target planning coding information of the current coding tree unit is calculated according to the basic information and the updated frame-level planning coding parameters, which may include the following operations:

[0121] For each pixel block, according to the pixel block distribution information and the pixel block feature information, the intra-frame multi-directional associated pixel blocks and the inter-frame reference pixel blocks associated with the pixel block are matched;

[0122] Analyze the redundant spatial information of the current coding tree unit according to the multi-directionally associated pixel blocks in all frames;

[0123] Analyze first motion information of the current coding tree unit according to all inter-frame reference pixel blocks, where the first motion information is used to indicate motion of the current coding tree unit;

[0124] According to the first coding information, matching the priority values ​​corresponding to the redundant spatial information and the first motion information;

[0125] Analyzing the image complexity information corresponding to the current coding tree unit according to the redundant spatial information, the first motion information and the corresponding priority values;

[0126] According to the image complexity information and the updated frame-level planning coding parameters, the target planning coding information of the current coding tree unit is calculated.

[0127] In this optional embodiment, the priority values ​​corresponding to the redundant spatial information and the first motion information can be matched based on the first coding information. For example, if there are large scene changes (shot switching, lighting changes, etc.) in the encoded frame group, the priority value corresponding to the first motion information will be set to be smaller than the priority value corresponding to the redundant spatial information.

[0128] It can be seen that the implementation of this optional embodiment can further subdivide the current coding tree unit into pixel blocks in order to further improve the calculation accuracy and flexibility of the target planning coding information when calculating the target planning coding information of the current coding tree unit, so that for each pixel block, according to the pixel block distribution information and the pixel block feature information, the intra-frame multi-directional associated pixel blocks and the inter-frame reference pixel blocks associated with the pixel block are matched, and the redundant spatial information of the current coding tree unit is analyzed according to all the intra-frame reference pixel blocks to improve the coding accuracy and efficiency of the encoder. At the same time, according to all the inter-frame reference pixel blocks, the first motion information used to represent the motion of the current coding tree unit is analyzed, and the priority values ​​corresponding to the redundant spatial information and the first motion information are matched through the first coding information. Then, according to the redundant spatial information, the first motion information and the corresponding priority values, the image complexity information corresponding to the current coding tree unit is analyzed, so as to further improve the coding flexibility of the encoder, combine the image complexity information corresponding to the current coding tree unit obtained by real-time analysis of the two dimensions of intra-frame and inter-frame, reduce the redundancy of coding data, and improve the coding accuracy and efficiency of the encoder.

[0129] In this optional embodiment, as another optional implementation, the basic information further includes actual pixel value information, and the above-mentioned analysis of the redundant spatial information of the current coding tree unit according to all multi-directionally associated pixel blocks in the frame may include the following operations:

[0130] For each pixel block, predicting first predicted pixel value information of the pixel block according to the multi-directionally associated pixel blocks within the frame of the pixel block;

[0131] Calculating second predicted pixel value information of a current coding tree unit according to all first predicted pixel value information;

[0132] According to the second predicted pixel value information and the actual pixel value information, redundant space information of the current coding tree unit is analyzed, the redundant space information includes a prediction bias value, the prediction bias value is used to represent the deviation between the second predicted pixel value information and the actual pixel value information, and the deviation is used to represent the redundant space in the current coding tree unit.

[0133] It can be seen that the implementation of this optional embodiment can further predict the first predicted pixel value information of the pixel block for each pixel block in the intra-frame dimension according to the multi-directionally associated pixel blocks within the frame of the pixel block, and then comprehensively calculate the second predicted pixel value information of the current coding tree unit, so as to analyze the redundant spatial information of the current coding tree unit in combination with the actual pixel value information of the current coding tree unit, that is, by analyzing the size of the predicted bias value between the second predicted pixel value information and the actual pixel value information, the spatial redundancy degree of the above-mentioned current coding tree unit is reflected, and then indirectly reflects the difficulty and computational complexity of the encoder in encoding the current coding tree unit, which is conducive to further improving the analysis accuracy of the image complexity information of the current coding tree unit.

[0134] In this optional embodiment, as another optional implementation manner, the inter-frame reference pixel block is in a coded frame group, the frame where the inter-frame reference pixel block is located is a reference frame of the current coded frame, and the above-mentioned analyzing the first motion information of the current coding tree unit according to all the inter-frame reference pixel blocks may include the following operations:

[0135] For each pixel block, predicting second motion information of the pixel block according to the inter-frame reference pixel block of the pixel block, where the second motion information is used to represent the motion of the pixel block based on the inter-frame reference pixel block;

[0136] The first motion information of the current coding tree unit is analyzed according to all the second motion information.

[0137] Optionally, when analyzing the first motion information of the current coding tree unit according to all the second motion information, the actual image resolution and frame rate may be further combined for synchronous analysis.

[0138] It can be seen that implementing this optional embodiment can further predict, for each pixel block in the inter-frame dimension, the second motion information used to represent the motion of the pixel block based on the inter-frame reference pixel block according to the inter-frame reference pixel block of the pixel block, and then analyze the first motion information used to represent the motion of the current coding tree unit according to all the second motion information, which can improve the encoding accuracy and encoding efficiency of the encoder from the inter-frame dimension, and the above-mentioned effect is more reflected in the analysis accuracy of the image complexity information of the current coding tree unit and the calculation accuracy of the target planning encoding information.

[0139] In an embodiment of the present invention, optionally, the above-mentioned calculation of the target planning coding information of the current coding tree unit based on the image complexity information and the updated frame-level planning coding parameters can be specifically combined with the degree of image flatness or complex texture reflected in the image complexity information, and the corresponding Intra prediction mode can be adjusted to further reasonably allocate the hardware calculation amount.

[0140] Embodiment 2

[0141] See also Figure 2 , Figure 2 FIG. 1 is a flow chart of another encoding method of a hardware encoder disclosed in an embodiment of the present invention. Figure 2 The encoding method of the described hardware encoder relates to the field of encoder technology, in particular to the field of video hardware encoders, and can be specifically applied to video hardware encoders or other encoding devices, and can also be applied to smart devices associated with encoding devices, including but not limited to battery devices, cloud devices, edge computing devices, relay devices, base station devices, city management devices, and one or more of smart network devices, which are not limited in the embodiments of the present invention. Figure 2 As shown, the encoding method of the hardware encoder may include the following operations:

[0142] 201. Detect first encoding information of an encoded frame group in a current scene;

[0143] 202. Calculate initial planned coding information of a current coding frame in a current scene according to the first coding information, where the current coding frame includes a plurality of coding tree units;

[0144] 203. Obtain second coding information of a previous adjacent coding tree unit of a current coding tree unit in a current coding frame;

[0145] 204. Calculate target planning coding information of the current coding tree unit according to the second coding information and the initial planning coding information, where the target planning coding information is used to instruct the hardware encoder to perform a matching coding operation on the current coding tree unit;

[0146] In the embodiment of the present invention, it should be noted that for the supplementary explanations on steps 201 to 204, please refer to the supplementary explanations on steps 101 to 104 in the first embodiment, and the embodiment of the present invention will not elaborate on them.

[0147] 205. Predicting coding effect information of the current coding tree unit according to the target planning coding information;

[0148] 206. Determine whether the encoding effect information matches the preset encoding effect information;

[0149] 207. When it is determined that the coding effect information does not match the preset coding effect information, determining association information between at least one target item and all target items according to the preset coding effect information and the coding effect information, where the target item is a target pixel block in the current coding tree unit that makes the coding effect information not match the preset coding effect information;

[0150] In the embodiment of the present invention, optionally, when it is determined that the coding effect information matches the preset coding effect information, the hardware encoder may be triggered to perform a coding operation matching the target planned coding information on the current coding tree unit.

[0151] 208. According to all target items, determine the target parameter information matching all target items in the target planning coding information;

[0152] 209. Adjust the target planning coding information according to the associated information, the preset coding effect information and the target parameter information.

[0153] It can be seen that the implementation of the embodiment of the present invention can generate target planning coding information adapted to the current coding tree unit for instructing the hardware encoder to perform a matching coding operation on the current coding tree unit, and then predict the coding effect information of the current coding tree unit according to the target planning coding information. When it is determined that the coding effect information does not match the preset coding effect information, the association information between at least one target item for representing the target pixel block that makes the coding effect information not match the preset coding effect information and all target items is determined according to the preset coding effect information and the coding effect information. At the same time, according to all the target items, target parameter information matching all the target items in the target planning coding information is determined. According to the association information, the preset coding effect information and the target parameter information, the target planning coding information is adjusted so that the hardware encoder performs a matching coding operation on the current coding tree unit. On the basis of improving the coding flexibility of the encoder, the calculation accuracy of the target planning coding information, the coding accuracy and stability of the encoder can be further improved, which is conducive to further ensuring the full release of the coding performance of the hardware encoder and the output quality of the encoded image.

[0154] Embodiment 3

[0155] See also Figure 3 , Figure 3 It is a structural diagram of an encoding device of a hardware encoder disclosed in an embodiment of the present invention. The encoding device of the hardware encoder relates to the field of encoder technology, and in particular to the field of video hardware encoders. It can be specifically applied to video hardware encoders or other encoding devices, and can also be applied to smart devices associated with encoding devices, including but not limited to battery devices, cloud devices, edge computing devices, relay devices, base station devices, city management devices, and one or more smart network devices, which are not limited in the embodiments of the present invention. Figure 3 As shown, the encoding device of the hardware encoder may include:

[0156] A detection module 301, configured to detect first encoding information of an encoded frame group in a current scene;

[0157] A calculation module 302, configured to calculate initial planned coding information of a current coding frame in a current scene according to the first coding information, where the current coding frame includes a plurality of coding tree units;

[0158] An acquisition module 303 is used to acquire second coding information of a previous adjacent coding tree unit of a current coding tree unit in a current coding frame;

[0159] The calculation module 302 is further used to calculate the target planning coding information of the current coding tree unit according to the second coding information and the initial planning coding information, and the target planning coding information is used to instruct the hardware encoder to perform a matching coding operation on the current coding tree unit.

[0160] It should be noted that the encoding device of the above-mentioned hardware encoder may specifically include an encoding circuit of a hardware encoder, in which there is a specific unit structure, and the specific unit structure is used to perform the functional operations of each module mentioned in the embodiment of the present invention. Specifically, the above-mentioned specific unit structure can be integrated into an actual chip, and the above-mentioned chip includes but is not limited to MPU (Micro Processor Unit), MCU (Micro Processor Unit), SoC (System onChip), and SoPC (System On a Programmable Chip).

[0161] It can be seen that the implementation of the embodiment of the present invention proposes an encoder coding control mechanism that integrates the frame group level, frame level, and unit level, which can calculate the initial planning coding information of the current coding frame according to the first coding information of the encoded frame group before the current coding frame in the current scene, and adjust the above-calculated initial planning coding information in real time by obtaining the second coding information of the previous adjacent coding tree unit of the current coding tree unit in the current coding frame, so as to obtain the target planning coding information suitable for the current coding tree unit for instructing the hardware encoder to perform matching coding operations on the current coding tree unit, thereby realizing reasonable allocation of the encoder's computing performance, improving the calculation accuracy of the target planning coding information of the coding tree unit, and improving the coding flexibility of the hardware encoder, which is conducive to fully releasing the coding performance of the hardware encoder and also conducive to improving the output quality of the encoded image.

[0162] In the embodiment of the present invention, as an optional implementation manner, the first coding information includes the first coding parameter and the first number of clock cycles consumed by the coded frame group, and the specific manner in which the calculation module 302 calculates the initial planned coding information of the current coded frame in the current scene according to the first coding information includes:

[0163] Analyzing performance constraint information in a current scenario according to the first encoding parameter;

[0164] Analyze the number of second clock cycles consumed by the current coding frame group where the current coding frame is located in the current scenario according to the performance constraint information and the first clock cycle number;

[0165] Calculate the third clock cycle number and frame-level planned coding parameters consumed by the current coding frame planning according to the first clock cycle number and the second clock cycle number;

[0166] Initial planned coding information of the current coding frame is generated according to the third clock cycle number and the frame-level planned coding parameter.

[0167] It can be seen that the implementation of this optional embodiment can analyze the performance constraint information in the current scenario according to the first coding parameter in the encoded frame group, and then analyze the second clock cycle number planned to be consumed by the current coding frame group where the current coding frame is located in the current scenario in combination with the first clock cycle number actually consumed by the above-mentioned encoded frame group and the second clock cycle number planned to be consumed by the current coding frame group, calculate the third clock cycle number and frame-level planned coding parameters planned to be consumed by the current coding frame, and then generate the initial planned coding information of the current coding frame in combination with the above-mentioned third clock cycle number and frame-level planned coding parameters, which can help improve the calculation accuracy of the initial planned coding information of the current coding frame, and thus help improve the coding accuracy and flexibility of the hardware encoder, and help to subsequently adjust the above-mentioned calculated initial planned coding information in real time in combination with the second coding information of the previous adjacent coding tree unit of the current coding tree unit in the current coding frame, so as to improve the calculation accuracy of the target planned coding information.

[0168] In this optional embodiment, as an optional implementation manner, the second coding information includes the number of fourth clock cycles consumed by the previous adjacent coding tree unit, and the specific manner in which the calculation module 302 calculates the target planning coding information of the current coding tree unit according to the second coding information and the initial planning coding information includes:

[0169] Calculating the fifth clock cycle number consumed by the current coding tree unit plan according to the fourth clock cycle number and the third clock cycle number;

[0170] According to the fifth clock cycle number, updating the frame-level planning coding parameters, the updated frame-level planning coding parameters satisfy the constraint condition corresponding to the fifth clock cycle number;

[0171] Get the basic information of the current coding tree unit;

[0172] The target planning coding information of the current coding tree unit is calculated according to the basic information and the updated frame-level planning coding parameters.

[0173] It can be seen that the implementation of this optional embodiment can calculate the fifth clock cycle number planned to be consumed by the current coding tree unit in the current coding frame according to the fourth clock cycle number actually consumed by the previous adjacent coding tree unit of the current coding tree unit in the current coding frame obtained, combined with the third clock cycle number planned to be consumed by the current coding frame mentioned above, and then realize real-time updating of the current coding frame and frame-level planned coding parameters calculated above, so that the updated frame-level planned coding parameters meet the constraints corresponding to the fifth clock cycle number, and calculate the target planned coding information of the current coding tree unit based on the basic information of the current coding tree unit obtained and the updated frame-level planned coding parameters, so as to improve the calculation accuracy of the target planned coding information of the current coding tree unit, the allocation flexibility and accuracy of the encoder performance, which is conducive to fully releasing the coding performance of the hardware encoder, and is also conducive to improving the output quality of the encoded image.

[0174] In this optional embodiment, as another optional implementation, the current coding tree unit includes multiple pixel blocks, the basic information includes pixel block distribution information and pixel block feature information, and the calculation module 302 calculates the target planning coding information of the current coding tree unit according to the basic information and the updated frame-level planning coding parameters. The specific manner includes:

[0175] For each pixel block, according to the pixel block distribution information and the pixel block feature information, the intra-frame multi-directional associated pixel blocks and the inter-frame reference pixel blocks associated with the pixel block are matched;

[0176] Analyze the redundant spatial information of the current coding tree unit according to the multi-directionally associated pixel blocks in all frames;

[0177] Analyze first motion information of the current coding tree unit according to all inter-frame reference pixel blocks, where the first motion information is used to indicate motion of the current coding tree unit;

[0178] According to the first coding information, matching the priority values ​​corresponding to the redundant spatial information and the first motion information;

[0179] Analyzing the image complexity information corresponding to the current coding tree unit according to the redundant spatial information, the first motion information and the corresponding priority values;

[0180] According to the image complexity information and the updated frame-level planning coding parameters, the target planning coding information of the current coding tree unit is calculated.

[0181] It can be seen that the implementation of this optional embodiment can further subdivide the current coding tree unit into pixel blocks in order to further improve the calculation accuracy and flexibility of the target planning coding information when calculating the target planning coding information of the current coding tree unit, so that for each pixel block, according to the pixel block distribution information and the pixel block feature information, the intra-frame multi-directional associated pixel blocks and the inter-frame reference pixel blocks associated with the pixel block are matched, and the redundant spatial information of the current coding tree unit is analyzed according to all the intra-frame reference pixel blocks to improve the coding accuracy and efficiency of the encoder. At the same time, according to all the inter-frame reference pixel blocks, the first motion information used to represent the motion of the current coding tree unit is analyzed, and the priority values ​​corresponding to the redundant spatial information and the first motion information are matched through the first coding information. Then, according to the redundant spatial information, the first motion information and the corresponding priority values, the image complexity information corresponding to the current coding tree unit is analyzed, so as to further improve the coding flexibility of the encoder, combine the image complexity information corresponding to the current coding tree unit obtained by real-time analysis of the two dimensions of intra-frame and inter-frame, reduce the redundancy of coding data, and improve the coding accuracy and efficiency of the encoder.

[0182] In this optional embodiment, as another optional implementation, the basic information further includes actual pixel value information. The specific manner in which the calculation module 302 analyzes the redundant spatial information of the current coding tree unit according to all multi-directionally associated pixel blocks in the frame includes:

[0183] For each pixel block, predicting first predicted pixel value information of the pixel block according to the multi-directionally associated pixel blocks within the frame of the pixel block;

[0184] Calculating second predicted pixel value information of a current coding tree unit according to all first predicted pixel value information;

[0185] According to the second predicted pixel value information and the actual pixel value information, redundant space information of the current coding tree unit is analyzed, the redundant space information includes a prediction bias value, the prediction bias value is used to represent the deviation between the second predicted pixel value information and the actual pixel value information, and the deviation is used to represent the redundant space in the current coding tree unit.

[0186] It can be seen that the implementation of this optional embodiment can further predict the first predicted pixel value information of the pixel block for each pixel block in the intra-frame dimension according to the multi-directionally associated pixel blocks within the frame of the pixel block, and then comprehensively calculate the second predicted pixel value information of the current coding tree unit, so as to analyze the redundant spatial information of the current coding tree unit in combination with the actual pixel value information of the current coding tree unit, that is, by analyzing the size of the predicted bias value between the second predicted pixel value information and the actual pixel value information, the spatial redundancy degree of the above-mentioned current coding tree unit is reflected, and then indirectly reflects the difficulty and computational complexity of the encoder in encoding the current coding tree unit, which is conducive to further improving the analysis accuracy of the image complexity information of the current coding tree unit.

[0187] In an optional embodiment, optionally, the inter-frame reference pixel block is in the coded frame group, and the frame where the inter-frame reference pixel block is located is the reference frame of the current coded frame. The specific manner in which the calculation module 302 analyzes the first motion information of the current coding tree unit according to all the inter-frame reference pixel blocks includes:

[0188] For each pixel block, predicting second motion information of the pixel block according to the inter-frame reference pixel block of the pixel block, where the second motion information is used to represent the motion of the pixel block based on the inter-frame reference pixel block;

[0189] The first motion information of the current coding tree unit is analyzed according to all the second motion information.

[0190] It can be seen that implementing this optional embodiment can further predict, for each pixel block in the inter-frame dimension, the second motion information used to represent the motion of the pixel block based on the inter-frame reference pixel block according to the inter-frame reference pixel block of the pixel block, and then analyze the first motion information used to represent the motion of the current coding tree unit according to all the second motion information, which can improve the encoding accuracy and encoding efficiency of the encoder from the inter-frame dimension, and the above-mentioned effect is more reflected in the analysis accuracy of the image complexity information of the current coding tree unit and the calculation accuracy of the target planning encoding information.

[0191] In another optional embodiment, Figure 4 As shown, optionally, the device may also include:

[0192] A prediction module 304, configured to predict the coding effect information of the current coding tree unit according to the target planning coding information;

[0193] A judging module 305 is used to judge whether the coding effect information matches the preset coding effect information;

[0194] The determination module 306 is configured to determine, when the determination module 305 determines that the coding effect information does not match the preset coding effect information, association information between at least one target item and all target items according to the preset coding effect information and the coding effect information, where the target item is a target pixel block in the current coding tree unit that makes the coding effect information not match the preset coding effect information;

[0195] The determination module 306 is further used to determine target parameter information matching all target items in the target planning coding information according to all target items;

[0196] The adjustment module 307 is used to adjust the target planning encoding information according to the associated information, the preset encoding effect information and the target parameter information.

[0197] It can be seen that the implementation of the embodiment of the present invention can generate target planning coding information adapted to the current coding tree unit for instructing the hardware encoder to perform a matching coding operation on the current coding tree unit, and then predict the coding effect information of the current coding tree unit according to the target planning coding information. When it is determined that the coding effect information does not match the preset coding effect information, at least one target item for representing a target pixel block that makes the coding effect information not match the preset coding effect information is determined according to the preset coding effect information and the coding effect information, and the association information between all target items. At the same time, according to all target items, target parameter information matching all target items in the target planning coding information is determined. According to the association information, the preset coding effect information and the target parameter information, the target planning coding information is adjusted. On the basis of improving the coding flexibility of the encoder, the calculation accuracy of the target planning coding information, the coding accuracy and stability of the encoder can be further improved, which is conducive to further ensuring the full release of the coding performance of the hardware encoder and ensuring the output quality of the encoded image.

[0198] Embodiment 4

[0199] See also Figure 5 , Figure 5 It is a structural diagram of another encoding device of a hardware encoder disclosed in an embodiment of the present invention. The encoding device of the hardware encoder relates to the field of encoder technology, and in particular to the field of video hardware encoders. It can be specifically applied to video hardware encoders or other encoding devices, and can also be applied to smart devices associated with encoding devices, including but not limited to battery devices, cloud devices, edge computing devices, relay devices, base station devices, city management devices, and one or more smart network devices, which are not limited in the embodiments of the present invention. Figure 5 As shown, the encoding device of the hardware encoder may include:

[0200] The memory 401 stores executable program codes.

[0201] A processor 402 is coupled to the memory 401 .

[0202] The processor 402 calls the executable program code stored in the memory 401 to execute the steps in the encoding method of the hardware encoder described in the first embodiment of the present invention or the second embodiment of the present invention.

[0203] Embodiment 5

[0204] An embodiment of the present invention discloses a computer storage medium, which stores computer instructions. When the computer instructions are called, they are used to execute the steps in the encoding method of the hardware encoder described in the first embodiment of the present invention or the second embodiment of the present invention.

[0205] Embodiment 6

[0206] An embodiment of the present invention discloses a computer program product, which includes a non-transitory computer storage medium storing a computer program, and the computer program is operable to enable a computer to execute the steps in the encoding method of the hardware encoder described in the first or second embodiment.

[0207] The device embodiments described above are only illustrative, wherein the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, i.e., they may be located in one place, or they may be distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Those of ordinary skill in the art may understand and implement it without creative work.

[0208] Through the specific description of the above embodiments, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on such an understanding, the above technical solution can be essentially or partly contributed to the prior art in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, and the storage medium includes a read-only memory (ROM), a random access memory (RAM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), a one-time programmable read-only memory (OTPROM), an electronically erasable rewritable read-only memory (EEPROM), a compact disc (CD-ROM) or other optical disc storage, magnetic disk storage, magnetic tape storage, or any other computer-readable medium that can be used to carry or store data.

[0209] Finally, it should be noted that the encoding method and device of a hardware encoder disclosed in the embodiment of the present invention disclose only the preferred embodiments of the present invention, which are only used to illustrate the technical solution of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, it should be understood by those skilled in the art that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features thereof can be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A coding method of a hardware encoder, characterized in that: The method comprises: Detecting first encoding information of an encoded frame group in a current scene; Calculating, according to the first coding information, initial planned coding information of a current coding frame in the current scene, the current coding frame including a plurality of coding tree units; Obtaining second coding information of a previous adjacent coding tree unit of a current coding tree unit in the current coding frame; According to the second coding information and the initial planning coding information, the target planning coding information of the current coding tree unit is calculated, and the target planning coding information is used to instruct the hardware encoder to perform a matching coding operation on the current coding tree unit.

2. The encoding method of the hardware encoder according to claim 1, characterized in that: The first coding information includes a first coding parameter and a first number of clock cycles consumed by the coded frame group, and the calculating, according to the first coding information, initial planned coding information of the current coded frame in the current scene includes: Analyzing performance constraint information in the current scenario according to the first encoding parameter; Analyzing, according to the performance constraint information and the first number of clock cycles, the number of second clock cycles planned to be consumed by the current coding frame group in which the current coding frame is located in the current scenario; Calculating a third clock cycle number consumed by the current coding frame planning and a frame-level planning coding parameter according to the first clock cycle number and the second clock cycle number; Initial planned coding information of the current coding frame is generated according to the third clock cycle number and the frame-level planned coding parameter.

3. The encoding method of the hardware encoder according to claim 2, characterized in that: The second coding information includes the number of fourth clock cycles consumed by the previous adjacent coding tree unit, and the calculating the target planning coding information of the current coding tree unit according to the second coding information and the initial planning coding information includes: Calculating a fifth clock cycle number consumed by the current coding tree unit plan according to the fourth clock cycle number and the third clock cycle number; According to the fifth clock cycle number, updating the frame-level planning coding parameter, wherein the updated frame-level planning coding parameter satisfies the constraint condition corresponding to the fifth clock cycle number; Obtaining basic information of the current coding tree unit; Calculate the target planning coding information of the current coding tree unit according to the basic information and the updated frame-level planning coding parameters.

4. The encoding method of the hardware encoder according to claim 3, characterized in that: The current coding tree unit includes a plurality of pixel blocks, the basic information includes pixel block distribution information and pixel block feature information, and the target planning coding information of the current coding tree unit is calculated according to the basic information and the updated frame-level planning coding parameter, including: For each of the pixel blocks, matching the intra-frame multi-directional associated pixel blocks and the inter-frame reference pixel blocks associated with the pixel block according to the pixel block distribution information and the pixel block feature information; Analyzing redundant spatial information of the current coding tree unit according to all the multi-directionally associated pixel blocks within the frame; Analyzing first motion information of the current coding tree unit according to all the inter-frame reference pixel blocks, where the first motion information is used to represent a motion condition of the current coding tree unit; According to the first coding information, matching the priority values ​​corresponding to the redundant spatial information and the first motion information; Analyzing the image complexity information corresponding to the current coding tree unit according to the redundant spatial information, the first motion information and the corresponding priority values; Calculate target planning coding information of the current coding tree unit according to the image complexity information and the updated frame-level planning coding parameters.

5. The encoding method of the hardware encoder according to claim 4, characterized in that: The basic information also includes actual pixel value information, and the step of analyzing redundant spatial information of the current coding tree unit according to all multi-directionally associated pixel blocks within the frame includes: For each of the pixel blocks, predicting first predicted pixel value information of the pixel block according to the intra-frame multi-directionally associated pixel blocks of the pixel block; Calculating second predicted pixel value information of the current coding tree unit according to all the first predicted pixel value information; According to the second predicted pixel value information and the actual pixel value information, redundant space information of the current coding tree unit is analyzed, the redundant space information includes a prediction bias value, the prediction bias value is used to represent the deviation between the second predicted pixel value information and the actual pixel value information, and the deviation is used to represent the redundant space in the current coding tree unit.

6. The encoding method of the hardware encoder according to claim 4, characterized in that: The inter-frame reference pixel block is in the encoded frame group, the frame where the inter-frame reference pixel block is located is the reference frame of the current encoded frame, and the analyzing the first motion information of the current coding tree unit according to all the inter-frame reference pixel blocks includes: For each of the pixel blocks, predict second motion information of the pixel block according to the inter-frame reference pixel block of the pixel block, where the second motion information is used to represent a motion condition of the pixel block based on the inter-frame reference pixel block; The first motion information of the current coding tree unit is analyzed according to all the second motion information.

7. The encoding method of the hardware encoder according to any one of claims 1 to 6, characterized in that: The method further comprises: Predicting the coding effect information of the current coding tree unit according to the target planning coding information; determining whether the coding effect information matches the preset coding effect information, and when it is determined that the coding effect information does not match the preset coding effect information, determining association information between at least one target item and all the target items according to the preset coding effect information and the coding effect information, the target item being a target pixel block in the current coding tree unit that causes the coding effect information to not match the preset coding effect information; According to all the target items, determine the target parameter information matching all the target items in the target planning coding information; Adjust the target planning coding information according to the association information, the preset coding effect information and the target parameter information.

8. An encoding device of a hardware encoder, characterized in that: The device comprises: A detection module, used to detect first encoding information of an encoded frame group in a current scene; A calculation module, configured to calculate initial planned coding information of a current coding frame in the current scene according to the first coding information, wherein the current coding frame includes a plurality of coding tree units; An acquisition module, configured to acquire second coding information of a previous adjacent coding tree unit of a current coding tree unit in the current coding frame; The calculation module is further used to calculate the target planning coding information of the current coding tree unit according to the second coding information and the initial planning coding information, and the target planning coding information is used to instruct the hardware encoder to perform a matching coding operation on the current coding tree unit.

9. An encoding device of a hardware encoder, characterized in that: The device comprises: A memory storing executable program code; a processor coupled to the memory; The processor calls the executable program code stored in the memory to execute the encoding method of the hardware encoder according to any one of claims 1-7.

10. A computer storage medium, characterized in that: The computer storage medium stores computer instructions, and when the computer instructions are called, they are used to execute the encoding method of the hardware encoder according to any one of claims 1-7.

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