Photovoltaic cell and preparation method thereof

Abstract

The invention provides a photovoltaic cell and a preparation method thereof, the photovoltaic cell comprises a first surface and a second surface which are opposite to each other, and the first surface comprises a metal region and a non-metal region; the first surface of the semiconductor substrate comprises a metal section and a non-metal section; the first oxide layer and the first doped polycrystalline silicon layer are sequentially located on the metal section; the second oxide layer and the second doped polycrystalline silicon layer are sequentially positioned on the non-metal section in the non-metal region and are sequentially positioned on the first doped polycrystalline silicon layer in the metal region; the first electrode is connected with the first doped polycrystalline silicon layer; the intrinsic layer and the doped crystalline silicon layer are sequentially positioned on the second surface of the substrate; the transparent conductive film layer is positioned on one side, far away from the second surface of the substrate, of the second doping layer; and the second electrode is positioned on one side where the second surface is positioned and is connected with the transparent conductive film layer. According to the photovoltaic cell and the preparation method thereof, the cell efficiency can be improved on the basis of optimizing the process.

Description

Technical Field

[0001] The present application mainly relates to the field of photovoltaic technology, and in particular to a photovoltaic cell and a method for preparing the same. Background Art

[0002] The existing conventional solar cell structure requires high temperature to achieve boron or phosphorus diffusion to form a doped functional layer. Such a preparation process destroys the body life to a certain extent, so the quality requirements of silicon wafers are relatively high. The metal electrode needs to burn through the dielectric film and directly contact the silicon substrate. The metal composite is large and it is difficult to increase the opening voltage. Summary of the invention

[0003] The technical problem to be solved by the present application is to provide a photovoltaic cell and a preparation method thereof, which can improve the cell efficiency on the basis of optimizing the process.

[0004] In order to solve the above technical problems, the present application provides a photovoltaic cell, the photovoltaic cell comprising a first surface and a second surface opposite to each other, wherein the first surface comprises a metal region and a non-metal region arranged at intervals, the photovoltaic cell further comprising: a semiconductor substrate, the semiconductor substrate having a first substrate surface and a second substrate surface opposite to each other, wherein the first substrate surface and the first surface are located on the same side, the second substrate surface and the second surface are located on the same side, the first substrate surface comprises a metal segment corresponding to the metal region, and a non-metal segment corresponding to the non-metal segment; a first oxide layer and a first doped polysilicon layer having a first doping type, which are sequentially located on the metal segment; a second oxide layer and a first doped polysilicon layer having a first doping type, which are sequentially located on the metal segment; and a second oxide layer and a first doped polysilicon layer having a first doping type, which are sequentially located on the metal segment. an oxide layer and a second doped polysilicon layer having the first doping type, which are sequentially located on the non-metallic section in the non-metallic area and sequentially located on the first doped polysilicon layer in the metal area; a first electrode, which passes through the second doped polysilicon layer and the second oxide layer in the metal area and is connected to the first doped polysilicon layer; an intrinsic layer and a doped polysilicon layer having a second doping type, which are sequentially located on the second surface of the substrate, wherein the second doping type is different from the first doping type; a transparent conductive film layer, which is located on a side of the second doped layer away from the second surface of the substrate; and a second electrode, which is located on the side where the second surface is located and is connected to the transparent conductive film layer.

[0005] Optionally, the photovoltaic cell further comprises an anti-reflection dielectric film covering a surface of the second doped polysilicon layer away from the first surface of the substrate on one side of the first surface of the substrate.

[0006] Optionally, the anti-reflection dielectric film includes a single layer or a composite layer, the composite layer is a plurality of layers stacked together, and the single layer or the composite layer includes one or more materials selected from silicon oxide, silicon nitride, silicon oxynitride, and magnesium fluoride.

[0007] Optionally, the doped crystalline silicon layer includes doped amorphous silicon and / or doped microcrystalline silicon.

[0008] Optionally, the intrinsic layer includes intrinsic amorphous silicon and / or intrinsic microcrystalline silicon.

[0009] Optionally, the transparent conductive film layer is composed of a transparent conductive oxide, which includes tin-doped indium oxide, tungsten-doped indium oxide and / or cesium-doped indium oxide, or ZnO or InO or SnO doped with one or more elements of Ga, Sn, Mo, Ce, F, W, and Al.

[0010] Optionally, the first oxide layer and / or the second oxide layer comprises silicon oxide, and the thickness of the first oxide layer and / or the second oxide layer along a first direction perpendicular to the semiconductor substrate is 1-4 nm respectively.

[0011] Optionally, a thickness of the first doped polysilicon layer along a first direction perpendicular to the semiconductor substrate is greater than a thickness of the second doped polysilicon layer along the first direction.

[0012] Optionally, a thickness of the first doped polysilicon layer along the first direction is greater than 100 nm, and a thickness of the second doped polysilicon layer along the first direction is less than 100 nm.

[0013] Optionally, a thickness of the first doped polysilicon layer along the first direction is between 120 nm and 130 nm, and a thickness of the second doped polysilicon layer along the first direction is between 40 nm and 50 nm.

[0014] Optionally, a thickness of the first doped polysilicon layer along the first direction is 2.5 to 3.5 times a thickness of the second doped polysilicon layer along the first direction.

[0015] Optionally, in the process of forming the photovoltaic cell, the first oxide layer and the first doped polysilicon layer are prepared before the second oxide layer and the second doped polysilicon layer.

[0016] Optionally, in the process of forming the photovoltaic cell, the first oxide layer and the first doped polysilicon layer are first entirely laid on the first surface of the substrate, and after the first oxide layer and the first doped polysilicon layer in the non-metallic section are removed, the second oxide layer and the second doped polysilicon layer are entirely laid on one side of the first surface of the substrate.

[0017] Another aspect of the present application also provides a method for preparing a photovoltaic cell, the photovoltaic cell comprising a first surface and a second surface relative to each other, wherein the first surface comprises a metal region and a non-metal region arranged at intervals, and the preparation method comprises the following steps: providing a semiconductor substrate, the semiconductor substrate having a first substrate surface and a second substrate surface relative to each other, wherein the first substrate surface and the first surface are located on the same side, the second substrate surface and the second surface are located on the same side, the first substrate surface comprises a metal segment corresponding to the metal region, and a non-metal segment corresponding to the non-metal segment; sequentially preparing a first oxide layer and a first doped polysilicon layer having a first doping type on the metal segment; preparing a second oxide layer and a first doped polysilicon layer having the first doping type; The invention relates to a method for preparing a first doped polysilicon layer and a second doped polysilicon layer, and making the second oxide layer and the second doped polysilicon layer sequentially located on the non-metallic section in the non-metallic area, and sequentially located on the first doped polysilicon layer in the metal area; preparing a first electrode, making the first electrode pass through the second doped polysilicon layer and the second oxide layer in the metal area and connected to the first doped polysilicon layer; sequentially preparing an intrinsic layer and a doped crystalline silicon layer with a second doping type on the second surface of the substrate, wherein the second doping type is different from the first doping type; preparing a transparent conductive film layer on the side of the second doped layer away from the second surface of the substrate; and preparing a second electrode, making the second electrode located on the side where the second surface of the substrate is located and connected to the transparent conductive film layer.

[0018] Optionally, the preparation method further comprises preparing the first electrode and / or the second electrode by electroplating and / or printing a low-temperature slurry.

[0019] Optionally, the preparation method further comprises preparing the first oxide layer and the first doped polysilicon layer first and then preparing the second oxide layer and the second doped polysilicon layer.

[0020] Optionally, the preparation method also includes first laying the first oxide layer and the first doped polysilicon layer on the entire surface of the first surface of the substrate, removing the first oxide layer and the first doped polysilicon layer in the non-metallic section, and then laying the second oxide layer and the second doped polysilicon layer on the entire surface of one side of the first surface of the substrate.

[0021] Optionally, the preparation method also includes laying a mask layer at the position of the metal area before removing the first oxide layer and the first doped polysilicon layer of the non-metallic segment, and removing the first oxide layer and the first doped polysilicon layer not covered by the mask layer by etching with an alkaline solution.

[0022] Compared with the prior art, the present application has the following advantages: Based on the traditional heterojunction battery structure, the present application replaces the front amorphous silicon with polysilicon of different thicknesses, and sets a specific connection method for the electrode contact area. Under the premise of ensuring the passivation effect of the metal contact area, the parasitic absorption of light by the non-metallic area is reduced, which is beneficial to improving the current and conversion efficiency. In terms of preparation process, by adjusting the preparation order of thin and thick polysilicon layers, compared with traditional heterojunction / TOPcon batteries, the difficulty of the preparation process can be effectively reduced and the process flow can be optimized. On this basis, in the preferred embodiment, the front transparent conductive film of the traditional heterojunction battery structure is replaced with an anti-reflection dielectric film to further improve the battery efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings are included to provide a further understanding of the present application. They are included and constitute a part of the present application. The accompanying drawings illustrate embodiments of the present application and together with the present specification serve to explain the principles of the present application. In the accompanying drawings:

[0024] Figure 1 is a schematic structural diagram of a photovoltaic cell according to an embodiment of the present application; and

[0025] Figure 2 It is a schematic flow chart of a method for preparing a photovoltaic cell according to an embodiment of the present application. DETAILED DESCRIPTION

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.

[0027] As shown in this application and claims, unless the context clearly indicates an exception, the words "a", "an", "an" and / or "the" do not refer to the singular and may also include the plural. Generally speaking, the terms "include" and "comprise" only indicate the inclusion of the steps and elements that have been clearly identified, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.

[0028] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values ​​of the parts and steps set forth in these embodiments do not limit the scope of the present application. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. The technology, method and equipment known to those of ordinary skill in the relevant field may not be discussed in detail, but in appropriate cases, the technology, method and equipment should be considered as a part of the authorization specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so that once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.

[0029] In the description of the present application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction, and therefore cannot be understood as limiting the scope of protection of the present application; the directional words "inside and outside" refer to the inside and outside relative to the outline of each component itself.

[0030] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0031] In addition, it should be noted that the use of words such as "first" and "second" to define components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above words have no special meaning and cannot be understood as limiting the scope of protection of this application. In addition, although the terms used in this application are selected from well-known and commonly used terms, some terms mentioned in the specification of this application may be selected by the applicant at his or her discretion, and their detailed meanings are explained in the relevant parts of the description of this article. In addition, it is required to understand this application not only by the actual terms used, but also by the meaning implied by each term.

[0032] It should be understood that when a component is referred to as being "on another component," "connected to another component," "coupled to another component," or "contacting another component," it may be directly on, connected to, coupled to, or contacting the other component, or there may be intervening components. In contrast, when a component is referred to as being "directly on another component," "directly connected to," "directly coupled to," or "directly contacting" another component, there are no intervening components. Similarly, when a first component is referred to as being "electrically in contact with" or "electrically coupled to" a second component, there is an electrical path between the first component and the second component that allows current to flow. The electrical path may include capacitors, coupled inductors, and / or other components that allow current to flow, even without direct contact between conductive components.

[0033] This application refers to Figure 1 A photovoltaic cell 10 is proposed, which can improve the cell efficiency based on the optimized process. Figure 1 The photovoltaic cell 10 includes a first surface 11 and a second surface 12 opposite to each other, wherein the first surface 11 includes a metal region 111 and a non-metal region 112 arranged at intervals. The photovoltaic cell 10 includes a semiconductor substrate 100, a first oxide layer 121 and a first doped polysilicon layer 122 having a first doping type, a second oxide layer 131 and a second doped polysilicon layer 132 having a first doping type, an intrinsic layer 141 and a doped crystalline silicon layer 142 having a second doping type, a transparent conductive film layer 151, a first electrode 161, and a second electrode 162.

[0034] Specifically, the semiconductor substrate 100 has a first substrate surface 101 and a second substrate surface 102 opposite to each other, wherein the first substrate surface 101 is located on the same side as the first surface 11, and the second substrate surface 102 is located on the same side as the second surface 12. Referring to the division of the metal area 111 and the non-metal area 112, the first substrate surface 101 further includes a metal segment 1011 corresponding to the metal area 111, and a non-metal segment 1012 corresponding to the non-metal area 112.

[0035] according to Figure 1 , the first oxide layer 121 and the first doped polysilicon layer 122 having the first doping type are sequentially located in the metal section 1011. The second oxide layer 131 and the second doped polysilicon layer 132 having the first doping type are sequentially located on the non-metal section 1012 in the non-metal area 112, and sequentially located on the first doped polysilicon layer 122 in the metal area 111. On this side of the first surface 11, the first electrode 161 passes through the second doped polysilicon layer 132 and the second oxide layer 131 in the metal area 111 and is connected to the first doped polysilicon layer 122. In the present embodiment, the first oxide layer 121 and / or the second oxide layer 131 include silicon oxide, and the thickness of the first oxide layer 121 and / or the second oxide layer 131 along the first direction x perpendicular to the semiconductor substrate 100 is 1 to 4 nm respectively.

[0036] Further, on the side of the second surface 12, the intrinsic layer 141 and the doped crystalline silicon layer 142 having the second doping type are sequentially located on the second surface 102 of the substrate. Exemplarily, the intrinsic layer 141 includes intrinsic amorphous silicon and / or intrinsic microcrystalline silicon, and the doped crystalline silicon layer 142 includes doped amorphous silicon and / or doped microcrystalline silicon. Among them, the second doping type of the doped crystalline silicon layer 142 is different from the first doping type of the first doped polysilicon layer 122 and the second doped polysilicon layer 132. On this basis, the transparent conductive film layer 151 is located on the side of the second doped layer 142 away from the second surface 102 of the substrate, and the second electrode 162 is connected to the transparent conductive film layer 151.

[0037] In this embodiment, the transparent conductive film layer 151 can be composed of a transparent conductive oxide, which includes tin-doped indium oxide, tungsten-doped indium oxide and / or cesium-doped indium oxide, or ZnO or InO or SnO doped with one or more elements of Ga, Sn, Mo, Ce, F, W, and Al.

[0038] According to the above structure, the first electrode 161 on one side of the first surface 11 contacts the first doped polysilicon layer 122 which is relatively located on the outer inner side in the multilayer stacked structure of the metal area 111. On the basis of improving the battery efficiency, the process can be further optimized to achieve better battery performance.

[0039] In this embodiment, the photovoltaic cell 10 further includes an anti-reflection dielectric film 171, which covers the surface of the second doped polysilicon layer 132 away from the first substrate surface 101 on one side of the first substrate surface 101. Figure 1Since the second doped polysilicon layer 132 is arranged in both the metal area 111 and the non-metal area 112, it can be considered that the second doped polysilicon layer 132 is a structure that covers the entire surface on the side where the first surface 11 is located. Similarly, the anti-reflection dielectric film 171 covers the second doped polysilicon layer 132 on the front side of the first surface 11, which can further improve the battery efficiency from the perspective of reducing the reflection of the battery surface. Exemplarily, in an embodiment of the present application, the anti-reflection dielectric film 171 includes a single layer or a composite layer, the composite layer is a multi-layer stack, and the single layer or the composite layer includes one or more materials selected from silicon oxide, silicon nitride, silicon oxynitride, and magnesium fluoride. It should be noted that even for the same material, such as silicon nitride, a multi-layer stacked structure with different refractive indices can be formed. Therefore, whether it is a single layer or a multi-layer stacked composite layer, it also includes a combination of one or more of the above materials.

[0040] This application includes Figure 1 In the illustrated embodiment, preferably, the thickness of the first doped polysilicon layer 122 along a first direction x perpendicular to the semiconductor substrate is greater than the thickness of the second doped polysilicon layer 132 along the first direction x.

[0041] Further preferably, the thickness of the first doped polysilicon layer 122 along the first direction x is greater than 100 nm, and the thickness of the second doped polysilicon layer 132 along the first direction x is less than 100 nm. Figure 1 In a more preferred battery structure of the embodiment, when the thickness of the first doped polysilicon layer 122 along the first direction x is between 120nm and 130nm, and the thickness of the second doped polysilicon layer 132 along the first direction is between 40nm and 50nm, the efficiency can be improved by 0.1% compared with other battery structures with similar conditions. On this basis, if the thickness of the first doped polysilicon layer 122 along the first direction x is set to 2.5 to 3.5 times, preferably 3 times, the optimized battery efficiency tends to be more stable, which can be considered as a preferred embodiment of the present application.

[0042] In various embodiments of the present application, in order to further optimize the battery preparation process, Figure 1For example, in the process of forming the photovoltaic cell 10, the first oxide layer 121 and the first doped polysilicon layer 122 are prepared before the second oxide layer 131 and the second doped polysilicon layer 132, and the effect is better. Specifically, in the process of forming the photovoltaic cell 10, the first oxide layer 121 and the first doped polysilicon layer 122 can be firstly laid on the first surface 101 of the substrate, and after removing the first oxide layer 121 and the first doped polysilicon layer 122 of the non-metallic section 1012, the second oxide layer 131 and the second doped polysilicon layer 132 are laid on the entire surface of one side of the first surface 101 of the substrate, so as to finally form the photovoltaic cell 10. Figure 1 The structure of the photovoltaic cell 10 on one side of the first surface 11 is shown.

[0043] According to the above Figure 1 In the illustrated embodiment, the photovoltaic cell 10 and some preferred variant embodiments thereof are described. The metal electrode on the front side of the cell of the present application is passivated by a polysilicon layer and a tunnel oxide layer to reduce the recombination of the metal contact area. Under the premise of ensuring the passivation effect of the metal electrode area, the amorphous silicon in the traditional heterojunction cell is replaced with polysilicon of different thicknesses, and the transparent conductive film is further replaced with an anti-reflection dielectric film to reduce the parasitic absorption of light and improve the short-circuit current and conversion efficiency of the cell.

[0044] Another aspect of this application refers to Figure 2 A method 20 for preparing a photovoltaic cell is also proposed, wherein the photovoltaic cell comprises a first surface and a second surface opposite to each other, wherein the first surface comprises a metal region and a non-metal region arranged at intervals (the metal region and the non-metal region may be arranged adjacent to each other on the first surface in sequence). Figure 2 Flowcharts are used to illustrate the operations performed by the system according to the embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed precisely in order. Instead, various steps may be processed in reverse order or simultaneously. At the same time, other operations may be added to these processes, or one or more operations may be removed from these processes.

[0045] according to Figure 2, the preparation method 20 includes the following steps. Step 21 is to provide a semiconductor substrate. Specifically, the semiconductor substrate has a first substrate surface and a second substrate surface relative to each other, wherein the first substrate surface is located on the same side as the first surface, the second substrate surface is located on the same side as the second surface, and the first substrate surface includes a metal segment corresponding to the metal area, and a non-metal segment corresponding to the non-metal area. Preferably, the semiconductor substrate is N-type crystalline silicon. Step 22 is to sequentially prepare a first oxide layer and a first doped polysilicon layer having a first doping type on the metal segment. Preferably, the first oxide layer is a tunneling oxide layer whose specific material is silicon oxide, and the first doped polysilicon is a relatively thick (for example, about 100nm to 150nm) polysilicon layer doped with phosphorus. Step 23 is to prepare a second oxide layer and a second doped polysilicon layer having a first doping type, and make the second oxide layer and the second doped polysilicon layer sequentially located on the non-metal segment in the non-metal area, and sequentially located on the first doped polysilicon layer in the metal area. Preferably, the second oxide layer is a tunneling oxide layer whose specific material is silicon oxide, and the second doped polysilicon is a relatively thin polysilicon layer doped with phosphorus (for example, about 50 nm). Step 24 is to prepare a first electrode, so that the first electrode passes through the second doped polysilicon layer and the second oxide layer in the metal area and is connected to the first doped polysilicon layer. Step 25 is to sequentially prepare an intrinsic layer and a doped crystalline silicon layer having a second doping type on the second surface of the substrate, wherein the second doping type is different from the first doping type. Preferably, the intrinsic layer can be an intrinsic amorphous silicon layer, and the doped crystalline silicon layer can be a boron-doped amorphous silicon layer. Step 26 is to prepare a transparent conductive film layer on the side of the second doped layer away from the second surface of the substrate; and step 27 is to prepare a second electrode, so that the second electrode is located on the side where the second surface is located and is connected to the transparent conductive film layer.

[0046] Preferably, in some embodiments of the present application based on method 20, the first electrode and / or the second electrode is also prepared by electroplating and / or printing a low-temperature slurry.

[0047] Further preferably, step 22 and step 23 of method 20 are further implemented as preparing the first oxide layer and the first doped polysilicon layer first and then preparing the second oxide layer and the second doped polysilicon layer. Specifically, such a preparation sequence can be specifically implemented as first laying the first oxide layer and the first doped polysilicon layer on the first surface of the substrate, removing the first oxide layer and the first doped polysilicon layer in the non-metallic section, and then laying the second oxide layer and the second doped polysilicon layer on the entire side of the first surface of the substrate. More specifically, before removing the first oxide layer and the first doped polysilicon layer in the non-metallic section, a mask layer can be laid at the position of the metal area, and the first oxide layer and the first doped polysilicon layer not covered by the mask layer can be removed by etching with an alkaline solution.

[0048] The method for preparing the photovoltaic cell proposed in this application (for example, the preparation method 20) can be used to prepare the photovoltaic cell proposed in this application (for example, Figure 1 The photovoltaic cell 10 shown in the figure), therefore, other details about the preparation method proposed in the present application can refer to the previous description, and will not be repeated here. For example, for the embodiment with an anti-reflection dielectric film, after the polysilicon layer on the first surface and the amorphous silicon layer on the second surface are prepared, the anti-reflection dielectric film can be prepared on the first surface side and the transparent conductive film layer can be prepared on the second surface side at the same time. On this basis, on the first surface side, the local anti-reflection dielectric film is opened by means of, for example, laser, and the first electrode is contacted with the first doped polysilicon layer located on the inner side by electroplating; and on the second surface side, the second electrode can be contacted with the transparent conductive film layer by low-temperature printing slurry.

[0049] For conventional TOPCon battery structures in the field, boron diffusion is required through high temperature and long time (950℃-1000℃). This high temperature process has a great impact on the life of the silicon wafer. The battery life is generally less than 10ms. It will also reduce the battery yield (the possibility of concentric circles appearing at high temperature for a long time is relatively high). The metal electrode burns through the dielectric film and is in direct contact with the crystalline silicon substrate. The metal contact area is seriously compounded, and it is difficult to increase the opening voltage. Compared with traditional TOPCon batteries, the photovoltaic cell and preparation method proposed in this application have a short process flow, a simple structure, high efficiency potential, and improved production capacity and yield. Compared with conventional heterojunction batteries, the front side is replaced by amorphous silicon with polycrystalline silicon of different thicknesses, and the transparent conductive film is replaced by an anti-reflection dielectric film. While reducing the equipment cost, it also reduces light parasitic absorption, which is beneficial to increase the current.

[0050] The basic concepts have been described above. Obviously, for those skilled in the art, the above application disclosure is only an example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0051] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in this specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0052] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more application embodiments, in the above description of the embodiments of this application, multiple features are sometimes merged into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0053] In some embodiments, numbers describing the number of components and attributes are used. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about", "approximately" or "substantially" in some examples. Unless otherwise specified, "about", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may change according to the required features of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining digits. Although the numerical domains and parameters used to confirm the breadth of their range in some embodiments of the present application are approximate values, in specific embodiments, the setting of such numerical values ​​is as accurate as possible within the feasible range.

[0054] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions may be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the essential spirit of the present application, they will fall within the scope of the claims of the present application.

Claims

1. A photovoltaic cell, characterized in that: The photovoltaic cell comprises a first surface and a second surface opposite to each other, wherein the first surface comprises a metal region and a non-metal region arranged at intervals, and the photovoltaic cell further comprises: A semiconductor substrate, the semiconductor substrate having a first substrate surface and a second substrate surface opposite to each other, wherein the first substrate surface and the first surface are located on the same side, the second substrate surface and the second surface are located on the same side, and the first substrate surface includes a metal segment corresponding to the metal area and a non-metal segment corresponding to the non-metal area; A first oxide layer and a first doped polysilicon layer having a first doping type are sequentially located on the metal segment; A second oxide layer and a second doped polysilicon layer having the first doping type are sequentially located on the non-metallic section in the non-metallic region and sequentially located on the first doped polysilicon layer in the metal region; a first electrode, connected to the first doped polysilicon layer through the second doped polysilicon layer and the second oxide layer in the metal region; An intrinsic layer and a doped crystalline silicon layer having a second doping type are sequentially located on the second surface of the substrate, wherein the second doping type is different from the first doping type; a transparent conductive film layer, located on a side of the second doped layer away from the second surface of the substrate; and The second electrode is located at the side where the second surface is located and is connected to the transparent conductive film layer.

2. The photovoltaic cell according to claim 1, characterized in that It also includes an anti-reflection dielectric film, which covers the surface of the second doped polysilicon layer away from the first surface of the substrate on one side of the first surface of the substrate.

3. The photovoltaic cell according to claim 2, characterized in that The anti-reflection dielectric film includes a single layer or a composite layer, the composite layer is a plurality of layers stacked together, and the single layer or the composite layer includes one or more materials selected from silicon oxide, silicon nitride, silicon oxynitride, and magnesium fluoride.

4. The photovoltaic cell according to claim 1, characterized in that The doped crystalline silicon layer includes doped amorphous silicon and / or doped microcrystalline silicon.

5. The photovoltaic cell according to claim 1, characterized in that: The intrinsic layer includes intrinsic amorphous silicon and / or intrinsic microcrystalline silicon.

6. The photovoltaic cell according to claim 1, characterized in that: The transparent conductive film layer is composed of a transparent conductive oxide, which includes tin-doped indium oxide, tungsten-doped indium oxide and / or cesium-doped indium oxide, or ZnO or InO or SnO doped with one or more elements of Ga, Sn, Mo, Ce, F, W, and Al.

7. The photovoltaic cell according to claim 1, characterized in that The first oxide layer and / or the second oxide layer include silicon oxide, and the thickness of the first oxide layer and / or the second oxide layer along a first direction perpendicular to the semiconductor substrate is 1-4 nm respectively.

8. The photovoltaic cell according to any one of claims 1 to 7, characterized in that: A thickness of the first doped polysilicon layer along a first direction perpendicular to the semiconductor substrate is greater than a thickness of the second doped polysilicon layer along the first direction.

9. The photovoltaic cell according to claim 8, characterized in that: The thickness of the first doped polysilicon layer along the first direction is greater than 100 nm, and the thickness of the second doped polysilicon layer along the first direction is less than 100 nm.

10. The photovoltaic cell according to claim 9, characterized in that: The thickness of the first doped polysilicon layer along the first direction is between 120 nm and 130 nm, and the thickness of the second doped polysilicon layer along the first direction is between 40 nm and 50 nm.

11. The photovoltaic cell according to claim 8, characterized in that: The thickness of the first doped polysilicon layer along the first direction is 2.5 to 3.5 times the thickness of the second doped polysilicon layer along the first direction.

12. The photovoltaic cell according to claim 8, characterized in that: In the process of forming the photovoltaic cell, the first oxide layer and the first doped polysilicon layer are prepared before the second oxide layer and the second doped polysilicon layer.

13. The photovoltaic cell according to claim 12, characterized in that: In the process of forming the photovoltaic cell, the first oxide layer and the first doped polysilicon layer are firstly entirely laid on the first surface of the substrate, and after removing the first oxide layer and the first doped polysilicon layer in the non-metallic section, the second oxide layer and the second doped polysilicon layer are entirely laid on one side of the first surface of the substrate.

14. A method for preparing a photovoltaic cell, characterized in that: The photovoltaic cell comprises a first surface and a second surface opposite to each other, wherein the first surface comprises a metal region and a non-metal region arranged at intervals, and the preparation method comprises the following steps: Providing a semiconductor substrate, the semiconductor substrate having a first substrate surface and a second substrate surface opposite to each other, wherein the first substrate surface and the first surface are located on the same side, the second substrate surface and the second surface are located on the same side, and the first substrate surface includes a metal segment corresponding to the metal area and a non-metal segment corresponding to the non-metal area; sequentially preparing a first oxide layer and a first doped polysilicon layer having a first doping type on the metal segment; Prepare a second oxide layer and a second doped polysilicon layer having the first doping type, and make the second oxide layer and the second doped polysilicon layer sequentially located on the non-metallic section in the non-metallic area, and sequentially located on the first doped polysilicon layer in the metal area; Prepare a first electrode, so that the first electrode passes through the second doped polysilicon layer and the second oxide layer in the metal region and is connected to the first doped polysilicon layer; Sequentially preparing an intrinsic layer and a doped crystalline silicon layer having a second doping type on the second surface of the substrate, wherein the second doping type is different from the first doping type; preparing a transparent conductive film layer on a side of the second doped layer away from the second surface of the substrate; and A second electrode is prepared so that the second electrode is located on the side where the second surface of the substrate is located and is connected to the transparent conductive film layer.

15. The preparation method according to claim 14, characterized in that: It also includes preparing the first electrode and / or the second electrode by electroplating and / or printing low-temperature slurry.

16. The preparation method according to claim 14 or 15, characterized in that: The method also includes preparing the first oxide layer and the first doped polysilicon layer first and then preparing the second oxide layer and the second doped polysilicon layer.

17. The preparation method according to claim 14 or 15, characterized in that: It also includes firstly laying the first oxide layer and the first doped polysilicon layer on the entire surface of the first surface of the substrate, removing the first oxide layer and the first doped polysilicon layer in the non-metallic section, and then laying the second oxide layer and the second doped polysilicon layer on the entire surface of one side of the first surface of the substrate.

18. The preparation method according to claim 17, characterized in that: It also includes laying a mask layer at the position of the metal area before removing the first oxide layer and the first doped polysilicon layer of the non-metallic section, and removing the first oxide layer and the first doped polysilicon layer not covered by the mask layer by etching with an alkaline solution.

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