Testing device of gate driving chip

Abstract

The invention discloses a test device of a gate drive chip. The test device of the gate drive chip comprises a test mother board; the first test daughter board assembly and the gate driving chip mounting seat are provided with a plugging part, and the plugging part is suitable for being electrically connected with the gate driving chip in a detachable plugging manner; and the other side of the second test daughter board assembly in the first direction is suitable for being welded and fixed with the gate driving chip. Therefore, the grid driving chip mounting seat in the first test sub-board assembly is not resistant to high temperature and low temperature, so that the test device can test the grid driving chips on the grid driving chip mounting seat at normal temperature, and the unqualified grid driving chips at the normal temperature can be eliminated; and then, the second test daughter board and the test mother board test the gate driving chip on the second test daughter board at high temperature and low temperature, so that the gate driving chip which is not eliminated can keep stable performance at different temperatures.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a testing device for a gate drive chip. Background Art

[0002] In the power semiconductor industry, every time a new driver chip is developed, its performance needs to be tested. In order to achieve the performance test of the driver chip, a corresponding test device needs to be set up.

[0003] In the related art, the testing device includes a testing board, and the driver chip to be tested is usually welded to the testing board. Although this can achieve performance testing of the driver chip, it requires the use of a soldering iron and solder wire, and welding and disassembly are both troublesome. This not only reduces the efficiency of the testing device in testing the driver chip, but also during the welding and disassembly process, the structure of the driver chip or the test board is easily damaged, thereby reducing the reliability of the test. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one object of the present invention is to provide a test device for a gate driver chip, which has higher testing convenience.

[0005] According to an embodiment of the present invention, a test device for a gate drive chip includes: a test motherboard, a plug-in hole is provided on the test motherboard, and the test motherboard is suitable for testing a gate drive chip; a first test sub-board assembly, the first test sub-board assembly includes a first test sub-board and a gate drive chip mounting seat, a first pin is provided on one side of the first direction of the first test sub-board, the gate drive chip mounting seat is provided on the other side of the first direction of the first test sub-board and is electrically connected to the first test sub-board, a plug-in portion is provided on the gate drive chip mounting seat, and the plug-in portion is suitable for detachably plugging and electrically connecting with the gate drive chip; a second test sub-board assembly, the second test sub-board assembly includes a second test sub-board, a second pin is provided on one side of the first direction of the second test sub-board, the other side of the first direction of the second test sub-board is suitable for being welded and fixed to the gate drive chip, and one of the first pin and the second pin is selectively detachably plugged and electrically connected with the plug-in hole.

[0006] Therefore, the first test sub-board assembly is electrically connected to the test motherboard first. Since the gate drive chip mounting seat in the first test sub-board assembly is not resistant to high and low temperatures, when the first test sub-board assembly is electrically connected to the test motherboard, the test device will test the gate drive chip on the gate drive chip mounting seat at room temperature. By sequentially and detachably plugging and electrically connecting multiple gate drive chips with the plug-in portion on the gate drive chip mounting seat, rapid detection of multiple gate drive chips can be achieved, so that unqualified gate drive chips at room temperature can be eliminated.

[0007] Then, the first test sub-board assembly is removed from the test motherboard, and the second test sub-board is electrically connected to the gate driver chip that is qualified at room temperature by welding in sequence, and the second test sub-board is electrically connected to the test motherboard, so that the test motherboard tests the gate driver chip on the second test sub-board. Since the second test sub-board is resistant to high and low temperatures, the second test sub-board and the test motherboard will test the gate driver chip on the second test sub-board at high and low temperatures, and then eliminate the gate driver chips that are unqualified at high and low temperatures. In this way, the gate driver chips that have not been eliminated can maintain stable performance at different temperatures, so that the test device can test the gate driver chip more comprehensively, and the reliability of the test device can be improved.

[0008] In addition, in the first step, the test device tests all the gate drive chips that need to be tested at room temperature through the test motherboard and the first test sub-board assembly. This will result in more gate drive chips that can be detachably plugged and electrically connected to the first test sub-board assembly. However, since the gate drive chip mounting seat on the first test sub-board assembly is detachably plugged and electrically connected to the gate drive chip, the connection and disassembly of multiple gate drive chips to the gate drive chip mounting seat are relatively convenient and quick. In the second step, the test device performs high and low temperature environment tests on the gate drive chips that are qualified at room temperature through the test motherboard and the second test sub-board assembly. Although the gate drive chip and the second test sub-board are electrically connected by welding, since the test device has eliminated the unqualified gate drive chips at room temperature in the first step, the number of gate drive chips to be tested in the second step is relatively small, which will not greatly affect the test efficiency.

[0009] Therefore, the testing device of the embodiment of the present invention can improve the testing efficiency of the testing device as much as possible under the premise that the gate driving chip can be tested under three environments: normal temperature, high temperature and low temperature.

[0010] In some examples of the present invention, a socket is provided on the test motherboard, and a plurality of the socket holes are provided on the socket, a plurality of the first pins are provided on the first test sub-board, and the plurality of the first pins are selectively plugged and electrically connected with the plurality of the socket holes in a one-to-one correspondence, and a plurality of the second pins are provided on the second test sub-board, and the plurality of the second pins are selectively plugged and electrically connected with the plurality of the socket holes in a one-to-one correspondence.

[0011] In some examples of the present invention, there are two sockets, and the two sockets are spaced apart in the second direction.

[0012] In some examples of the present invention, a custom pin adapter and a pin configuration socket are provided on the test motherboard, the custom pin adapter includes a plurality of adapter pin sockets, and the plurality of adapter pin sockets are suitable for being electrically connected one-to-one with a plurality of pins of a gate drive chip, and the pin configuration socket includes a plurality of pin pin sockets with different functions, and at least one of the plurality of pin pin sockets with different functions is selectively electrically connected with at least one of the plurality of adapter pin sockets to selectively define the functions of a plurality of pins on the gate drive chip.

[0013] In some examples of the present invention, the custom pin adapter includes a control side input pin adapter, the pin configuration seat includes a control side input pin configuration seat, the control side input pin adapter includes a plurality of control side input adapter pin seats, the plurality of control side input adapter pin seats are suitable for being electrically connected to a plurality of control side input pins of a gate drive chip, the control side input pin configuration seat includes a plurality of control side input pin sockets with different functions, at least one of the plurality of control side input pin sockets with different functions is selectively electrically connected to at least one of the plurality of control side input adapter pin seats to selectively define the functions of the plurality of control side input pins of the gate drive chip.

[0014] In some examples of the present invention, the custom pin adapter includes a driving side output pin adapter, the pin configuration seat includes a driving side output pin configuration seat, the driving side output pin adapter includes a plurality of driving side output adapter needle seats, the plurality of driving side output adapter needle seats are suitable for being electrically connected to a plurality of driving side output pins of a gate driving chip, the driving side output pin configuration seat includes a plurality of driving side output pin needle seats with different functions, at least one of the plurality of driving side output pin needle seats with different functions is selectively electrically connected to at least one of the plurality of driving side output adapter needle seats to selectively define the functions of the plurality of driving side output pins of the gate driving chip.

[0015] In some examples of the present invention, the test device of the gate drive chip also includes at least one first electrical connection line, a first socket is provided at one end of the first electrical connection line, and the first socket is selectively plugged and electrically connected to at least one of the control side input pin sockets with multiple different functions, and the other end of the first electrical connection line is provided with a second socket, and the second socket is selectively plugged and electrically connected to at least one of the multiple control side input adapter needle sockets; and / or also includes at least one second electrical connection line, a third socket is provided at one end of the second electrical connection line, and the third socket is selectively plugged and electrically connected to at least one of the drive side output pin sockets with multiple different functions, and the other end of the second electrical connection line is provided with a fourth socket, and the fourth socket is selectively plugged and electrically connected to at least one of the multiple drive side output adapter needle sockets.

[0016] In some examples of the present invention, the control-side input pin adapters are spaced apart on one side of the second direction of the two sockets, and the drive-side output pin adapters are spaced apart on the other side of the second direction of the two sockets.

[0017] In some examples of the present invention, there are multiple control side input pin adapters, which are spaced apart in the second direction and electrically connected to each other; there are multiple drive side output pin adapters, which are spaced apart in the second direction and electrically connected to each other.

[0018] In some examples of the present invention, a power supply pin socket is provided on the test motherboard, and the power supply pin socket includes a control side input power supply pin socket and a drive side output power supply pin socket, the control side input power supply pin socket is suitable for supplying power to the control side input of the gate drive chip, and the drive side output power supply pin socket is suitable for supplying power to the drive side output of the gate drive chip.

[0019] In some examples of the present invention, the control side input power supply pin socket and the drive side output power supply pin socket are spaced apart in the third direction, and the power supply pin sockets are spaced apart on the side of the control side input pin adapter in the second direction away from the drive side output pin adapter.

[0020] In some examples of the present invention, a load mounting area is provided on the test motherboard, the load mounting area is suitable for mounting a load, and the load mounting area is selectively electrically connected to at least one of the control side input pin adapter and the drive side output pin adapter.

[0021] In some examples of the present invention, the load installation area is arranged at a distance from the two sockets on one side of the third direction.

[0022] In some examples of the present invention, load external needle sockets are provided on both sides of the third direction of the load installation area, and the load external needle sockets on both sides of the second direction of the load installation area are respectively suitable for electrically connecting to the positive and negative poles of the load, and the load external needle sockets on both sides of the second direction of the load installation area are selectively electrically connected to the control side input pin adapter at the same time; and / or the load external needle sockets on both sides of the second direction of the load installation area are selectively electrically connected to the drive side output pin adapter at the same time.

[0023] In some examples of the present invention, the gate drive chip mounting seat is fixed to the test sub-board by welding.

[0024] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0026] Figure 1 is a partial schematic diagram of a testing device and a gate driving chip according to an embodiment of the present invention;

[0027] Figure 2 is a test circuit diagram of a test device according to an embodiment of the present invention;

[0028] Figure 3 is a partial schematic diagram of a test motherboard and a second test daughterboard assembly according to an embodiment of the present invention;

[0029] Figure 4 is a schematic diagram of a test motherboard according to an embodiment of the present invention;

[0030] Figure 5 is a schematic diagram of a test sub-board according to an embodiment of the present invention;

[0031] Figure 6 is a schematic diagram of a gate driver chip mounting base according to an embodiment of the present invention;

[0032] Figure 7 is a schematic diagram of packaging of a gate driving chip according to an embodiment of the present invention;

[0033] Figure 8 Schematic diagram of a test motherboard and a second test daughterboard assembly according to an embodiment of the present invention.

[0034] Reference numerals:

[0035] 100. Testing device;

[0036] 10. Test the motherboard;

[0037] 11. socket; 111. socket;

[0038] 12. Custom pin adapter; 121. Control side input pin adapter; 1211. Control side input adapter pin seat; 122. Drive side output pin adapter; 1221. Drive side output adapter pin seat; 123. Adapter pin seat;

[0039] 13. Pin configuration seat; 131. Control side input pin configuration seat; 1311. Control side input pin needle seat; 132. Drive side output pin configuration seat; 1321. Drive side output pin needle seat; 133. Pin needle seat;

[0040] 14. Power supply pin socket; 141. Control side input power supply pin socket; 142. Drive side output power supply pin socket;

[0041] 15. Load installation area;

[0042] 16. Load external pin socket;

[0043] 17. Ground pin socket;

[0044] 20. First test sub-board assembly; 21. First test sub-board; 22. Second test sub-board assembly; 23. Second test sub-board;

[0045] 30. Gate drive chip mounting seat; 31. Plug-in unit;

[0046] 40. first electrical connection line; 41. first plug hole; 42. second plug hole;

[0047] 200, gate drive chip; 201, pin; 2011, control side input pin; 2012, drive side output pin. DETAILED DESCRIPTION

[0048] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.

[0049] Reference below Figure 1-Figure 8 A test device 100 for a gate driving chip 200 according to an embodiment of the present invention is described.

[0050] Combination Figure 1-Figure 8 As shown, the test device 100 of the gate driving chip 200 according to the present invention may mainly include: a test motherboard 10 , a first test sub-board assembly 20 and a second test sub-board assembly 22 .

[0051] Among them, a plug hole 111 is provided on the test motherboard 10, and the test motherboard 10 is suitable for testing the gate drive chip 200; the first test sub-board assembly 20 includes a first test sub-board 21 and a gate drive chip mounting seat 30, a first pin is provided on one side of the first direction of the first test sub-board 21, the gate drive chip mounting seat 30 is provided on the other side of the first direction of the first test sub-board 21 and is electrically connected to the first test sub-board 21, and a plug-in portion 31 is provided on the gate drive chip mounting seat 30, and the plug-in portion 31 is suitable for detachably plugging and electrically connecting with the gate drive chip 200; the second test sub-board assembly 22 includes a second test sub-board 23, a second pin is provided on one side of the first direction of the second test sub-board 23, and the other side of the first direction of the second test sub-board 23 is suitable for being welded and fixed with the gate drive chip 200, and one of the first pin and the second pin is selectively detachably plugged and electrically connected with the plug hole 111.

[0052] Specifically, when the test device 100 is working, the first test sub-board assembly 20 is electrically connected to the test motherboard 10. Since the gate drive chip mounting seat 30 in the first test sub-board assembly 20 is not resistant to high and low temperatures, when the first test sub-board assembly 20 is electrically connected to the test motherboard 10, the test device 100 will test the gate drive chip 200 on the gate drive chip mounting seat 30 at room temperature, and the multiple gate drive chips 200 are detachably plugged and electrically connected to the plug-in portion 31 on the gate drive chip mounting seat 30 in turn, thereby realizing rapid detection of the multiple gate drive chips 200, so that the gate drive chips 200 that are unqualified at room temperature can be eliminated;

[0053] Then, the first test sub-board assembly 20 is removed from the test motherboard 10, and the second test sub-board 23 is electrically connected to the gate driver chip 200 that is qualified at room temperature by welding in sequence, and the second test sub-board 23 is electrically connected to the test motherboard 10, so that the test motherboard 10 tests the gate driver chip 200 on the second test sub-board 23. Since the second test sub-board 23 is resistant to high and low temperatures, the second test sub-board 23 and the test motherboard 10 will test the gate driver chip 200 on the second test sub-board 23 at high and low temperatures, and then eliminate the gate driver chips 200 that are unqualified at high and low temperatures. In this way, the gate driver chips 200 that have not been eliminated can maintain stable performance at different temperatures, so that the test device 100 can test the gate driver chip 200 more comprehensively, and the reliability of the test device 100 can be improved.

[0054] In addition, in the first step, the test device 100 tests all the gate driver chips 200 that need to be tested at room temperature through the test motherboard 10 and the first test sub-board assembly 20. This will result in more gate driver chips 200 that can be detachably plugged and electrically connected to the first test sub-board assembly 20. However, since the gate driver chip mounting seat 30 on the first test sub-board assembly 20 is detachably plugged and electrically connected to the gate driver chip 200, the connection and disassembly of multiple gate driver chips 200 and the gate driver chip mounting seat 30 are relatively convenient and quick. In the second step, the test device 100 performs high and low temperature environment tests on the gate driver chips 200 that are qualified at room temperature through the test motherboard 10 and the second test sub-board assembly 22. Although the gate driver chip 200 and the second test sub-board 23 are electrically connected by welding, since the test device 100 has eliminated the unqualified gate driver chips 200 at room temperature in the first step, the number of gate driver chips 200 to be tested in the second step is relatively small, which will not greatly affect the test efficiency.

[0055] Therefore, the testing device 100 of the embodiment of the present invention can improve the testing efficiency of the testing device 100 as much as possible under the premise that the gate driving chip 200 can be tested under three environments: normal temperature, high temperature and low temperature.

[0056] It should be noted that the gate drive chip mounting seat 30 is not resistant to high and low temperatures due to material limitations, which is a common problem in the prior art. The first test sub-board 21 and the second test sub-board 23 are both circuit boards. It is also a common setting in the prior art that the circuit board is more resistant to high or low temperatures than the gate drive chip mounting seat 30.

[0057] Furthermore, since a plug hole 111 is provided on the test motherboard 10, a first pin is provided on the first test sub-board 21, and a second pin is provided on the second test sub-board 23, when the first test sub-board assembly 20 and the test motherboard 10 test the gate drive chip 200, the first pin on the first test sub-board 21 is detachably plugged and electrically connected to the plug hole 111, and when the second test sub-board assembly 22 and the test motherboard 10 test the gate drive chip 200, the first test sub-board assembly 20 is removed from the test motherboard 10, and the second pin on the second test sub-board 23 is detachably plugged and electrically connected to the plug hole 111, so that the switching connection between the first test sub-board assembly 20 and the second test sub-board assembly 22 and the test motherboard 10 can be faster and more convenient.

[0058] Combination Figure 3 and Figure 4As shown, a socket 11 is provided on the test motherboard 10, and a plurality of socket holes 111 are provided on the socket 11, and a plurality of first pins are provided on the first test sub-board 21, and the plurality of first pins are selectively plugged and electrically connected with the plurality of socket holes 111 in a one-to-one correspondence, and a plurality of second pins are provided on the second test sub-board 23, and the plurality of second pins are selectively plugged and electrically connected with the plurality of socket holes 111 in a one-to-one correspondence.

[0059] Specifically, by setting a plurality of spaced-apart plug holes 111 on the plug socket 11 and setting a plurality of first plug pins on the first test sub-board 21, when the first test sub-board 21 is electrically connected to the test mother board 10, the plurality of first plug pins and the plurality of plug holes 111 are electrically connected in a one-to-one correspondence, thereby making the electrical connection between the first test sub-board 21 and the test mother board 10 more stable and reliable; and when the second test sub-board 23 is electrically connected to the test mother board 10, the plurality of second plug pins and the plurality of plug holes 111 are electrically connected in a one-to-one correspondence, thereby making the electrical connection between the second test sub-board 23 and the test mother board 10 more stable and reliable.

[0060] Furthermore, combined with Figure 3 and Figure 4 As shown, there are two sockets 11, and the two sockets 11 are spaced apart in the second direction. In this way, on the one hand, the two sockets 11 can be plugged in and matched with the test sub-board, and can both play the role of supporting the test sub-board, so that the force on the test sub-board is more uniform, and the setting stability of the test sub-board is improved. On the other hand, the two sockets 11 can be adapted to the multiple pins 201 on the left and right sides of the gate drive chip 200 in the second direction, which is convenient for connecting the test circuit.

[0061] Combination Figure 3 and Figure 4 As shown, a custom pin adapter 12 and a pin configuration seat 13 are provided on the test motherboard 10. The custom pin adapter 12 may include a plurality of adapter needle seats 123. The plurality of adapter needle seats 123 are suitable for being electrically connected to a plurality of pins 201 of the gate driver chip 200 in a one-to-one correspondence. The pin configuration seat 13 may include a plurality of pin needle seats 133 with different functions. At least one of the plurality of pin needle seats 133 with different functions is selectively electrically connected to at least one of the plurality of adapter needle seats 123 to selectively define the functions of the plurality of pins 201 on the gate driver chip 200.

[0062] Specifically, the gate driver chip 200 is usually developed in the form of SOP28 (Small Outline Package with 28 pins) packaging, as a product form or quick-sealed sample for functional and reliability testing. Due to the diversity of gate driver chips 200 and to facilitate wafer bonding, the functional pins 201 of the device are not unique, and need to be matched one by one with the test motherboard 10 during the functional test process. If multiple test motherboards 10 are developed for matching, it will cause waste of the test motherboards 10.

[0063] Considering that the pin 201 of the gate driver chip 200 has a unique function, but the type of the pin 201 is unique. By setting a custom pin adapter 12 and a pin configuration seat 13 on the test motherboard 10, the multiple pins 201 of the gate driver chip 200 are electrically connected to the multiple adapter needle seats 123 on the custom pin adapter 12 in a one-to-one correspondence, and at least one of the pin needle seats 133 with multiple different functions of the pin configuration seat 13 is selectively electrically connected to at least one of the multiple adapter needle seats 123, so that the functions of the multiple pins 201 on the gate driver chip 200 can be selectively defined, so as to adapt to the pin 201 design of different gate driver chips 200, so that the test motherboard 10 and even the test device 100 have universality, which can improve the convenience of testing and facilitate the design of the gate driver chip 200.

[0064] Combination Figure 3 and Figure 4 As shown, the custom pin adapter 12 may include a control side input pin adapter 121, the pin configuration seat 13 may include a control side input pin configuration seat 131, the control side input pin adapter 121 may include a plurality of control side input adapter needle seats 1211, the plurality of control side input adapter needle seats 1211 are suitable for being electrically connected to a plurality of control side input pins 2011 of the gate drive chip 200, the control side input pin configuration seat 131 may include a plurality of control side input pin needle seats 133 with different functions, at least one of the plurality of control side input pin needle seats 133 with different functions is selectively electrically connected to at least one of the plurality of control side input adapter needle seats 1211, so that the functions of the plurality of control side input pins 2011 of the gate drive chip 200 can be selectively defined.

[0065] Furthermore, combined with Figure 1 and Figure 2As shown, the test device 100 of the gate drive chip 200 may also include at least one first electrical connection line 40, one end of the first electrical connection line 40 is provided with a first jack 41, the first jack 41 is selectively plugged and electrically connected to at least one of a plurality of control side input pin sockets 133 with different functions, and the other end of the first electrical connection line 40 is provided with a second jack 42, the second jack 42 is selectively plugged and electrically connected to at least one of a plurality of control side input adapter sockets 1211.

[0066] In this way, it is only necessary to selectively plug and electrically connect one end of the first electrical connection line 40 with at least one of the control side input pin needle holders 133 with multiple different functions, and selectively plug and electrically connect the other end of the first electrical connection line 40 with at least one of the multiple control side input adapter needle holders 1211, so as to achieve the electrical connection between the control side input pin needle holder 133 and the control side input pin adapter 121, thereby facilitating the electrical connection between the control side input pin needle holder 133 and the control side input pin adapter 121, and facilitating the definition of the functions of the multiple control side input pins 2011 of the gate drive chip 200, thereby improving the convenience of testing and facilitating the design of the gate drive chip 200.

[0067] Combination Figure 3 and Figure 4 As shown, the custom pin adapter 12 may include a driving side output pin adapter 122, the pin configuration seat 13 may include a driving side output pin configuration seat 132, the driving side output pin adapter 122 may include a plurality of driving side output adapter needle seats 1221, the plurality of driving side output adapter needle seats 1221 are suitable for being electrically connected to a plurality of driving side output pins 2012 of the gate driving chip 200, the driving side output pin configuration seat 132 may include a plurality of driving side output pin needle seats 133 with different functions, at least one of the plurality of driving side output pin needle seats 133 with different functions is selectively electrically connected to at least one of the plurality of driving side output adapter needle seats 1221, so that the functions of the plurality of driving side output pins 2012 of the gate driving chip 200 can be selectively defined.

[0068] Furthermore, combined with Figure 1 and Figure 2 As shown, the test device 100 of the gate drive chip 200 may also include at least one second electrical connection line, one end of the second electrical connection line is provided with a third jack, the third jack is selectively plugged and electrically connected to at least one of a plurality of drive side output pin needle holders 133 with different functions, and the other end of the second electrical connection line is provided with a fourth jack, the fourth jack is selectively plugged and electrically connected to at least one of a plurality of drive side output adapter needle holders 1221.

[0069] In this way, it is only necessary to selectively plug and electrically connect one end of the second electrical connection line with at least one of the driving side output pin needle holders 133 with multiple different functions, and selectively plug and electrically connect the other end of the second electrical connection line with at least one of the multiple driving side output adapter needle holders 1221, so as to achieve the electrical connection between the driving side output pin needle holder 133 and the driving side output pin adapter 122, thereby facilitating the electrical connection between the driving side output pin needle holder 133 and the driving side output pin adapter 122, and facilitating the definition of the functions of the multiple driving side output pins 2012 of the gate driving chip 200, so that the test motherboard 10 and even the test device 100 have universality, improve the convenience of testing, and facilitate the design of the gate driving chip 200.

[0070] Combination Figure 3 and Figure 4 As shown, the control-side input pin adapters 121 are arranged at intervals on one side of the two sockets 11 in the second direction, and the drive-side output pin adapters 122 are arranged at intervals on the other side of the two sockets 11 in the second direction.

[0071] Specifically, it can be understood that the custom pin adapter 12 needs to be electrically connected to the pin 201 of the gate drive chip 200 through the socket 11, the test sub-board and the gate drive chip mounting socket 30 in sequence. Since the gate drive chip 200 is provided with a plurality of pins 201 spaced apart in the third direction on both sides of the second direction, by spaced apart the control side input pin adapter 121 on one side of the second direction of the two sockets 11, and spaced apart the drive side output pin adapter 122 on the other side of the second direction of the two sockets 11, it is convenient to transfer the control side input pin adapter 121 between the control side input pin configuration seat 131 and the control side input pin 2011 of the gate drive chip 200, and it is convenient to transfer the drive side output pin adapter 122 between the drive side output pin configuration seat 132 and the drive side output pin 2012, thereby optimizing the layout of the test motherboard 10 and improving the convenience and reliability of the test device 100.

[0072] Furthermore, combined with Figure 3 and Figure 4 As shown, there are multiple control-side input pin adapters 121, which are spaced apart in the second direction and electrically connected to each other, so that the definition of more control-side input pins 2011 of the gate driving chip 200 can be met. Also, there are multiple drive-side output pin adapters 122, which are spaced apart in the second direction and electrically connected to each other, so that the definition of more drive-side output pins 2012 of the gate driving chip 200 can be met.

[0073] Combination Figure 3and Figure 4 As shown, a power supply pin socket 14 is provided on the test motherboard 10, and the power supply pin socket 14 may include a control side input power supply pin socket 141 and a drive side output power supply pin socket 142, wherein the control side input power supply pin socket 141 is the positive terminal of the drive power supply, suitable for supplying power to the control side input of the gate drive chip 200, and the drive side output power supply pin socket 142 is the positive terminal of the working power supply of the gate drive chip 200, suitable for supplying power to the drive side output of the gate drive chip 200. In this way, through the setting of the control side input power supply pin socket 141 and the drive side output power supply pin socket 142, the test circuit can selectively connect the control side input power supply pin socket 141 and the drive side output power supply pin socket 142 to realize power supply to the test circuit, ensure the normal operation of the test device 100, and ensure the normal progress of the test.

[0074] Furthermore, combined with Figure 3 and Figure 4 As shown, the control side input power supply needle seat 141 and the drive side output power supply needle seat 142 are arranged at intervals in the third direction, and the power supply needle seat 14 is arranged at intervals on the side of the control side input pin adapter 121 away from the drive side output pin adapter 122 in the second direction. In this way, the space on the side of the control side input pin adapter 121 away from the drive side output pin adapter 122 in the second direction can be fully utilized, so that the power supply needle seat 14 is located at the edge position of the second direction of the test motherboard 10, avoiding the control side input power supply needle seat 141 and the drive side output power supply needle seat 142 being located between the control side input pin adapter 121 and the drive side output pin adapter 122, resulting in the crossing and confusion of the electrical connection lines, so that the setting positions of the control side input power supply needle seat 141 and the drive side output power supply needle seat 142 can be further optimized, the layout of the test motherboard 10 can be optimized, and the reliability of the test device 100 can be improved.

[0075] Combination Figure 3 and Figure 4 As shown, a load installation area 15 is provided on the test motherboard 10 , and the load installation area 15 is suitable for installing a load. The load installation area 15 is selectively electrically connected to at least one of the control-side input pin adapter 121 and the drive-side output pin adapter 122 .

[0076] Specifically, in order to ensure the accuracy of the test and the safety of the test device 100 , a load needs to be set when performing a performance test on the gate driving chip 200 .

[0077] Different from the prior art, in which the load is placed at the pin 201 of the gate drive chip 200, the present application sets a load installation area 15 on the test motherboard 10, and the load installation area 15 is selectively electrically connected to at least one of the control side input pin adapter 121 and the drive side output pin adapter 122, so that an installation position can be reserved for the load. In this way, when the test device 100 is working, it is only necessary to set the load in the load installation area 15, and then connect the load to the pin 201 of the gate drive chip 200, which can avoid the redundancy of the pin 201 position of the gate drive chip 200, and make the structure of the test device 100 simpler and more reliable. Among them, the load can be a capacitive load, a resistive load or an inductive load, and can be set in the load installation area 15 according to the actual situation.

[0078] In addition, when the signal needs to be pulled up or down, it can also be connected through the load installation area 15.

[0079] Furthermore, combined with Figure 3 and Figure 4 As shown, the load installation area 15 is arranged at intervals on one side of the third direction of the two sockets 11. Specifically, by arranging the load installation area 15 at intervals on one side of the third direction of the two sockets 11, not only can the space in the third direction of the two sockets 11 be fully utilized, the straight-line distance between the load installation area 15 and the gate drive chip 200 can be shortened, and the connection between the load installation area 15 and the pins 201 of the gate drive chip 200 is facilitated, but also the load installation area 15 can be prevented from being located between the custom pin adapter 12 and the pin configuration seat 13, and the crossing and confusion of the electrical connection lines can be avoided, so that the setting position of the load installation area 15 can be optimized, the layout of the test motherboard 10 can be optimized, and the reliability of the test device 100 can be improved.

[0080] Combination Figure 3 and Figure 4 As shown, load external needle sockets 16 are provided on both sides of the third direction of the load installation area 15, and the load external needle sockets 16 on both sides of the second direction of the load installation area 15 are respectively suitable for electrically connecting to the positive and negative poles of the load, so that the positive and negative poles of the load can be respectively led out through the load external needle sockets 16 on both sides of the second direction of the load installation area 15, and the test circuit only needs to be electrically connected to the load external needle sockets 16 on both sides of the second direction of the load installation area 15 to connect the load to the test circuit. Under the premise of ensuring the accuracy and safety of the test, the circuit connection of the test device 100 can be made simpler and more reliable.

[0081] Optionally, the load external pin sockets 16 on both sides of the load installation area 15 in the second direction are selectively electrically connected to the control-side input pin adapter 121 at the same time.

[0082] Optionally, the load external pin sockets 16 on both sides of the load installation area 15 in the second direction are selectively electrically connected to the drive-side output pin adapter 122 at the same time.

[0083] In addition, at least one grounding pin holder 17 is also provided on the test motherboard 10, so as to facilitate the grounding of the signal.

[0084] In some embodiments of the present invention, the gate drive chip mounting seat 30 is fixed by welding to the second test sub-board 23. Specifically, the gate drive chip mounting seat 30 can be fixed by welding to the second test sub-board 23, so that no additional improvements are made to the gate drive chip mounting seat 30 and the second test sub-board 23, and only an electric soldering iron and solder wire are needed to achieve the electrical connection between the gate drive chip mounting seat 30 and the second test sub-board 23, which can not only improve the stability of the electrical connection between the gate drive chip mounting seat 30 and the second test sub-board 23, but also make the structure of the gate drive chip mounting seat 30 and the second test sub-board 23 simple.

[0085] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0086] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0087] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A test device for a gate driver chip, characterized in that: include: A test motherboard (10), wherein a plug hole (111) is provided on the test motherboard (10), and the test motherboard (10) is suitable for testing a gate drive chip (200); A first test sub-board assembly (20), the first test sub-board assembly (20) comprising a first test sub-board (21) and a gate drive chip mounting seat (30), a first pin being arranged on one side of the first direction of the first test sub-board (21), the gate drive chip mounting seat (30) being arranged on the other side of the first direction of the first test sub-board (21) and being electrically connected to the first test sub-board (21), a plug-in portion (31) being arranged on the gate drive chip mounting seat (30), the plug-in portion (31) being suitable for being detachably plugged and electrically connected to the gate drive chip (200); A second test sub-board assembly (22), the second test sub-board assembly (22) comprising a second test sub-board (23), a second plug pin being arranged on one side of the second test sub-board (23) in a first direction, the other side of the second test sub-board (23) in the first direction being suitable for being welded and fixed to a gate drive chip (200), and one of the first plug pin and the second plug pin being selectively detachably plugged and electrically connected to the plug hole (111).

2. The gate driver chip testing device according to claim 1, characterized in that: The test motherboard (10) is provided with a socket (11), and the socket (11) is provided with a plurality of the socket holes (111) arranged at intervals. The first test sub-board (21) is provided with a plurality of the first plug pins, and the plurality of the first plug pins are selectively plugged and electrically connected with the plurality of the plug holes (111) in a one-to-one correspondence. The second test sub-board (23) is provided with a plurality of the second plug pins, and the plurality of the second plug pins are selectively plugged and electrically connected with the plurality of the plug holes (111) in a one-to-one correspondence.

3. The gate driver chip testing device according to claim 2, characterized in that: There are two plug sockets (11), and the two plug sockets (11) are arranged at intervals in the second direction.

4. The gate driver chip testing device according to claim 3, characterized in that: The test motherboard (10) is provided with a custom pin adapter (12) and a pin configuration seat (13); the custom pin adapter (12) comprises a plurality of adapter pin seats (123); the plurality of adapter pin seats (123) are suitable for being electrically connected to a plurality of pins (201) of a gate drive chip (200) in a one-to-one correspondence; the pin configuration seat (13) comprises a plurality of pin pin seats (133) with different functions; at least one of the plurality of pin pin seats (133) with different functions is selectively electrically connected to at least one of the plurality of adapter pin seats (123) to selectively define the functions of the plurality of pins (201) on the gate drive chip (200).

5. The gate driver chip testing device according to claim 4, characterized in that: The custom pin adapter (12) comprises a control side input pin adapter (121), the pin configuration seat (13) comprises a control side input pin configuration seat (131), the control side input pin adapter (121) comprises a plurality of control side input adapter pin seats (1211), the plurality of control side input adapter pin seats (1211) are suitable for being electrically connected to a plurality of control side input pins (2011) of a gate drive chip (200), the control side input pin configuration seat (131) comprises a plurality of control side input pin seats (133) with different functions, at least one of the plurality of control side input pin seats (133) with different functions is selectively electrically connected to at least one of the plurality of control side input adapter pin seats (1211) to selectively define the functions of the plurality of control side input pins (2011) of the gate drive chip (200).

6. The gate driver chip testing device according to claim 5, characterized in that: The custom pin adapter (12) comprises a drive side output pin adapter (122), the pin configuration seat (13) comprises a drive side output pin configuration seat (132), the drive side output pin adapter (122) comprises a plurality of drive side output adapter needle seats (1221), the plurality of drive side output adapter needle seats (1221) are suitable for being electrically connected to a plurality of drive side output pins (2012) of a gate drive chip (200), the drive side output pin configuration seat (132) comprises a plurality of drive side output pin needle seats (133) with different functions, at least one of the plurality of drive side output pin needle seats (133) with different functions is selectively electrically connected to at least one of the plurality of drive side output adapter needle seats (1221) to selectively define the functions of the plurality of drive side output pins (2012) of the gate drive chip (200).

7. The gate driver chip testing device according to claim 6, characterized in that: It also includes at least one first electrical connection line (40), one end of which is provided with a first jack (41), the first jack (41) being selectively plugged and electrically connected to at least one of the control-side input pin sockets (133) with multiple different functions, and the other end of which is provided with a second jack (42), the second jack (42) being selectively plugged and electrically connected to at least one of the multiple control-side input adapter sockets (1211); and / or The invention also comprises at least one second electrical connection line, one end of which is provided with a third plug hole, and the third plug hole is selectively plugged and electrically connected with at least one of the plurality of drive side output pin sockets (133) with different functions, and the other end of the second electrical connection line is provided with a fourth plug hole, and the fourth plug hole is selectively plugged and electrically connected with at least one of the plurality of drive side output adapter sockets (1221).

8. The gate driver chip testing device according to claim 6, characterized in that: The control side input pin adapter (121) is arranged at intervals on one side of the second direction of the two sockets (11), and the drive side output pin adapter (122) is arranged at intervals on the other side of the second direction of the two sockets (11).

9. The gate driver chip testing device according to claim 8, characterized in that: There are a plurality of control side input pin adapters (121), and the plurality of control side input pin adapters (121) are arranged at intervals in the second direction and are electrically connected to each other; There are a plurality of drive side output pin transfer seats (122), and the plurality of drive side output pin transfer seats (122) are arranged at intervals in the second direction and are electrically connected to each other.

10. The gate driver chip testing device according to claim 8, characterized in that: The test motherboard (10) is provided with a power supply pin socket (14), the power supply pin socket (14) comprising a control side input power supply pin socket (141) and a drive side output power supply pin socket (142), the control side input power supply pin socket (141) being suitable for supplying power to the control side input of the gate drive chip (200), and the drive side output power supply pin socket (142) being suitable for supplying power to the drive side output of the gate drive chip (200).

11. The gate driver chip testing device according to claim 10, characterized in that: The control side input power supply needle seat (141) and the drive side output power supply needle seat (142) are arranged at intervals in the third direction, and the power supply needle seat (14) is arranged at intervals on a side of the control side input pin adapter (121) away from the drive side output pin adapter (122) in the second direction.

12. The gate driver chip testing device according to claim 8, characterized in that: The test motherboard (10) is provided with a load installation area (15), the load installation area (15) is suitable for installing a load, and the load installation area (15) is selectively electrically connected to at least one of the control side input pin adapter (121) and the drive side output pin adapter (122).

13. The gate driver chip testing device according to claim 12, characterized in that: The load installation area (15) is arranged at intervals on one side of the two sockets (11) in the third direction.

14. The gate driver chip testing device according to claim 13, characterized in that: Load external needle seats (16) are arranged on both sides of the load installation area (15) in the third direction, the load external needle seats (16) on both sides of the load installation area (15) in the second direction are respectively suitable for being electrically connected to the positive and negative poles of the load, and the load external needle seats (16) on both sides of the load installation area (15) in the second direction are selectively electrically connected to the control side input pin adapter (121) at the same time; and / or The load external pin seats (16) on both sides of the load installation area (15) in the second direction are selectively electrically connected to the drive side output pin transfer seat (122) at the same time.

15. The gate driver chip testing device according to claim 1, characterized in that: The gate drive chip mounting seat (30) is fixed to the second test sub-board (23) by welding.

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