Wafer pattern offset correction method, storage medium and intelligent equipment

Abstract

The invention provides a wafer pattern offset correction method, a storage medium and intelligent equipment. The correction method comprises the following steps: determining a plurality of sampling points in a wafer; obtaining the offset of the sampling graphs of the target layer and the previous layer at each sampling point; acquiring a preset feature vector of the sampling graph in the target graph layer; a neural network model is established with the preset feature vector as an input layer and the offset of the sampling graph as an output layer, and the neural network model comprises a plurality of hidden layers; calculating by adopting a preset loss function to obtain the weight and the offset parameter of each hidden layer when the loss is minimum; simulation offsets of all graphs in the target layer are calculated through simulation of the neural network model; and moving the offset in the direction opposite to the simulation offset for all the graphs so as to complete correction. According to the method, a large amount of sampling is not needed, the requirements for the number and the position of the sampling points are low, even if the wafer layout changes, prediction can still be achieved, and the prediction precision of the pattern offset is high.

Description

Technical Field

[0001] The present application relates to the field of semiconductor device manufacturing technology or chip manufacturing technology, and specifically to a method for correcting wafer pattern deviation, a storage medium, and an intelligent device. Background Art

[0002] As the market's requirements for memory capacity and performance continue to increase, three-dimensional flash memory (also known as three-dimensional dynamic random access memory, or 3D NAND) has gradually replaced two-dimensional flash memory and become mainstream. In the process of manufacturing three-dimensional flash memory, thin film layers need to be deposited alternately, deep holes need to be etched, and deep holes need to be filled, and these processes will generate stress. As the number of layers of three-dimensional flash memory increases, the stress of the wafer will also increase, causing the wafer pattern to shift. When the pattern offset is large, it will cause alignment deviations between the upper and lower layers, affecting normal electrical connections, and thus resulting in reduced yields. Therefore, it is necessary to correct the pattern offset on the layout to meet the alignment requirements of the upper and lower layers.

[0003] The current correction method is usually based on polynomial fitting. The principle is: select a large number of sampling points from the wafer layout, and obtain the graphic offsets of the target layer and the previous layer at each sampling point, and then analyze based on these sampling points and graphic offsets, divide the entire layout into different correction areas, and use different polynomial formulas to fit the relationship between the offset and the horizontal and vertical coordinates for different correction areas. Then, based on these polynomial formulas, calculate the offsets of all graphics on the layout, and finally update the correction program according to the offsets to correct the target layers of subsequent wafers.

[0004] However, since the entire layout of the wafer needs to be divided into different correction areas, the sampling points need to cover the entire layout, which not only has high requirements on the number and position of the sampling points, but also has a large amount of data, which is time-consuming and labor-intensive. In addition, once the layout of the wafer changes, re-sampling is required to re-predict the offset, and polynomial fitting is an approximate processing algorithm. The graphic offsets at different positions may have large deviations, resulting in the correction results failing to meet the preset accuracy requirements. Summary of the invention

[0005] In view of this, the embodiments of the present application provide a method for correcting wafer pattern offset, a storage medium, and an intelligent device, which can improve the problems that traditional correction methods require a large number of samples, are difficult to apply when the wafer layout changes, and have low prediction accuracy for pattern offset.

[0006] The present application provides a method for correcting wafer pattern deviation, comprising: determining a number of sampling points in the wafer; Get the offset of the sampling graph of the target layer and the previous layer at each sampling point; Obtaining a preset feature vector of the sampling graphic in the target layer; A neural network model is established with the preset feature vector as an input layer and the offset of the sampling pattern as an output layer, wherein the neural network model includes a plurality of hidden layers; The preset loss function is used to calculate the weights and bias parameters of each hidden layer when the loss is minimized; According to the calculated weights and bias parameters of each hidden layer, the simulation offsets of all graphics in the target layer are calculated by simulating the neural network model; All graphics are moved by an offset in a direction opposite to the simulation offset to complete the correction.

[0007] Optionally, the correction method further includes: Dividing the plurality of sampling points into a training set and a test set according to a preset ratio; The weight and bias parameters of each hidden layer are calculated by using a preset loss function when the loss is minimum, including: For the training set, a preset loss function is used to calculate the weights and bias parameters of each hidden layer when the loss is minimum, so as to train the neural network model; Inputting the preset feature vector of the test set into the trained neural network model to verify whether the loss is minimal according to the offset of the output sampling graph; and When the loss is minimum, the weights and bias parameters of each hidden layer obtained based on the training set are applied to the neural network model.

[0008] Optionally, the preset loss function is a root mean square error function, and the loss is expressed as a value of the root mean square error function.

[0009] Optionally, a preset loss function is used to calculate the weights and bias parameters of each hidden layer when the loss is minimized, including: Randomly select a weight and a bias parameter of each hidden layer as the initial parameters; Calculate partial derivatives for the weights and bias parameters of each hidden layer; Through the initial parameters, the partial derivatives and the relation , perform iterative calculation, where represents the weight and bias parameters to be optimized, represents the learning rate, represents partial derivative; When the preset conditions are met, the iterative calculation is stopped, and the final weight and bias parameters are used as the weight and bias parameters when the loss is minimized.

[0010] Optionally, the preset condition includes any one of the following: reaching a preset number of iterations, the partial derivative is less than a first preset value, and the change of the partial derivative is less than a second preset value.

[0011] Optionally, the preset ratio is that the training set accounts for 80% and the test set accounts for 20%.

[0012] Optionally, the preset feature vector includes the following items: horizontal axis coordinate, vertical axis coordinate, graphic length, graphic width, graphic spacing, and graphic density of two or more preset areas.

[0013] Optionally, the preset feature vector includes graphic densities of two or more preset areas, and the sizes of the preset areas are different.

[0014] The present application provides a storage medium storing a correction program, and when the correction program is executed by a processor, the steps of the correction method described in any one of the above items are implemented.

[0015] The present application provides a smart device, comprising the storage medium as described above.

[0016] As described above, the present application predicts the graphic offset through a neural network model, and realizes the offset correction of the entire wafer layout based on the predicted graphic offset. The amount of data required for training and testing the neural network model is small, so the present application does not require a large amount of sampling, and has low requirements on the number and position of sampling points. Even if the wafer layout changes, the prediction can still be achieved, and the neural network model has high prediction accuracy, so the prediction accuracy of the graphic offset is high. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a flowchart of a method for correcting wafer pattern deviation according to an embodiment of the present application; Figure 2 It is a schematic diagram of the relative position of the target layer and the previous layer at the sampling point; Figure 3 It is a schematic diagram of the layer structure of a neural network model provided in an embodiment of the present application; Figure 4 It is a flowchart of testing a neural network model provided in an embodiment of the present application. DETAILED DESCRIPTION

[0018] In order to solve the above existing technical problems, the present application provides a method for correcting wafer pattern offset, a storage medium, and an intelligent device. These protection themes are based on the same concept, and the principles for solving the problems are basically the same or similar. The implementation methods of each protection theme can refer to each other, and the repeated parts will not be repeated.

[0019] In each of the examples provided in the present application, a neural network model is used to predict the graphic offset, and based on the predicted graphic offset, the offset correction of the entire wafer layout is implemented. The amount of data required for training and testing the neural network model is small, and the prediction accuracy is high. Therefore, the present application does not require a large number of wafer samples to achieve a high prediction accuracy for the graphic offset, and even if the wafer layout undergoes significant changes, a high-precision prediction can still be achieved.

[0020] In order to make the purpose, technical solutions and advantages of the present application clearer, the technical solutions of the present application will be clearly described below in conjunction with specific embodiments and corresponding drawings. Obviously, the embodiments described below are only part of the embodiments of the present application, not all of the embodiments. In the absence of conflict, the following embodiments and their technical features can be combined with each other and also belong to the technical solutions of the present application.

[0021] See also Figure 1 As shown, a method for correcting wafer pattern deviation according to an embodiment of the present application, which may be referred to as a “method” or a “correction method”, at least includes the following steps S1 to S7.

[0022] S1: Determine several sampling points in the wafer.

[0023] The so-called wafer pattern offset in the whole application refers to the pattern offset of the current layer relative to the previous layer. There is no so-called offset in the pattern of the first layer of the wafer, or even if there is a position offset relative to the substrate layer, its pattern is complete, and the second layer produced subsequently can be corrected to align with the pattern of the first layer, and finally achieve correct electrical connection.

[0024] Any layer except the first layer can be called the target layer. The previous layer and the target layer are fabricated on the wafer in sequence, and then a series of sampling points are selected on the layout of the target layer. The number of sampling points can be determined according to the adaptability of the requirements. Generally, the more the number, the higher the subsequent prediction accuracy.

[0025] Optionally, the positions of these sampling points cover from the edge area of ​​the target layer to the middle area of ​​the layout. In one example, one or more sampling points are selected in the edge area of ​​the layout, one or more sampling points are selected in the middle area of ​​the layout, one or more transition areas are selected between the edge area and the middle area, and one or more sampling points are selected for each transition area. The distances between adjacent sampling points can be equal, that is, to achieve uniform sampling, or they can be unequal according to the adaptability of the shape of the graphic.

[0026] S2: Get the offset of the sampling graph of the target layer and the previous layer at each sampling point.

[0027] The present application can use an optical microscope, a scanning electron microscope (SEM) or X-ray imaging technology to capture the images of each layer of the wafer, so as to obtain the three-dimensional structural information of each layer of the wafer, including the relative positions between the images of each layer. Here, after completing the target layer, the three-dimensional structural information of the two layers of sampling images at each sampling point can be obtained.

[0028] The so-called sampling graphics refer to the graphics at the sampling points, not all the graphics of the target layer.

[0029] In one example, the offset of the sampling pattern includes: the offset in the horizontal axis direction and the offset in the vertical axis direction for the sampling patterns of the target layer and the previous layer. Figure 2 As shown, the three-dimensional structural information of the target layer and the previous layer at the sampling point is displayed, wherein the dotted line graph represents the sampling graph of the previous layer, and the solid line graph represents the sampling graph of the target layer. A circle in the figure can represent the sampling graph at a sampling point. The present application establishes a plane rectangular coordinate system based on the plane where the wafer is located, selects the upper and lower aligned points of the sampling graphs of the target layer and the previous layer, and the points are called alignment points, and the distance difference d between the alignment points of the two layers in the horizontal axis direction (i.e., the x-axis direction) is obtained. x , as the offset in the horizontal axis direction, obtain the distance difference d between the alignment points of the two layers in the vertical axis direction (i.e., the y-axis direction) y , as the offset in the direction of the ordinate axis.

[0030] S3: Obtain a preset feature vector of the sampled graphic in the target layer.

[0031] In one example, the preset feature vector includes the following items: horizontal axis coordinate, vertical axis coordinate, graphic length, graphic width, graphic spacing, and graphic density of two or more preset areas. The graphic spacing is the distance between adjacent graphics, or the distance between non-adjacent graphics.

[0032] Optionally, the preset feature vector includes the graphic density of two or more preset areas, where the graphic density is what is commonly referred to in the art, and the sizes of the preset areas are different. For example, a first preset area and a second preset area are selected on the target layer, where the first preset area may be in the range of 20 μm*20 μm, and the second preset area may be in the range of 100 μm*100 μm.

[0033] S4: Establishing a neural network model with a preset feature vector as an input layer and an offset of a sampling graph as an output layer, wherein the neural network model includes a plurality of hidden layers.

[0034] Combination Figure 3 As shown, the neural network model of this example includes an input layer, an output layer and two hidden layers, or includes more than two hidden layers. Except for the output layer, each layer includes multiple nodes, also known as neurons, that is, Figure 3 As shown in the circle. Figure 3 The number of nodes shown in each layer is only for illustrative purposes and does not constitute a limitation. The data input through the input layer (referred to as input data) x1, x2, x3, and x4 pass through a series of hidden layers in sequence, and each hidden layer is connected to all nodes of the previous layer. For example, the first hidden layer is connected to all nodes of the input layer, and any node of the second hidden layer is connected to all nodes of the first hidden layer. Here, each node receives input from all nodes of the previous layer, and performs weighted summation on these inputs. Then, through the activation function, the data output through the output layer (referred to as output data) y is the offset of the sampling graph.

[0035] The input data x1, x2, x3, and x4 of each node in the input layer are respectively the preset feature vectors of the sampled graphics in the target layer. The specific type of the neural network model is not limited in this application. An activation function will be applied to any node in each hidden layer. The activation function is used to add nonlinear characteristics to the neural network model, so that no matter how many hidden layers the neural network model has, the output of any hidden layer is a nonlinear combination of the input variables of the hidden layer, and the input variables obtained by the next hidden layer are also a nonlinear combination, which is equivalent to the neural network model being a multi-layer nonlinear model that can learn the characteristics of the sampled graphics. In the example of this application, the activation function includes but is not limited to any one of the logical function Sigmoid, the hyperbolic tangent function Tanh, and the linear rectification function ReLU.‌

[0036] Optionally, any node in each hidden layer performs nonlinear calculation using the following relationship:

[0037]

[0038] in, is the number of hidden layers contained in the neural network model, For the The net input of the layer node, For the The weights corresponding to the layer nodes, For the The bias parameters corresponding to the layer nodes, For the -1 layer node output, and the Through the -1 layer node activation function get, For the The output of the layer node, For the The activation function used by the layer nodes.

[0039] S5: Use the preset loss function to calculate the weights and bias parameters of each hidden layer when the loss is minimized.

[0040] In one example, a root mean square error function (RMSE) is used as the preset loss function, and the loss is expressed as the value of the root mean square error function.

[0041] The preset loss function can be expressed as the following mathematical relationship:

[0042] in, is the value of the root mean square error function, that is, the loss, is the number of samples at the sampling point, is the sample number of the sampling point, For the The predicted values ​​of the weights and bias parameters for the sampling points, For the The true value of the sampling point is the sample feature matrix input at the node of the corresponding hidden layer.

[0043] The loss Reflecting the difference between the predicted value and the true value, the loss The smaller the value of is, the more accurate the prediction of the neural network model is. When it is minimum, the weights and bias parameters of each hidden layer are obtained and applied to the nonlinear calculation of each hidden layer, which can make the simulation offset predicted for all graphics in the target layer most accurate.

[0044] In one example, the preset loss function can be minimized by the following steps S511 to S514, so as to calculate the minimum loss of the preset loss function. .

[0045] S511: Randomly select a weight and a bias parameter of each hidden layer as initial parameters.

[0046] For any hidden layer, there is a predetermined weight matrix and bias parameter matrix, from which a weight and a bias parameter can be randomly selected as initial parameters of the hidden layer.

[0047] S512: Calculate partial derivatives for the weights and bias parameters of each hidden layer respectively.

[0048] The partial derivative is also called the gradient, which points to the direction in which the preset loss function grows fastest. Through the partial derivative, it is possible to change the parameters (i.e., weight and bias parameters) to increase the loss fastest. Here, steps S511 to S514 can also be called the implementation process of the gradient descent algorithm.

[0049] In one example, the partial derivative may be calculated by the following relationship:

[0050] in, represents the partial derivative, is the number of samples at the sampling point, is the sample number of the sampling point, For the The output value of the sampling point, that is, The predicted values ​​of the weights and bias parameters for the sampling points, For the The sample feature matrix of sampling points, For the The hypothesis function used for the sampling points, For the The first Sample characteristics.

[0051] S513: Through initial parameters, partial derivatives and relations , perform iterative calculation, where represents the weight and bias parameters to be optimized, Represents the learning rate.

[0052] For example, assuming the initial parameters is (q, p), q and p are the weight and bias parameters randomly selected in the aforementioned step S511, respectively, and the partial derivative calculated by the relational expression in the aforementioned step S512 is In this case, the partial derivative of the weight is , the partial derivative of the bias parameter is , in each subsequent iterative calculation, the partial derivative calculated by the relational expression in step S512 is Different, as follows: Results of the first iteration ; Results of the second iteration ; Continue to iterate until the preset condition is met at the mth iteration; The result of the mth iteration .

[0053] S514: When the preset conditions are met, the iterative calculation is stopped, and the weight and bias parameters finally obtained are used as the weight and bias parameters when the loss is minimized.

[0054] The number of iterations is limited by the preset conditions, so that endless iterations are not performed, and the amount of calculation can be controlled within an acceptable range while ensuring the accuracy of the prediction results.

[0055] In actual scenarios, the preset conditions include but are not limited to any of the following: reaching a preset number of iterations, the partial derivative is less than a first preset value, and the change of the partial derivative is less than a second preset value. Wherein, the partial derivative is less than the first preset value means that when performing each iterative calculation, the partial derivative calculated by the relational expression in the aforementioned step S512 is is less than the first preset value; the change of the partial derivative is less than the second preset value means that: the partial derivative calculated each time The partial derivative calculated from the previous By comparison, the difference between the two is calculated, and the absolute value of the difference between the two is smaller than the second preset value.

[0056] The final iterative result is used as the minimum loss of the preset loss function , and then according to the mathematical relationship of the loss function preset in the aforementioned step S5, the desired weight and bias parameters can be obtained.

[0057] S6: According to the calculated weights and bias parameters of each hidden layer, the simulation offsets of all graphics in the target layer are calculated through the neural network model simulation.

[0058] By using the weights and bias parameters of each hidden layer when the loss is minimized, and the nonlinear calculation relationship used for the corresponding hidden layer in the aforementioned step S4, the offset of all graphics in the target layer can be simulated and calculated, and the final result is called the simulated offset.

[0059] S7: Move all graphics by an offset in the opposite direction of the simulation offset to complete the correction.

[0060] When the target layer of the wafer is subsequently manufactured, each graphic of the target layer is moved by an offset in the opposite direction of the simulation offset, so that the entire target layer can be aligned with the previous layer, thereby achieving offset correction of the entire target layer. The offset correction of other layers of the wafer is performed according to the same principle, and finally the offset correction of the entire wafer layout can be achieved.

[0061] As can be seen from the above, the present application predicts the graphic offset through a neural network model, and realizes the offset correction of the wafer layout based on the predicted graphic offset. Since the amount of data required by the neural network model is small, there is no need to perform a large number of samples, and the number and position requirements of the sampling points are low. Even if the wafer layout changes to a large extent, the prediction can still be achieved, and the prediction accuracy of the neural network model is high, so the prediction accuracy of the graphic offset is high, making the offset correction result more accurate.

[0062] The present application also provides another method for correcting wafer pattern deviation, please refer to Figure 1 and Figure 4 As shown, Figure 4 and Figure 1 The steps with the same reference numerals may have the same technical features, which will not be described in detail in this application. The correction method at least includes the following steps: S1: Determine several sampling points in the wafer.

[0063] S2: Get the offset of the sampling graph of the target layer and the previous layer at each sampling point.

[0064] S3: Obtain a preset feature vector of the sampled graphic in the target layer.

[0065] S4: Establishing a neural network model with a preset feature vector as an input layer and an offset of a sampling graph as an output layer, wherein the neural network model includes a plurality of hidden layers.

[0066] S520: Divide a number of sampling points into a training set and a test set according to a preset ratio; S521: For the training set, a preset loss function is used to calculate the weights and bias parameters of each hidden layer when the loss is minimum, so as to train the neural network model; S522: Inputting the preset feature vector and offset of the test set into the trained neural network model; S523: Verify whether the loss of the preset loss function is the minimum; and, If yes, execute S524: apply the weights and bias parameters of each hidden layer obtained based on the training set to the neural network model; then execute steps S6 and S7.

[0067] If not, the step S521 can be continued, or the sampling can be re-performed, and the neural network model can be continued to be trained according to the preset feature vector of the sampling point obtained by the re-sampling and the offset of the sampling graph, until the step S523 verifies that the loss is minimal, and then the step S524 is executed.

[0068] S6: According to the calculated weights and bias parameters of each hidden layer, the simulation offsets of all graphics in the target layer are calculated through the neural network model simulation.

[0069] S7: Move all graphics by an offset in the opposite direction of the simulation offset to complete the correction.

[0070] This document uses step codes such as S1, S2, etc., the purpose of which is to express the corresponding content more clearly and concisely, and does not constitute a substantial limitation on the sequence. When implementing the step codes, those skilled in the art may first execute some steps with later sequence numbers, and then execute some steps with earlier sequence numbers, for example, first execute step S520, and then execute steps S2 to S4, but these should all be within the scope of protection of this application.

[0071] This example is equivalent to Figure 1 Step S5 of the method is divided into two processes, one is training the neural network model, and the other is verifying the trained neural network model to evaluate whether the prediction result of the trained neural network model meets the accuracy requirement.

[0072] For the training set, the method of the aforementioned steps S511 to S514 can be used to complete the training of the neural network model, and then for the test set, the aforementioned steps S511 to S514 can be used to minimize the preset loss function, and the obtained loss is compared with the loss obtained based on the training set. If they are the same or the difference is within the preset threshold, it is determined that the trained neural network model meets the accuracy requirements.

[0073] The more sampling features of the training set, the more accurate the prediction results of the trained neural network model, so the number of sampling points in the training set is greater than the number of sampling points in the test set. For example, the preset ratio can be 80% for the training set and 20% for the test set.

[0074] An embodiment of the present application further provides a storage medium having a correction program stored thereon. When the correction program is executed by a processor, the steps of the method for correcting wafer pattern offset as in any example are implemented.

[0075] The storage medium includes but is not limited to any one of a read-only memory (ROM), a random access memory (RAM), a magnetic disk and an optical disk.

[0076] Since the program stored in the storage medium can execute the steps in the wafer pattern offset correction method of any embodiment provided in the present application, the beneficial effects that can be achieved by the correction method of any of the aforementioned embodiments can be achieved. Please refer to the aforementioned embodiments for details and will not be repeated here.

[0077] An embodiment of the present application also provides an intelligent device or chip, including a memory and a processor, wherein a correction program is stored on the memory, and when the correction program is executed by the processor, the steps of the correction method for wafer pattern offset of any of the aforementioned embodiments are implemented; and / or, the intelligent device or chip is provided with a storage medium as exemplified above, and the processor of the intelligent device or chip loads the storage medium to execute the steps of the correction method, so as to achieve the beneficial effects that can be achieved by the correction method of the corresponding embodiment.

[0078] The above descriptions are only some embodiments of the present application, and are not intended to limit the patent scope of the present application. For ordinary technicians in this field, all equivalent structural changes made using the contents of this specification and drawings are also included in the patent protection scope of the present application.

[0079] Although the terms "first, second", etc. are used herein to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. In addition, the singular forms "one", "an", and "the" are intended to include plural forms as well. The terms "or" and "and / or" are interpreted as inclusive, or mean any one or any combination. Only when the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way, an exception to this definition will occur.

Claims

1. A method for correcting wafer pattern deviation, characterized in that: include: determining a number of sampling points in the wafer; Get the offset of the sampling graph of the target layer and the previous layer at each sampling point; Obtaining a preset feature vector of the sampling graphic in the target layer; A neural network model is established with the preset feature vector as an input layer and the offset of the sampling pattern as an output layer, wherein the neural network model includes a plurality of hidden layers; The preset loss function is used to calculate the weights and bias parameters of each hidden layer when the loss is minimized; According to the calculated weights and bias parameters of each hidden layer, the simulation offsets of all graphics in the target layer are calculated by simulating the neural network model; All graphics are moved by an offset in a direction opposite to the simulation offset to complete the correction.

2. The correction method according to claim 1, characterized in that: The correction method also includes: Dividing the plurality of sampling points into a training set and a test set according to a preset ratio; The preset loss function is used to calculate the weights and bias parameters of each hidden layer when the loss is minimized, including: For the training set, a preset loss function is used to calculate the weights and bias parameters of each hidden layer when the loss is minimum, so as to train the neural network model; Inputting the preset feature vector and offset of the test set into the trained neural network model to verify whether the loss is minimal; and, When the loss is minimum, the weights and bias parameters of each hidden layer obtained based on the training set are applied to the neural network model.

3. The correction method according to claim 1 or 2, characterized in that: The preset loss function is a root mean square error function, and the loss is expressed as the value of the root mean square error function.

4. The correction method according to claim 3, characterized in that: The preset loss function is used to calculate the weights and bias parameters of each hidden layer when the loss is minimized, including: Randomly select a weight and a bias parameter of each hidden layer as the initial parameters; Calculate partial derivatives for the weights and bias parameters of each hidden layer; Through the initial parameters, the partial derivatives and the relation , perform iterative calculation, where represents the weight and bias parameters to be optimized, represents the learning rate, represents partial derivative; When the preset conditions are met, the iterative calculation is stopped, and the final weight and bias parameters are used as the weight and bias parameters when the loss is minimized.

5. The correction method according to claim 4, characterized in that: The preset conditions include any one of the following: reaching a preset number of iterations, the partial derivative is less than a first preset value, and the change of the partial derivative is less than a second preset value.

6. The correction method according to claim 2, characterized in that: The preset ratio is that the training set accounts for 80% and the test set accounts for 20%.

7. The correction method according to claim 1, characterized in that: The preset feature vector includes the following items: horizontal axis coordinate, vertical axis coordinate, graphic length, graphic width, graphic spacing, and graphic density of two or more preset areas.

8. The correction method according to claim 7, characterized in that: The preset feature vector includes graphic densities of two or more preset areas, and the sizes of the preset areas are different.

9. A storage medium, characterized in that: A correction program is stored, and when the correction program is executed by a processor, the steps of the correction method according to any one of claims 1 to 8 are implemented.

10. A smart device, characterized in that: Comprising the storage medium as claimed in claim 9.

Images