Band-gap reference circuit

Abstract

The invention belongs to the technical field of integrated circuits, and particularly relates to a band-gap reference circuit which comprises a starting circuit, an operational amplifier, a band-gap main body circuit and a piecewise linear compensation circuit. Wherein the starting circuit is connected with the input end of the operational amplifier and is used for inputting a stable signal; the output end of the operational amplifier is connected with the band-gap main body circuit and is used for amplifying a signal output by the starting circuit; the band-gap main body circuit is used for outputting a band-gap reference signal; the piecewise linear compensation circuit is used for being connected with the output end of the band-gap main body circuit and used for conducting piecewise linear compensation on band-gap reference signals output by the band-gap main body circuit. The temperature coefficient of the band-gap reference source circuit under a TT process corner is only 1.97 ppm / DEG C.

Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a bandgap reference circuit. Background Art

[0002] Precision bandgap references (BGRs) are essential components of many analog, digital, and mixed-signal circuits. In particular, BGRs are widely used together with analog-to-digital converters (ADCs) to detect the state of charge of lithium-ion (Li-Ion) batteries. To avoid overcharging or deep depletion of Li-Ion batteries, many battery monitoring systems aim to achieve ±1% voltage accuracy. In Li-Ion battery charging applications, voltage accuracy of ±3mV is very demanding, otherwise the battery cell will age rapidly. Therefore, high-precision applications, especially Li-Ion battery charging applications, have a great demand for precise bandgap references. However, noise, offset voltage, and temperature drift can degrade the accuracy of the bandgap. Bandgap references are a high-precision, high-stability voltage source that is widely used in various analog, digital-analog mixed integrated circuits.

[0003] A low-power high-order compensated bandgap reference voltage source in the prior art proposes a high-precision CMOS bandgap reference voltage source (BGR) with an upward curvature characteristic using a current mirror circuit; the prior art provides a high-order compensation technology, with a current I REF1 and I REF2 Two references, using I REF1 -I REF2 For high-order compensation, the reference voltage is expressed as V REF =R REF *(I REF1 -I REF2 ), consider using some method to convert I REF2 The curvature of I is reversed, and then REF1 Add together to achieve high-order curvature compensation. Specifically, Figure 1 As shown in the figure, the overall circuit structure diagram of the existing high-order compensation reference voltage source includes two traditional low-voltage BGR core circuits and a temperature correction circuit, as well as a current mirror and a summing circuit. The reference current of the BGR core circuit A is I REF1 , the reference current of BGR core circuit A is I REF2 I REF1 ,I REF2 They only cancel out the first-order temperature-related term and have a downward curvature characteristic. Due to the existence of high-order nonlinear errors, their accuracy is not high. REF2 When passing through the current mirror circuits M2 and M3, a reference current I′ with an upward curvature characteristic is generated. REF1 The new upward curvature characteristic current I′ REF1and the current I with downward curvature REF2 The high-order nonlinearities are added together to achieve mutual compensation, thereby achieving high-order curvature compensation.

[0004] The above prior art adopts a compensation method of high-order temperature compensation to improve the stability of the bandgap reference source. The temperature coefficient of the traditional first-order bandgap reference source is generally high and the stability is poor. Although the existing second-order temperature compensation technology can reduce the temperature coefficient, the accuracy and resolution of its reference voltage are generally poor, and the power supply rejection ratio PSRR is low. Most of the high-order compensation methods currently available are implemented using operational amplifiers, or only compensate for the first-order and part of the high-order terms of vbe. At the same time, the operational amplifier will bring additional power consumption. Therefore, the temperature coefficient and power consumption cannot be reduced. Summary of the invention

[0005] In order to solve the problems existing in the above prior art, the present invention proposes a bandgap reference circuit, which includes: a start-up circuit, an operational amplifier, a bandgap main circuit and a piecewise linear compensation circuit; wherein the start-up circuit is connected to the input end of the operational amplifier for inputting a stable signal; the output end of the operational amplifier is connected to the bandgap main circuit for amplifying the output signal of the start-up circuit; the bandgap main circuit is used to output a bandgap reference signal; the piecewise linear compensation circuit is used to be connected to the output end of the bandgap main circuit for performing piecewise linear compensation on the bandgap reference signal output by the bandgap main circuit.

[0006] Beneficial effects of the present invention:

[0007] The high-order compensation method adopted by the present invention is all based on the subthreshold structure. The high-order temperature characteristics of the emitter junction voltage of the PNP transistor are compensated according to the inherent exponential relationship of the subthreshold region of the MOS tube. Compared with the traditional first-order low-voltage bandgap reference circuit, the bandgap reference circuit has low power consumption. At a voltage of 3.3V, the power consumption is only 1.5uA. The present invention adopts three-stage linear compensation to achieve a better TC improvement effect; the temperature coefficient of the bandgap reference source circuit of the present invention at the TT process angle is only 1.97ppm / ℃. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 The overall circuit structure diagram of the existing high-order compensation reference voltage source is shown;

[0009] Figure 2 is a structural diagram of a bandgap reference circuit of the present invention;

[0010] Figure 3 Generate a circuit diagram for PTAT / CTAT of the present invention;

[0011] Figure 4 It is a structural diagram of the piecewise linear compensation current circuit of the present invention;

[0012] Figure 5 The structure diagram of the resistor network of the present invention;

[0013] Figure 6 This is a first-order compensation idea diagram of the present invention;

[0014] Figure 7 It is a pre-simulation curve diagram of the temperature coefficient of the bandgap reference source of the present invention at three different process angles;

[0015] Figure 8 A pre-simulation curve diagram of the power supply rejection ratio of the bandgap reference source of the present invention;

[0016] Fig. 9 This is a power-on simulation diagram of the bandgap reference source of the present invention. DETAILED DESCRIPTION

[0017] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] A bandgap reference circuit, such as Figure 2 As shown, the circuit structure includes: a start-up circuit, an operational amplifier, a bandgap main circuit and a piecewise linear compensation circuit; wherein the start-up circuit is connected to the input end of the operational amplifier for inputting a stable signal; the output end of the operational amplifier is connected to the bandgap main circuit for amplifying the output signal of the start-up circuit; the bandgap main circuit is used to output a bandgap reference signal; the piecewise linear compensation circuit is used to connect the output end of the bandgap main circuit for performing piecewise linear compensation on the bandgap reference signal output by the bandgap main circuit.

[0019] In this embodiment, the startup circuit includes: two NMOS tubes M1-M2 and a capacitor C2, the positive electrode of the capacitor C2 is connected to the voltage source VDD, and the negative electrode of the capacitor C2 is respectively connected to the drain of M1 and the gate of M2; the gate of M1 is respectively connected to the operational amplifier and the bandgap main circuit, and the source of M1 is grounded; the drain of M2 is connected to the operational amplifier, and the source of M2 is grounded.

[0020] When the startup circuit is working normally, M2 is not conducting. At the beginning of power-on, the gate terminal of M1 is at a low level, and M1 is not conducting. At this time, M2 is at a high level, so M2 is turned on and current is injected. After the circuit works normally, the gate terminal of M1 returns to a high level, which will pull the gate terminal of M2 down to turn off.

[0021] In this embodiment, the operational amplifier includes: four NMOS tubes M3-M6, three triodes Q1-Q3 and a resistor R1; the emitters of Q2 and Q3 are connected to the voltage source VDD, the base of Q2 is connected to the base of Q3, the collector of Q2 and the drain of M5 respectively; the collector of Q3 is connected to the drain of M6; the gate of M5 is connected to the gate of M6, and the source of M5 is connected to the drain of M3; the source of M6 is connected to the drain of M4; the source of M3 is connected to the source of M4 and the collector of Q1 respectively, and the gate of M3 and the gate of M4 are both connected to the bandgap main circuit; the base of Q1 is connected to the bandgap main circuit and the gate of M1 in the startup circuit respectively, and the emitter of Q1 is connected to one end of the resistor R1; the other end of the resistor R1 is grounded.

[0022] The connection relationship between the operational amplifier and the startup circuit is that the collector of Q2 in the operational amplifier is connected to the drain of M2 in the startup circuit; the base of Q1 in the operational amplifier is connected to the drain of M1 in the operational amplifier.

[0023] This operational amplifier is an NMOS input operational amplifier structure with a PNP transistor as load. The advantage of using a PNP transistor as load is that it has a large output impedance, which can increase gain and reduce offset. Q1 is a tail current tube.

[0024] In this embodiment, the bandgap main circuit includes: two transistors Q4~Q5, five resistors R2~R6, an NMOS tube M7 and a capacitor C1; the drain of M7 is connected to the voltage source VDD, the gate of M7 is connected to the operational amplifier, and the source of M7 is respectively connected to one end of the resistor R6 and the positive electrode of the capacitor C1; the other end of the resistor R6 is connected to one end of the resistor R5; the other end of the resistor R5 is respectively connected to the gate of Q4, one end of the resistor R3 and one end of the resistor R4; the other end of the resistor R3 is respectively connected to the collector of Q4 and the base of Q5; the other end of the resistor R4 is connected to the collector of Q5; the emitter of Q4, the emitter of Q5 and the negative electrode of the capacitor C1 are all connected to one end of the resistor R2; the other end of the resistor R2 is grounded.

[0025] The connection relationship between the bandgap main circuit and the operational amplifier includes: the gates of M5 and M6 in the operational amplifier are both connected between resistors R6 and R5 in the bandgap main circuit; the gate of M4 in the operational amplifier is connected to the collector of Q5 in the bandgap main circuit; the gate of M3 in the operational amplifier is connected to the collector of Q4 in the bandgap main circuit; and the base of Q4 in the bandgap main circuit is connected to the base of Q1 in the operational amplifier.

[0026] The bandgap main circuit is an NMOS drive voltage type BGR composed of Q4, Q5, R2~R6, M7 and C1. The area ratio of Q4 and Q5 is 1:N, the resistance of resistors R3 and R4 is equal, and the gate terminals of M3 and M4 are connected to the collectors of Q4 and Q5 respectively to clamp the two collectors to be equal, so a voltage difference will be generated on R3.

[0027] ΔV BE =V BE4 -V BE5 =V T ln N

[0028] Among them, V BE4 is the PN junction voltage between the base and emitter of transistor Q4, V BE5 is the PN junction voltage between the base and emitter of transistor Q5, V T is the thermal voltage, ln N is a constant.

[0029] I flowing through R3 PTAT for:

[0030]

[0031] According to I PTAT The formula is:

[0032]

[0033] Among them, C1 is the Maitreya capacitor, which is used for phase margin compensation. R6 is the trimming resistor. The specific circuit is as follows: Figure 2 As shown, the resistor string uses binary coding to control the total resistance value of the reference circuit by controlling the switch circuit made of MOS tubes, thereby changing the resistance size; there are 4 resistors, which are arranged in series in the order of R, 2R, 4R, and 8R; a switch circuit made of MOS tube is connected in parallel above each resistor, and the two ends of each resistor are connected to the source and drain of MOS, and the switch circuits are connected in series with each other. Because the switch of the resistor string is also composed of MOS tubes, current will also be generated in the switch using PMOS tubes. In order to reduce the influence of leakage current in the trimming circuit Trim on the output resistance, the trimming resistor string should be placed on the output stage branch. The control bit is directly used to control the adjustment circuit unit, and A0~A3 is equivalent to the switch control pin of the trimming control circuit, that is, the gate of each MOS tube is the pin pin. When the pin pin is "0", it means that R is short-circuited, and when it is "1", it means that R is connected to the circuit to adjust the resistance size of the output stage.

[0034] In this embodiment, if Figure 3As shown, a PTAT / CTAT generating circuit includes three PMOS tubes M8, M9, and M12, four NMOS tubes M10, M11, M13, and M14, three resistors R7 to R9, and a transistor Q6; the source of M8 is respectively connected to the source of M9, the source of M12, and one end of the resistor R9, the gate of M8 is connected to the gate of M9, and the drain of M8 is respectively connected to one end of the resistor R7 and the gate of M10; the drain of M9 is connected to M1 1; the other end of resistor R7 is connected to the drain of M10 and the gate of M11 respectively; the gate of M12 is connected to the drain of M12 and the drain of M13 respectively; the other end of resistor R9 is connected to the collector of Q6, the base of Q6 and the gate of M13 respectively; the emitter of Q6 is connected to the drain of M14 and the gate of M14 respectively; the source of M13 is connected to one end of resistor R8; the other end of resistor R8, the source of M10, the source of M11 and the source of M14 are all grounded. The PTAT / CTAT generating circuit is used to generate PTAT current and CTAT current for the piecewise linear compensation circuit.

[0035] The source-drain current formula of the MOS tube in the weak inversion region can be written as:

[0036]

[0037] Where μ is the carrier mobility, C ox is the gate oxide capacitance per unit area of ​​MOSFET, W is the channel width of MOSFET, L is the channel length, V T is the thermal voltage, V GS is the voltage between the gate and the source, V TH is the threshold voltage of the MOS tube.

[0038] At this time, the gate-source voltage is:

[0039]

[0040] Among them, β is

[0041] On the left is the PTAT current generation circuit:

[0042] V GS10 =V GS11 +I PTAT R7

[0043] Among them, V GS10 and V GS11 are the gate-source voltages of M10 and M11, I PTAT is a positive temperature coefficient current.

[0044] Put V GS Substitute into the above formula, we get:

[0045]

[0046] According to the above formula, the current of PTAT is:

[0047]

[0048] Among them, V T It is positively correlated with temperature. The right side is the CTAT circuit, and its expression is:

[0049]

[0050] Among them, V G is the gate potential of M13, I DS13 is the current of M13, β 13 for V BE6 is the base-emitter junction voltage of Q6, I CTAT It is a negative temperature coefficient current.

[0051] CTAT current is negatively correlated with temperature, since V BE It is negatively correlated with temperature, which helps to eliminate V BE Nonlinearity with negative temperature coefficient. Given V BE Negative temperature coefficient

[0052] I1=K4I CTAT -K3I PTAT

[0053] I2=K6I CTAT -K5I PTAT

[0054] I3=K1I PTAT -K2I CTAT

[0055] Among them, I1~I3 are compensation currents, and K1-K6 are adjustable parameters.

[0056] PTAT and CTAT generate three currents with controllable slope and peak value and adjustable in different temperature ranges to compensate the reference voltage generated by the first-order circuit. Figure 6 shown.

[0057] In this embodiment, the piecewise linear compensation circuit is formed by connecting a plurality of compensation circuits in parallel.

[0058] like Figure 4 As shown, the piecewise linear compensation circuit includes three compensation circuits, wherein each compensation circuit has the same structure, and the three compensation circuits are connected in parallel to form a piecewise linear compensation circuit.

[0059] The compensation circuit includes a current source I1, five PMOS tubes M15-M19, and four PMOS tubes MA0-MA3; wherein each source of M15, M16, M17, M18 and M19 is connected to a bias signal VREF, and each gate of M15, M16, M17, M18 and M19 is connected to each other; the drain of M15 is respectively connected to the gate of M15 and the input end of the current source I1; the drain of M16 is connected to the source of MA0; the drain of MA0 is respectively connected to the drains of MA1, MA2 and MA3 and serves as the output end of the compensation circuit, and the gate of MA0 is connected to the A0 signal; the source of MA1 is connected to the drain of M17, and the gate of MA1 is connected to the A1 signal; the source of MA2 is connected to the drain of M18, and the gate of MA2 is connected to the A2 signal; the gate of MA3 is connected to the A3 signal, and the source of MA3 is connected to the drain of M19; the output end of the current source I1 is grounded.

[0060] Figure 4 It is a piecewise linear compensation current circuit. A0~A3 are switches controlled by PMOS tubes. The resistor string uses binary coding. The total current connected to the compensation circuit is controlled by controlling the switch circuit made of MOS tubes, so as to adjust the output bandgap reference voltage value. A0~A3 is equivalent to the switch control pin of the adjustment control circuit, that is, the gate of each MOS tube is the pin. When the pin is "0", the switch is turned on and the branch current flows into the first-order compensation. When it is "1", it means that the branch is cut off and there is no current. Adjust the current size of the output stage. Figure 4 I1, I2, and I3 are obtained by copying and superimposing them to I according to the adjustment coefficient ratio. SUM , and then inject the first-order band gap.

[0061] like Figure 5 As shown, it is a trimming resistor network, which includes four PMOS tubes PM1-PM4 and four resistors, wherein the gates of the four PMOS tubes are respectively connected to the switch control pins A0-A3 of the trimming control circuit; the source of PM4 is connected to one end of the fourth resistor, and the drain of PM4 is respectively connected to the other end of the fourth resistor, one end of the third resistor and the source of PM3; the drain of PM3 is respectively connected to the other end of the third resistor, one end of the second resistor and the source of PM2; the drain of PM2 is respectively connected to the other end of the second resistor, one end of the first resistor and the source of PM1; the drain of PM1 is connected to the other end of the first resistor. The trimming resistor network is used to trim the resistor of the piecewise linear compensation current circuit.

[0062] like Figure 7 As shown, the temperature coefficient at the FF process corner is 1.34ppm / ℃, the temperature coefficient at the SS process corner is 2.86ppm / ℃, and the temperature coefficient at the TT process corner is 1.97ppm / ℃.

[0063] like Figure 8 As shown, at low frequency, when the input power supply voltage is 3V, the power supply rejection ratio is -84.67dB under the FF process corner, the power supply rejection ratio is -83.06dB under the SS process corner, and the power supply rejection ratio is -72.46dB under the TT process corner.

[0064] Fig. 9 This is the power-on simulation of the bandgap reference. After 0.4ms, the reference output can stably output 1.2V.

[0065] The above embodiments further illustrate the purpose, technical solutions and advantages of the present invention in detail. It should be understood that the above embodiments are only preferred implementation modes of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made to the present invention within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A bandgap reference circuit, characterized in that: include: A start-up circuit, an operational amplifier, a bandgap main circuit and a piecewise linear compensation circuit; wherein the start-up circuit is connected to the input end of the operational amplifier for inputting a stable signal; the output end of the operational amplifier is connected to the bandgap main circuit for amplifying the output signal of the start-up circuit; the bandgap main circuit is used to output a bandgap reference signal; the piecewise linear compensation circuit is used to connect the output end of the bandgap main circuit for performing piecewise linear compensation on the bandgap reference signal output by the bandgap main circuit.

2. A bandgap reference circuit according to claim 1, characterized in that: The startup circuit includes: two NMOS tubes M1-M2 and a capacitor C2, the positive electrode of the capacitor C2 is connected to the voltage source VDD, and the negative electrode of the capacitor C2 is respectively connected to the drain of M1 and the gate of M2; the gate of M1 is respectively connected to the operational amplifier and the bandgap main circuit, and the source of M1 is grounded; the drain of M2 is connected to the operational amplifier, and the source of M2 is grounded.

3. A bandgap reference circuit according to claim 1, characterized in that: The operational amplifier comprises: four NMOS tubes M3-M6, three triodes Q1-Q3 and a resistor R1; the emitters of Q2 and Q3 are connected to the voltage source VDD, the base of Q2 is connected to the base of Q3, the collector of Q2 and the drain of M5 respectively; the collector of Q3 is connected to the drain of M6; the gate of M5 is connected to the gate of M6, the source of M5 is connected to the drain of M3; the source of M6 is connected to the drain of M4; the source of M3 is connected to the source of M4 and the collector of Q1 respectively, the gate of M3 and the gate of M4 are connected to the bandgap main circuit; the base of Q1 is connected to the bandgap main circuit and the gate of M1 in the start-up circuit respectively, the emitter of Q1 is connected to one end of the resistor R1; the other end of the resistor R1 is grounded.

4. A bandgap reference circuit according to claim 3, characterized in that: Transistor Q1 is the tail current tube.

5. A bandgap reference circuit according to claim 3, characterized in that: The connection relationship between the operational amplifier and the startup circuit is that the collector of Q2 in the operational amplifier is connected to the drain of M2 in the startup circuit; the base of Q1 in the operational amplifier is connected to the drain of M1 in the operational amplifier.

6. A bandgap reference circuit according to claim 1, characterized in that: The bandgap main circuit includes: two transistors Q4~Q5, five resistors R2~R6, an NMOS tube M7 and a capacitor C1; the drain of M7 is connected to the voltage source VDD, the gate of M7 is connected to the operational amplifier, and the source of M7 is respectively connected to one end of the resistor R6 and the positive electrode of the capacitor C1; the other end of the resistor R6 is connected to one end of the resistor R5; the other end of the resistor R5 is respectively connected to the gate of Q4, one end of the resistor R3 and one end of the resistor R4; the other end of the resistor R3 is respectively connected to the collector of Q4 and the base of Q5; the other end of the resistor R4 is connected to the collector of Q5; the emitter of Q4, the emitter of Q5 and the negative electrode of the capacitor C1 are all connected to one end of the resistor R2; the other end of the resistor R2 is grounded.

7. A bandgap reference circuit according to claim 6, characterized in that: The connection relationship between the bandgap main circuit and the operational amplifier includes: the gates of M5 and M6 in the operational amplifier are both connected between resistors R6 and R5 in the bandgap main circuit; the gate of M4 in the operational amplifier is connected to the collector of Q5 in the bandgap main circuit; the gate of M3 in the operational amplifier is connected to the collector of Q4 in the bandgap main circuit; and the base of Q4 in the bandgap main circuit is connected to the base of Q1 in the operational amplifier.

8. A bandgap reference circuit according to claim 6, characterized in that: The source of M7 in the bandgap main circuit serves as the output terminal of the bandgap main circuit and outputs a bandgap reference signal.

9. The bandgap reference circuit according to claim 1, characterized in that: The piecewise linear compensation circuit is composed of a plurality of compensation circuits connected in parallel.

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