Driving circuit of buck-boost circuit and energy storage system

Abstract

The invention relates to a drive circuit of a buck-boost circuit and an energy storage system, the drive circuit is applied to the buck-boost circuit, and an anti-backflow circuit comprises a detection module and a control module. Wherein the detection module is respectively connected with the buck-boost circuit and the control module, and the control module is also connected with the buck-boost circuit. The detection module is used for acquiring the output current of the buck-boost circuit and outputting a first signal under the condition that the output current is smaller than a preset output threshold value; and the control module is used for controlling the state of a first transistor in the buck-boost circuit to be cut off through the first signal, so as to pre-charge the buck-boost circuit through a body diode of the first transistor. The first transistor is an upper tube of a boost bridge arm in the boost-buck circuit. By adopting the anti-backflow circuit, the backflow phenomenon in the buck-boost circuit can be improved.

Description

[0001] This invention patent application is a divisional application of the Chinese invention patent application with application date of August 5, 2024, application number 2024110633076, and name “Anti-backflow circuit and energy storage system”. Technical Field

[0002] The present application relates to the field of circuit technology, and in particular to a driving circuit and an energy storage system of a buck-boost circuit. Background Art

[0003] Buck-boost circuits are prone to reverse inflow (also known as backflow). Taking the photovoltaic (PV) buck-boost circuit as an example, when the PV source is connected, if the transistor in the PV buck-boost circuit is driven, the voltage on the battery side may flow back to the PV source, which may easily damage the components in the PV buck-boost circuit.

[0004] Therefore, how to improve the backflow phenomenon in the buck-boost circuit is a key research topic for people in this field. Summary of the invention

[0005] Based on this, it is necessary to provide a driving circuit and energy storage system for a buck-boost circuit that can improve the backflow phenomenon in the buck-boost circuit in order to solve the above technical problems.

[0006] In a first aspect, the present application provides an anti-backflow circuit, which is applied to a buck-boost circuit. The anti-backflow circuit includes a detection module and a control module; the detection module is connected to the buck-boost circuit and the control module respectively, and the control module is also connected to the buck-boost circuit;

[0007] A detection module, used for obtaining an output current of the buck-boost circuit and outputting a first signal when the output current is less than a preset output threshold;

[0008] The control module is used to control the state of the first transistor in the buck-boost circuit to be cut off through a first signal, so as to pre-charge the buck-boost circuit through the body diode of the first transistor; the first transistor is the upper tube of the boost bridge arm in the buck-boost circuit.

[0009] In one embodiment, the control module includes a first output unit and a first logic unit, the first logic unit is connected to the detection module and the first output unit respectively, and the first output unit is connected to the buck-boost circuit;

[0010] A first logic unit, configured to generate a first output signal according to the first signal and the acquired boost driving signal;

[0011] The first output unit is used to generate a first control signal according to the first output signal; the first control signal is used to control the state of the first transistor to be cut off.

[0012] In one embodiment, the first logic unit includes a first AND gate;

[0013] The input end of the first AND gate is used to receive a boost driving signal; the output end of the first AND gate is connected to the first input end of the first output unit, and the first input end of the first output unit is also used to receive a first signal; the first output end of the first output unit is connected to the first transistor.

[0014] In one embodiment, the first logic unit further includes a first NOT gate, the first NOT gate is connected to the output terminal of the first AND gate and the second input terminal of the first output unit respectively, and the second output terminal of the first output unit is connected to the second transistor;

[0015] The second transistor is the lower transistor of the boost bridge arm in the boost-buck circuit.

[0016] In one embodiment, the control module further includes a second logic unit and a second output unit, and the second logic unit includes a second AND gate and a second NOT gate;

[0017] The input end of the second AND gate is used to receive the step-down driving signal; the output end of the second AND gate is connected to the first input end of the second output unit, and the first output end of the second output unit is connected to the third transistor;

[0018] The second NOT gate is connected to the output terminal of the second AND gate and the second input terminal of the second output unit respectively, and the second output terminal of the second output unit is connected to the fourth transistor;

[0019] The third transistor and the fourth transistor are transistors of the buck bridge arm in the buck-boost circuit.

[0020] In one of the embodiments, the detection module is further used to obtain the input current of the buck-boost circuit, and output a first overcurrent signal when the input current is greater than a preset input threshold;

[0021] The control module is also used to control the buck-boost circuit to stop working according to the first overcurrent signal.

[0022] In one embodiment, two input ends of the first AND gate receive the boost driving signal and the overcurrent signal output by the detection module respectively, and two input ends of the second AND gate receive the buck driving signal and the overcurrent signal output by the detection module respectively;

[0023] The overcurrent signal includes a first overcurrent signal.

[0024] In one embodiment, the first logic unit further includes a third AND gate; two input terminals of the third AND gate are respectively connected to the output terminal of the first NOT gate and the output terminal of the second NOT gate; the output terminal of the third AND gate is connected to the protection transistor;

[0025] The first end of the protection transistor is connected to the second input end of the first output unit and the second input end of the second output unit respectively, and the second end of the protection transistor is grounded.

[0026] In one of the embodiments, the control module is further configured to control the state of the first transistor according to the acquired boost drive signal when the output current is not less than a preset output threshold.

[0027] In a second aspect, the present application further provides an energy storage system, including a buck-boost circuit and an anti-backflow circuit as described in any of the above items.

[0028] The driving circuit and energy storage system of the above-mentioned buck-boost circuit are applied to the buck-boost circuit, and the anti-backflow circuit includes a detection module and a control module. The detection module is connected to the buck-boost circuit and the control module respectively, and the control module is also connected to the buck-boost circuit. Since the detection module can obtain the output current of the buck-boost circuit and output a first signal when the output current is less than a preset output threshold, and the control module can control the state of the first transistor in the buck-boost circuit to be cut off through the first signal, so as to pre-charge the buck-boost circuit through the body diode of the first transistor, and the first transistor is the upper tube of the boost bridge arm in the buck-boost circuit, in this way, the voltage on the battery side will not be fed back to the other source end of the buck-boost circuit through the first transistor, thereby improving the backflow phenomenon in the buck-boost circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0030] FIG1 is a schematic diagram of the structure of a buck-boost circuit;

[0031] Figure 2 A schematic diagram of the structure of an anti-backflow circuit in an embodiment;

[0032] Figure 3 is a schematic diagram of a detection module in an embodiment;

[0033] Figure 4 is a schematic diagram of the structure of a control module in an embodiment;

[0034] Figure 5 is a structural schematic diagram of yet another control module in an embodiment;

[0035] Figure 6 is a schematic diagram of yet another detection module in an embodiment;

[0036] Figure 7 A schematic diagram of the working process of the anti-backflow circuit in one embodiment;

[0037] Figure 8 FIG. 4 is a schematic diagram of the structure of an energy storage system in one embodiment. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0039] FIG1 is a schematic diagram of a buck-boost circuit, which shows a photovoltaic (PV) buck-boost charging circuit, wherein the buck-boost circuit includes a PV source PV+, a capacitor C3, a transistor Q1, a resistor R2, a transistor Q2, a resistor R5, a diode DZ1, a PV source PV1+, a resistor R9, a triode Q6, a resistor R12, a resistor R17, a capacitor CE1, a resistor R3, a resistor R8, a transistor Q3, a capacitor C1, a resistor R6, an inductor LD1, a resistor R7, a capacitor C2, a transistor Q4, a resistor R4, a capacitor C5, a transistor Q5, a resistor R11, a resistor R14, a resistor R16, a capacitor C4, a resistor R15, a transistor Q7, a resistor R10, a resistor R13, a capacitor CE1, a capacitor CE2, and a battery side BAT+. The transistor Q3, the transistor Q4, the transistor Q5, and the transistor Q7 may be N-type MOS (Metal-Oxide-Semiconductor Field-Effect Transistor).

[0040] Among them, transistor Q3, transistor Q4, transistor Q5 and transistor Q7 and the inductor LD1 therebetween constitute a common four-tube buck-boost structure. Transistor Q3 and transistor Q7 form a buck bridge arm, and transistor Q4 and transistor Q5 form a boost bridge arm. When the buck-boost circuit 100 is in boost mode, transistor Q3 is always on, transistor Q7 is always off, and transistor Q4 and transistor Q5 are complementary turned on. When the buck-boost circuit 100 is in buck mode, transistor Q4 is always on, transistor Q5 is always off, and transistor Q3 and transistor Q7 are complementary turned on.

[0041] Buck_PWM_H is a driving signal for controlling transistor Q3 , Buck_PWM_L is a driving signal for controlling transistor Q7 , Boost_PWM_H is a driving signal for controlling transistor Q4 , and Boost_PWM_L is a driving signal for controlling transistor Q5 .

[0042] In the related art, the driving signals Buck_PWM_H, Boost_PWM_H, Boost_PWM_L and Buck_PWM_L for controlling transistors Q3, Q4, Q5 and Q7 can be determined respectively according to the boost driving signal Boost_PWM and the buck driving signal Buck_PWM issued by the central processing unit (CPU) to control the working state of the boost-boost circuit 100.

[0043] Please continue to refer to Figure 1. When the PV source PV+ is connected, the current should normally flow from the PV source PV+ through the transistor Q1, resistor R2, PV source PV1+, transistor Q3, inductor LD1, transistor Q4 and battery side BAT+. However, the voltage of the battery side BAT+ may flow back to the input end of the solar panel through the transistor Q4, causing damage to the battery or other equipment in the buck-boost circuit. Based on this, it is necessary to provide an anti-backflow circuit, which will be introduced below.

[0044] Figure 2 FIG. 1 is a schematic diagram of a backflow prevention circuit in an embodiment. Figure 2 As shown, the following description will be made by taking the anti-backflow circuit 200 applied to the buck-boost circuit 100 shown in FIG1 as an example. The anti-backflow circuit 200 includes a detection module 201 and a control module 202.

[0045] Among them, the detection module 201 is connected to the buck-boost circuit 100 and the control module 202 respectively, and the control module 202 is also connected to the buck-boost circuit 100. For example, the control module 202 can be connected to the first transistor in the buck-boost circuit 100. The first transistor is the upper tube of the boost bridge arm in the buck-boost circuit 100. Taking Figure 1 as an example, the first transistor is the transistor Q4 in Figure 1.

[0046] In this embodiment, the detection module 201 is used to obtain the output current of the boost-boost circuit 100 and determine the detection signal Boost_H according to the output current and a preset output threshold.

[0047] The detection signal Boost_H includes a first signal or a second signal. On the one hand, the detection module 201 is used to output the first signal when the output current is less than the preset output threshold. On the other hand, the detection module 201 is also used to output the second signal when the output current is not less than the preset output threshold.

[0048] The output current of the buck-boost circuit 100 may include but is not limited to the current across the resistor R18 in Figure 1. The preset output threshold may be set as required, and the following example takes the preset output threshold as 2V.

[0049] Further optionally, the detection module 201 may include a first acquisition unit, a first processing unit and a first comparison unit. The first acquisition unit is connected to the buck-boost circuit 100 , the first processing unit is connected to the first acquisition unit and the first comparison unit respectively, and the first comparison unit is connected to the control module 202 .

[0050] The first acquisition unit is used to acquire the output current, which may include but is not limited to a current sensor. The first processing unit is used to process the output current, and the processed output current is received by the first comparison unit. The first processing unit is used to compare the output current with a preset output threshold to determine the detection signal Boost_H according to the processed output current. For example, if the output current is less than the preset output threshold, the first processing unit outputs a low-level first signal; if the output current is not less than the preset output threshold, the first processing unit outputs a high-level second signal.

[0051] Figure 3 FIG. 1 is a schematic diagram of a detection module in an embodiment, please refer to FIG. 1 and FIG. Figure 3 In (a) of FIG. 1 , the first acquisition unit may include capacitor C6, capacitor C11, resistor R18, resistor R20, resistor R21, and I_PV2in- and I_PV2in+ pins. It is understandable that if the output current of the buck-boost circuit 100 increases, the output current detected by the I_PV2in- and I_PV2in+ pins will also increase.

[0052] like Figure 3 As shown in (b) of FIG. 1 , the I_PV2in- pin and the I_PV2in+ pin send the detected output current to the first processing unit, and the first comparison unit outputs a detection signal Boost_H indicating the magnitude relationship between the output current and the preset output threshold. The first processing unit may include capacitor C12, resistor R24, resistor R25, resistor R27, amplifier U1A, capacitor C10, resistor R29, capacitor C17, capacitor C15, resistor R26, resistor R28, capacitor C14, resistor R30, resistor R31 and capacitor C16. The first processing unit may include a comparator U2A and a capacitor C13.

[0053] Please continue to refer to Figure 3 In (b) of the figure, optionally, when the output current is less than the preset output threshold, the voltage of pin 2 of the comparator U2A is greater than the voltage of pin 3 of U2A, and pin 1 of the comparator U2A outputs a low level, at which time the detection signal Boost_H is the first signal. When the output current is not less than the preset output threshold, the voltage of pin 2 of the comparator U2A is not greater than the voltage of pin 3 of U2A, and pin 1 of the comparator U2A outputs a high level, at which time Boost_H is the second signal.

[0054] For example, please refer to Figures 1 and Figure 2 After the PV source PV+ is connected, if the voltage of PV+ is lower than the voltage of BAT+ on the battery side, the buck-boost circuit 100 is in the boost mode, the transistor Q3 is always on, the transistor Q7 is always off, and PV_EN is not enabled. At this time, the transistor Q4 and the transistor Q5 are controlled by Boost_PWM_H and Boost_PWM_L respectively, and enter the charging state. After that, the current detected by the I_PV2in+ pin and the I_PV2in- pin slowly rises. When the current detected by the I_PV2in+ pin and the I_PV2in- pin is less than 2A, the voltage of 1.25V at the I_PV2 point is divided by the resistor R26 and the resistor R28 to the voltage of the 3rd pin of the comparator U2A is 1.04V, and the voltage of the 2nd pin of the comparator U2A is divided by the resistor R30 and the resistor R31 to 1.24V, the comparator U2A flips, and Boost_H is the first signal of low level. On the contrary, when the current detected by the I_PV2in+ pin and the I_PV2in- pin is not less than 2A, that is, in the normal charging condition, the comparator U2A does not flip, and Boost_H is the second signal of high level.

[0055] Furthermore, when the output current of the boost-boost circuit 100 is less than a preset output threshold, the control module 202 is used to control the state of the first transistor in the boost-boost circuit 100 to be cut off through a first signal, so as to pre-charge the boost-boost circuit 100 through the body diode of the first transistor.

[0056] Continuing with the above example, when the current detected by the I_PV2in+ pin and the I_PV2in- pin is less than 2A, the detection signal Boost_H is a first signal of a low level, and the control module 202 can receive the first signal and control the state of the transistor Q4 in the boost-boost circuit 100 to be turned off according to the first signal. Optionally, after receiving the first signal, the control module 202 can pull down the drive signal Boost_PWM_H to control the state of the transistor Q4 to be turned off.

[0057] After the state of transistor Q4 in the buck-boost circuit 100 is turned off, the buck-boost circuit 100 can be precharged through the body diode of transistor Q4. In this way, on the one hand, after the state of transistor Q4 is turned off, it is prevented that the voltage of the battery side BAT+ is reversely fed to the PV source PV+ through transistor Q4, inductor LD1, transistor Q3, transistor Q2 and transistor Q1 in sequence when the PV source PV+ is just connected. On the other hand, a small part of the current in the buck-boost circuit 100 can still be precharged for the buck-boost circuit 100 through the body diode of transistor Q4, so that the output current of the buck-boost circuit 100 continues to increase.

[0058] In an exemplary embodiment, optionally, the control module 202 is further configured to control the state of the first transistor according to the acquired boost driving signal when the output current is not less than a preset output threshold.

[0059] Continuing with the above example, the output current of the boost-boost circuit 100 continues to increase. When the current detected by the I_PV2in+ pin and the I_PV2in- pin is not less than 2A, the detection signal Boost_H is a second signal of a high level. After receiving the second signal, the control module 202 can determine that the output current is not less than the preset output threshold. In this case, the control module 202 controls the state of the first transistor according to the acquired boost drive signal.

[0060] The boost driving signal refers to a driving signal for controlling the buck-boost circuit 100 to be in a boost mode, such as Boost_PWM. Optionally, the control module 202 may receive a boost driving signal sent by other devices, such as a CPU.

[0061] Since the control module 202 can control the state of the transistor Q4 according to the acquired boost driving signal Boost_PWM when the output current is not less than the preset output threshold, this will not affect the continued stable operation of the boost-boost circuit 100.

[0062] The anti-backflow circuit provided above is applied to the buck-boost circuit, and the anti-backflow circuit includes a detection module and a control module. The detection module is connected to the buck-boost circuit and the control module respectively, and the control module is also connected to the buck-boost circuit. Since the detection module can obtain the output current of the buck-boost circuit and output a first signal when the output current is less than a preset output threshold, and the control module can control the state of the first transistor in the buck-boost circuit to be cut off through the first signal, so as to pre-charge the buck-boost circuit through the body diode of the first transistor, and the first transistor is the upper tube of the boost bridge arm in the buck-boost circuit, in this way, the voltage on the battery side will not be fed back to the other source end of the buck-boost circuit through the first transistor, thereby improving the backflow phenomenon in the buck-boost circuit.

[0063] Figure 4 FIG. 1 is a schematic diagram of a control module in an embodiment. Figure 4 As shown, the control module 202 includes a first logic unit 401 and a first output unit 402 . The first logic unit 401 is connected to the detection module 201 and the first output unit 402 respectively, and the first output unit 402 is connected to the buck-boost circuit 100 .

[0064] Optionally, the first logic unit 401 may receive the detection signal Boost_H and the boost drive signal Boost_PWM, and output according to the detection signal Boost_H and the boost drive signal Boost_PWM. Afterwards, the first output unit 402 determines Boost_PWM_H according to the output of the first logic unit 401, and controls the first transistor according to the Boost_PWM_H output by the first output unit 402.

[0065] The following describes a case where the output current is less than a preset output threshold. In this case, the first logic unit 401 is used to generate a first output signal according to the first signal and the acquired boost drive signal. The first output unit 402 is used to generate a first control signal according to the first output signal, wherein the first control signal is used to control the state of the first transistor to be cut off.

[0066] Continuing with the above example, when the output current is less than the preset output threshold, the detection signal Boost_H is a low-level first signal, and no matter whether the boost drive signal Boost_PWM is high or low, the output of the first logic unit 401 will be pulled down by the first signal, so the first logic unit 401 will output a low-level first output signal. Furthermore, the first output unit 402 generates a low-level first control signal Boost_PWM_H according to the first output signal, and the first control signal Boost_PWM_H is used to control the state of the transistor Q4 to be cut off, so as to pre-charge the boost-boost circuit 100 through the body diode of the transistor Q4.

[0067] In the above embodiment, the control module includes a first output unit and a first logic unit, the first logic unit is connected to the detection module and the first output unit respectively, and the first output unit is connected to the buck-boost circuit. Since the first logic unit can generate a first output signal according to the first signal and the acquired boost drive signal, the first output unit can generate a first control signal according to the first output signal, and the first control signal is used to control the state of the first transistor to be cut off, therefore, when the output current is less than the preset output threshold, the state of the first transistor in the buck-boost circuit can be controlled to be cut off through the first signal, so as to pre-charge the buck-boost circuit through the body diode of the first transistor, thereby improving the backflow phenomenon in the buck-boost circuit.

[0068] The following describes a case where the output current is not less than a preset output threshold. In this case, the first logic unit 401 is used to generate a second output signal according to the second signal and the acquired boost drive signal. The first output unit 402 is used to generate a second control signal according to the second output signal. The second control signal is used to control the state of the first transistor according to the boost drive signal.

[0069] Continuing with the above example, when the output current is not less than the preset output threshold, the detection signal Boost_H is a second signal of a high level, and the output of the first logic unit 401 will follow the change of the boost drive signal, so the first logic unit 401 will output a second output signal that follows the boost drive signal. Furthermore, the first output unit 402 generates a second control signal that is the same as the boost drive signal according to the second output signal, and the second control signal can be used to control the state of the transistor Q4 according to the boost drive signal Boost_PWM.

[0070] Figure 5 FIG. 1 is a schematic diagram of a structure of another control module in an embodiment. In an exemplary embodiment, optionally, please refer to Figure 5 , the first logic unit 401 includes a first AND gate U3B. The first output unit 402 is also Figure 5 The first output unit U6 in.

[0071] The input end of the first AND gate U3B is used to receive the boost driving signal Boost_PWM. The output end of the first AND gate U3B is connected to the first input end HIN of the first output unit 402. The first input end HIN of the first output unit 402 is also used to receive the detection signal Boost_H. That is, the output end of the first AND gate U3B is also connected to the first input end HIN of the first output unit 402. Figure 3 The 1st pin (output terminal) of the comparator U2A in the circuit is connected to receive the detection signal Boost_H, that is, Figure 5 Boost_H in is related to Figure 3 The first output terminal HO of the first output unit 402 is connected to the transistor Q4.

[0072] If the output current is less than the preset output threshold, the output terminal of the first AND gate U3B outputs a high level or a low level, that is, no matter whether the boost driving signal Boost_PWM is a high level or a low level, the first control signal received by the first input terminal HIN of the first output unit 402 is always pulled down to a low level by the first signal. Furthermore, the first output terminal HO of the first output unit 402 will follow the first input terminal HIN of the first output unit 402 to output the low level first control signal Boost_PWM_H.

[0073] If the output current is not less than the preset output threshold, Boost_H is a second signal of high level, and the second control signal received by the first input terminal HIN of the first output unit 402 always follows the boost drive signal Boost_PWM. If the boost drive signal Boost_PWM is high level, the output terminal of the first AND gate U3B outputs a high level, and the second control signal received by the first input terminal HIN of the first output unit 402 is high level. If the boost drive signal Boost_PWM is low level, the output terminal of the first AND gate U3B outputs a low level, and the second control signal received by the first input terminal HIN of the first output unit 402 is low level. Furthermore, the first output terminal HO of the first output unit 402 will follow the first input terminal HIN of the first output unit 402 to output the second control signal Boost_PWM_H that follows the boost drive signal Boost_PWM.

[0074] In the above embodiment, since the first logic unit includes a first AND gate, the input end of the first AND gate is used to receive the boost drive signal, the output end of the first AND gate is connected to the first input end of the first output unit, the first input end of the first output unit is also used to receive the first signal, and the first output end of the first output unit is connected to the first transistor, therefore, the first logic unit can generate a first output signal according to the first signal and the acquired boost drive signal, so that the first output unit can generate a first control signal according to the first output signal.

[0075] In an exemplary embodiment, optionally, the first logic unit 401 further includes a first NOT gate U7, the first NOT gate U7 is respectively connected to the output end of the first AND gate U3B and the second input end LIN of the first output unit 402, and the second output end LO of the first output unit 402 is connected to the second transistor. The second transistor is the lower tube of the boost bridge arm in the boost-boost circuit, and taking FIG. 1 as an example, the second transistor is the transistor Q5 in FIG. 1. That is, the second output end LO of the first output unit 402 is connected to the transistor Q5.

[0076] In this way, the output of the first NOT gate U7 is always opposite to the output of the first AND gate U3B, that is, the second input terminal LIN of the first output unit 402 receives a signal opposite to the boost drive signal Boost_PWM, and then the second output terminal LO of the first output unit 402 follows the second input terminal LIN of the first output unit 402, so that the Boost_PWM_L output by the second output terminal LO of the first output unit 402 is opposite to the Boost_PWM_H output by the first output terminal LO of the first output unit 402, so as to realize the complementary conduction of the subsequent transistor Q5 and the transistor Q4.

[0077] In the above embodiment, since the first logic unit also includes a first NOT gate, the first NOT gate is respectively connected to the output end of the first AND gate and the second input end of the first output unit, the second output end of the first output unit is connected to the second transistor, and the second transistor is the lower tube of the boost bridge arm in the boost-buck circuit. Therefore, the first transistor can also be controlled through the first logic unit and the first output unit.

[0078] In an exemplary embodiment, please continue to refer to 5, optionally, the control module 202 further includes a second logic unit and a second output unit U4. The second logic unit includes a second AND gate U3A and a second NOT gate U5.

[0079] The input end of the second AND gate U3A is used to receive the acquired buck driving signal Buck_PWM. The output end of the second AND gate U3A is connected to the first input end HIN of the second output unit U4, and the first output end HO of the second output unit U4 is connected to the third transistor. The second NOT gate U5 is respectively connected to the output end of the second AND gate U3A and the second input end LIN of the second output unit U4, and the second output end LO of the second output unit U4 is connected to the fourth transistor.

[0080] Among them, the buck driving signal Buck_PWM refers to a driving signal for controlling the buck-boost circuit 100 to be in a boost mode. Optionally, the control module 202 can receive a buck driving signal sent by other devices, such as a CPU. The third transistor and the fourth transistor are transistors of the buck bridge arm in the buck-boost circuit. Taking Figure 1 as an example, the third transistor is the transistor Q3 in Figure 1, and the fourth transistor is the transistor Q7 in Figure 1.

[0081] Similar to the principle of the first logic unit 401 and the first output unit 402, the output end of the second AND gate U3A follows the buck driving signal Buck_PWM, the first input end HIN of the second output unit U4 follows the buck driving signal Buck_PWM, and the first output end HO of the second output unit U4 follows the first input end HIN of the second output unit U4, so that Bcuk_PWM_H output by the first output end HO of the second output unit U4 will follow the buck driving signal Buck_PWM.

[0082] Exemplarily, if the buck driving signal Buck_PWM is at a high level, the first output terminal HO of the second output unit U4 outputs a high level Bcuk_PWM_H to control the transistor Q3 to be turned on. If the buck driving signal Buck_PWM is at a low level, the first output terminal HO of the second output unit U4 outputs a low level Bcuk_PWM_H to control the transistor Q3 to be turned off.

[0083] Similarly, the output end of the second NOT gate U5 is opposite to the output end of the second AND gate U3A, that is, the output end of the second NOT gate U5 is opposite to the buck drive signal Buck_PWM, and the second output end LO of the second output unit U4 follows the second input end LIN of the second output unit U4, so that the Bcuk_PWM_L output by the second output end LO of the second output unit U4 will be opposite to the buck drive signal Buck_PWM to achieve complementary conduction of the subsequent transistor Q3 and the transistor Q7.

[0084] In the above embodiment, the control module also includes a second logic unit and a second output unit. Since the second logic unit includes a second AND gate and a second NOT gate, and the input end of the second AND gate is used to receive the buck drive signal, the output end of the second AND gate is connected to the first input end of the second output unit, the first output end of the second output unit is connected to the third transistor, the second NOT gate is respectively connected to the output end of the second AND gate and the second input end of the second output unit, the second output end of the second output unit is connected to the fourth transistor, and the third transistor and the fourth transistor are transistors of the buck bridge arm in the buck-boost circuit. Therefore, the control of the third transistor and the fourth transistor can also be achieved through the control module.

[0085] In an exemplary embodiment, optionally, the detection module 201 is further configured to obtain an input current of the buck-boost circuit, and output a first overcurrent signal when the input current is greater than a preset input threshold.

[0086] In this embodiment, the detection module 201 is also used to obtain the input current of the buck-boost circuit 100, and determine the overcurrent signal PV_EN1 according to the input current and the preset input threshold. The overcurrent signal PV_EN1 includes a first overcurrent signal or a second overcurrent signal. On the one hand, the detection module 201 is used to output the first overcurrent signal when the input current is greater than the preset input threshold. On the other hand, the detection module 201 is also used to output the second overcurrent signal when the input current is not greater than the preset input threshold.

[0087] The input current of the buck-boost circuit 100 may include but is not limited to the current across the resistor R19 in Figure 1. The preset input threshold may be set as required, and the following example takes the preset input threshold as 13.5V.

[0088] Optionally, the detection module 201 may further include a second acquisition unit, a second processing unit and a second comparison unit. The second acquisition unit is connected to the buck-boost circuit 100 , the second processing unit is connected to the second acquisition unit and the second comparison unit respectively, and the second comparison unit is connected to the control module 202 .

[0089] The second acquisition unit is used to acquire the input current, which may include but is not limited to a current sensor. The second processing unit is used to process the input current, and the processed input current is received by the second comparison unit. The second processing unit is used to compare the input current with the preset input threshold according to the processed input current to determine the overcurrent signal PV_EN1. If the input current is greater than the preset input threshold, the second processing unit outputs a low-level first overcurrent signal; if the input current is not greater than the preset input threshold, the second processing unit outputs a high-level second overcurrent signal.

[0090] Figure 6 FIG. 1 is a schematic diagram of another detection module in an embodiment, please refer to FIG. 1 and FIG. Figure 6 In (a) of FIG. 1 , the second acquisition unit may include capacitor C7, capacitor C8, resistor R22, resistor R23, and I_PV1in- and I_PV1in+ pins. It is understandable that if the input current of the buck-boost circuit 100 increases, the current detected by the I_PV2in- and I_PV2in+ pins will also increase.

[0091] like Figure 6 As shown in (b) of FIG. 1 , the I_PV2in- pin and the I_PV2in+ pin send the detected input current to the second processing unit, and the second comparison unit outputs an overcurrent signal PV_EN1 indicating the magnitude relationship between the input current and the preset input threshold. The second processing unit may include capacitors C20, C21, resistors R36, R37, R39, amplifier U1B, capacitor C23, resistor R40, capacitor C22, diode DS2, resistor R38, resistor R35, capacitor C19, resistor R34, capacitor C18, and resistor R33. The first processing unit may include a comparator U2B, a diode DS1, and a resistor R32.

[0092] Please continue to refer to Figure 3 In Figure (b), when the input current is greater than the preset input threshold, the voltage at pin 6 of comparator U2B is greater than the voltage at pin 5 of U2B, and pin 7 of comparator U2B outputs a low level. At this time, the overcurrent signal PV_EN1 is the first overcurrent signal. When the input current is not greater than the preset input threshold, the voltage at pin 6 of comparator U2B is not greater than the voltage at pin 5 of U2B, and pin 7 of comparator U2B outputs a high level. At this time, the overcurrent signal PV_EN1 is the second overcurrent signal.

[0093] For example, please refer to Figures 1 and Figure 6, when the charging current, that is, the input current of the buck-boost circuit is not greater than the preset input threshold, the current detected by the I_PV1in+ pin and the I_PV1in- pin passes through I_PV1IN and the diode DS2 to the 6th pin of the comparator U2B in turn, and the voltage of the 5th pin of the comparator U2B passes through the resistor R33 and the resistor R34 in series, and the voltage of 0.91V is obtained, which is less than the voltage of the 6th pin of the comparator U2B, and the 7th pin of U2B does not flip, and PV_EN1 is pulled up to 5V. Similarly, when the buck-boost circuit 100 has an overcurrent or short circuit, the voltage of the 6th pin of the comparator U2B is greater than the voltage of the 5th pin of U2B, the 7th pin of the comparator U2B flips, and PV_EN1 is pulled down.

[0094] Furthermore, the control module 202 is also used to control the buck-boost circuit 100 to stop working according to the first overcurrent signal. For example, when the control module 202 receives the first overcurrent signal, it can control the boost drive signal Boost_PWM and the buck drive signal Buck_PWM to be low level to control the buck-boost circuit 100 to stop working.

[0095] In the above embodiment, since the detection module can also obtain the input current of the buck-boost circuit and output a first overcurrent signal when the input current is greater than a preset input threshold, so that the control module can control the buck-boost circuit to stop working according to the first overcurrent signal, the buck-boost circuit can be stopped in time when the input current of the buck-boost circuit is abnormal, thereby improving the safety of the buck-boost circuit.

[0096] In an exemplary embodiment, please continue to refer to Figure 5 Optionally, the two input ends of the first AND gate U3B respectively receive the boost drive signal Boost_PWM and the overcurrent signal PV_EN1 output by the detection module 201, and the two input ends of the second AND gate U3A respectively receive the buck drive signal Buck_PWM and the overcurrent signal PV_EN1 output by the detection module 201.

[0097] like Figure 5 As shown, when the input current of the buck-boost circuit is greater than the preset input threshold, the overcurrent signal PV_EN1 is low, the output end of the first AND gate U3B and the output end of the second AND gate U3A are both pulled low, and then the first input end HIN of the first output unit 402 and the first input end HIN of the second output unit U6 are both pulled low, so that the first output end HO of the first output unit 402 and the first output end HO of the second output unit U6 both output low levels, that is, Buck_PWM_H and Boost_PWM_H are both low levels, so as to control the states of the transistors Q3 and Q4 to be cut off. In this way, the buck-boost circuit 100 can be controlled to stop working.

[0098] In one embodiment, when the input current of the buck-boost circuit is not greater than the preset input threshold, the overcurrent signal PV_EN1 is at a high level, the output end of the first AND gate U3B continues to follow the boost drive signal Boost_PWM, and the output end of the second AND gate U3A continues to follow the buck drive signal Buck_PWM. The working principle is the same as that of the above embodiment and will not be repeated here.

[0099] In the above embodiment, since the two input ends of the first AND gate respectively receive the boost drive signal and the overcurrent signal output by the detection module, and the two input ends of the second AND gate respectively receive the buck drive signal and the overcurrent signal output by the detection module, and the overcurrent signal includes the first overcurrent signal, therefore, when the input current is greater than the preset input threshold, the control module can control the buck-boost circuit to stop working according to the first overcurrent signal.

[0100] In an exemplary embodiment, please continue to refer to Figure 5 Optionally, the first logic unit 401 also includes a third AND gate U3C.

[0101] The two input terminals of the third AND gate U3C are respectively connected to the output terminal of the first NOT gate U7 and the output terminal of the second NOT gate U5; the output terminal of the third AND gate U3C is connected to the protection transistor Q8. The first terminal of the protection transistor Q8 is respectively connected to the second input terminal LIN of the first output unit 402 and the second input terminal LIN of the second output unit U4, and the second terminal of the protection transistor Q8 is grounded.

[0102] In an exemplary embodiment, please continue to refer to Figure 5 , further optionally, the first logic unit 401 further includes a resistor R48 and a resistor R49. The resistor R48 is connected to the output end of the third AND gate U3C and the gate of the protection transistor Q8 respectively; the first end of the resistor R49 is arranged between the resistor R48 and the source of the protection transistor Q8; the source of the protection transistor Q8 is grounded, and the drain of the protection transistor Q8 is connected to the second input end LIN of the second output unit U4 and the second input end LIN of the first output unit 402 respectively.

[0103] Continuing with the above example, when the input current of the buck-boost circuit is greater than the preset input threshold, PV_EN1 is at a low level, the output of the first NOT gate U7 and the output of the second NOT gate U5 are both at a high level, thereby making the output of the third AND gate U3C at a high level.

[0104] When the output terminal of the third AND gate U3C is at a high level, the protection transistor Q8 is turned on. Since the second terminal of the protection transistor Q8 is grounded, under the action of the protection transistor Q8, the second input terminal LIN of the first output unit 402 and the second input terminal LIN of the second output unit U4 are both pulled down to a low level, so that the second output terminal LO of the first output unit 402 and the second output terminal LO of the second output unit U6 both output a low level, that is, Buck_PWM_L and Boost_PWM_L are at a low level, so as to control the states of the transistor Q7 and the transistor Q5 to be cut off.

[0105] In the above embodiment, the first logic unit further includes a third AND gate. Since the two input ends of the third AND gate are respectively connected to the output end of the first NOT gate and the output end of the second NOT gate, the output end of the third AND gate is connected to the protection transistor, the first end of the protection transistor is respectively connected to the second input end of the first output unit and the second input end of the second output unit, and the second end of the protection transistor is grounded, the buck-boost circuit can be timely and safely controlled to stop working through the protection transistor to prevent mis-conduction.

[0106] In an exemplary embodiment, optionally, the control module 202 may further include at least one of the following:

[0107] (1) A first adjustment unit, used for adjusting the dead time of the first transistor, the first adjustment unit is located between the output terminal of the first AND gate U3B and the first input terminal HIN of the first output unit 402. For example, please continue to refer to Figure 5 The first adjustment unit may include a diode DS6, a resistor R46 and a capacitor C32. The dead time of the transistor Q4 may be adjusted by adjusting the resistor R46 and / or the capacitor C32.

[0108] (2) A second adjustment unit, used for adjusting the dead time of the second transistor, the second adjustment unit is located between the output terminal of the first NOT gate U7 and the second input terminal LIN of the first output unit 402. For example, please continue to refer to Figure 5 The second adjustment unit may include a diode DS7, a resistor R47 and a capacitor C35. The dead time of the transistor Q5 may be adjusted by adjusting the resistor R47 and / or the capacitor C35.

[0109] (3) A third adjustment unit, used for adjusting the dead time of the third transistor, the third adjustment unit is located between the output terminal of the second AND gate U3A and the first input terminal HIN of the second output unit U4. For example, please continue to refer to Figure 5 The third adjustment unit may include a diode DS3, a resistor R42, and a capacitor C28. The dead time of the transistor Q3 may be adjusted by adjusting the resistor R42 and / or the capacitor C28.

[0110] (4) A fourth adjustment unit, used for adjusting the dead time of the fourth transistor, the fourth adjustment unit is located between the output terminal of the second NOT gate U5 and the second input terminal LIN of the second output unit U4. For example, please continue to refer to Figure 5 The fourth adjustment unit may include a diode DS4, a resistor R44 and a capacitor C30. The dead time of the transistor Q7 may be adjusted by adjusting the resistor R44 and / or the capacitor C30.

[0111] In this way, the dead time control of pulse width modulation (PWM) can be realized when Buck_PWM and Boost_PWM are used for buck-boost. For example, when the dead time control of the CPU is improper, the corresponding dead time can be increased to improve the fault tolerance of the transistors in the buck-boost circuit.

[0112] Please refer to Figure 1. Figure 3 , Figure 5 , Figure 6 and Figure 7 ,like Figure 4 As shown, after the PV source PV+ is connected, if the voltage of PV+ is less than the voltage of BAT+, the buck-boost circuit 100 is in the boost mode, the transistor Q3 is normally off, the transistor Q7 is normally on, and PV_EN is not enabled. At this time, the driving of the transistor Q4 and the transistor Q5 is controlled by the CPU, and the charging state is entered, and the output current rises slowly.

[0113] When the input current is not greater than the preset input threshold, PV_EN1 is at a high level, and the first AND gate U3B outputs normally. If the output current is less than the preset output threshold, the detection signal BOOST_H is at a low level, and the Boost_PWM_H output by the first output unit 402 is long low. Boost_PWM_L is a PWM signal complementary to the boost drive signal Boost_PWM to control the transistor Q4 to turn off, and the transistor Q5 acts according to Boost_PWM_L.

[0114] In this case, the circuit of the buck-boost circuit 100 has the PV source PV+ passing through the transistor Q1, the resistor R2, the PV source PV1+, the transistor Q3, the inductor LD1 and the Q4 body diode to reach the battery side BAT+. Afterwards, the current across the resistor R18, that is, the output current of the buck-boost circuit 100, slowly increases from 0A, PV_EN is high, the transistor Q6 is turned on, the resistor R9 is pulled down, and the transistors Q1 and Q2 are clamped at 11V by the diode DZ1 and turned on, thereby realizing the pre-charging process.

[0115] If the output current is not less than the preset output threshold, the detection signal Boost_H maintains the level of the previous cycle, that is, the detection signal Boost_H follows the boost drive signal Boost_PWM. At this time, Boost_PWM_H and Boost_PWM_L control transistors Q4 and Q5 to boost normally according to the boost drive signal Boost_PWM.

[0116] Similarly, when the voltage of PV+ is greater than the voltage of BAT+, the buck-boost circuit 100 is in buck mode. If the output current is less than the preset output threshold, the detection signal Boost_H is output as a low level, the Boost_PWM_H output is low, the transistor Q4 is turned off, and the current of the buck-boost circuit 100 first flows through the internal diode of the transistor Q4, and the transistor Q5 is normally turned off according to the Boost_PWM_L signal.

[0117] If the output current is not less than the preset output threshold, Boost_H maintains the level of the previous cycle. Figure 5 As shown, the detection signal Boost_H follows the boost driving signal Boost_PWM to be long high level, the transistor Q4 is long turned on, Boost_PWM_L is controlled to be long low, and the transistor Q5 is normally turned off. The transistors Q3 and Q7 are alternately closed to realize the step-down process.

[0118] It can be seen that this embodiment can control the buck-boost circuit through two boost drive signals Boost_PWM and buck drive signal Buck_PWM, which does not occupy much resources of the MCU and is easy to control. It can also realize the enable control through the overcurrent signal PV_EN1, realize the backflow prevention through the detection signal Boost_H, and realize the mutual conduction prevention of the same bridge arm through the protection transistor Q8.

[0119] Figure 7 The schematic diagram of the working process of the anti-backflow circuit in one embodiment is as follows. In one embodiment, it can be determined whether the input current of the buck-boost circuit is greater than the preset input threshold. If the input current is greater than the preset input threshold, the buck-boost circuit is controlled to stop working. If the input current is not greater than the preset input threshold, it is further determined whether the output current of the buck-boost circuit is less than the preset output threshold. If the output current of the buck-boost circuit is less than the preset output threshold, the transistor Q4 is controlled to be cut off, and the current of the buck-boost circuit flows through the body diode of the transistor Q4. If the output current of the buck-boost circuit is not less than the preset output threshold, when the buck-boost circuit is in the boost mode, the transistor Q3 is controlled to be normally turned on, the transistor Q7 is normally turned off, and the transistor Q4 and the transistor Q5 are complementary turned on; when the buck-boost circuit is in the buck mode, the transistor Q4 is controlled to be normally turned on, the transistor Q5 is normally turned off, and the transistor Q3 and the transistor Q7 are complementary turned on.

[0120] Figure 8 FIG. 1 is a schematic diagram of the structure of an energy storage system in an embodiment. Figure 8 As shown, in one embodiment, an energy storage system 800 is further provided. The energy storage system 800 includes a buck-boost circuit 100 and an anti-backflow circuit 200 as described above.

[0121] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0122] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0123] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A driving circuit of a buck-boost circuit, characterized in that: The driving circuit is used to determine the transistor driving signal according to the acquired boost driving signal and buck driving signal to control the working state of the buck-boost circuit; The transistor drive signal is used to control the transistors of the boost bridge arm and the buck bridge arm in the boost-buck circuit, the boost drive signal is used to control the upper tube and the lower tube in the boost bridge arm; the buck drive signal is used to control the upper tube and the lower tube in the buck bridge arm.

2. The driving circuit according to claim 1, characterized in that: The driving circuit comprises a control module, the control module comprises a first logic unit, a first output unit, a second logic unit and a second output unit, the first logic unit is connected to the first output unit, and the second logic unit is connected to the second output unit; The first logic unit is used to receive the boost driving signal, and the second logic unit is used to receive the buck driving signal; The first output terminal of the first output unit is connected to the first transistor, and the second output terminal of the first output unit is connected to the second transistor; The first output terminal of the second output unit is connected to the third transistor, and the second output terminal of the second output unit is connected to the fourth transistor; The first transistor is the upper tube of the boost bridge arm in the boost-buck circuit, the second transistor is the lower tube of the boost bridge arm in the boost-buck circuit, the third transistor is the upper tube of the buck bridge arm in the boost-buck circuit; the fourth transistor is the lower tube of the buck bridge arm in the boost-buck circuit.

3. The driving circuit according to claim 2, characterized in that: The first logic unit includes a first AND gate; The input end of the first AND gate is used to receive the boost driving signal; the output end of the first AND gate is connected to the first input end of the first output unit.

4. The driving circuit according to claim 3, characterized in that: The first input end of the first output unit is also used to receive a detection signal; the detection signal includes a first signal, and the first signal indicates that the output current of the buck-boost circuit is less than a preset output threshold.

5. The driving circuit according to claim 3, characterized in that: The first logic unit further includes a first NOT gate, and the first NOT gate is connected to the output end of the first AND gate and the second input end of the first output unit respectively.

6. The driving circuit according to claim 5, characterized in that: The second logic unit includes a second AND gate; The input end of the second AND gate is used to receive the step-down driving signal; the output end of the second AND gate is connected to the first input end of the second output unit.

7. The driving circuit according to claim 6, characterized in that: The second logic unit further includes a second NOT gate; the second NOT gate is connected to the output end of the second AND gate and the second input end of the second output unit respectively.

8. The driving circuit according to claim 7, characterized in that: The first logic unit further includes a third AND gate; two input terminals of the third AND gate are respectively connected to the output terminal of the first NOT gate and the output terminal of the second NOT gate; the output terminal of the third AND gate is connected to the protection transistor; The first end of the protection transistor is connected to the second input end of the first output unit and the second input end of the second output unit respectively, and the second end of the protection transistor is grounded.

9. The driving circuit according to claim 7, characterized in that: The control module further includes at least one of the following: a first adjustment unit, used for adjusting the dead time of the first transistor, wherein the first adjustment unit is located between the output terminal of the first AND gate and the first input terminal of the first output unit; a second adjustment unit, used for adjusting the dead time of the second transistor, wherein the second adjustment unit is located between the output terminal of the first NOT gate and the second input terminal of the first output unit; a third adjusting unit, used for adjusting the dead time of the third transistor, wherein the third adjusting unit is located between the output terminal of the second AND gate and the first input terminal of the second output unit; A fourth adjustment unit is used to adjust the dead time of the fourth transistor, and the fourth adjustment unit is located between the output end of the second NOT gate and the second input end of the second output unit.

10. An energy storage system, characterized in that: The energy storage system comprises a buck-boost circuit and a drive circuit as described in any one of claims 1-9.

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