Image data efficient transmission method and device based on microcontroller

Abstract

The invention discloses an image data efficient transmission method based on a microcontroller, and the transmission method comprises the following steps: the microcontroller receives image data, transmits the image data to an SRAM (Static Random Access Memory) for caching, then transfers the image data to a Nand Flash for storage, and records storage information; after receiving an image transmission instruction of the terminal machine, the microcontroller transmits the image data stored in the Nand Flash to the terminal machine; wherein a running program of the microcontroller is stored at a specified address of the Nor Flash; and a bootstrap program is also stored in the Nor Flash and is used for copying the running program stored in the Nor Flash into the SRAM to run. According to the invention, the microcontroller is externally connected with the FPGA chip to expand the large-capacity memory, so that the caching and storage requirements of the image in the transmission process are met, the defect that the internal storage of the microcontroller is small is overcome, and the transmission efficiency of image data is greatly improved.

Description

Technical Field

[0001] The present invention relates to the technical field of image data transmission, and in particular to a microcontroller-based image data efficient transmission method and device. Background Art

[0002] A microcontroller is an integrated circuit chip that integrates multiple functional modules such as a central processing unit (CPU), memory (ROM, RAM, Flash), etc. It has the characteristics of small size, low power consumption, and low price. The memory inside a microcontroller is usually used to store and run programs. Due to the size and cost, the internal storage space of a microcontroller is usually small. If the image data of MB size is transmitted or multiple images are stored, the internal storage space alone cannot meet the demand. And configuring a microcontroller with a large-capacity internal memory will greatly increase the cost. Summary of the invention

[0003] In view of the above-mentioned defects or deficiencies in the prior art, it is desired to provide a method and device for efficient transmission of image data based on a microcontroller, by expanding a large-capacity memory by connecting an external FPGA chip to the microcontroller to meet the caching and storage requirements of image data during transmission, thereby making up for the shortcoming of the small internal storage of the microcontroller and greatly improving the transmission efficiency of image data.

[0004] The present invention provides a microcontroller-based image data efficient transmission method, comprising the following steps: The microcontroller receives the image data and transfers it to the SRAM cache, then transfers it to the Nand Flash storage, and records the storage information; After receiving the image transmission command from the terminal, the microcontroller transmits the image data stored in Nand Flash to the terminal; The running program of the microcontroller is stored at a specified address of the Nor Flash; the Nor Flash also stores a boot program for copying the running program stored in the Nor Flash to the SRAM for running.

[0005] Furthermore, the microcontroller uses the Lwip protocol stack to receive image data from the WiFi module; the WiFi module program is stored at a specified address of the Nor Flash; when the system starts, the boot program uploads the WiFi module program to the WiFi module for initialization.

[0006] Furthermore, the microcontroller performs command and response interaction with the terminal through the RS422 interface, and transmits the image data stored in the Nand Flash to the terminal through the LVDS interface.

[0007] Furthermore, when the microcontroller receives image data from the WiFi module, it fetches the image data from the Lwip protocol stack, and caches the image data at a specified address of the SRAM in a four-byte aligned manner, and uses a one-way linked list to record the length and storage location of each packet of data of an image; After the SRAM finishes caching the image data, the image data is taken out from the SRAM in 2KB chunks at a time according to the image storage information recorded in the one-way linked list, and is stored at the designated address of the Nand Flash.

[0008] Furthermore, the microcontroller drives the WiFi module using the SDIO interface, creates an AP end to monitor the connection status of the WiFi module, and transmits the image data through the SDIO interface; The microcontroller cyclically detects the status register of the RS422 transceiver connected through the FPGA. After receiving the image transmission instruction transmitted by the terminal through the RS422 transceiver, the image data stored in the specified address of the Nand Flash is read out. When the microcontroller detects the read operation, the read image data is sent to the terminal through the LVDS transceiver.

[0009] In addition, the present invention also provides a transmission device using the above-mentioned microcontroller-based image data efficient transmission method, including a microprocessor, an FPGA chip, a Nor Flash chip, an SRAM chip and a Nand Flash chip; The FPGA chip is connected to the microprocessor through the SMC bus; the Nor Flash chip is electrically connected to the FPGA chip and is used to store the boot program and the running program of the microprocessor; the SRAM chip is electrically connected to the FPGA chip and is used to execute the running program of the microprocessor and cache image data; the Nand Flash chip is electrically connected to the FPGA chip and is used to transfer the image data in the SRAM chip.

[0010] Furthermore, the FPGA chip is connected to the terminal for communication via an RS422 transceiver and an LVDS transceiver respectively.

[0011] Furthermore, the microprocessor is communicatively connected to the WiFi module via an SDIO interface.

[0012] Compared with the prior art, the beneficial effects of the present invention are: The present invention expands an SRAM chip, a Nor Flash chip and a Nand Flash chip by connecting an external FPGA chip to a microcontroller, stores the running program of the microcontroller in the Nor Flash chip, copies the running program of the microprocessor to the SRAM chip for running through a boot program, caches image data through the SRAM chip, and transfers the image data to the Nand Flash chip; the SRAM chip has fast reading and writing operations, and improves the running efficiency of the running program; the Nand Flash chip has a large storage space and low cost, and meets the caching and storage requirements of the image data during the transmission process, thereby making up for the shortcoming of the small internal storage of the microcontroller and greatly improving the transmission efficiency of the image data.

[0013] It should be understood that the contents described in the summary of the invention are not intended to limit the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings: Figure 1 A flowchart of a method for efficient transmission of image data; Figure 2 It is a structural block diagram of the transmission device. DETAILED DESCRIPTION

[0015] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It should also be noted that, for ease of description, only the parts related to the invention are shown in the accompanying drawings.

[0016] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0017] Please refer to Figure 1~Figure 2 The embodiment of the present invention provides a method for efficiently transmitting image data based on a microcontroller, comprising the following steps: The microcontroller receives the image data and transfers it to the SRAM cache, then transfers it to the Nand Flash storage, and records the storage information; After receiving the image transmission command from the terminal, the microcontroller transmits the image data stored in Nand Flash to the terminal; The running program of the microcontroller is stored at a specified address of the Nor Flash; the Nor Flash also stores a boot program for copying the running program stored in the Nor Flash to the SRAM for running.

[0018] In this embodiment, an SRAM chip, a Nor Flash chip and a NandFlash chip are expanded by connecting an external FPGA chip to a microcontroller, the running program of the microcontroller is stored in the Nor Flash chip, the running program of the microprocessor is copied to the SRAM chip for running through a boot program, the image data is cached through the SRAM chip, and the image data is transferred to the NandFlash chip; the SRAM chip has fast read and write operations, which improves the running efficiency of the running program. After the SRAM chip loses power, the running program in it disappears. After power is supplied again, the boot program copies the running program to the SRAM chip for running again; the NandFlash chip has a large storage space and low cost, which meets the caching and storage requirements of the image data during the transmission process, thereby making up for the shortcoming of the small internal storage of the microcontroller and greatly improving the transmission efficiency of the image data.

[0019] Since high-capacity SRAM chips are relatively expensive, and storing image data may require storing multiple images at the same time, GB-level memory is required. Nand Flash chips can provide huge storage capacity and low cost. Therefore, after the SRAM chip receives the image data and caches it, it is transferred to the Nand Flash chip for storage, and the image storage information is recorded for the terminal to obtain.

[0020] In a preferred embodiment, the microcontroller uses the Lwip protocol stack to receive image data from the WiFi module; the WiFi module program is stored at a specified address of the Nor Flash; when the system starts, the boot program uploads the WiFi module program to the WiFi module for initialization.

[0021] In a preferred embodiment, the microcontroller performs command and response interaction with the terminal through an RS422 interface, and transmits the image data stored in the Nand Flash to the terminal through an LVDS interface.

[0022] In a preferred embodiment, when the microcontroller receives image data from the WiFi module, it fetches the image data from the Lwip protocol stack and caches the image data at a specified address of the SRAM in a four-byte aligned manner, and uses a one-way linked list to record the length and storage location of each packet of data of an image; After the SRAM finishes caching the image data, the image data is taken out from the SRAM in 2KB chunks at a time according to the image storage information recorded in the one-way linked list, and is stored at the designated address of the Nand Flash.

[0023] In a preferred embodiment, the microcontroller drives the WiFi module using the SDIO interface, creates an AP end to monitor the connection status of the WiFi module, and transmits image data through the SDIO interface; The microcontroller cyclically detects the status register of the RS422 transceiver connected through the FPGA. After receiving the image transmission instruction transmitted by the terminal through the RS422 transceiver, the image data stored in the specified address of the Nand Flash is read out. When the microcontroller detects the read operation, the read image data is sent to the terminal through the LVDS transceiver.

[0024] In addition, an embodiment of the present invention further provides a transmission device using the above-mentioned microcontroller-based image data efficient transmission method, comprising a microprocessor, an FPGA chip, a Nor Flash chip, an SRAM chip and a Nand Flash chip; The microprocessor is connected to the WiFi module through the SDIO interface; The FPGA chip is connected to the microprocessor through the SMC bus, and the FPGA chip is connected to the terminal through the RS422 transceiver and the LVDS transceiver respectively; The Nor Flash chip is electrically connected to the FPGA chip and is used to store the boot program and the running program of the microprocessor; The SRAM chip is electrically connected to the FPGA chip and is used to execute the running program of the microprocessor and cache image data; The Nand Flash chip is electrically connected to the FPGA chip and is used to transfer image data in the SRAM chip.

[0025] In this embodiment, the application is applied to the microcontroller to receive, store and forward image data sent by the host computer via WiFi. When the program is first loaded, it is necessary to burn the microcontroller chip to run the program. The system startup mode is power-on self-start, and the microcontroller startup mode is to start from the extended memory. Therefore, the running program is solidified in the Nor Flash chip, and then the microcontroller BOOT related pins are set to start from the SRAM chip. After the program starts, the boot program copies the running program stored in the Nor Flash to the specified address of the SRAM chip and jumps to run.

[0026] The running program includes tasks such as RS422 data receiving and sending tasks, WiFi data receiving and sending tasks, image data receiving and sending, storage, transfer, reading tasks, and timer interruption. Since the development environment is bare metal development, the switching between tasks is triggered by the timer interruption. Among them, the RS422 task and the WiFi task have response timing requirements, so during the operation of the system, whenever the timer interrupt program is triggered, it will jump out of other tasks to detect whether the above two tasks need to be executed to ensure the stable operation of the system.

[0027] The running process of the running program includes: S201: Send the WiFi module program stored in the Nor Flash to the WiFi module through the SDIO interface, and complete the initialization of the WiFi module through instructions; S202: Set the WiFi module to AP mode and create a TCP thread to wait for an external WiFi device to connect; S203: When an uplink interruption of the WiFi module is detected, image data is received through SDIO and the image data is transferred to the protocol stack for parsing; S204: Packetize the received image data and store them in SRAM, and record the storage location and size of the image; S205: After receiving a piece of picture data, set the flag bit a; S206: If it is detected that the flag bit a is set, the image data cached in the SRAM is transferred to the Nand Flash, and the flag bit a is cleared to 0; at the same time, during the transfer process, if a timer interrupt occurs, the storage task is jumped out and other tasks are polled (because the storage task has a lower priority); S207: Execute the serial port receiving task. If a picture transmission command from the terminal is received, set the flag bit b; S208: Transmit the image data stored in the Nand Flash chip to the terminal through the LVDS transceiver, clear the flag bit b to 0, and during the sending process, if a timer interrupt occurs, jump out of the sending task round and query other tasks.

[0028] This application expands the large-capacity memory by connecting an external FPGA chip to the microcontroller to meet the caching and storage requirements of image data during transmission, thereby making up for the shortcoming of the small internal memory of the microcontroller and greatly improving the transmission efficiency of image data.

[0029] In the description of this specification, the description of the terms "one embodiment", "some embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0030] The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for efficiently transmitting image data based on a microcontroller, characterized in that: The steps include: The microcontroller receives the image data and transfers it to the SRAM cache, then transfers it to the Nand Flash storage, and records the storage information; After receiving the image transmission command from the terminal, the microcontroller transmits the image data stored in Nand Flash to the terminal; The running program of the microcontroller is stored at a specified address of the Nor Flash; the Nor Flash also stores a boot program for copying the running program stored in the Nor Flash to the SRAM for running.

2. The method for efficiently transmitting image data based on a microcontroller according to claim 1, characterized in that: The microcontroller uses the Lwip protocol stack to receive image data from the WiFi module; the WiFi module program is stored at a specified address of the Nor Flash; when the system starts, the boot program uploads the WiFi module program to the WiFi module for initialization.

3. The method for efficiently transmitting image data based on a microcontroller according to claim 1, characterized in that: The microcontroller performs command and response interaction with the terminal through the RS422 interface, and transmits the image data stored in the Nand Flash to the terminal through the LVDS interface.

4. The method for efficiently transmitting image data based on a microcontroller according to claim 2, characterized in that: When the microcontroller receives image data from the WiFi module, it fetches the image data from the Lwip protocol stack and caches the image data at a specified address of the SRAM in a four-byte aligned manner, and uses a one-way linked list to record the length and storage location of each packet of data of an image; After the SRAM finishes caching the image data, the image data is taken out from the SRAM in 2KB chunks at a time according to the image storage information recorded in the one-way linked list, and is stored at the designated address of the Nand Flash.

5. The method for efficiently transmitting image data based on a microcontroller according to claim 2, characterized in that: The microcontroller drives the WiFi module using the SDIO interface, creates an AP end to monitor the connection status of the WiFi module, and transmits image data through the SDIO interface; The microcontroller cyclically detects the status register of the RS422 transceiver connected through the FPGA. After receiving the image transmission instruction transmitted by the terminal through the RS422 transceiver, the image data stored in the specified address of the Nand Flash is read out. When the microcontroller detects the read operation, the read image data is sent to the terminal through the LVDS transceiver.

6. A transmission device using the microcontroller-based image data efficient transmission method according to any one of claims 1 to 5, characterized in that: Including microprocessors, FPGA chips, Nor Flash chips, SRAM chips and Nand Flash chips; The FPGA chip is connected to the microprocessor through the SMC bus; the Nor Flash chip is electrically connected to the FPGA chip and is used to store the boot program and the running program of the microprocessor; the SRAM chip is electrically connected to the FPGA chip and is used to execute the running program of the microprocessor and cache image data; the Nand Flash chip is electrically connected to the FPGA chip and is used to transfer the image data in the SRAM chip.

7. The transmission device according to claim 6, characterized in that: The FPGA chip is connected to the terminal through RS422 transceiver and LVDS transceiver respectively.

8. The transmission device according to claim 6, characterized in that: The microprocessor is connected to the WiFi module through the SDIO interface.

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