A design method for aerospace-grade cryogenic infrared focal plane array flexible circuits

Abstract

This invention proposes a design method for aerospace-grade cryogenic infrared focal plane array flexible circuits. This method selects phosphor bronze as the conductive medium and adjusts the wiring pattern to effectively reduce heat exchange in the flexible circuits of cryogenic imaging systems with large temperature differences, thus improving the operating environment of the cryostat. Based on the selection of phosphor bronze, traditional flexible circuit design methods can significantly reduce heat exchange. Further optimization involves removing the intermediate shielding layer and redesigning the wiring to further reduce heat dissipation by decreasing the radiation area, thus optimizing the system. Furthermore, replacing the outer shielding layer with a grid of phosphor bronze or removing it entirely will greatly improve heat exchange. This invention also designs the wiring for adjacent and same-layer circuit signals, reducing parasitic capacitance and signal coupling effects, improving signal integrity, and enhancing space utilization efficiency. Finally, this invention employs a point-to-point design method to enhance reliability.

Description

Technical Field

[0001] This invention relates to a design method for aerospace-grade cryogenic infrared focal plane array flexible circuits, which are applied to infrared optical cryogenic low-noise video processing circuits. Background Technology

[0002] Space infrared remote sensors, characterized by their high stealth capabilities, immunity to adverse weather conditions, and high resolution, play a crucial role in space applications. Lowering the detector temperature helps improve system measurement accuracy, achieve a higher signal-to-noise ratio, and thus enhance image quality. In recent years, cryogenic infrared detectors have become increasingly common in space infrared remote sensors.

[0003] Due to limitations in component performance, video processing circuits typically operate independently at room temperature, packaged separately from the low-temperature infrared detectors. Mechanical cooling systems are usually used to cool the space infrared remote sensing detectors to their operating temperature. However, the extensive heat exchange places a significant burden on the cooling system. When cooling fails to reach the required temperature, the detector's normal operation is affected, and image quality degrades.

[0004] Currently, the main approaches and strategies for processing detectors in cryogenic infrared imaging systems fall into two categories: One approach is to improve the cooling capacity of the cryogenic unit. This method ensures the detector's operating temperature by increasing the cooling capacity of the cryogenic unit, improving its operating temperature, and optimizing the cryogenic loop heat pipes. However, this method increases the power consumption of the cryogenic unit and lacks fundamental solutions for heat dissipation in the flexible circuitry. The other approach is to design a highly integrated, cryogenically operable monolithic analog front-end chip. Compared to traditional analog front-end processing circuits, this chip operates in the cryogenic region and is directly interconnected with the detector readout circuit. The advantages of this method are shortened signal transmission distance and reduced transmission interference and system noise. From a heat dissipation perspective, this output method reduces the connection signals with the video processing circuitry, thereby reducing heat exchange to some extent. However, this method increases the power consumption at the detector end, places higher demands on cryogenic unit temperature control, and is more difficult to design. Furthermore, due to the difficulty in designing and implementing integrated chips, this method is currently still in the exploratory stage. Both of these methods can meet the requirements of infrared detectors operating at cryogenic temperatures, but their effect on reducing heat exchange in the flexible circuitry is not significant. Heat exchange is directly proportional to the thermal conductivity, area, and temperature difference between the two sides of the material. When the detector operates at a low temperature and the temperature difference between it and the video processing circuit is significant, heat transfer in the connection circuit becomes substantial. Therefore, this paper considers designing a flexible infrared transponder circuit with low thermal conductivity suitable for cryogenic detectors. The key to this design is to reduce heat exchange while ensuring signal transmission quality and minimizing signal coupling effects, thereby improving image quality. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art, reduce heat exchange while ensuring signal transmission quality, reduce the influence of back-coupling, and thus improve image quality.

[0006] The objective of this invention is achieved through the following technical solutions:

[0007] A design method for aerospace-grade cryogenic infrared focal plane array flexible circuits, wherein the flexible circuits mainly consist of rigid and flexible regions, and the design method includes:

[0008] The traces of the flexible circuit are made of phosphor bronze, with a composition of 2% to 8% tin, 0.1% to 0.4% phosphorus, and the remainder copper.

[0009] The flexible region of the flexible circuit adopts one of the following three stacked structures:

[0010] Method 1: First ground plane layer—First signal layer—Second ground plane layer—Third ground plane layer—Second signal layer—Fourth ground plane layer;

[0011] Method 2: First ground plane layer—First signal layer—Second signal layer—Second ground plane layer;

[0012] Method 3: First signal layer — Second signal layer;

[0013] In various locations, a complete phosphor bronze layer or a grid of phosphor bronze is laid in the planar layer;

[0014] When placing components in rigid regions, the following principles should be followed:

[0015] The detector requires an external decoupling capacitor for the signal. The corresponding decoupling capacitor is placed next to the corresponding signal in the rigid area of ​​the flexible circuit connected to the detector. The temperature measurement signal lead is inserted into the binding hole and fixed with glue. The binding hole is more than a preset distance from the lead-out interface.

[0016] (1) The wiring design of adjacent signal layers is as follows: For the different signals of the stacked structure in mode 2 and mode 3, the parallel transmission paths of adjacent layers do not overlap; reduce the overlap of transmission paths. When the crossing of signals in adjacent layers is unavoidable, reduce the crossing area and set the spatial angle between the two signal transmission lines to 45°~90°; for the same signal, the wiring of adjacent layers overlaps. The two signal layers in the flexible area of ​​mode 1 are not adjacent, and there is no need to consider the above-mentioned wiring method of adjacent layers. (2) The wiring of the same layer follows the following principles: For the three stacked structures, in the rigid area of ​​the flexible circuit, the distance of the conductor from the edge is greater than the thickness of the printed circuit board; ground signals are set as edge protection copper lines on both sides of the flexible area of ​​the flexible circuit; the temperature measurement signal of the flexible area is laid on the inside adjacent to the edge protection copper line; the analog signal and digital signal partition wiring of the entire flexible circuit does not cross and the width of each signal line is set according to the current carrying capacity requirement and derating requirement; for the wiring method of mode 3 without ground plane layer, the signal layer of the flexible area is laid with ground line as return line.

[0017] A flexible deep-temperature infrared focal plane circuit for aerospace applications is mainly composed of a rigid region and a flexible region. The above-mentioned design method is used to determine the stack-up structure, device layout, and wiring method.

[0018] Compared with the prior art, the present invention has the following advantages:

[0019] (1) This invention selects a new type of conductive medium through characteristic comparison, improves the wiring method, effectively reduces the heat exchange of the flexible circuit of the deep cryogenic imaging system with large temperature difference, and improves the working environment of the refrigeration machine.

[0020] (2) Based on the selection of phosphor bronze, the traditional flexible circuit design method can significantly reduce heat exchange; further optimization is achieved by removing the middle shielding ground layer and redesigning the wiring to further reduce heat dissipation by reducing the radiation area and optimizing the system; on this basis, changing the outer shielding ground layer to grid phosphor bronze or removing it directly will greatly improve the heat exchange problem.

[0021] (3) The present invention has designed the wiring of circuit signals in adjacent layers and the same layer, which reduces the influence of parasitic capacitance and signal coupling, improves signal integrity, and enhances space utilization efficiency.

[0022] (4) The present invention adopts a point-to-point design method to enhance reliability.

[0023] (5) The present invention has low heat exchange, simple method, low coupling between signals, and wide applicability. Attached Figure Description

[0024] Figure 1 This is a block diagram of a deep cryogenic infrared imaging system.

[0025] Figure 2This is a schematic diagram of a typical infrared focal plane array flexible circuit structure.

[0026] Figure 3 This is a schematic diagram illustrating the point numbering of the point-to-point design scheme of the present invention;

[0027] Figure 4 This is a schematic diagram of signal traces that overlap in adjacent layers.

[0028] Figure 5 This is a cross-sectional view of the adjacent layer interleaved wiring of the present invention. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0030] Infrared detectors operating at low temperatures exhibit higher sensitivity, while the performance of most components and signal processing circuits currently degrades at low temperatures. Traditional infrared imaging systems package the infrared detector and video processing circuitry separately. Infrared detectors operating at extremely low temperatures are connected to infrared video processing systems operating at room temperature via flexible infrared focal plane arrays.

[0031] For a long time, copper has been the preferred conductive material for aerospace products. However, copper's good thermal conductivity limits its use in flexible circuits for cryogenic systems, especially under conditions of large temperature differences.

[0032] This invention proposes a design method for aerospace-grade deep cryogenic infrared focal plane array flexible circuits. This design uses novel materials to significantly reduce heat transfer radiation on the transfer circuit, alleviating the pressure on the refrigerator. At the same time, it considers the cross-influence between analog and digital signals and signal coupling issues, and designs the signal layout of the transfer circuit to effectively improve signal integrity and enhance space utilization efficiency.

[0033] like Figure 1The diagram shows the structural block diagram of a cryogenic infrared imaging system. The infrared detector operates at 40K (cryogenic environment) and is connected to an infrared video processing circuit operating at 300K (normal temperature environment) via a flexible focal plane circuit. Through the flexible focal plane circuit, the infrared detector receives signals required for its operation, primarily including: control timing signals such as detector integration time control signals, master clock signals, gain control bits, format selection, and output channel selection bits; digital and analog power supplies after power conversion; fixed bias voltages generated by the operational amplifier module, such as frequency modulation voltage, operational amplifier reference voltage, corona control, and photovoltaic diode substrate; and adjustable bias voltages generated by the DA module, such as photovoltaic diode bias. Simultaneously, the infrared detector outputs multiple channels of analog signals, digital output discrimination signals, and temperature measurement signals via the flexible focal plane circuit. The multiple input and output signals transmitted through the flexible focal plane circuit result in significant heat exchange using traditional copper materials, necessitating a more optimized flexible circuit design.

[0034] Due to copper's excellent electrical conductivity, it is currently commonly used as a signal transmission material, laminated with cover films, reinforcing materials, and insulating materials to create focal plane arrays. For example... Figure 2 The diagram shows a typical infrared focal plane array flexible circuit structure. A typical flexible circuit consists of two parts: a rigid region and a flexible region, each of which can contain more than one region. The rigid region is divided into two parts, namely… Figure 2 The circuit consists of two rigid zones: a first rigid zone, where connector 1 is electrically installed, and a second rigid zone, where connector 2 is electrically installed, and a third rigid zone, where signals are connected to the video processing circuit. The two rigid zones are connected to the video processing circuit via a flexible zone. A small number of components can be placed in the two rigid zones. The rigid-flex PCB design requires a multi-layer printed circuit board stack. Rigid zones typically use 16, 14, 12, or 10-layer stacks. For the flexible zone, layers 2, 4, and 6 in the center of the PCB are recommended as flexible layers.

[0035] Considering the number of signals and the flexible circuit structure, traditional flexible circuits typically employ a stacked structure in the flexible region, following a sequence of "first ground plane layer – first signal layer – second ground plane layer – third ground plane layer – second signal layer – fourth ground plane layer," to avoid coupling effects between signals. This approach provides effective shielding between signal layers, strong anti-interference capabilities, and fewer trace constraints between adjacent layers, meeting the requirements for use at room temperature. However, in the flexible circuits of cryogenic systems, large areas of copper plating significantly increase heat dissipation, making the drawbacks of this traditional design scheme particularly prominent.

[0036] This invention uses phosphor bronze, with a basic composition of 2%–8% tin, 0.1%–0.4% phosphorus, and the remainder copper. This material exhibits excellent ductility and fatigue resistance, and its reliability is higher than that of general copper alloy products. Simultaneously, phosphor bronze possesses good electrical conductivity, lower thermal conductivity than copper, resulting in less heat dissipation, and also exhibits higher corrosion resistance, fatigue resistance, and wear resistance, making it a superior alternative material.

[0037] Table 1 below compares the thermal conductivity of copper with that of phosphor bronze in a certain proportion. Heat transfer is directly proportional to the thermal conductivity of the material and the temperature difference between the two sides. This is why the impact of heat transfer cannot be ignored when there is a large temperature difference between the infrared detector and the infrared video processing system. Taking an ambient temperature of 80K as an example, Table 1 shows that, under the condition of equal heat dissipation temperature difference, the heat transfer of copper is 24 times that of phosphor bronze. At 20K, this ratio reaches 110 times, and this difference will continue to increase as the ambient temperature decreases.

[0038] Table 1 Thermal conductivity of copper and phosphor bronze

[0039]

[0040] Table 2 shows a comparison of the resistance of copper and phosphor bronze under normal and low temperature conditions. Flexible circuits are typically 0.1m-0.3m in length. The increase in transmission line impedance mainly affects signals with large currents on the line, such as analog power signal lines where the voltage drop changes significantly with increasing impedance. To address this effect, this design employs a parallel impedance reduction method, which will be described later in the section on adjacent layer wiring design.

[0041] Table 2 Electrical conductivity of copper and phosphor bronze

[0042]

[0043] Materials with similarly low thermal conductivity, such as nickel-chromium and manganese-copper alloys, have thermal conductivity slightly lower than phosphorus copper, within the same order of magnitude. However, at low temperatures, their resistivity is 5-10 times that of phosphorus copper of the same diameter. Considering all factors, phosphorus copper performs better. Therefore, using phosphorus copper as the conductive material for flexible circuits, while meeting signal transmission requirements, significantly reduces heat transfer, making it a superior material choice for flexible circuits in cryogenic systems.

[0044] For infrared imaging systems operating in deep cryogenic environments, by simply improving the conductive medium in the flexible circuit, selecting phosphor bronze as a new material for the transition circuit, and adopting the traditional stacked structure and layout of "first ground plane layer - first signal layer - second ground plane layer - third ground plane layer - second signal layer - fourth ground plane layer", the heat transfer on the flexible circuit can be reduced to a fraction of the original amount.

[0045] To address the significant heat dissipation problem caused by the large-area copper plating in traditional flexible circuit designs, this invention provides two flexible region stacked structure schemes to reduce the impact of this problem.

[0046] The first approach (Method 2) involves removing the two middle ground plane layers, retaining only the outer ground plane layer of the flexible area. The stacked structure is "First Ground Plane Layer – First Signal Layer – Second Signal Layer – Second Ground Plane Layer." Through the routing design of adjacent and same-layer signal layers, the effects of signal crosstalk are avoided. In this approach, the two ground plane layers can be directly covered with full phosphor bronze or with a grid of phosphor bronze. Directly covering with full phosphor bronze minimizes the interference of external signals on the signals within the transition circuit, combining the advantages of traditional designs. Using a diamond grid when laying grid phosphor bronze further reduces heat dissipation while shielding most interference signals.

[0047] The second option (method three) involves removing the four ground plane layers in the middle and on both sides, retaining only the two signal layers in the flexible area, resulting in a stacked structure of "first signal layer – second signal layer". This option is optimal when external signal interference is minimal, or when interference to the flexible circuit is reduced through techniques such as shielding layers. It minimizes the heat dissipation area and reduces heat loss. Reducing the number of flexible layers also makes it more flexible, with a smaller bending radius, simplifying non-planar installation operations.

[0048] The components of flexible circuits are laid out in the rigid area. Commonly used components include connectors, resistors, and capacitors. The layout design follows the following principles: (1) The distance between components and holes and the surrounding structural frame of the circuit board is greater than 2mm; the minimum distance between the edges of mechanical mounting holes is greater than the thickness of the printed circuit board; wiring is prohibited in the middle layer when the diameter of the component mounting hole is 2mm outward; wiring is prohibited when the diameter of the top and bottom screw heads or washers is 2mm outward. (2) The spacing between non-metallic bodies of components is not less than 0.13mm, and the spacing between metal shells is not less than 1.6mm. (3) For signals that require external decoupling capacitors, such as the reference voltage of operational amplifiers, since their proximity can achieve better results, they are placed in the flexible circuit structure during the circuit layout stage. Figure 2 In the first rigid zone, near the corresponding signal position. (4) For the temperature measurement signal, C55 wires are used to directly lead from the adapter circuit to the refrigeration control unit. In order to improve the vibration resistance of the lead signal line, in addition to the conventional glue sealing measures, non-metallic binding holes are set at the interface lead position. Considering the requirements of the wire bending radius, the binding hole is more than 5mm away from the lead interface. In actual use, the soldered lead wire is inserted into the binding hole for glue fixing, which can offset the force of the solder joint and improve the reliability of the temperature measurement system.

[0049] In the signal transmission of the entire flexible circuit, this invention adopts a point-to-point connection method, that is, a signal on the detector-side connector of the flexible circuit is directly connected to a signal on the corresponding video processing circuit-side connector. Figure 3 Taking this as an example, the MC signal at pin 3 of connector CN1 on the detector side is directly connected to the MC signal at pin 1 of connector CN2 on the infrared video processor side; the VDDO signal at pin 10 of CN1 is connected to the VDDO signal at pin 31 of CN2; and the VDDO signal at pin 15 of CN1 is connected to the VDDO signal at pin 35 of CN2. When a signal has multiple output points, they are connected separately to enhance reliability.

[0050] Single-layer wiring design requirements for signal layers: (1) Copper foil can be laid in the rigid area. The top and bottom layers of the rigid area should be within 2mm of the board edge, and the inner layer should be within 1.25mm of the board edge as a no-wiring area. (2) Edge protection copper wires should be set in the flexible area to reduce the tearing of the flexible area caused by external stress. The width of the protection copper wire should not be less than 40mil, parallel to the edge of the flexible area, and connected to the ground signal. At the same time, the 2mm edge of the flexible area should be set as a no-wiring area. (3) In order to reduce the coupling effect of the temperature measurement signal on other working signals of the detector, in the flexible area, the temperature measurement signal should be laid in the adjacent position inside the protection copper wire, and kept at a distance of 3 times the line width from other inner signals. (4) The analog and digital signals of the entire flexible circuit should not cross each other in the partition wiring. (5) In order to reduce crosstalk between lines, the line spacing of signals in the same layer should follow the "3W rule". If 98% of the electric fields do not interfere with each other, a spacing of 10W should be used. (6) Set the line width of each signal according to the current carrying capacity and derating requirements. The power signal, ground signal, and some bias signals have large currents. In order to reduce the impedance voltage drop on the line, increase the line width of the signal while ensuring that the spatial distribution in the flexible area meets the requirements. (7) For the stacked structure without a ground plane layer in Scheme 2 (Method 3), in order to ensure the return current capability of the signal, the signal of each layer should be laid with a ground wire as the return current line nearby. Taking into account the number of signals, the structure of the flexible area, and the signal characteristics, a ground wire should be laid as the return current line every 2 to 3 signals.

[0051] In flexible circuit fabrication, multiple signal layers are laminated together. For example... Figure 4 This type of wiring method, which is vertically overlapping in space, results in a small signal spacing after the two layers are pressed together. The magnetic field coupling between signals at the same position on adjacent layers cannot be ignored, which will affect the integrity of the signal. The spatial layout of the signal layers of adjacent layers is designed as follows: (1) The parallel transmission paths of non-identical signals on adjacent layers do not overlap (this overlap includes complete overlap and partial parallel overlap). According to the wiring requirements of the "3W rule" above, there is a 2W spacing between signal lines for the laying of signal lines on adjacent layers. That is, non-identical signals on adjacent layers follow the "photographing" insertion method, such as Figure 5As shown, reduce electromagnetic interference caused by overlapping signals on adjacent layers, especially for high-speed signals, this wiring method should be followed. (2) When routing signals on adjacent layers that are not the same signal, reduce the crossing of transmission paths. When the crossing of signals on adjacent layers is unavoidable, the spatial angle between the two signal transmission lines should be set to 45° to 90° to reduce the crossing area and thus reduce the coupling effect. (3) Overlap the routing of the same signal on adjacent layers. This method can effectively improve the space utilization rate. At the same time, the line impedance can be reduced by increasing the number of routing layers, thereby reducing the voltage drop between the two points. It has a significant effect on the analog power supply and analog ground with large currents mentioned above. For example, the maximum current of a typical analog power supply is between tens of milliamps and one or two hundred milliamps. After design optimization, the line impedance is about 10. -1 The voltage drop from the output to the detector is reduced to the order of Ω, which reduces losses and ensures that the voltage operating range is met. (4) When the line width of the same signal changes, the reduced line width is spatially layered and overlapped. The distance between the pins of the connector soldered on the rigid area is small, and the line width of the signal with large current is large, which often makes it difficult to meet the direct connection requirements. Directly reducing the line width cannot meet the current carrying requirements and is not conducive to signal integrity. In response to this phenomenon, the design method of overlapping adjacent layers is also adopted. Through holes are drilled in the rigid area, and the signal from the flexible area to the through hole in the rigid area is routed with thick signal lines according to the current carrying requirements. From the through hole to the connector pin in the rigid area, multiple layers of traces are used to meet the signal continuity. For example, a signal line with a line width of 30mil in the flexible area is divided into three 10mil signal lines of different layers after passing through the through hole in the rigid area, and connected to the corresponding signal pin of the connector through the spatial overlap position.

[0052] The contents not described in detail in this specification are common knowledge to those skilled in the art.

[0053] Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present invention by utilizing the methods and techniques disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall fall within the protection scope of the technical solutions of the present invention.

Claims

1. A design method for aerospace-grade cryogenic infrared focal plane array flexible circuit, wherein the flexible circuit mainly consists of a rigid region and a flexible region, characterized in that, Design methods include: The traces of the flexible circuit are made of phosphor bronze, with a composition of 2% to 8% tin, 0.1% to 0.4% phosphorus, and the remainder copper. The flexible region of the flexible circuit adopts one of the following two stacked structures: Method A: First ground plane layer—First signal layer—Second signal layer—Second ground plane layer; Method B: First signal layer — Second signal layer; In various locations, a complete phosphor bronze layer or a grid of phosphor bronze is laid in the planar layer; When placing components in rigid regions, the following principles should be followed: The detector requires an external decoupling capacitor for the signal. The corresponding decoupling capacitor is placed next to the decoupling capacitor signal in the rigid area of ​​the flexible circuit connected to the detector. The temperature measurement signal lead is inserted into the binding hole and fixed with glue. The binding hole is more than a preset distance from the lead-out interface. (1) The adjacent signal layers are designed as follows: For different signals in stacked structure A and B, the parallel transmission paths of adjacent layers do not overlap; reduce the overlap of transmission paths. When the crossing of signals in adjacent layers is unavoidable, reduce the crossing area and set the spatial angle between the two signal transmission lines to 45°~90°; for the same signal, the traces of adjacent layers overlap; (2) The same layer wiring follows the following principles: For the two stacked structures, in the rigid area of ​​the flexible circuit, the distance of the conductor from the edge is greater than the thickness of the printed circuit board; ground signals are set as edge protection copper lines on both sides of the flexible area of ​​the flexible circuit; the temperature measurement signal of the flexible area is laid on the inner side adjacent to the edge protection copper line; the analog and digital signals of the entire flexible circuit are partitioned and the wiring does not cross, and the line width of each signal is set according to the current carrying capacity requirement and derating requirement; for the wiring method without a ground plane layer in mode B, the signal layer of the flexible area is laid with ground lines as return lines.

2. The design method for aerospace-grade cryogenic infrared focal plane array flexible circuits according to claim 1, characterized in that, When placing components in rigid regions, the following principles must be followed: Components and holes must be at least 2mm away from the perimeter of the circuit board frame; the no-wiring zone in the middle layer of component mounting holes must be designed with the hole diameter extended by 2mm; the no-wiring zone on the top and bottom layers must be extended by 2mm beyond the screw head or washer diameter; the minimum distance between the edges of mechanical mounting holes must be greater than the thickness of the printed circuit board; the spacing between non-metallic components must be no less than 0.13mm, and the spacing between metal casings must be no less than 1.6mm.

3. The design method for aerospace-grade cryogenic infrared focal plane array flexible circuits according to claim 1, characterized in that, The rigid zone is designated as a no-wiring zone, with the top and bottom layers within 2mm of the board edge and the inner layers within 1.25mm of the board edge.

4. The design method for aerospace-grade cryogenic infrared focal plane array flexible circuits according to claim 1, characterized in that, The following principles should also be followed for wiring on the same layer: the width of the protective copper trace should not be less than 40mil, it should be parallel to the edge of the flexible area, and it should be connected to the ground signal.

5. The design method for aerospace-grade cryogenic infrared focal plane array flexible circuits according to claim 1, characterized in that, The following principles also apply to wiring on the same layer: a 2mm radius around the edge of the flexible area should be designated as a no-wiring zone.

6. The design method for aerospace-grade cryogenic infrared focal plane array flexible circuits according to claim 1, characterized in that, The following principles also apply to wiring on the same layer: In the flexible area, the temperature measurement signal is placed in an adjacent position inside the protective copper wire, maintaining a distance of 3 times the line width from other inner signals.

7. The design method for aerospace-grade cryogenic infrared focal plane array flexible circuits according to claim 1, characterized in that, The following principle also applies to wiring on the same layer: the analog and digital signal wiring of the entire flexible circuit should not overlap.

8. The design method for aerospace-grade cryogenic infrared focal plane array flexible circuits according to claim 1, characterized in that, The following principles also apply to wiring on the same layer: To reduce crosstalk between lines, the spacing between lines on the same layer follows the 3W rule.

9. The design method for aerospace-grade cryogenic infrared focal plane array flexible circuits according to claim 1, characterized in that, For method B, in order to ensure the signal return capability, a ground wire should be laid nearby as a return line for each signal; and a ground wire should be laid every 2 to 3 signals as a return line.

10. A flexible deep-temperature infrared focal plane circuit for aerospace applications, characterized in that, It mainly consists of a rigid region and a flexible region, and the stack-up structure, device layout and wiring method are determined by the design method of any one of claims 1 to 9.

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