Core binding strategy adaptation method and electronic equipment

Abstract

The invention provides a core binding strategy adaptation method and electronic equipment, and belongs to the technical field of memory management. The method comprises the steps that a configuration file is acquired and analyzed, and core binding strategy parameters are obtained; wherein the core binding strategy parameter comprises at least one target thread and a target binding core corresponding to each target thread in the at least one target thread; and according to the core binding strategy parameters, binding each target thread to the corresponding target binding core. Therefore, the core binding strategy is set by adopting a configuration file mode, and proper core binding strategy parameters can be selected according to the requirements of each product through the configuration file, so that the required performance and power consumption balance can be achieved. According to the method, the core binding strategy can be self-defined according to different product requirements without influencing other products, so that the core binding strategy is decoupled from different series of products.

Description

Technical Field

[0001] The present application belongs to the field of memory management technology, and in particular, relates to a core binding strategy adaptation method and an electronic device. Background Art

[0002] The core binding operation is to bind one or more threads to a specific core of the processor, restricting them to run on a specific core. By binding a thread to a specific core, it can be prevented from competing with other tasks or threads for core resources, thereby reducing the overhead of context switching and resource contention and improving overall performance.

[0003] At present, in order to implement the core binding strategy, it is necessary to modify the relevant codes of each target thread in the core binding strategy at the kernel layer. In this way, if the core binding strategy of one product series is changed, the core binding strategies of other product series will also be changed if the target threads of multiple product series are in the same warehouse. However, since different product series may use different processors, and the performance and power consumption of different processors may vary greatly, if the core binding strategy of one product series is changed, the power consumption of other product series will increase or the performance will decrease if the target threads of multiple product series are in the same warehouse. Summary of the invention

[0004] The present application provides a core binding strategy adaptation method and electronic device, which enables the core binding strategy to be customized according to different product requirements without affecting other products, thereby achieving decoupling of the core binding strategy from different series of products.

[0005] In a first aspect, the present application provides a core binding policy adaptation method, which is applied to an electronic device, wherein the electronic device includes a processor with multiple cores, and the method includes: obtaining a configuration file, wherein the configuration file includes core binding policy parameters adapted to the electronic device; parsing the configuration file to obtain the core binding policy parameters; wherein the core binding policy parameters include at least one target thread and a target binding core corresponding to each of the at least one target thread; and according to the core binding policy parameters, respectively binding each of the target threads to the corresponding target binding core.

[0006] In this way, the core binding strategy is set by using a configuration file. The configuration file can be used to select appropriate core binding strategy parameters according to the needs of each product to achieve the desired balance between performance and power consumption. This method allows the core binding strategy to be customized according to different product requirements without affecting other products, thereby decoupling the core binding strategy from different product series. In addition, by prefabricating configuration files in the product components of electronic devices, if the core binding strategy needs to be modified, only the corresponding configuration file needs to be updated without modifying the code and recompiling, making the adjustment of the core binding strategy more flexible and maintainable.

[0007] In one implementable manner, the core binding policy parameter is an alternative core binding policy parameter with the highest comprehensive performance obtained by testing multiple alternative core binding policy parameters using a performance dynamic model and a power consumption model, wherein the multiple alternative core binding policy parameters are determined based on the core distribution parameters of the processor and the target thread.

[0008] In this way, for different series of products, the corresponding optimal core binding strategy parameters can be obtained in advance, so that the optimal core binding strategy parameters can be configured in the configuration file before the product goes online.

[0009] In one implementable method, the performance dynamic model is used to perform performance testing on the multiple alternative core binding strategy parameters to obtain at least one performance indicator corresponding to each of the alternative core binding strategy parameters; wherein the performance indicator includes an application startup response indicator and / or a sliding response indicator; the power consumption model is used to perform power consumption testing on the multiple alternative core binding strategy parameters to obtain the power consumption corresponding to each of the alternative core binding strategy parameters; the core binding strategy parameter is an alternative core binding strategy parameter with the highest comprehensive performance determined from among the alternative core binding strategy parameters based on the at least one performance indicator and the power consumption.

[0010] In this way, the core binding strategy parameters determined based on the test results can ensure that the electronic device responds quickly to the launch of the application and the sliding operation on the application interface, and ensure the specific low power consumption effect of the electronic device.

[0011] In an implementable manner, parsing the configuration file to obtain the core binding policy parameter includes:

[0012] In response to the electronic device being powered on, the application framework layer of the electronic device parses the configuration file to obtain the core binding policy parameters.

[0013] In one implementable manner, each of the target threads is bound to the target binding core according to the core binding configuration parameters, including: the application framework layer writes the core binding configuration parameters into the file system of the kernel layer through the write node of the kernel layer of the electronic device; the file system obtains the structure of each of the target threads in the core binding configuration parameters based on the core binding configuration parameters; the file system calls the core binding interface; based on the core binding configuration parameters and the structure of each of the target threads, each of the target threads is bound to the target binding core through the core binding interface.

[0014] In this way, a configuration file is prefabricated in the product component of the electronic device, and then the configuration file is parsed by the upper application framework layer, and the parsed core binding strategy parameters are passed to the lower kernel layer. This method does not require modification of the shared warehouse code, thereby not affecting other series of electronic devices, and realizes the decoupling of the core binding strategy from different series of electronic devices.

[0015] In an implementable manner, the core binding policy parameters include each of the target thread names and a target binding core number corresponding to each of the target thread names.

[0016] In one achievable manner, the target thread is a memory management thread.

[0017] In an implementable manner, the target thread includes at least one of a memory paging daemon thread kswapd, a memory reclaiming thread xreclaimer, and a memory compression thread kshrink.

[0018] This can solve the problem that in high-load scenarios, memory management threads such as kswapd, xreclaimer, and kshrink may occupy the small cores, medium cores, and large cores of the processor. In this way, since memory management threads compete with foreground threads for processor resources, the foreground process cannot be scheduled, resulting in lag.

[0019] In a second aspect, the present application provides an electronic device, comprising a memory and a processor; the memory and the processor are coupled; the memory is used to store computer program code, the computer program code comprises computer instructions, and when the processor executes the computer instructions, the electronic device executes a method as described in any one of the first aspects.

[0020] In a third aspect, the present application provides a computer-readable storage medium, in which a computer program or instruction is stored. When the computer program or instruction is executed on a computer, the computer executes the method as described in any one of the first aspects. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0022] Figure 1 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application;

[0023] Figure 2 A schematic diagram of a software framework of an electronic device provided in an embodiment of the present application;

[0024] Figure 3 A schematic diagram of a framework for implementing a method for core binding strategy adaptation provided in an embodiment of the present application;

[0025] Figure 4 A flowchart of a core binding strategy adaptation method provided in an embodiment of the present application;

[0026] Figure 5A A schematic diagram of performing a performance test on a device to be tested 400A provided in an embodiment of the present application;

[0027] Figure 5B A schematic diagram of a performance test of a device 400B to be tested provided in an embodiment of the present application;

[0028] Fig. 6A A schematic diagram of a method for determining optimal core binding strategy parameters of a device to be tested 400A provided in an embodiment of the present application;

[0029] Figure 6B A schematic diagram of a method for determining optimal core binding strategy parameters of a device to be tested 400B provided in an embodiment of the present application;

[0030] Figure 7 A flowchart of a core binding strategy adaptation method provided in an embodiment of the present application;

[0031] Figure 8 A schematic diagram of the structure of a core binding strategy adaptation device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0033] At present, there are more and more applications in electronic devices. When there are many applications running in electronic devices, a large amount of memory resources in the electronic devices will be occupied. Since memory resources are limited, in order to ensure that there is enough memory available when the system is running, memory management threads can be created in electronic devices. When the memory is insufficient, the memory management thread can perform operations such as memory recycling to release more memory resources.

[0034] In some embodiments, the memory management thread may include at least one of a memory paging daemon process kswapd, a memory reclaiming thread xreclaimer, and a memory compression thread kshrink.

[0035] Among them, kswapd is a daemon process in the Linux kernel, responsible for performing memory paging operations. When the system's physical memory is insufficient, kswapd will swap some infrequently accessed memory pages from the memory to the disk's swap space according to the memory management policy to free up physical memory for other processes. The kswapd process periodically scans the memory and performs memory paging operations to maintain the balance and optimization of the system's memory. When the system's physical memory is sufficient, kswapd is in a sleep state.

[0036] xreclaimer is a thread in the operating system that is responsible for memory reclaiming. Its main function is to reclaim the memory of a process when the process cannot be killed. For example, for a process in an uninterruptible sleep state (also called D state), xreclaimer will reclaim the memory of the process first.

[0037] kshrink is a memory management thread that performs memory compression when memory is insufficient. Memory compression refers to freeing up more available memory by reorganizing memory pages and merging fragmented memory blocks. The kshrink thread scans pages in memory and merges scattered, partially used memory pages into larger contiguous memory blocks, thereby improving memory utilization. This can reduce memory fragmentation and provide more available memory space for other processes. In some embodiments, after an application is switched from the foreground to the background, kshrink can actively compress the application's memory.

[0038] However, the inventors found that when the system is under high load, due to the shortage of memory resources, it is necessary to release free memory or merge fragmented memory blocks through memory recycling and compression. In this case, memory management threads such as kswapd, xreclaimer and kshrink may occupy the small cores, medium cores and large cores of the processor. In this way, memory management threads compete with foreground threads for processor core resources, which may cause the foreground process to not be scheduled, resulting in a freeze phenomenon.

[0039] For multi-core processors, the cores can be divided based on the highest frequency of the processor, and different cores can be used to process different types of tasks. For example, taking an eight-core processor as an example, the cores of the processor can be divided into small cores, medium cores, and large cores. Among them, small cores are usually designed as low-power, low-frequency cores. Small cores are mainly used to process lightweight tasks and conventional low-load applications. The advantage of small cores is their low power consumption characteristics, which can provide longer battery life. Medium cores and large cores are usually designed as high-performance, high-frequency cores. Medium cores and large cores are usually used to process computationally intensive tasks, high-load applications, or tasks that require faster responses. The advantages of medium cores and large cores are their higher processing power and performance. In other words, the higher the frequency of the processor core, the better the performance, but the greater the power consumption.

[0040] Take running a game in the foreground as an example. Generally, game applications are high-load applications and therefore need to be run on large cores. In this way, if memory management threads such as kswapd, xreclaimer, and kshrink occupy the large core of the processor for a long time, the game-related processes running in the foreground will not be scheduled, resulting in game lag and affecting user experience.

[0041] In order to improve the problem that the foreground process cannot be scheduled, the present application can perform core binding operations on memory management threads to bind the memory management threads to the specified core for running. This can avoid the memory management threads and the foreground threads from competing for processor core resources, thereby solving the problem that the foreground process cannot be scheduled and improving the responsiveness of the foreground process.

[0042] The core binding operation mainly involves the following steps: first determine the threads to be bound and the cores to which each thread is to be bound, that is, the core binding strategy. Then, based on the core binding strategy, bind each thread to its corresponding core to restrict each thread to run on the specified core. Among them, the determination of the core binding strategy is mainly based on the performance and power consumption of the system. In other words, the final core binding strategy takes into account both the performance and power consumption of the system.

[0043] At present, in order to implement the core binding strategy, it is necessary to modify the code related to the memory management thread at the kernel layer. If the code related to the memory management thread is placed in a shared code base, that is, the memory management thread shares a warehouse, it means that different series of products use the same code base to implement the function of the memory recovery thread, and different series of products share the same code logic. In this way, if the core binding strategy of a series of products is changed, the modified core binding strategy will also be applied to other series of products, that is, the core binding strategy of other series of products will also be changed accordingly. However, since the processors used by different series of products may be different, and the performance and power consumption of different processors may vary greatly, therefore, for the case where the memory management threads of multiple series of products share a warehouse, if the core binding strategy of one series of products is changed, it will cause the other series of products to introduce problems of increased power consumption or decreased performance.

[0044] To solve the above problems, the embodiments of the present application provide a flexible core binding strategy solution to adapt to the differences between different products and avoid modifications to the co-warehouse code. Specifically, the core binding strategy adaptation method provided in the embodiments of the present application uses a configuration file to set the core binding strategy. The configuration file can be used to select appropriate core binding strategy parameters according to the needs of each product to achieve the desired performance and power consumption balance. This method allows the core binding strategy to be customized according to different product requirements without affecting other products, thereby decoupling the core binding strategy from different product series.

[0045] The core binding strategy adaptation method provided in the embodiment of the present application can be applied to electronic devices. Optionally, the electronic devices include but are not limited to mobile phones, tablet computers, personal computers, workstation devices, large-screen devices (for example: smart screens, smart TVs, etc.), handheld game consoles, home game consoles, virtual reality devices, augmented reality devices, mixed reality devices, in-vehicle smart terminals, etc.

[0046] Figure 1 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Figure 1As shown, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0047] It is to be understood that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or separate some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0048] The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0049] The controller can generate operation control signals according to the instruction operation code and timing signal to complete the control of instruction fetching and execution.

[0050] The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0051] In some embodiments, the processor 110 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0052] The I2C interface is a bidirectional synchronous serial bus, including a serial data line (SDA) and a serial clock line (SCL). In some embodiments, the processor 110 may include multiple groups of I2C buses. The processor 110 may be coupled to the touch sensor 180K, the charger, the flash, the camera 193, etc. through different I2C bus interfaces. For example: the processor 110 may be coupled to the touch sensor 180K through the I2C interface, so that the processor 110 communicates with the touch sensor 180K through the I2C bus interface, thereby realizing the touch function of the electronic device 100.

[0053] The I2S interface can be used for audio communication. In some embodiments, the processor 110 can include multiple I2S buses. The processor 110 can be coupled to the audio module 170 via the I2S bus to achieve communication between the processor 110 and the audio module 170. In some embodiments, the audio module 170 can transmit an audio signal to the wireless communication module 160 via the I2S interface to achieve the function of answering a call through a Bluetooth headset.

[0054] The PCM interface can also be used for audio communication, sampling, quantizing and encoding analog signals. In some embodiments, the audio module 170 and the wireless communication module 160 can be coupled via a PCM bus interface. In some embodiments, the audio module 170 can also transmit audio signals to the wireless communication module 160 via the PCM interface to realize the function of answering calls via a Bluetooth headset. Both the I2S interface and the PCM interface can be used for audio communication.

[0055] The UART interface is a universal serial data bus for asynchronous communication. The bus can be a bidirectional communication bus. It converts the data to be transmitted between serial communication and parallel communication. In some embodiments, the UART interface is generally used to connect the processor 110 and the wireless communication module 160. For example, the processor 110 communicates with the Bluetooth module in the wireless communication module 160 through the UART interface to implement the Bluetooth function. In some embodiments, the audio module 170 can transmit an audio signal to the wireless communication module 160 through the UART interface to implement the function of playing music through a Bluetooth headset.

[0056] The MIPI interface can be used to connect the processor 110 with peripheral devices such as the display screen 194 and the camera 193. The MIPI interface includes a camera serial interface (CSI), a display serial interface (DSI), etc. In some embodiments, the processor 110 and the camera 193 communicate via the CSI interface to implement the shooting function of the electronic device 100. The processor 110 and the display screen 194 communicate via the DSI interface to implement the display function of the electronic device 100.

[0057] The GPIO interface can be configured by software. The GPIO interface can be configured as a control signal or as a data signal. In some embodiments, the GPIO interface can be used to connect the processor 110 with the camera 193, the display 194, the wireless communication module 160, the audio module 170, the sensor module 180, etc. The GPIO interface can also be configured as an I2C interface, an I2S interface, a UART interface, a MIPI interface, etc.

[0058] The USB interface 130 is an interface that complies with the USB standard specification, and specifically can be a Mini USB interface, a Micro USB interface, a USB Type C interface, etc. The USB interface 130 can be used to connect a charger to charge the electronic device 100, and can also be used to transfer data between the electronic device 100 and a peripheral device. It can also be used to connect headphones to play audio through the headphones. The interface can also be used to connect other electronic devices, such as AR devices, etc.

[0059] It is understandable that the interface connection relationship between the modules illustrated in the embodiment of the present invention is only a schematic illustration and does not constitute a structural limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.

[0060] The charging management module 140 is used to receive charging input from a charger. The charger may be a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 may receive charging input from a wired charger through the USB interface 130. In some wireless charging embodiments, the charging management module 140 may receive wireless charging input through a wireless charging coil of the electronic device 100. While the charging management module 140 is charging the battery 142, it may also power the electronic device through the power management module 141.

[0061] The power management module 141 is used to connect the battery 142, the charging management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140, and supplies power to the processor 110, the internal memory 121, the display screen 194, the camera 193, and the wireless communication module 160. The power management module 141 can also be used to monitor parameters such as battery capacity, battery cycle number, battery health status (leakage, impedance), etc. In some other embodiments, the power management module 141 can also be set in the processor 110. In other embodiments, the power management module 141 and the charging management module 140 can also be set in the same device.

[0062] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor and the baseband processor.

[0063] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve the utilization of antennas. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0064] The mobile communication module 150 can provide solutions for wireless communications including 2G / 3G / 4G / 5G, etc., applied to the electronic device 100. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves from the antenna 1, and filter, amplify, and process the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the same device as at least some of the modules of the processor 110.

[0065] The modem processor may include a modulator and a demodulator. Among them, the modulator is used to modulate the low-frequency baseband signal to be sent into a medium-high frequency signal. The demodulator is used to demodulate the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After the low-frequency baseband signal is processed by the baseband processor, it is passed to the application processor. The application processor outputs a sound signal through an audio device (not limited to a speaker 170A, a receiver 170B, etc.), or displays an image or video through a display screen 194. In some embodiments, the modem processor may be an independent device. In other embodiments, the modem processor may be independent of the processor 110 and be set in the same device as the mobile communication module 150 or other functional modules.

[0066] The wireless communication module 160 can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to the electronic device 100. The wireless communication module 160 can be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, modulates the frequency of the electromagnetic wave signal and performs filtering, and sends the processed signal to the processor 110. The wireless communication module 160 can also receive the signal to be sent from the processor 110, modulate the frequency of it, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.

[0067] In some embodiments, the antenna 1 of the electronic device 100 is coupled to the mobile communication module 150, and the antenna 2 is coupled to the wireless communication module 160, so that the electronic device 100 can communicate with the network and other devices through wireless communication technology. The wireless communication technology may include global system for mobile communications (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), time-division code division multiple access (TD-SCDMA), long term evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technology. The GNSS may include a global positioning system (GPS), a global navigation satellite system (GLONASS), a Beidou navigation satellite system (BDS), a quasi-zenith satellite system (QZSS) and / or a satellite based augmentation system (SBAS).

[0068] The electronic device 100 implements the display function through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, which connects the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or change display information.

[0069] The display screen 194 is used to display images, videos, etc. The display screen 194 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device 100 may include 1 or N display screens 194, where N is a positive integer greater than 1.

[0070] The electronic device 100 can realize the shooting function through ISP, camera 193, video codec, GPU, display screen 194 and application processor.

[0071] The ISP is used to process the data fed back by the camera 193. For example, when taking a photo, the shutter is opened, and the light is transmitted to the camera photosensitive element through the lens. The light signal is converted into an electrical signal, and the camera photosensitive element transmits the electrical signal to the ISP for processing and converts it into an image visible to the naked eye. The ISP can also perform algorithm optimization on the noise and brightness of the image. The ISP can also optimize the exposure, color temperature and other parameters of the shooting scene. In some embodiments, the ISP can be set in the camera 193.

[0072] The camera 193 is used to capture still images or videos. The object generates an optical image through the lens and projects it onto the photosensitive element. The photosensitive element can be a charge coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, and then passes the electrical signal to the ISP to be converted into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard RGB, YUV or other format. In some embodiments, the electronic device 100 may include 1 or N cameras 193, where N is a positive integer greater than 1.

[0073] The digital signal processor is used to process digital signals, and can process not only digital image signals but also other digital signals. For example, when the electronic device 100 is selecting a frequency point, the digital signal processor is used to perform Fourier transform on the frequency point energy.

[0074] Video codecs are used to compress or decompress digital videos. The electronic device 100 may support one or more video codecs. Thus, the electronic device 100 may play or record videos in a variety of coding formats, such as Moving Picture Experts Group (MPEG) 1, MPEG2, MPEG3, MPEG4, etc.

[0075] NPU is a neural network (NN) computing processor. By drawing on the structure of biological neural networks, such as the transmission mode between neurons in the human brain, it can quickly process input information and can also continuously self-learn. Through NPU, applications such as intelligent cognition of electronic device 100 can be realized, such as image recognition, face recognition, voice recognition, text understanding, etc.

[0076] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external memory interface 120 to implement a data storage function, such as storing music, video and other files in the external memory card.

[0077] The internal memory 121 can be used to store computer executable program codes, which include instructions. The internal memory 121 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data created during the use of the electronic device 100 (such as audio data, a phone book, etc.), etc. In addition, the internal memory 121 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc. The processor 110 executes various functional applications and data processing of the electronic device 100 by running instructions stored in the internal memory 121, and / or instructions stored in a memory provided in the processor.

[0078] The electronic device 100 can implement audio functions such as music playing and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.

[0079] The audio module 170 is used to convert digital audio information into analog audio signal output, and is also used to convert analog audio input into digital audio signals. The audio module 170 can also be used to encode and decode audio signals. In some embodiments, the audio module 170 can be arranged in the processor 110, or some functional modules of the audio module 170 can be arranged in the processor 110.

[0080] The speaker 170A, also called a "speaker", is used to convert an audio electrical signal into a sound signal. The electronic device 100 can listen to music or listen to a hands-free call through the speaker 170A. A plurality of speakers 170A can be provided in the electronic device 100. For example, a speaker 170A can be provided on the top of the electronic device 100, and a speaker 170A can also be provided on the bottom, and so on.

[0081] The receiver 170B, also called a "receiver", is used to convert audio electrical signals into sound signals. When the electronic device 100 receives a call or voice message, the receiver 170B can be placed close to the human ear to receive the voice. In some embodiments, the speaker 170A and the receiver 170B can also be set as one component, which is not limited in the present application.

[0082] Microphone 170C, also called "microphone" or "microphone", is used to convert sound signals into electrical signals. When making a call or sending a voice message, the user can speak by putting their mouth close to microphone 170C to input the sound signal into microphone 170C. The electronic device 100 can be provided with at least one microphone 170C. In other embodiments, the electronic device 100 can be provided with two microphones 170C, which can not only collect sound signals but also realize noise reduction function. In other embodiments, the electronic device 100 can also be provided with three, four or more microphones 170C to collect sound signals, reduce noise, identify the sound source, realize directional recording function, etc.

[0083] The earphone interface 170D is used to connect a wired earphone and can be a USB interface 130 or a 3.5 mm open mobile terminal platform (OMTP) standard interface or a cellular telecommunications industry association of the USA (CTIA) standard interface.

[0084] The pressure sensor 180A is used to sense the pressure signal and can convert the pressure signal into an electrical signal. In some embodiments, the pressure sensor 180A can be set on the display screen 194. There are many types of pressure sensors 180A, such as resistive pressure sensors, inductive pressure sensors, capacitive pressure sensors, etc. The capacitive pressure sensor can be a parallel plate including at least two conductive materials. When a force acts on the pressure sensor 180A, the capacitance between the electrodes changes. The electronic device 100 determines the intensity of the pressure according to the change in capacitance. When a touch operation acts on the display screen 194, the electronic device 100 detects the touch operation intensity according to the pressure sensor 180A. The electronic device 100 can also calculate the touch position according to the detection signal of the pressure sensor 180A. In some embodiments, touch operations acting on the same touch position but with different touch operation intensities can correspond to different operation instructions. For example: when a touch operation with a touch operation intensity less than the first pressure threshold acts on the short message application icon, an instruction to view the short message is executed. When a touch operation with a touch operation intensity greater than or equal to the first pressure threshold acts on the short message application icon, an instruction to create a new short message is executed.

[0085] The gyro sensor 180B can be used to determine the motion posture of the electronic device 100. In some embodiments, the angular velocity of the electronic device 100 around three axes (i.e., x, y, and z axes) can be determined by the gyro sensor 180B. The gyro sensor 180B can be used for anti-shake shooting. For example, when the shutter is pressed, the gyro sensor 180B detects the angle of the electronic device 100 shaking, calculates the distance that the lens module needs to compensate based on the angle, and allows the lens to offset the shaking of the electronic device 100 through reverse movement to achieve anti-shake. The gyro sensor 180B can also be used for navigation and somatosensory game scenes.

[0086] The air pressure sensor 180C is used to measure air pressure. In some embodiments, the electronic device 100 calculates the altitude through the air pressure value measured by the air pressure sensor 180C to assist positioning and navigation.

[0087] The magnetic sensor 180D includes a Hall sensor. The electronic device 100 can use the magnetic sensor 180D to detect the opening and closing of the flip leather case. In some embodiments, when the electronic device 100 is a flip phone, the electronic device 100 can detect the opening and closing of the flip cover according to the magnetic sensor 180D. Then, according to the detected opening and closing state of the leather case or the opening and closing state of the flip cover, the flip cover can be automatically unlocked.

[0088] The acceleration sensor 180E can detect the magnitude of the acceleration of the electronic device 100 in all directions (generally three axes). When the electronic device 100 is stationary, the magnitude and direction of gravity can be detected. It can also be used to identify the posture of the electronic device and is applied to applications such as horizontal and vertical screen switching and pedometers.

[0089] The distance sensor 180F is used to measure the distance. The electronic device 100 can measure the distance by infrared or laser. In some embodiments, when shooting a scene, the electronic device 100 can use the distance sensor 180F to measure the distance to achieve fast focusing.

[0090] The proximity light sensor 180G may include, for example, a light emitting diode (LED) and a light detector, such as a photodiode. The light emitting diode may be an infrared light emitting diode. The electronic device 100 emits infrared light outward through the light emitting diode. The electronic device 100 uses a photodiode to detect infrared reflected light from nearby objects. When sufficient reflected light is detected, it can be determined that there is an object near the electronic device 100. When insufficient reflected light is detected, the electronic device 100 can determine that there is no object near the electronic device 100. The electronic device 100 can use the proximity light sensor 180G to detect that the user holds the electronic device 100 close to the ear to talk, so as to automatically turn off the screen to save power. The proximity light sensor 180G can also be used in leather case mode and pocket mode to automatically unlock and lock the screen.

[0091] The ambient light sensor 180L is used to sense the ambient light brightness. The electronic device 100 can adaptively adjust the brightness of the display screen 194 according to the perceived ambient light brightness. The ambient light sensor 180L can also be used to automatically adjust the white balance when taking pictures. The ambient light sensor 180L can also cooperate with the proximity light sensor 180G to detect whether the electronic device 100 is in a pocket to prevent accidental touches.

[0092] The fingerprint sensor 180H is used to collect fingerprints. The electronic device 100 can use the collected fingerprint characteristics to implement fingerprint unlocking, access application locks, fingerprint photography, fingerprint call answering, etc.

[0093] The temperature sensor 180J is used to detect temperature. In some embodiments, the electronic device 100 uses the temperature detected by the temperature sensor 180J to execute a temperature processing strategy. For example, when the temperature reported by the temperature sensor 180J exceeds a threshold, the electronic device 100 reduces the performance of a processor located near the temperature sensor 180J to reduce power consumption and implement thermal protection. In other embodiments, when the temperature is lower than another threshold, the electronic device 100 heats the battery 142 to avoid abnormal shutdown of the electronic device 100 due to low temperature. In other embodiments, when the temperature is lower than another threshold, the electronic device 100 performs a boost on the output voltage of the battery 142 to avoid abnormal shutdown caused by low temperature.

[0094] The touch sensor 180K is also called a "touch control device". The touch sensor 180K can be set on the display screen 194. The touch sensor 180K and the display screen 194 form a touch screen, also called a "touch control screen". The touch sensor 180K is used to detect touch operations acting on or near it. The touch sensor can pass the detected touch operation to the application processor to determine the type of touch event. Visual output related to the touch operation can be provided through the display screen 194. In other embodiments, the touch sensor 180K can also be set on the surface of the electronic device 100, which is different from the position of the display screen 194.

[0095] The bone conduction sensor 180M can obtain a vibration signal. In some embodiments, the bone conduction sensor 180M can obtain a vibration signal of a vibrating bone block of the vocal part of the human body. The bone conduction sensor 180M can also contact the human pulse to receive a blood pressure beat signal. In some embodiments, the bone conduction sensor 180M can also be set in an earphone and combined into a bone conduction earphone. The audio module 170 can parse out a voice signal based on the vibration signal of the vibrating bone block of the vocal part obtained by the bone conduction sensor 180M to realize a voice function. The application processor can parse the heart rate information based on the blood pressure beat signal obtained by the bone conduction sensor 180M to realize a heart rate detection function.

[0096] The key 190 includes a power key, a volume key, etc. The key 190 may be a mechanical key or a touch key. The electronic device 100 may receive key input and generate key signal input related to user settings and function control of the electronic device 100.

[0097] Motor 191 can generate vibration prompts. Motor 191 can be used for incoming call vibration prompts, and can also be used for touch vibration feedback. For example, touch operations acting on different applications (such as taking pictures, audio playback, etc.) can correspond to different vibration feedback effects. For touch operations acting on different areas of the display screen 194, motor 191 can also correspond to different vibration feedback effects. Different application scenarios (for example: time reminders, receiving messages, alarm clocks, games, etc.) can also correspond to different vibration feedback effects. The touch vibration feedback effect can also support customization.

[0098] Indicator 192 may be an indicator light, which may be used to indicate charging status, power changes, messages, missed calls, notifications, etc.

[0099] The SIM card interface 195 is used to connect a SIM card. The SIM card can be connected to and separated from the electronic device 100 by inserting it into the SIM card interface 195 or pulling it out from the SIM card interface 195. The electronic device 100 can support 1 or N SIM card interfaces, where N is a positive integer greater than 1. The SIM card interface 195 can support Nano SIM cards, Micro SIM cards, SIM cards, and the like. Multiple cards can be inserted into the same SIM card interface 195 at the same time. The types of the multiple cards can be the same or different. The SIM card interface 195 can also be compatible with different types of SIM cards. The SIM card interface 195 can also be compatible with external memory cards. The electronic device 100 interacts with the network through the SIM card to implement functions such as calls and data communications. In some embodiments, the electronic device 100 uses an eSIM, i.e., an embedded SIM card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100.

[0100] The software system of the electronic device 100 may adopt a layered architecture, an event-driven architecture, a micro-core architecture, a micro-service architecture, or a cloud architecture. In the embodiment of the present invention, the Android system of the layered architecture is taken as an example to exemplify the software structure of the electronic device 100.

[0101] Figure 2 It is a software structure block diagram of the electronic device 100 according to an embodiment of the present application.

[0102] The layered architecture divides the software into several layers, each with clear roles and division of labor. The layers communicate with each other through software interfaces. In some embodiments, the Android system is divided into four layers, from top to bottom: the application layer, the application framework layer, the Android runtime and system library, and the kernel layer.

[0103] The application layer can include a series of application packages.

[0104] like Figure 2 As shown, the application package may include games, cameras, galleries, calendars, calls, maps, navigation, WLAN, Bluetooth, music, videos, short messages and other applications.

[0105] The application framework layer provides an application programming interface (API) and a programming framework for the applications in the application layer. The application framework layer includes some predefined functions.

[0106] like Figure 2 As shown, the application framework layer may include a window manager, a content provider, a view system, a phone manager, a resource manager, a notification manager, a configuration parsing module, a parameter configuration module, and the like.

[0107] In the embodiment of the present application, a configuration file including a core binding strategy can be configured into an electronic device, so that a configuration parsing module is used to parse the configuration file, obtain core binding strategy parameters, and pass the core binding strategy parameters to a parameter configuration module.

[0108] The window manager is used to manage window programs. The window manager can obtain the display screen size, determine whether there is a status bar, lock the screen, capture the screen, etc.

[0109] Content providers are used to store and retrieve data and make it accessible to applications. The data may include videos, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.

[0110] The view system includes visual controls, such as controls for displaying text, controls for displaying images, etc. The view system can be used to build applications. A display interface can be composed of one or more views. For example, a display interface including a text notification icon can include a view for displaying text and a view for displaying images.

[0111] The phone manager is used to provide communication functions of the electronic device 100, such as management of call status (including connecting, hanging up, etc.).

[0112] The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

[0113] The notification manager enables applications to display notification information in the status bar. It can be used to convey notification-type messages and can disappear automatically after a short stay without user interaction. For example, the notification manager is used to notify download completion, message reminders, etc. The notification manager can also be a notification that appears in the system top status bar in the form of a chart or scroll bar text, such as notifications of applications running in the background, or a notification that appears on the screen in the form of a dialog window. For example, a text message is displayed in the status bar, a prompt sound is emitted, an electronic device vibrates, an indicator light flashes, etc.

[0114] Android Runtime includes core libraries and virtual machines. Android runtime is responsible for scheduling and management of the Android system.

[0115] The core library consists of two parts: one is the function that needs to be called by the Java language, and the other is the Android core library.

[0116] The application layer and the application framework layer run in a virtual machine. The virtual machine executes the Java files of the application layer and the application framework layer as binary files. The virtual machine is used to perform functions such as object life cycle management, stack management, thread management, security and exception management, and garbage collection.

[0117] The system library may include multiple functional modules, such as surface manager, media library, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.

[0118] The surface manager is used to manage the display subsystem and provide the fusion of 2D and 3D layers for multiple applications.

[0119] The media library supports playback and recording of a variety of commonly used audio and video formats, as well as static image files, etc. The media library can support a variety of audio and video encoding formats, such as: MPEG4, H.264, MP3, AAC, AMR, JPG, PNG, etc.

[0120] The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.

[0121] A 2D graphics engine is a drawing engine for 2D drawings.

[0122] The kernel layer is the layer between hardware and software. The kernel layer contains at least display driver, camera driver, audio driver, and sensor driver.

[0123] In the embodiment of the present application, the kernel layer also includes a file system, a memory management module and a scheduling module. The kernel layer provides a write node, so that the parameter configuration module can transmit the binding core policy parameters to the file system in the kernel layer through the write node.

[0124] The memory management module is used to manage system memory resources. The memory management module stores the task structure of each thread.

[0125] The scheduling module is used to manage processor resources. For multi-core processors, the scheduling module can perform scheduling according to certain scheduling rules, and all threads running on the processor cores can receive the overall scheduling of the scheduling module. For example, the scheduling module can provide a native interface set_cpus_allowed_ptr, so that the core binding policy can be set using this native interface.

[0126] like Figure 3As shown, in order to implement the core binding strategy adaptation method of the embodiment of the present application, it is necessary to at least set up a configuration parsing module and a parameter configuration module in the application framework layer, and the driver layer provides a write node, as well as support for software such as the file system, memory management module and scheduling module in the driver layer.

[0127] The following takes the electronic device as a mobile phone, which may include a configuration parsing module, a parameter configuration module, a file system, a memory management module, and a scheduling module as an example. Figure 3 and attached Figure 4 , the core binding strategy adaptation method provided in the embodiment of the present application is described in detail. Figure 4 A flowchart of a core binding strategy adaptation method provided in an embodiment of the present application. Figure 4 As shown, the core binding strategy adaptation method may include the following S201 to S206.

[0128] S201, a configuration parsing module obtains and parses a configuration file.

[0129] The configuration file includes core binding policy parameters adapted to the current electronic device, wherein the core binding policy parameters include at least one target thread and a target binding core corresponding to each target thread in the at least one target thread.

[0130] Exemplarily, in order to solve the problem that in a high-load scenario, memory management threads such as kswapd, xreclaimer, and kshrink may occupy the small cores, medium cores, and large cores of the processor, so that the memory management threads compete with the foreground threads for processor resources, resulting in the foreground process not being scheduled, thereby causing a jamming phenomenon, the memory management threads such as kswapd, xreclaimer, and kshrink can be bound to the cores to be bound to the specified cores for operation. In this way, the target threads in the configuration file may include kswapd, xreclaimer, and kshrink, as well as the target binding cores corresponding to kswapd, xreclaimer, and kshrink, respectively. For example, the target binding core corresponding to kswapd is the core numbered 0-6 in the current electronic device, the target binding core corresponding to xreclaimer is the core numbered 0-2 in the current electronic device, and the target binding core corresponding to kshrink is the core numbered 0-2 in the current electronic device.

[0131] In the embodiment of the present application, the core binding strategy parameters corresponding to different electronic devices may be different. Specifically, the optimal core binding strategy parameters can be determined for different electronic devices. Then, the optimal core binding strategy parameters corresponding to each electronic device are respectively configured in the product components of the corresponding electronic device.

[0132] The embodiment of the present application does not specifically limit the method for determining the optimal core binding strategy parameters for each electronic device. For example, the optimal core binding strategy parameters for each device to be tested can be determined using a test device based on a performance dynamic model and a power consumption model in the test device.

[0133] Among them, the performance dynamic model can be understood as a tool for testing and analyzing the performance of electronic devices, and can specifically be an algorithmic model. In some embodiments, the performance dynamic model can be used to test the application startup response index and / or sliding response index of the electronic device under different core binding strategies. For example, when starting the application, the startup time of the application can be tested. For another example, the sliding response time can be tested when performing a sliding operation on the application interface. The power consumption model can be understood as a tool for testing and analyzing the power consumption performance of electronic devices, and can also be an algorithmic model. In some embodiments, the power consumption model can be used to test the power consumption of electronic devices under different core binding strategies.

[0134] In an embodiment of the present application, the test device and the device to be tested may be the same electronic device or may not be the same electronic device. If the test device and the device to be tested are the same electronic device, the performance dynamic model and the power consumption model may be installed on the device to be tested. If the test device and the device to be tested are not the same electronic device, the performance dynamic model and the power consumption model may be installed on the test device, and the test device is communicatively connected to the device to be tested. In this way, the test device can also test the performance data and power consumption data of the device to be tested.

[0135] For example, the test device and the device to be tested are not the same electronic device. Figure 5A As shown, the test device 300 includes a performance dynamic model 310 and a power consumption model 320, and the device to be tested 400A includes a multi-core processor. Specifically, the central processing unit (CPU) of the device to be tested 400A is an octa-core processor, and the CPU is divided into a small core and a medium core. Among them, the CPUs numbered 0-3 are all small cores, and the CPUs numbered 4-7 are all medium cores.

[0136] Another exemplary example is Figure 5B As shown, the test device 300 includes a performance dynamic model 310 and a power consumption model 320, and the device to be tested 400B includes a multi-core processor. Specifically, the central processing unit CPU of the device to be tested 400B is also an octa-core processor, and the CPU is divided into a small core, a medium core, and a large core. Among them, the CPUs numbered 0-2 are all small cores, the CPUs numbered 3-6 are all medium cores, and the CPU numbered 7 is a large core.

[0137] It can be seen that the distribution of the cores of the processors of different devices to be tested in the embodiment of the present application is different. In this way, the testing device 300 can test different devices to be tested respectively to determine the optimal core binding strategy parameters for each device to be tested.

[0138] In some embodiments, the optimal core binding policy parameters of each device to be tested are determined by the test device 300, which can be implemented in the following manner: first determine the core distribution parameters of the processor of the device to be tested and the target thread to be bound. Then, the test device 300 determines multiple alternative core binding policy parameters corresponding to the device to be tested based on the core distribution parameters and the target thread to be bound. Next, the test device 300 uses the performance dynamic model and the power consumption model to test multiple alternative core binding policy parameters to obtain comprehensive performance data corresponding to each alternative core binding policy parameter. Finally, the test device 300 determines the core binding policy parameter to be tested with the highest comprehensive performance as the optimal core binding policy parameter for the device to be tested.

[0139] For example, Figure 5A and Fig. 6A As shown, taking the target threads to be bound as kswapd, xreclaimer and kshrink, and the device to be tested as the device to be tested 400A as an example, the candidate core binding policy parameters for the three threads kswapd, xreclaimer and kshrink can be determined based on the core distribution of the processor in the device to be tested 400A. Fig. 6A As shown, n groups (A1 to An) of alternative core binding policy parameters can be determined. Each group of alternative core binding policy parameters includes threads kswapd, xreclaimer and kshrink, and core numbers corresponding to threads kswapd, xreclaimer and kshrink, respectively. Then, the core binding operation is performed on the device to be tested 400A according to the alternative core binding policy parameters in each of A1 to An, and the test data is run on the device to be tested 400A. When the device to be tested 400A uses different alternative core binding policy parameters to run the test data, the test device 300 tests the performance data and power consumption data of the device to be tested 400A. For example, the performance data includes an application startup response index and a sliding response index, and the power consumption data includes the power consumption of the device to be tested 400A.

[0140] In this way, comprehensive performance data corresponding to each set of alternative core binding policy parameters can be obtained, that is, performance data and power consumption data. Further, a group with the highest comprehensive performance can be determined from multiple sets of comprehensive performance data, and the alternative core binding policy parameters with the highest comprehensive performance can be determined as the best alternative core binding policy parameters for the device to be tested 400A. The performance data with the highest comprehensive performance refers to high performance and low power consumption. Specifically, the group with the highest comprehensive performance can be determined from multiple sets of comprehensive performance data according to the preset comprehensive performance evaluation rules. Exemplarily, the best alternative core binding policy parameters for the device to be tested 400A are finally determined as follows: the target binding core corresponding to kswapd is the core numbered 0-6 in the current device to be tested 400A, the target binding core corresponding to xreclaimer is the core numbered 0-2 in the current device to be tested 400A, and the target binding core corresponding to kshrink is the core numbered 0-2 in the current device to be tested 400A.

[0141] Similar, such as Figure 5B and Figure 6B As shown, taking the target threads to be bound as kswapd, xreclaimer and kshrink, and the device to be tested as the device to be tested 400B as an example, the best candidate binding core policy parameters for the device to be tested 400B are determined as follows: the target binding core corresponding to kswapd is the core numbered 0-3 in the current device to be tested 400B, the target binding core corresponding to xreclaimer is the core numbered 0-3 in the current device to be tested 400B, and the target binding core corresponding to kshrink is the core numbered 0-3 in the current device to be tested 400B. Among them, the method for determining the best candidate binding core policy parameters for the device to be tested 400B can be specifically referred to the description of the method for determining the best candidate binding core policy parameters for the device to be tested 400A, which will not be repeated here.

[0142] It can be seen that electronic devices with different processors have different corresponding optimal candidate core binding strategy parameters.

[0143] After determining the optimal core binding policy parameters of the electronic device, the optimal core binding policy parameters can be configured in the electronic device in the form of a configuration file. In some embodiments, the configuration file can be compiled into the product component of the electronic device using the Android native compilation mechanism. Exemplarily, the optimal core binding policy parameters can be saved in the xml file format. Specifically, the format can be set to include the target thread name (such as kswapd, xreclaimer, and kshrink) and the target binding core number corresponding to each target thread name (such as 0-7).

[0144] In this way, in response to the electronic device being powered on, the configuration parsing module in the application framework layer can parse the configuration file to obtain the core binding policy parameters. Among them, the configuration parsing module can generate a core binding policy string based on the core binding policy parameters in the configuration file, and the core binding policy string is used to characterize the core binding policy corresponding to the electronic device. Exemplarily, the format of the core binding policy string can be as follows: kswapd: 0-6; xreclaimer: 0-2; kshrink: 0-2.

[0145] S202, the configuration parsing module sends the core binding policy parameters to the parameter configuration module.

[0146] S203, the parameter configuration module writes the core binding configuration parameters into the file system of the kernel layer through the write node provided by the kernel layer.

[0147] In some embodiments, the file system may be a proc file system, which is a special file system created by software. The kernel layer may use the proc file system to export information to the outside world. The proc system exists only in memory and does not occupy external memory space. Each file under the proc file system is bound to a kernel function, which dynamically generates the content of the file when the user reads the file. Kernel parameters may also be modified by writing proc files.

[0148] Exemplarily, the embodiment of the present application can add a bind_cpu node as a write node under the proc file system of the kernel layer, and implement the callback function bind_cpu_write for this write node. In this way, the parameter configuration module can write the core binding policy string to / proc / bind_cpu_write through the write node / proc / bind_cpu provided by the kernel layer. When the core binding policy string is written to / proc / bind_cpu_write, the proc file system of the kernel layer can call the callback function bind_cpu_write to obtain the core binding policy string. In this way, the proc file system of the kernel layer can parse the core binding policy string to obtain the core binding policy parameters, that is, obtain the target thread and the target binding core corresponding to each target thread.

[0149] S204: The file system obtains a structure corresponding to each target thread from the memory management module based on the core binding policy parameters.

[0150] Generally, Linux uses the task_struct structure to describe and record all thread information. Each thread has a corresponding task_struct structure. The task_struct structure can record the thread's name, identifier, state, priority, memory pointer, context data and other attribute information.

[0151] The task_struct structure of each thread is stored in the memory management module. In this way, the file system can obtain the task_struct structure corresponding to each target thread from the memory management module to prepare for the subsequent core binding operation.

[0152] S205, the file system calls the core binding interface.

[0153] S206 , based on the core binding policy parameters and the structure of each target thread, each target thread is bound to the target binding core through the core binding interface.

[0154] In some embodiments, a corresponding interface or tool may be used to bind the target thread to the target binding core. For example, the scheduling module may provide a native interface set_cpus_allowed_ptr as a binding core interface. In this way, the binding core interface set_cpus_allowed_ptr may be used to set the binding core policy.

[0155] The input parameters of the core binding interface set_cpus_allowed_ptr include two parameters. The first parameter is the structure-related parameter task_struct, for example, it can be kswapd, xreclaimer, kshrink, etc. in the core binding policy parameters. The second parameter is the CUP-related parameter struc cpumask*new_mask, for example, it can be 0-6, 0-2, 0-2, etc. in the core binding policy parameters. In this way, the core binding policy can be set through the native interface set_cpus_allowed_ptr based on the structure of each target thread and the CUP core corresponding to each target thread, that is, each target thread can be bound to the target binding core respectively.

[0156] In summary, the core binding policy adaptation method provided in the embodiment of the present application prefabricates a configuration file in the product component of the electronic device, and then parses the configuration file through the upper application framework layer, and passes the parsed core binding policy parameters to the lower kernel layer. This method does not require modification of the co-warehouse code, so it will not affect other series of electronic devices, and realizes the decoupling of the core binding policy from different series of electronic devices. Secondly, the core binding policy adaptation method provided in the embodiment of the present application, different electronic devices can have configuration files containing core binding policy parameters suitable for themselves, this method allows the core binding policy to be customized according to the needs of different electronic devices without affecting other electronic devices. In addition, by prefabricating configuration files in the product components of electronic devices, if the core binding policy needs to be modified, it is only necessary to update the corresponding configuration file without modifying the code and recompiling, making the adjustment of the core binding policy more flexible and maintainable.

[0157] For ease of understanding, the following Figure 7 The core binding strategy adaptation method provided in the embodiment of the present application is described, and the core binding strategy adaptation method can be applied to electronic devices, such as mobile phones. Figure 7 As shown, the core binding strategy adaptation method may include the following S501-S503.

[0158] S501, obtaining a configuration file, where the configuration file includes core binding strategy parameters adapted to the electronic device.

[0159] The core binding policy parameter may be an alternative core binding policy parameter with the highest comprehensive performance obtained by testing multiple alternative core binding policy parameters using a performance dynamic model and a power consumption model, wherein the multiple alternative core binding policy parameters are determined based on the core distribution parameters of the processor.

[0160] The method for determining the core binding strategy parameters adapted to the current electronic device may be specifically referred to the description of step S201, which will not be repeated here.

[0161] S502, parsing a configuration file to obtain core binding policy parameters; wherein the core binding policy parameters include at least one target thread and a target binding core corresponding to each target thread in the at least one target thread.

[0162] After the electronic device is turned on, the application framework layer of the electronic device parses the configuration file to obtain the core binding policy parameters in the configuration file.

[0163] In some embodiments, the core binding policy parameters may include each target thread name and a target binding core number corresponding to each target thread name.

[0164] The method of parsing the configuration file may be specifically referred to the description of step S201, which will not be repeated here.

[0165] S503: Bind each target thread to the corresponding target binding core according to the core binding policy parameters.

[0166] In some embodiments, the application framework layer can write the core binding configuration parameters into the file system of the kernel layer through the write node of the kernel layer of the electronic device; then, the file system obtains the structure of each target thread in the core binding configuration parameters based on the core binding configuration parameters; finally, the file system calls the core binding interface, and based on the core binding configuration parameters and the structure of each target thread, binds each target thread to the target binding core through the core binding interface.

[0167] In order to solve the problem that memory management threads such as kswapd, xreclaimer, and kshrink may occupy the small cores, medium cores, and large cores of the processor in high-load scenarios, so that the foreground process cannot be scheduled due to the competition between memory management threads and foreground threads for processor resources, resulting in lag, the threads in the configuration file can be memory management threads, such as threads kswapd, xreclaimer, and kshrink. In this way, the memory management threads can be bound to the specified core for running.

[0168] The specific method of binding the core may refer to the description of step S202 to step S206, which will not be repeated here.

[0169] In this way, the solution provided by the embodiment of the present application can, on the one hand, solve the problem that the foreground process cannot be scheduled and the jamming phenomenon occurs. On the other hand, it provides a flexible core binding strategy solution to adapt to the differences between different products and avoid modifications to the co-warehouse code. Specifically, the core binding strategy is set in the form of a configuration file, and appropriate core binding strategy parameters can be selected according to the requirements of each product to achieve the desired performance and power consumption balance. This method allows the core binding strategy to be customized according to different product requirements without affecting other products, thereby decoupling the core binding strategy from different product series.

[0170] The various method embodiments described in this document may be independent solutions or may be combined according to internal logic, and these solutions all fall within the protection scope of this application.

[0171] It can be understood that, in the above-mentioned various method embodiments, the methods and operations implemented by the electronic device can also be implemented by components (such as chips or circuits) that can be used in the electronic device.

[0172] The above embodiments introduce the core binding strategy adaptation method provided by the present application. It is understandable that, in order to realize the above functions, the electronic device includes a hardware structure and / or software module corresponding to each function. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0173] Figure 8 is a schematic diagram of a core binding strategy adaptation device provided in an embodiment of the present application. In one embodiment, the electronic device can Figure 8The software device shown in the figure realizes the corresponding functions. Figure 8 As shown, the core binding policy adaptation device 600 may include: an acquisition module 601 , a configuration parsing module 602 and a binding module 603 .

[0174] An acquisition module 601 is used to acquire a configuration file, where the configuration file includes core binding strategy parameters adapted to the electronic device;

[0175] A configuration parsing module 602 is used to parse the configuration file to obtain the core binding policy parameters; wherein the core binding policy parameters include at least one target thread and a target binding core corresponding to each target thread in the at least one target thread;

[0176] The binding module 603 is used to bind each of the target threads to the corresponding target binding core according to the core binding policy parameters.

[0177] In one implementable manner, the core binding policy parameter is an alternative core binding policy parameter with the highest comprehensive performance obtained by testing multiple alternative core binding policy parameters using a performance dynamic model and a power consumption model, wherein the multiple alternative core binding policy parameters are determined based on the core distribution parameters of the processor and the target thread.

[0178] In one implementable method, the performance dynamic model is used to perform performance testing on the multiple alternative core binding policy parameters to obtain at least one performance indicator corresponding to each of the alternative core binding policy parameters; wherein the performance indicator includes an application startup response indicator and / or a sliding response indicator; the power consumption model is used to perform power consumption testing on the multiple alternative core binding policy parameters to obtain the power consumption corresponding to each of the alternative core binding policy parameters; the core binding policy parameter is an alternative core binding policy parameter with the highest comprehensive performance determined from among the alternative core binding policy parameters based on the at least one performance indicator and the power consumption.

[0179] In an implementable manner, the configuration parsing module 602 is specifically configured to parse the configuration file in response to the electronic device being powered on to obtain the core binding policy parameters.

[0180] In an implementable manner, the configuration parsing module 602 is further configured to write the core binding configuration parameter into the file system of the kernel layer through a write node of the kernel layer of the electronic device;

[0181] The binding module 603 is specifically used to obtain the structure of each target thread in the binding core configuration parameter based on the binding core configuration parameter; call the binding core interface, and bind each target thread to the target binding core through the binding core interface based on the binding core configuration parameter and the structure of each target thread. For example, the binding module 603 may include a file system, a memory management system, and a scheduling system.

[0182] In an implementable manner, the core binding policy parameters include each of the target thread names and a target binding core number corresponding to each of the target thread names.

[0183] In one achievable manner, the target thread is a memory management thread.

[0184] In an implementable manner, the target thread includes at least one of a memory paging daemon thread kswapd, a memory reclaiming thread xreclaimer, and a memory compression thread kshrink.

[0185] That is, the device 600 can realize the corresponding Figure 4 and Figure 7 The steps or processes performed by the method embodiment shown in the figure may include a device for performing Figure 4 and Figure 7 The modules of the method executed in the method embodiment shown. It should be understood that the specific process of each module executing the above corresponding steps has been described in detail in the above method embodiment, and for the sake of brevity, it will not be repeated here.

[0186] In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in a processor or an instruction in the form of software. The steps of the method disclosed in conjunction with the embodiment of the present application can be directly embodied as a hardware processor for execution, or a combination of hardware and software modules in a processor for execution. The software module can be located in a storage medium mature in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in conjunction with its hardware. To avoid repetition, it is not described in detail here.

[0187] It should be noted that the processor in the embodiment of the present application can be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method embodiment can be completed by an integrated logic circuit of hardware in the processor or an instruction in the form of software. The above processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in the embodiment of the present application can be directly embodied as a hardware decoding processor to perform, or the hardware and software modules in the decoding processor can be combined and performed. The software module can be located in a mature storage medium in the field such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0188] It can be understood that the memory in the embodiments of the present application can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0189] According to the method provided in the embodiments of the present application, the embodiments of the present application also provide a computer program product, which includes: a computer program or instructions, when the computer program or instructions are run on a computer, the computer executes the method of any one of the embodiments of the method.

[0190] According to the method provided by the embodiments of the present application, the embodiments of the present application also provide a computer storage medium, which stores a computer program or instructions. When the computer program or instructions are run on a computer, the computer executes the method of any one of the embodiments of the method.

[0191] According to the method provided by an embodiment of the present application, an embodiment of the present application also provides an electronic device, including a memory and a processor; the memory and the processor are coupled; the memory is used to store computer program code, and the computer program code includes computer instructions. When the processor executes the computer instructions, the electronic device executes the method of any one of the embodiments of the method embodiment.

[0192] Those of ordinary skill in the art will appreciate that the various illustrative logical blocks and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or in a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0193] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and modules described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0194] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0195] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0196] In addition, each functional module in each embodiment of the present application may be integrated into one processing unit, or each module may exist physically separately, or two or more modules may be integrated into one unit.

[0197] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage media include: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks or optical disks.

[0198] The devices, computer storage media, computer program products, and electronic devices provided in the above-mentioned embodiments of the present application are all used to execute the methods provided above. Therefore, the beneficial effects that can be achieved can refer to the corresponding beneficial effects of the methods provided above, and will not be repeated here.

[0199] It should be understood that in each embodiment of the present application, the execution order of each step should be determined by its function and internal logic, and the size of the sequence number of each step does not mean the order of execution and does not limit the implementation process of the embodiment.

[0200] Each part of this specification is described in a progressive manner, and the same or similar parts between the various embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the embodiments of the device, computer storage medium, computer program product, and electronic device, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the description in the method embodiments.

[0201] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0202] The above-described embodiments of the present application do not constitute a limitation on the protection scope of the present application.

Claims

1. A method for adapting a core binding strategy, characterized in that: The method is applied to an electronic device, wherein the electronic device includes a processor having multiple cores, and the method includes: Acquire a configuration file, wherein the configuration file includes core binding strategy parameters adapted to the electronic device; Parsing the configuration file to obtain the core binding policy parameters; wherein the core binding policy parameters include at least one target thread and a target binding core corresponding to each target thread in the at least one target thread; According to the core binding policy parameters, each of the target threads is bound to the corresponding target binding core.

2. The method according to claim 1, characterized in that The core binding policy parameter is an alternative core binding policy parameter with the highest comprehensive performance obtained by testing multiple alternative core binding policy parameters using a performance dynamic model and a power consumption model, wherein the multiple alternative core binding policy parameters are determined based on the core distribution parameters of the processor and the target thread.

3. The method according to claim 2, characterized in that The performance dynamic model is used to perform performance tests on the multiple candidate core binding policy parameters to obtain at least one performance indicator corresponding to each of the candidate core binding policy parameters; wherein the performance indicator includes an application startup response indicator and / or a sliding response indicator; the power consumption model is used to perform power consumption tests on the multiple candidate core binding policy parameters to obtain the power consumption corresponding to each of the candidate core binding policy parameters; The core binding strategy parameter is an alternative core binding strategy parameter with the highest comprehensive performance determined from among the alternative core binding strategy parameters based on the at least one performance indicator and the power consumption.

4. The method according to any one of claims 1 to 3, characterized in that: The parsing of the configuration file to obtain the core binding policy parameters includes: In response to the electronic device being powered on, the application framework layer of the electronic device parses the configuration file to obtain the core binding policy parameters.

5. The method according to claim 4, characterized in that Binding each of the target threads to the target binding core according to the core binding configuration parameters includes: The application framework layer writes the core binding configuration parameters into the file system of the kernel layer through the write node of the kernel layer of the electronic device; The file system obtains the structure of each target thread in the core binding configuration parameter based on the core binding configuration parameter; The file system calls the core binding interface; Based on the core binding configuration parameters and the structure of each target thread, each target thread is bound to the target binding core through the core binding interface.

6. The method according to claim 1, characterized in that The core binding policy parameters include the target thread names and the target binding core numbers corresponding to the target thread names.

7. The method according to claim 1, characterized in that The target thread is a memory management thread.

8. The method according to claim 7, characterized in that The target thread includes at least one of a memory paging daemon thread kswapd, a memory recycling thread xreclaimer, and a memory compression thread kshrink.

9. An electronic device, characterized in that: It comprises a memory and a processor; the memory and the processor are coupled; the memory is used to store computer program code, the computer program code comprises computer instructions, and when the processor executes the computer instructions, the electronic device executes the method as described in any one of claims 1-8.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program or instruction. When the computer program or instruction is executed on a computer, the computer is enabled to execute the method according to any one of claims 1 to 8.

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